Dose write-only operation to csr_seed trigger illegal instruction exception ?

[chihminchao]

riscv-isa-sim/riscv/csrs.cc

Line 1432 in f7d0dba

/* Read-only access disallowed due to wipe-on-read side effect */

Based on spec
"The seed CSR must be accessed with a read-write instruction. A read-only instruction such as CSRRS/CSRRC
with rs1=x0 or CSRRSI/CSRRCI with uimm=0 will raise an illegal instruction exception. The write value (in rs1
or uimm) must be ignored by implementations. The purpose of the write is to signal polling and flushing."

It doesn't explicitly specify write-only but require read-write instructions

[aswaterman]

The belief of the ARC is that the spec was poorly worded but intended to only forbid read-only accesses. (i.e. write-only accesses are legal.) So, Spike is correct as-is. See riscv/riscv-isa-manual#1540