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Does OpenOCD have any plans to support RISC-V trace? #1158
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A previous issue that may also be relevant here:
Did you mean "it should be able to ..." here? As far as I recall, OpenOCD has basic support for some trace mechanisms (e.g. Arm ETM) but I think just for collecting and dumping the raw or pre-processed data out for analysis elsewhere. Rather than, for example, doing real time tracing? The user manual also mentions different trace mechanisms: But this means that there may already be some abstract/generalised trace layer in OpenOCD under which support for a (the?) RISC-V trace mechanism could perhaps be added? Might be worth asking on the OpenOCD mailing lists for opinions on how adding RISC-V trace support might be approached? I don't know if anybody else has maybe forked OpenOCD and tried adding RISC-V trace support but I couldn't find anything at a glance... |
Thanks Tommy,
will try, thanks
we will find also |
It might also be useful to clarify what RISC-V standards are relevant here. For example, I can see two here: But there may be other standardised or proprietary specifications that are also relevant. And, in relation to the original query - "Does OpenOCD have any plans to support RISC-V trace?" - as ever, what (if anything) happens in this context depends on who might have enough interest, capacity and resources to commit to making progress in terms of implementing this support. This may be interested individuals, companies, other organisations, etc. And, unfortunately, a lot of the time the required resources are simply not (made) available. |
I've seen some trace support in Nuclei OpenOCD: We're also interested in trace support, but haven't started making any changes in OpenOCD yet. |
Yes, there are two RV trace standards, E-Trace (https://github.com/riscv-non-isa/riscv-trace-spec) and N-Trace (https://github.com/riscv-non-isa/tg-nexus-trace). There is no unified protocol standard, which also poses a challenge to the trace support of OpenOCD. |
Many thanks! very useful information. |
Why doesn't the second one (N-Trace) appear here or is it a proprietary rather than an "official" RISC-V International spec?
Edit - oh, Nexus Trace appears here: but not here: because it is not ratified yet. As ever, the preponderance of RISC-V related specifications/extensions causes me no end of confusion when trying to find the master source of authoritative info. :-( |
Yes, exactly. As far as I know, N-Trace is proposed by SiFive, and this N-trace encoder is only strongly bound to the SiFive core. E-trace is proposed by UltraSoc (SIEMENS now), which can be supported by a trace IP independently.
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@zqb-all , @zhangdujiao , @TommyMurphyTM1234 I don't think that support for RISC-V trace decoding and collection belong to OpenOCD project. To me it seems probable that we could support some support for tracing controls, however (see below). There are indeed two different versions of trace spec. However, they both have common functionality described in a separate documents:
The latter is deemed to be shared between E-Trace and N-Trace specifciations. So the it somewhat renders the concern raised @zhangdujiao as mostly obsolete:
Since there is a common control interface, then this can be supported. Moreover, I see that we have a MR (riscv-software-src/riscv-isa-sim#1824) that implements some initial support n-trace encoder in spike and looks like we have a rudimentary implementation of trace control device here (ucb-bar/spike-devices#8). So probably, it would not hurt to keep tabs on the relevant updates. However, regarding this request from @zhangdujiao :
I don't think it is the task of OpenOCD to parse trace data. There are few issues:
@en-sc , @JanMatCodasip FYI. |
Agree. ARM coresight decoder is supported by a separate project at https://github.com/Linaro/OpenCSD. Perhaps riscv will have a similar project in the future, but this is beyond the scope of OpenOCD. |
I share @aap-sc's opinion on the trace data transfer issues:
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Yes, agree. It seems the proper and only way for OpenOCD to support RISC-V trace control, i.e. to access TE, SMEM components as RISC-V trace spec defined. Now, the OpenOCD could only access DM (Debug Module), right?
Yes, Both E-Trace and N-Trace share the same ingress port and control registers. The difference is the principle of trace data encoding and encapsulation. |
Currently, GDB + OpenOCD only supports debugging of RISC-V SoC. It should not be able to directly access trace components such as the Trace Encoder and SMEM. Furthermore, it cannot parse trace data. Is there a plan to support trace functionality?
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