should be a SBI call

[ingallsj]

There is considerable complexity behind this sentence:

timing-fences/prespecifications/fence_time.adoc

Line 107 in 917803d

The _fence.time_ semantics MUST be propagated to the core bus, to all peripherals so that they correctly deal with it.

In SoCs integrating multiple cores and bus agents, this essentially means "call the power management sequence to reset the chip, and do everything but reset".

It is not realistic, nor RISC, for a single instruction executed in one core to clear all state in the world, e.g., including LLC replacement metadata and DRAM / persistent memory controller read/write buffering.

Cores that are isolated enough to be able to natively execute this instruction likely are not concerned with hosting untrusted applications.

Creating an instruction with the intent of only trapping it seems like the long way to go about making a SBI call.

Above I have made assumptions about use cases, so I'm curious to hear counter-examples where the native instruction suffices in systems hosting multi-tenant workloads.