RP1 clock debugging #6363

Fixes: d869ef6a96a3 ("drm/vc4: Add debugfs node that dumps the vc5 gamma PWL entries") Signed-off-by: Dave Stevenson <[email protected]>

CSI2 devices are meant to use the 1Xnn formats rather than 2Xnn such as MEDIA_BUS_FMT_UYVY8_2X8. For devices with ADV7180_FLAG_MIPI_CSI2 set, use MEDIA_BUS_FMT_UYVY8_1X16. Signed-off-by: Dave Stevenson <[email protected]>

For CSI2 receivers that need to know the link frequency, add it as a control to the driver. Interlaced modes are 216Mbp/s or 108MHz, whilst going through the I2P to deinterlace gives 432Mb/s or 216MHz. Signed-off-by: Dave Stevenson <[email protected]>

The forced conversion of native CS lines into software CS lines is done whether or not the controller has been given any CS lines to use. This breaks the use of the spi0-0cs overlay to prevent SPI from claiming any CS lines, particularly with spidev which doesn't pass in the SPI_NO_CS flag at creation. Use the presence of an empty cs-gpios property as an indication that no CS lines should be used, bypassing the native CS conversion code. See: raspberrypi#5835 Signed-off-by: Phil Elwell <[email protected]>

Signed-off-by: Dom Cobley <[email protected]>

2712D0 has a simpler colourspace conversion matrix block so set that up. Signed-off-by: Dom Cobley <[email protected]>

2712D0 has increased the fifo sizes of MAI_THR blocks, resulting in adjusted bit offsets. Handle that. Signed-off-by: Dom Cobley <[email protected]>

…ve once vc4_hvs_dlist_free_work was iterating through the list of stale dlist entries and reading the frame count and active flags from the hardware for each one. Read the frame count and active flags once, and then use the cached value in the loop. Signed-off-by: Dave Stevenson <[email protected]>

This is largely for debug at present. For reasons unknown we are not getting the end of frame interrupts that should trigger a sweep of stale dlist entries. On allocation failure clear out ALL stale entries, and retry the allocation. Log the interrupt status so we have debug regarding whether the HVS believes the interrupt is enabled. Signed-off-by: Dave Stevenson <[email protected]>

See commit 511ce37 ("mmc: Add MMC host software queue support") Introduced in 5.8, this feature lets the block layer issue up to 2 pending requests to the MMC layer which in certain cases can improve throughput, but in the case of this driver can significantly reduce context switching when performing random reads. On bcm2837 with a performant class A1 card, context switches under FIO random 4k reads go from ~8800 per second to ~5800, with a reduction in hardIRQs per second from ~5800 to ~4000. There is no appreciable difference in throughput. For bcm2835, and for workloads other than random read, HSQ is a wash in terms of throughput and CPU load. So, use it by default. Signed-off-by: Jonathan Bell <[email protected]>

There are three disable bits, one for each bus-instance type. Add a quirk to cover the FS/LS type, and update the slightly mangled quirk descriptions in the process. Signed-off-by: Jonathan Bell <[email protected]>

There are three parkmode disable bits, one for each bus instance type. Add FS/LS and parse the quirk out of DT. Also update the slightly mangled quirk descriptions. Signed-off-by: Jonathan Bell <[email protected]>

With the command line parser now providing the information about the tv mode, use that as the preferred choice for initialising the default of the tv_mode property. Signed-off-by: Dave Stevenson <[email protected]>

Calculate the HCNT and LCNT values for all modes using the rise and fall times of SCL, the aim being a 50/50 mark/space ratio. Signed-off-by: Phil Elwell <[email protected]>

Add support for non-standard bus speeds by treating them as detuned versions of the slowest standard speed not less than the requested speed. Signed-off-by: Phil Elwell <[email protected]>

There are multiple causes of interrupts, errors being one, and only the receipt of data warrants continued polling. See: raspberrypi#2676 Signed-off-by: Phil Elwell <[email protected]>

The dedicated dma40 memcpy code is no longer used, and without a prototype the kernel build fails. Delete it. Signed-off-by: Phil Elwell <[email protected]>

Drops downstream patch to v4l2_mem2mem, and uses the new mainline flag to achieve the same functionality Signed-off-by: Dave Stevenson <[email protected]>

There is no point in trying to create a dlist entry for planes that have a 0 crtc size, and it can also cause grief in the vc6 dlist generation as it takes width-1 and height-1, causing wrap around. Drop these planes. Signed-off-by: Dave Stevenson <[email protected]>

2712D0 removed alpha_mode from control word 2 for choosing fixed alpha and replaced it with the previously reserved value of 3 in alpha_mask. Handle this to fix corrupt desktop when using X on 2712D0 Signed-off-by: Dom Cobley <[email protected]>

We have a read-modify-write race when updating SCALER_DISPCTRL for underrun and end-of-frame interrupts. Ideally it would be fixed via a spinlock or similar, but that will require a reasonable amount of study to ensure we don't get deadlocks. The underrun reporting is only for debug, so disable it for now. Signed-off-by: Dave Stevenson <[email protected]>

The SDIO_CFG register SD_PIN_SEL conflates two settings - whether eMMC HS or SD UHS timings are applied to the interface, and whether or not the card-detect line is functional. SD_PIN_SEL can only be changed when the SD clock isn't running, so add a bcm2712-specific clock setup. Toggling SD_PIN_SEL at runtime means the integrated card-detect feature can't be used, so this controller needs a cd-gpios property. Also fix conditionals for usage of the delay-line PHY - no-1-8-v will imply no bits set in hsemmc_mask or uhs_mask, so remove it. Signed-off-by: Jonathan Bell <[email protected]>

The code was reducing the number of components by one when we were not blending with alpha. But that only makes sense if the components include alpha. For YUV, we were reducing the number of components for Y from one to zero which resulted in no lbm space being allocated. Fixes: raspberrypi#5912 Signed-off-by: Dom Cobley <[email protected]>

If enabled, DMA_BOUNCE_UNALIGNED_KMALLOC causes the swiotlb buffers (64MB, by default) to be allocated, even on systems where the DMA controller can reach all of RAM. This is a huge amount of RAM to waste on a device with only 512MB to start with, such as the Zero 2 W. See: raspberrypi#5975 Signed-off-by: Phil Elwell <[email protected]>

This patch adds the device ID for the BCM4343A2 module, found e.g. in the Infineon (Cypress) CYW43439 chip. The required firmware file is named 'BCM4343A2.hcd'. Signed-off-by: Phil Elwell <[email protected]>

Add this as a value for enum_drm_connector_tv_mode, represented by the string "Mono", to generate video with standard timings but no colour encoding or bursts. Define it to have no pedestal (since only NTSC-M calls for a pedestal). Change default mode creation to acommodate the new tv_mode value which comprises both 525-line and 625-line formats. Signed-off-by: Nick Hollinghurst <[email protected]>

The VEC supports not producing colour bursts for monochrome output. It also has an option for disabling the chroma input to remove chroma from the signal. Now that there is a DRM_MODE_TV_MODE_xx defined for monochrome, plumb this in. Signed-off-by: Dave Stevenson <[email protected]>

PLL_AUDIO has a ternary divider (a copy of the secondary divider) and PLL_VIDEO has a primary phased output. Signed-off-by: Jonathan Bell <[email protected]>

Add ALSA jack detection to the vc4-hdmi audio driver so userspace knows when to add/remove HDMI audio devices. Signed-off-by: David Turner <[email protected]>

The newer Raspberry Pi 5" and 7" panels have a slightly different register map to the original one. Add a new driver for this regulator. Signed-off-by: Dave Stevenson <[email protected]>

This new panel uses the ILI9881C IC but needs an alternate init sequence, and therefore requires a new compatible string. Signed-off-by: Dave Stevenson <[email protected]>

Not all panels use all 4 data lanes, so allow configuration based on the compatible string. Signed-off-by: Dave Stevenson <[email protected]>

Add configuration for the 5" and 7" Raspberry Pi 720x1280 DSI panels based on ili9881. Signed-off-by: Dave Stevenson <[email protected]>

i2c_mux_add_adapter takes a force_nr parameter that allows an explicit bus number to be associated with a channel. However, only i2c-mux-reg and i2c-mux-gpio make use of it. To help with situations where it is desirable to have a fixed, known base address for the channels of a mux, create a "base-nr" property. When force_nr is 0 and base-nr is set and non-zero, form a force_nr value from the sum of base-nr and the channel ID. Signed-off-by: Phil Elwell <[email protected]>

Reapply some defconfig that got lost in the move from 6.8. Note that the ARCH_MMAP_RND_BITS value of 18 is explicitly preserved from 6.8 where the new default would be 16 - this may or may not be the best option. Signed-off-by: Phil Elwell <[email protected]>

This reverts commit 03e607c.

I'm sure the dtc warnings mean well, but overlays don't have enough context for the checkers to give meaningful results. Signed-off-by: Phil Elwell <[email protected]>

In deep sleep mode (DS1) ARM is off and once exit trigger comes than mailbox Interrupt comes to host and whole reinitiation should be done in the ARM to start TX/RX. Also fix below issus for DS1 exit: 1. Sent Tx Control frame only after firmware redownload complete (check F2 Ready before sending Tx Control frame to Firmware) 2. intermittent High DS1 TX Exit latency time (almost 3sec) ==> This is fixed by skipping host Mailbox interrupt Multiple times (ulp state mechanism) 3. RX GlOM save/restore in Firmware 4. Add ULP event enable & event_msgs_ext iovar configuration in FMAC 5. Add ULP_EVENT_RECV state machine for sbwad support 6. Support 2 Byte Shared memory read for DS1 Exit HUDI implementation Signed-off-by: Praveen Babu C <[email protected]> Signed-off-by: Naveen Gupta <[email protected]> [Merge from 4.14.77 to 5.4.18; set BRCMF_SDIO_MAX_ACCESS_ERRORS to 20] Signed-off-by: Chi-hsien Lin <[email protected]> JIRA: SWWLAN-135583 JIRA: SWWLAN-136577

1. If firmware supports 4-way handshake offload but not supports DPP 4-way offload, when user first connects encryption network, driver will set "sup_wpa 1" to firmware, but it will further result in DPP connection failure since firmware won't send EAPOL frame to host. 2. Fix DPP AP mode handling action frames. 3. For some firmware without fwsup support, the join procedure will be skipped due to "sup_wpa" iovar returning not-support. Check the fwsup feature before do such iovar. Signed-off-by: Kurt Lee <[email protected]> Signed-off-by: Double Lo <[email protected]> Signed-off-by: Chi-hsien Lin <[email protected]>

Firmware has SME functionality but would like the userspace to handle SAE authentication. This patch adds support for such an external SAE authentication mechanism in station mode. Signed-off-by: Chung-Hsien Hsu <[email protected]> Signed-off-by: Chi-hsien Lin <[email protected]>

Commit 7d239fb broke 802.1X authentication by setting profile->use_fwsup = NONE whenever PSK is not used. However 802.1X does not use PSK and requires profile->use_fwsup set to 1X, or brcmf_cfg80211_set_pmk() fails. Fix this by checking that profile->use_fwsup is not already set to 1X and avoid setting it to NONE in that case. Fixes: 7d239fb (brcmfmac: Fix interoperating DPP and other encryption network access) Fixes: raspberrypi#5964

This sensor has been added to the Linux kernel with v6.9. Signed-off-by: Javier Carrasco <[email protected]>

Support for the Amphenol Chipcap 2 humidity and temperature sensor has been added to the Linux kernel with v6.9. This I2C device provides three interrupt sources and requires a dedicated regulator to operate, which makes it a bit more complex than the current devices supported by i2c-sensor. Therefore, a dedicated file has been implemented. Signed-off-by: Javier Carrasco <[email protected]>

Update the overlay build rules to use the dtbs-list mechanism. Also include the README, and don't set the executable bits. Signed-off-by: Phil Elwell <[email protected]>

Application class A2 cards require CQ to be enabled to realise their stated performance figures. Add support to enable/disable card CQ via the Performance Enhancement extension register, and cater for the slight differences in command set versus eMMC. Signed-off-by: Jonathan Bell <[email protected]>

CQHCI keeps track of tags in flight with internal timers, so the clock frequency driving the timer needs to be specified. The config registers default to 0 (100kHz) which means timeouts will be significantly shorter than they should be. Assume the timer clock comes from the controller base clock. Signed-off-by: Jonathan Bell <[email protected]>

The bootloader sets this as the controller base clock. Signed-off-by: Jonathan Bell <[email protected]>

The Performance Extension register is regularly accessed in a hot path to do write cache flushes. Don't invoke kmalloc/kfree for every access, preallocate a 512B buffer for this purpose. Also remove an unused alloc in sd_enable_cache(). Signed-off-by: Jonathan Bell <[email protected]>

Add a LED_FULL trigger equivalent to mmc_start_request() in mmc_cqe_start_req(), otherwise it stays off forever. Signed-off-by: Jonathan Bell <[email protected]>

Command Queueing on Linux with SD cards is new, with the potential to cause filesystem corruption due to bugs in software or card firmware(s). Default to disabled unless a) we know the interface connects to an eMMC device or b) we want it switched on. Signed-off-by: Jonathan Bell <[email protected]>

This provides the missing cache information for bcm2712 lscpu now reports: Caches (sum of all): L1d: 256 KiB (4 instances) L1i: 256 KiB (4 instances) L2: 2 MiB (4 instances) L3: 2 MiB (1 instance) Signed-off-by: Dom Cobley <[email protected]>

For unknown reasons the controller seems to reset the idle polling timer interval on CQE enable/disable to 8 clocks which is extremely short. Just use the reset value in the eMMC spec (4096 clock periods which at 200MHz is ~20uS). Signed-off-by: Jonathan Bell <[email protected]>

The default was to have enable_bg_fill disabled and the first plane set it if it wasn't opaque and covering the whole screen. However that meant that if no planes were enabled, then the background fill wasn't enabled, and would give a striped output from the uninitialised output buffer. Initialise it to enabled to avoid this. Signed-off-by: Dave Stevenson <[email protected]>

The RPi5 firmware also supports exporting the customer public key stored in flash via device-tree. Define the node so that the firmware can populate it. Signed-off-by: Tim Gover <[email protected]>

Since I noticed that sometimes changing sample rates causes some digital quirks and noises, I've changed the function to mute the output before performing the changes and then unmute it when an error occurs or the parameters got set. Signed-off-by: Alessandro Marcon <[email protected]>

Add support for the PCF2131 RTC to the i2c-rtc and i2c-rtc-gpio overlays.

The eMMC spec says that in certain circumstances the controller can't respond to a halt request - in practice, this occurs if a CMD timeout happens (card went away/crashed). Clear the halt request by writing 0 to CQHCI_CTL. Also fix a logic error testing for halt in cqhci_request. Signed-off-by: Jonathan Bell <[email protected]>

Certain status bits in these registers may need polling outside of SD-specific code. Export in sd_ops.h Signed-off-by: Jonathan Bell <[email protected]>

Don't attempt to turn on CQ if the other mandatory features are not indicated as supported by the card. Also make sure that the register write actually stuck, as some cards claim support but never report back that the queue engine is enabled. Signed-off-by: Jonathan Bell <[email protected]>

Also report the card's supported queue depth in the message log. Signed-off-by: Jonathan Bell <[email protected]>

The spec allows for up to two 512-byte pages to be allocated for the Extension Register General Info block, so allocate accordingly. Signed-off-by: Jonathan Bell <[email protected]>

Newer versions of the DesignWare I2C block support the detection of stuck signals, and a mechanism to recover from them. Add the required software support to the driver. This change was prompted by the observation that reading a single byte from register 0 of a VEML7700 seems to cause it to issue an ACK too early, and the controller to complain about losing arbitration. There is a suspicion that this may be a more widespread problem, but at least this patch prevents the bus from locking up. See: raspberrypi#6057 Signed-off-by: Phil Elwell <[email protected]>

Disable HS400 support on CM5 until this is proved to be stable. Signed-off-by: Tim Gover <[email protected]>

In the absence of a value in Device Tree, set the SDA hold time to half the SCL low time. Signed-off-by: Phil Elwell <[email protected]>

See: raspberrypi#6077 Signed-off-by: Phil Elwell <[email protected]>

The GPIO start for each bank - min_gpio - must be used in the IRQ handler. Signed-off-by: Phil Elwell <[email protected]>

Support the use of the brcm,pins property for GPIOs in banks 1 and 2, but only for inputs and outputs - no other legacy mapping. Signed-off-by: Phil Elwell <[email protected]>

See: raspberrypi#6077 Signed-off-by: Phil Elwell <[email protected]>

When setting the interrupt type, it is unlikely that any latched events are of interest, so clear them. Signed-off-by: Phil Elwell <[email protected]>

This sensor is available since v6.8. Signed-off-by: Javier Carrasco <[email protected]>

This device has been supported since v4.1, and overly support was added recently. Signed-off-by: Javier Carrasco <[email protected]>

This device has been supported since v4.14. Its driver also supports the recently introduced as7331 spectral UV sensor. Signed-off-by: Javier Carrasco <[email protected]>

Add this sensor to i2c-sensor-common.dtsi Signed-off-by: Javier Carrasco <[email protected]>

This supports reading and writing OTP using the firmware mailbox interface. It needs supporting firmware to run. Signed-off-by: Dom Cobley <[email protected]>

Signed-off-by: Dom Cobley <[email protected]>

Applying MMC_QUIRK_BROKEN_SD_CACHE is broken, as the card's extended registers are parsed prior to the quirk being applied in mmc_blk. Split this out into an SD-specific list of quirks and apply in mmc_sd_init_card instead. Fixes: c467c8f ("mmc: Add MMC_QUIRK_BROKEN_SD_CACHE for Kingston Canvas Go Plus from 11/2019") Signed-off-by: Jonathan Bell <[email protected]>

Samsung EVO Plus, Pro Plus and Evo Ultimate cards of this era appear to have a broken cache-flush implementation when operating in CQ mode. Unfortunately the cards seem to use a separate CID name string for every variant and capacity, so nobble the cache feature for this MANFID, OEMID and year. Turning this off seems to have negligible impact on random-write throughput in non-CQ mode. Signed-off-by: Jonathan Bell <[email protected]>

Enhanced Strobe and clock gating are set in the SDHCI_VENDOR register, so make the driver aware it needs to do this for this controller. Signed-off-by: Jonathan Bell <[email protected]>

CI builds are done with debug info disabled, but this removes some members from struct module. This causes builds to fail if there is an ABI reference for the current ABI. Define these members unconditionally, so that there is no ABI change.

Get rid of the remaining node.js warnings by updating the actions. Signed-off-by: Phil Elwell <[email protected]>

In the 6.6 kernel, devices that use the raspberrypi firmware driver should be children of the firmware node. Signed-off-by: Phil Elwell <[email protected]>

See: raspberrypi#5797 See: raspberrypi#6102 Signed-off-by: Phil Elwell <[email protected]>

The property should be a u8, and should target the non-periodic SuperSpeed transmit FIFO not the periodic one. Signed-off-by: Jonathan Bell <[email protected]>

The UART source clock is 50MHz not 100MHz, so fix the fake-clock used to munge the baudrate. See https://forums.raspberrypi.com/viewtopic.php?p=2212755 Signed-off-by: Jonathan Bell <[email protected]>

The soundcard drivers originally used snd_pcm_format_physical_width, but a later commit changed that to snd_pcm_format_width because the in-memory sample storage width should not be a factor in determining the bclk_ratio. However, the physical width rounds the sample bits up to the nearest power of 2, which makes it easier to find integer clock divisors. Restore the old behaviour, but with an implementation that makes it clear what is going on. See: raspberrypi#6104 Signed-off-by: Phil Elwell <[email protected]>

Requesting a GPIO as an interrupt source does not automatically make it an input (or even a GPIO pin). Add the necessary pinctrl nodes to the overlays that don't already do this. See: raspberrypi#6106 Signed-off-by: Phil Elwell <[email protected]>

Make CONFIG_FB_BCM2708 select CONFIG_FB_DEVICE, to avoid potential build problems. See: raspberrypi#6059 Signed-off-by: Phil Elwell <[email protected]>

See: raspberrypi#5697 Signed-off-by: Phil Elwell <[email protected]>

Delete the reference to the EMMC/SD card detect signal because the pin is used for ANT1 on CM5. Signed-off-by: Phil Elwell <[email protected]>

Use the same ant1/ant2/noant controls as CM4. Signed-off-by: Phil Elwell <[email protected]>

The magic required to make requesting a GPIO automatically change the pinmux settings is currently absent. Work around that by explicitly requesting that the ANT pins be in GPIO mode. Signed-off-by: Phil Elwell <[email protected]>

The firmware stops vc4-kms-v3d and vc4-fkms-v3d loading if the system has less than 512MB of RAM. It can work if gpu_mem and CMA heap size are set appropriately, but can't be guaranteed. Document this restriction. Also drops Eric's name from the overlay description as it isn't relevant or accurate anymore. Signed-off-by: Dave Stevenson <[email protected]>

The legacy stack had an option to have a GPIO track frame start and end events to give basic synchronisation to the incoming image stream. https://forums.raspberrypi.com/viewtopic.php?t=190314 Replicate this in the kernel Unicam driver. Signed-off-by: Dave Stevenson <[email protected]>

Unicam now takes an optional GPIO to expose frame start/end timing, so add an override to configure that. Signed-off-by: Dave Stevenson <[email protected]>

gpio-ranges declares a relationship between pinctrl and GPIO controllers. It is required for "strict" mode to work. Signed-off-by: Phil Elwell <[email protected]>

Setting strict_gpiod to Y makes libgpiod and the gpiod utilities behave as documented, i.e. pins are returned to being GPIO inputs when they are released. drivers/pinctrl/bcm/pinctrl-bcm2835.c Signed-off-by: Phil Elwell <[email protected]>

Setting strict_gpiod to Y makes libgpiod and the gpiod utilities behave as documented, i.e. pins are returned to being GPIO inputs when they are released. Signed-off-by: Phil Elwell <[email protected]>

Setting strict_gpiod disables the GPIO output persistence, such that pins are returned to being inputs when they are released. Note that this applies to the GPIO/pinctrl driver for the user-facing GPIOs, not the SoC GPIOs on Pi 5. Signed-off-by: Phil Elwell <[email protected]>

There are enough dtparams now that not having them in alphabetical order makes them hard to find. Signed-off-by: Phil Elwell <[email protected]>

Describe the function of the strict_gpiod dtparam. Signed-off-by: Phil Elwell <[email protected]>

This code: for_each_sg(sgl, sg, sg_len, i) num_sgs += DIV_ROUND_UP(sg_dma_len(sg), axi_block_len); determines how many hw_desc are allocated. If sg_dma_len(sg)=0 we don't allocate for this sgl. However in the next loop, we will increment loop for this case, and loop gets higher than num_sgs and we trample memory. Signed-off-by: Dom Cobley <[email protected]>

The 8-bit and 16-bit mono formats were missing the appropriate remap entries in the format table. Signed-off-by: Naushir Patuck <[email protected]>

The intention of the vc4.force_hotplug setting is to ignore hotplug completely. It can be used when a display toggles hotplug when switching AV inputs, going into standby or changing a KVM switch, and some side effect of that is unwanted. It turns out while vc4.force_hotplug currently makes hotplug always read as asserted, that isn't enough to stop drm doing lots of stuff, including re-reading the edid. An example of what drm does with a hotplug deasert/assert and vc4.force_hotplug=1 currently is: https://paste.debian.net/hidden/dc07434b/ That is unwanted. Lets ignore the hotplug interrupt completely so drm is blissfully unaware of the hotplug change. Signed-off-by: Dom Cobley <[email protected]>

Escape clock divider was fixed at 5, which is correct at 800Mbps/lane but increasingly out of spec for higher rates. Compute it correctly. High speed timeout was fixed at 5*512 == 2560 byte-clocks per lane. Compute it conservatively to be 8/7 times the line period (assuming there will be a transition to LP some time during each scanline?) keeping the old value as a lower bound. Increase LPRX TO to 1024, and BTA TO to 0xb00 (same value as in bridge/synopsys/dw-mipi-dsi). (No change to LP_CMD_TIM. To do: compute this correctly.) Signed-off-by: Nick Hollinghurst <[email protected]>

"rotation" is listed as a standard property of panels in panel-common.yaml, therefore it would be logical to process that from within the core code should a panel driver not implement the get_orientation hook. Call of_drm_get_panel_orientation from drm_connector_set_orientation_from_panel to get that information. This removes the need for any boiler-plate in panel drivers for calling drm_connector_set_orientation_from_panel or drm_connector_set_panel_orientation. Signed-off-by: Dave Stevenson <[email protected]>

This reverts commit 1b2a736.

This reverts commit 8b2f7c0.

The framework now handles reading orientation from DT, therefore remove the custom get_orientation hook from panel-simple. Signed-off-by: Dave Stevenson <[email protected]>

Support a wider range of pixel clock rates. The driver will round pixclock up to 108MHz/n but tries to honour the desired image width and position (of the centre of the display relative to HSYNC_STARTs). This adds complexity but removes the need for separate 13.5MHz and 15.428MHz modes. Support "fake" double-rate progressive modes (in which only every 2nd scanline is displayed). To work around aspect ratio issues. Add Monochrome TV mode support. Add "vintage" modes (544x380i for System A; 848x738i for System E) when configured for Monochrome. Add a way to create a "custom" display mode from a module parameter. Signed-off-by: Nick Hollinghurst <[email protected]>

This is the IPv4 version of the IPv6 option IP6_NF_TARGET_SYNPROXY, which is already enabled as a module. See: raspberrypi#6127 Signed-off-by: Phil Elwell <[email protected]>

The OV5647 declares that it wants a non-continuous clock in its endpoint configuration. However, it does not expose this information via get_mbus_config. Even if it would implement get_mbus_config the bcm2835-unicam driver would not evaluate the flags field of it. By also specifying clock-noncontinuous on the CSI endpoint itself, the CSI driver properly picks up the requests and enables the non-continuous clock mode. Signed-off-by: Christian Speich <[email protected]>

The autodetection of resolution/timing by the TC358762 can lead to the display being shifted by a pixel or two. Program the TC358762 with the requested mode timing so that it can reproduce it accurately. Signed-off-by: Dave Stevenson <[email protected]>

Reverts 8a4b2fc ("drm/bridge: tc358762: Split register programming from pre-enable to enable") as we want the config commands sent before video starts. Signed-off-by: Dave Stevenson <[email protected]>

The initialisation sequence differs slightly from the documentation in that the clocks are meant to be running before resets and similar. Signed-off-by: Dave Stevenson <[email protected]>

vc4_dsi_bridge_disable wasn't resetting things during shutdown, so add that in. Signed-off-by: Dave Stevenson <[email protected]>

The block must be enabled for the FIFO resets to be actioned, so ensure this is the case. Signed-off-by: Dave Stevenson <[email protected]>

DSI0 is misbehaving and needs to action things on vblank to work around it. Add a new hook to call across during vblank. Signed-off-by: Dave Stevenson <[email protected]>

The pixel to byte FIFO appears to not always reset correctly, which can lead to colour errors and/or horizontal shifts. Reset on every vblank to work around the issue. Signed-off-by: Dave Stevenson <[email protected]>

DSI0 can take the clock from either PLLA or PLLD. PLLA is the default muxing, but PLLD is considered the more stable. Switch to using PLLD. Signed-off-by: Dave Stevenson <[email protected]>

PLLD is considered more stable than PLLA as it doesn't get varied. The clock muxing has been updated to driver DSI0 from PLLD, so update DT to match. Signed-off-by: Dave Stevenson <[email protected]>

The 7inch panel is one line off the screen both horizontally and vertically. Alter the panel mode to correct this. Signed-off-by: Dave Stevenson <[email protected]>

The Toshiba bridge is very fussy and doesn't like the CM3 output when being told to produce a 27.777MHz pixel clock, which is an almost perfect match to the DSI link integer divider. Increasing to 30MHz will switch the DSI link from 333MHz to 400MHz and makes the bridge happy with the same video timing as works on Pi4. (Pi4 will be using a link frequency of 375MHz due to a 3GHz parent PLL). Signed-off-by: Dave Stevenson <[email protected]>

The TC358762 bridge and panel decodes the mode differently on DSI0 to DSI1 for no obvious reason, and results in a shift off the screen. Whilst it would be possible to change the compatible used for the panel, that then messes up Pi5. As it appears to be restricted to vc4 DSI0, fix up the mode in vc4_dsi. Signed-off-by: Dave Stevenson <[email protected]>

Adds a shutdown function to turn off the backlight, bridge, and touch controller on shutdown. Signed-off-by: Dave Stevenson <[email protected]>

This overlay simplifies the configuration of the Coral Edge TPU (Single and Dual Edge) on the Pi 5.

This new format corresponds to the Raspberry Pi legacy DPI mode 3. Signed-off-by: Nick Hollinghurst <[email protected]>

in-tech smart charging is now called chargebyte. Our product name seems to be more stable than our company name, so drop them where it's possible. Signed-off-by: Stefan Wahren <[email protected]>

Signed-off-by: Dave Stevenson <[email protected]>

Essentially a rename of the equivalent overlay for the SC16IS752. Signed-off-by: Phil Elwell <[email protected]>

BCACHEFS is a new, copy on write filesystem. Enable it as a module for evaluation, along with some of the optional features. See: raspberrypi#6135 Signed-off-by: Phil Elwell <[email protected]>

This reverts commit c6ee931.

This reverts commit 2f8da7f.

commit 8ff0598 upstream. Until now after a bcm2835 pin was freed its pinmux was set to GPIO_IN. So in case it was configured as GPIO_OUT before the configured output level also get lost. As long as GPIO sysfs was used this wasn't actually a problem because the pins and their possible output level were kept by sysfs. Since more and more Raspberry Pi users start using libgpiod they are confused about this behavior. So make the pin freeing behavior of GPIO_OUT configurable via module parameter. In case pinctrl-bcm2835.persist_gpio_outputs is set to 1, the output level is kept. This patch based on the downstream work of Phil Elwell. Link: raspberrypi#6117 Signed-off-by: Stefan Wahren <[email protected]> Message-ID: <[email protected]> Signed-off-by: Linus Walleij <[email protected]>

Having accepted the upstream change to add the persist_gpio_outputs parameter, make it true by default. See: raspberrypi#6117 Signed-off-by: Phil Elwell <[email protected]>

Following 8ff0598, adopt the same parameter name but with the opposite default. Signed-off-by: Phil Elwell <[email protected]>

Following the adoption upstream of a similar parameter but with another name, update the dtparam definitions to use the new name and sense. Signed-off-by: Phil Elwell <[email protected]>

vc4_disable_vblank assumed that vc4_encoder was always assigned, which isn't guaranteed. If it isn't assigned then disable the interrupt anyway as it's not connected. raspberrypi#6146 Fixes: 63c0bcc ("drm/vc4: Add option to call from crtc to encoder on vblank") Signed-off-by: Dave Stevenson <[email protected]>

Pi5 has no VCHIQ to support the snd_bcm2835 firmware audio driver, so remove the reference to it from bootargs. https://forums.raspberrypi.com/viewtopic.php?p=2219395#p2219395 Signed-off-by: Dave Stevenson <[email protected]>

The firmware needs 16 pixel alignment on RGBx 32bpp formats, which would be 64 byte. The driver was only setting 32byte alignment. Signed-off-by: Dave Stevenson <[email protected]>

Even when configured to use only gpiod CS lines, the DW SPI controller still expects a bit to be set in the SER register, otherwise transfers stall. For the csgpiod case, nominate bit 0 for the job. See: raspberrypi#6159 Signed-off-by: Phil Elwell <[email protected]>

For video encoding, if the framerate was set after the component was created, then it wasn't set correctly on the port, and an old value was encoded in the bitstream. Update the port status when the framerate is set. raspberrypi/rpicam-apps#664 Signed-off-by: Dave Stevenson <[email protected]>

If PCIE1 is left with the default (zero) AXI QoS values, endpoints can receive extremely poor service for non-posted transactions e.g. reads. Such transactions can take milliseconds to complete on a contended system. Bump priorities for every TC above the non-realtime greedy peripherals in BCM2712, to allow reasonable service without competing against hard realtime peripherals. Signed-off-by: Jonathan Bell <[email protected]>

noints mode disables 2 fragments that configure a GPIO to be used for the interrupt line from the MCP23017, but fails to remove the pinctrl-0 reference or pinctrl-names. It therefore fails to load due to an invalid phandle. Move the pinctrl-0 and pinctrl-names properties so they also get disabled by the noints override. https://forums.raspberrypi.com/viewtopic.php?t=370907 Signed-off-by: Dave Stevenson <[email protected]>

Add shutdown and remove hooks so that the panel gets powered off with the system. Signed-off-by: Dave Stevenson <[email protected]>

As with many microcontrollers, the panel wants to use clock stretching during a read so that the appropriate return value can be generated and programmed into the hardware. With Pi0-3 really not supporting clock stretching, this resulted in the panel firmware dying. Insert a delay between the write and the read to give the firmware a chance to generate the relevant return value. Signed-off-by: Dave Stevenson <[email protected]>

There are no MEDIA_BUS_FMT_* defines for GRB or BRG, and adding them is a pain. Add a DT override to allow setting the order. Signed-off-by: Dave Stevenson <[email protected]>

Sets the new DT property for rgb-order. Signed-off-by: Dave Stevenson <[email protected]>

L1 sub-states require the connection of the CLKREQ# auxiliary signal which is a PCB-level decision, and also depends on the vagrancies of adapters/interposers/slots that may exist between the chip and the endpoint. If this parameter is present, and the RC driver sees an L1 substate capability in the endpoint, then the result is a broken link if CLKREQ# isn't end-to-end connected - regardless of the state of the L1.x enable bits in the RC. Board-specific methods (HAT+ overlay, board DTB) should define this property if required. Signed-off-by: Jonathan Bell <[email protected]>

Interop testing with the M.2 HAT has revealed that there are many quirky endpoint devices out there, so users should have a way of rapidly iterating to find which quirk is causing reliability issues. Signed-off-by: Jonathan Bell <[email protected]>

There is already an sdio-pi5 overlays, but the automatic mapping was missing. Signed-off-by: Phil Elwell <[email protected]>

The stride value reported for output image buffers should be at least as large as any value that was passed in by the caller (subject to correct alignment for the pixel format). If the value is zero (meaning no value was passed), or is too small, the minimum acceptable value will be substituted. Signed-off-by: David Plowman <[email protected]>

If a set of read requests are issued by an endpoint, they are streamed into a resynchronisation FIFO prior to exiting the RC. This FIFO has an edge case where it can drop QoS for a request to 0 if there's a single outstanding read request in the FIFO, and another is pushed when the FIFO is popped. Requests with a QoS of 0 can take hundreds of microseconds to complete. By adding an experimentally-determined amount of backpressure on the pop side, the critical level transition can largely be avoided. Signed-off-by: Jonathan Bell <[email protected]>

The camera sync parameter declarations include are invalid in that they have both embedded string values and following cell values. The intention here was to use the cell values, but the embedded "0" was not removed as it should have been. The implication of this mistake is that inverted sync flags would be ignored because the 0 value corresponds to GPIO_ACTIVE_HIGH. The extra cell value would be treated as the start of another override, but then ignored because the end of the parameter is reached. These errors should have been picked up by the automated checks, but the base dts files weren't subjected to the same validation. This has now been corrected. Signed-off-by: Phil Elwell <[email protected]>

The naming of backlight devices is not terribly useful for associating a backlight controller with a display (assuming it is attached to one). Add a sysfs node that will return a display name that can be set by other subsystems. Signed-off-by: Dave Stevenson <[email protected]>

Pass the DRM connector name to any configured backlight device so that userspace can associate the two items. Ideally this should be in drm_panel, but it is bridge/panel that creates the drm_connector and therefore knows the name. Signed-off-by: Dave Stevenson <[email protected]>

Add version 4.17.1 of the Hailo PCIe device drivers. Sourced from https://github.com/hailo-ai/hailort-drivers/ Signed-off-by: Naushir Patuck <[email protected]>

Signed-off-by: Phil Elwell <[email protected]>

I225-V network adapters have a buggy ROM that won't complete internal initialisation if (at least) BAR0 has an assigned address of 0x0. Add a parameter to the pciex1-compat-pi5 overlay to make outbound addresses start at 2GB. Signed-off-by: Jonathan Bell <[email protected]>

Update rpi-simple-soundcard.c with 384kHz support.

raspberrypi#6193) vc4/hdmi: Fix Hsync and Vsync polarity changes Polarity bits were only ever set and never cleared. Make sure they can also be cleared. Signed-off-by: Michiel Vanbiervliet <[email protected]>

The rpi-otp driver uses a virtualised, OTP-relative addressing scheme. However, when instance nodes are children of "/soc" they appear to be addressable directly by the host, which is wrong (but not in a way which causes an error unless one goes looking for one). Add a wrapper (bus) node without a "ranges" property to make the separation clear. See: raspberrypi#6196 Signed-off-by: Phil Elwell <[email protected]>

The current configs enable fou as a module, but fou is not very useful without CONFIG_NET_FOU_IP_TUNNELS, because it can't be used to actually create tunnels: $ sudo ip fou add port 12345 ipproto ipip $ sudo ip link add name fou1 type ipip local any remote 8.8.8.8 \ encap fou encap-sport auto encap-dport 12345 RTNETLINK answers: Invalid argument Enable the option by default. This does not increase memory footprint because fou is not loaded by default. Uncompressed module size goes from 26.3KiB to 32.5KiB. After this change, things work: $ sudo ip fou add port 12345 ipproto ipip $ sudo ip link add name fou1 type ipip local any remote 8.8.8.8 \ encap fou encap-sport auto encap-dport 12345 $ ip link show fou1 8: fou1@NONE: <POINTOPOINT,NOARP> mtu 1472 qdisc noop state DOWN [...] link/ipip 0.0.0.0 peer 8.8.8.8 Signed-off-by: Lorenzo Colitti <[email protected]>

The attached PHY performs parameter validation, so the switch from HS200 to HS (before selecting HS400/HS400es) with a 200MHz clock fails to update pad timings and results in CRC errors from the card. Underclocking the interface is safe, so do that in the downgrade callback. Signed-off-by: Jonathan Bell <[email protected]>

Now that we've figured out why the PHY didn't do the right thing, HS400 is stable again. This reverts commit 6aeacfc. Signed-off-by: Jonathan Bell <[email protected]>

Enhanced strobe means HS200 training can be skipped. Signed-off-by: Jonathan Bell <[email protected]>

SD cards perform cache flushes by a CMD49 extension register write - which needs to be started from the SDHCI command/argument registers and not a CQHCI slot. Host access to SD/CQ registers should be exclusive to one or the other, so issue a halt before doing the command. Signed-off-by: Jonathan Bell <[email protected]>

This gains about 8-12% sequential write speed with the fastest SD/eMMC cards, and Class A1/A2 card sequential performance is only assured with a 4MiB write length. Signed-off-by: Jonathan Bell <[email protected]>

Add a custom property "Output format" that allows the overriding of the default colourspace choice in the way that the old firmware hdmi_pixel_encoding property did. If the chosen format is not supported, then it will still drop back to the older behaviour. This won't be acceptable to upstream, but it adds back the missing functionality of hdmi_pixel_encoding. Signed-off-by: Dave Stevenson <[email protected]>

Following [1], it becomes harder for the CPU DAI to know the correct BCLK ratio. We can either bake the same knowledge into the sound card driver, or implement and use set_bclk_ratio on the codec. This commit does the latter. [1] commit c89e652 ("ASoC: da7213: Add support for mono, set frame width to 32 when possible") Signed-off-by: Phil Elwell <[email protected]>

To ensure that the CPU DAI and codec agree over the BCLK ratio, impose a fixed value of 64 on both of them. Signed-off-by: Phil Elwell <[email protected]>

Include Rados block device (RBD) support in standard kernel builds, a common companion for CEPH which is included. See: raspberrypi#6224 Signed-off-by: Phil Elwell <[email protected]>

If the controller is being reset, then the CQE needs to be reset as well. For removable cards, CQHCI_SSC1 must specify a polling mode (CBC=0) otherwise it's possible that the controller stops emitting periodic CMD13s on card removal, without raising an error status interrupt. Signed-off-by: Jonathan Bell <[email protected]>

Recovery claims the MMC card so the card-detect work gets significantly delayed - leading to lots of error recovery loops that can never do anything but fail. Explicitly detect the card after CQE has halted and bail if it's not there. Also ratelimit a not-very-descriptive warning - one occurrence in dmesg is enough to signal that something is amiss. Signed-off-by: Jonathan Bell <[email protected]>

fix: Fix wrong Pironman 5 ir default pin number fix: Change space indentation to tab Signed-off-by: Cavon Lee <[email protected]>

Fixes: 0328609("drivers/gpio: Add a driver that wraps the PWM API as a GPIO controller") Signed-off-by: Ratchanan Srirattanamet <[email protected]>

Ensure that the various options of modules vs builtin results in being able to call into the backlight code. raspberrypi#6198 Fixes: 573f8fd ("drm/bridge: panel: Name an associated backlight device") Signed-off-by: Dave Stevenson <[email protected]>

Both bcm283x-rpi-csi1-2lane.dtsi and bcm283x-rpi-lan7515.dtsi are linked to "../arm/boot/dts/" instead of "../arm/boot/dts/broadcom", so the links are broken. Fixes: d060fc0 ("BCM2708: Add core Device Tree support") Signed-off-by: Álvaro Fernández Rojas <[email protected]>

The rework in fs/ntfs3: Reduce stack usage changes log->page_size but doesn't change the associated log->page_mask and log->page_bits. That results in the bytes value in read_log_page getting a negative value, which is bad when it is passed to memcpy. The kernel panic can be observed when connecting an ntfs formatted drive that has previously been connected to a Windows machine to a Raspberry Pi 5, which by defauilt uses a 16K kernel pagesize. Fixes: 865e7a7 ("fs/ntfs3: Reduce stack usage") Signed-off-by: Dom Cobley <[email protected]>

The kernel C standard changed in 5.18. Remove a layer of indirection around the FIQ bounce buffers, be consistent with pointers to FIQ bounce buffers, and remove open-coded 32-bit clamping of DMA addresses. Also remove a pointless fiq_state initialisation loop. Signed-off-by: Jonathan Bell <[email protected]>

The Y10P, Y12P and Y14P format variants are packed according to the RAW10, RAW12 and RAW14 formats as defined by the MIPI CSI-2 specification. Document it. Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Naushir Patuck <[email protected]>

Add BGR48 and RGB48 16-bit per component image formats. Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Kieran Bingham <[email protected]> Reviewed-by: Naushir Patuck <[email protected]>

Add the Raspberry Pi PiSP Back End uAPI header. The header defines the data type used to configure the PiSP Back End ISP. The detailed description of the types and of the ISP configuration procedure is available at https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf Signed-off-by: Jacopo Mondi <[email protected]>

Add format description for the PiSP Back End configuration parameter buffer. Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Naushir Patuck <[email protected]>

Document the Raspberry Pi compressed RAW Bayer formats. The compression algorithm description is provided by Nick Hollinghurst <[email protected]> from Raspberry Pi. Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Naushir Patuck <[email protected]>

Add bindings for the Raspberry Pi PiSP Back End memory-to-memory image signal processor. Datasheet: https://datasheets.raspberrypi.com/camera/raspberry-pi-image-signal-processor-specification.pdf Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Naushir Patuck <[email protected]>

Add documentation for the PiSP Back End memory-to-memory ISP. Signed-off-by: Jacopo Mondi <[email protected]>

Backport to rpi-6.6.y the mainline version of the PiSP BE driver. The backported version of the driver corresponds to the one available at: https://lore.kernel.org/all/[email protected]/ Signed-off-by: Jacopo Mondi <[email protected]>

The pisp_be_config.h uAPI header file contains a bit-field definition that uses the BIT() helper macro. As the BIT() identifier is not defined in userspace, drop it from the uAPI header. Fixes: c6c49ba ("media: uapi: Add Raspberry Pi PiSP Back End uAPI") Signed-off-by: Jacopo Mondi <[email protected]> Reviewed-by: Tomi Valkeinen <[email protected]>

Add definition and test for 32-bits image formats to the pisp_common.h uAPI header. Signed-off-by: Jacopo Mondi <[email protected]>

The macro used to inspect an image format characteristic use a mixture of capitalized and non-capitalized letters, which is rather unusual for the Linux kernel style. Capitalize all identifiers. Signed-off-by: Jacopo Mondi <[email protected]>

The order of the members of pisp_be_tiles_config is relevant as the driver logic assumes 'config' to be at offset 0. Re-sort the member to match the driver's expectations. Fixes: c6c49ba ("media: uapi: Add Raspberry Pi PiSP Back End uAPI") Signed-off-by: Jacopo Mondi <[email protected]>

Complete the pisp_be_config strcture by adding fields that even if not written to the HW are relevant to complete the uAPI and put it in par with the BSP driver. Fixes: c6c49ba ("media: uapi: Add Raspberry Pi PiSP Back End uAPI") Signed-off-by: Jacopo Mondi <[email protected]>

Re-introduce multi-context support that was dropped from the mainline driver version. Signed-off-by: Jacopo Mondi <[email protected]>

Offset the backend dev-nodes starting at /dev/video20 onwards to maintain backward compatibility with the pre-upstreamed kernel driver. Signed-off-by: Naushir Patuck <[email protected]>

The camera regulator GPIO can be used for other purposes, so the camN_reg override to allow disabling is potentially useful on any platform. camN_gpio is less useful, but isn't invalid. Move these overrides from the CM dt files to bcm270x-rpi.dtsi and bcm2712-rpi.dtsi. Signed-off-by: Dave Stevenson <[email protected]>

Add YAML device tree bindings for the Raspberry Pi RP2040 GPIO Bridge. Signed-off-by: Richard Oliver <[email protected]>

The Raspberry Pi RP2040 GPIO bridge is an I2C-attached device exposing both a Tx-only SPI controller, and a GPIO controller. Due to the relative difference in transfer rates between standard-mode I2C and SPI, the GPIO bridge makes use of 12 MiB of non-volatile storage to cache repeated transfers. This cache is arranged in ~8 KiB blocks and is addressed by the MD5 digest of the data contained therein. Optionally, this driver is able to take advantage of Raspberry Pi RP1 GPIOs to achieve faster than I2C data transfer rates. Signed-off-by: Richard Oliver <[email protected]>

The snps,block-size DT property declares the maximum block size for each channel of the dw-axi-dmac. However, the driver ignores these when setting max_seg_size and uses MAX_BLOCK_SIZE (4096) instead. To take advantage of the efficiencies of larger blocks, calculate the minimum block size across all channels and use that instead. See: raspberrypi#6256 Signed-off-by: Phil Elwell <[email protected]>

Command Queueing requires Write Cache and Power off Notification support from the card - but using the write cache forms a contract with the host whereby the card expects to be told about impending power-down. The implication is that (for performance) the card can do unsafe things with pending write data - including reordering what gets committed to nonvolatile storage at what time. Exposed SD slots and platforms powered by hotpluggable means (i.e. Raspberry Pis) can't guarantee that surprise removal won't happen. To limit the scope for cards to invent new ways to trash filesystems, limit pending writes to 1 (equivalent to the non-CQ behaviour). Signed-off-by: Jonathan Bell <[email protected]>

Leaving card->max_posted_writes unintialised was a bad thing to do. Also, cqe_enable is 1 if hsq is enabled as hsq substitutes the cqhci implementation with its own. Signed-off-by: Jonathan Bell <[email protected]>

Commit 485d942 ("mmc: sdhci-brcmstb: check R1_STATUS for erase/trim/discard") introduced a new flag and defaulted to disabling card busy detection across all platforms with this controller. This is required for IO voltage switching, as the card drives CMD low while the switch is in progress. Signed-off-by: Jonathan Bell <[email protected]>

This reverts commit dd7a154.

The firmware advertises its features as a string of words separated by spaces. Ensure that feature names are only matched in their entirety. Signed-off-by: Phil Elwell <[email protected]>

The Cypress firmwares use "extsae" to indicate wpa_supplicant-hosted SAE/WPA3. Signed-off-by: Phil Elwell <[email protected]>

support sae executed in wpa_supplicant and offload 4-way handshake offload. Signed-off-by: Chien-Chia Chen <[email protected]> JIRA: SWWLAN-142424

Define two new RP1 clocks, representing the MIPI DSI byteclock sources for the dividers used to generate MIPI[01] DPI pixel clocks. (Previously they were represented by "fake" fixed clocks sources). Signed-off-by: Nick Hollinghurst <[email protected]>

Add a new class of clocks to RP1 to represent clock sources whose frequency changes at run-time as a side-effect of some other driver. Specifically this is for the two MIPI DSI byte-clock sources. Signed-off-by: Nick Hollinghurst <[email protected]>

Remove the "dummy" 72MHz fixed clock sources and associate DSI driver with the new "variable" clock sources now defined in RP1 clocks. Also add PLLSYS clock to DSI, which it will need as an alternative clock source in those cases where DPI pixclock > DSI byteclock. Signed-off-by: Nick Hollinghurst <[email protected]>

To support 4 lanes, re-parent DPI clock source between DSI byteclock (using the new "variable sources" defined in clk-rp1) and PLL_SYS. This is to cover cases in which byteclock < pixclock <= 200MHz. Tidying: All frequencies now in Hz (not kHz), where DSI speed is now represented by byteclock to simplify arithmetic. Clamp DPI and byte clocks to their legal ranges; fix up HSTX timeout to avoid an unsafe assumption that it would return to LP state for every scanline. Because of RP1's clock topology, the ratio between DSI and DPI clocks may not be exact with 3 or 4 lanes, leading to slightly irregular timings each time DSI switches between HS and LP states. Tweak to inhibit LP during Horizontal BP when sync pulses were requested. Signed-off-by: Nick Hollinghurst <[email protected]>

It is pointless having the bcm2712 family of dts files and rp1.dtsi in the arch/arm directory tree, since they then require placeholders to include them in arch/arm64 where they are built. The files have no dependencies on other files in the arch/arm tree, so simply move them here. Signed-off-by: Phil Elwell <[email protected]>

CM5 Lite DTBs require minor changes compared to the "heavy" variants. Signed-off-by: Phil Elwell <[email protected]>

Move the aliases and overrrides shared by Pi 5 and CM5 into bcm2712-rpi.dtsi. Signed-off-by: Phil Elwell <[email protected]>

This reverts commit a3d53c8.

The bootloader patches the DT with the correct model string, but it is better not to rely on that by setting it from the start. Signed-off-by: Phil Elwell <[email protected]>

Enabling CONFIG_BRIDGE_VLAN_FILTERING allows bridges to automatically receive and forward packets based on the 802.1q VLAN information and the device/port configuration. See: raspberrypi#6275 Signed-off-by: Xavier L. <[email protected]>

Automatic link power saving plus the ability of a root complex to buffer pending posted write transfers (and consider them complete before being transmitted on the wire) causes compression of updates to GPIO state. The large bandwidth of a Gen 2 x4 link means the writes toggle state inside RP1 as fast as it can go (~20MHz), which is bad for applications wanting bitbash with at least a few microseconds of delay between updates. By tailoring IO access patterns to a special Root Complex register, writes to GPIOs can be stalled until the link wakes - meaning all writes end up with a reasonably consistent minimum pacing (~200ns). Additionally, write barriers have no effect other than to arbitrarily delay some writes by a small, variable amount - so remove the vast majority of these in areas that could be hot-paths. Although the IO memory is mapped with Device strongly-ordered semantics, this doesn't prevent the splitter inside BCM2712 from letting an MMIO read request to a GPIO register get ahead of the pacing writes to the Root Complex register. So each pin state read must flush writes out to the Outer-Shareable domain. Signed-off-by: Jonathan Bell <[email protected]>

Video encode can defer generating the header until the first frame is presented, which allows it to take the colourspace information from the frame rather than just the format. Enable that for the V4L2 driver now that the firmware populates all the parameters. raspberrypi/firmware#1885 Signed-off-by: Dave Stevenson <[email protected]>

We do NOT claim to support decoding in real-time for these levels, but can transcode some content, and handle 1920x1200. Signed-off-by: Dave Stevenson <[email protected]>

TMOD_TO is the transmit-only mode that doesn't put data into the receive FIFO. Using TMOD_TO when the user doesn't want the received data saves CPU time and memory bandwidth. Signed-off-by: Phil Elwell <[email protected]>

TMOD_RO is the receive-only mode that doesn't require data in the transmit FIFO in order to generate clock cycles. Using TMOD_RO when the device doesn't care about the data sent to it saves CPU time and memory bandwidth. Signed-off-by: Phil Elwell <[email protected]>

Disabling the peripheral resets controller state which has a dangerous side-effect of disabling the DMA handshake interface while it is active. This can cause DMA channels to hang. The error recovery pathway will wait for DMA to stop and reset the chip anyway, so mask further FIFO interrupts and let the transfer finish gracefully. Signed-off-by: Jonathan Bell <[email protected]>

Channels 1-2 have a statically configured maximum MSIZE of 8, and channels 3-8 have MSIZE set to 4. The DMAC "helpfully" silently truncates bursts to the hardware supported maximum, so any FIFO read operation with an oversized burst threshold will leave a residue of threshold minus MSIZE rows. As channel allocation is dynamic, this means every client needs to use a maximum of 4 for burst length. AXI AWLEN/ARLEN constraints aren't strictly related to MSIZE, except that bursts won't be issued that are longer than MSIZE beats. Therefore, it's a useful proxy to tell clients of the DMAC the hardware limitations. Signed-off-by: Jonathan Bell <[email protected]>

There's no real need to constrain MEM access widths to 32-bit (or narrower), as the DMAC is intelligent enough to size memory accesses appropriately. Wider accesses are more efficient. Similarly, MEM burst lengths don't need to be a function of DEV burst lengths - the DMAC packs/unpacks data into/from its internal channel FIFOs appropriately. Longer accesses are more efficient. However, the DMAC doesn't have complete support for unaligned accesses, and blocks are always defined in integer multiples of SRC_WIDTH, so odd source lengths or buffer alignments will prevent wide accesses being used, as before. There is an implicit requirement to limit requested DEV read burst lengths to less than the hardware's maximum configured MSIZE - otherwise RX data will be left over at the end of a block. There is no config register that reports this value, so the AXI burst length parameter is used to produce a facsimile of it. Warn if such a request arrives that doesn't respect this. Signed-off-by: Jonathan Bell <[email protected]>

This issue was due to a misconfiguration of the RP1 DMAC due to hardware limitations, not the SPI driver (which was using the incorrect reported maximum burst size to set the FIFO threshold). This reverts commit 6aab06f. Signed-off-by: Jonathan Bell <[email protected]>

If the associated DMA controller has lower burst length support than the level the FIFO is set to, then bytes will be left in the RX FIFO at the end of a DMA block - requiring a round-trip through the timeout interrupt handler rather than an end-of-block DMA interrupt. Signed-off-by: Jonathan Bell <[email protected]>

Do an end-run around ASoC in lieu of not being able to easily find the associated DMA controller capabilities. Signed-off-by: Jonathan Bell <[email protected]>

…ints Valid ranges for the I2S peripheral's FIFO configuration include a depth of 16 - unconditionally setting the burst length to 16 with a fifo threshold of size/2 will cause under/overflows. For DMA engines with restricted capabilities the requested burst length and FIFO thresholds need to be adjusted downward accordingly. Both the RX and TX FIFOs operate on "less-than" thresholds. Setting the TX threshold to fifo_size minus burst means the FIFO is kept nearly-full. Signed-off-by: Jonathan Bell <[email protected]>

The associated DMAC has channels that do not support longer bursts. Signed-off-by: Jonathan Bell <[email protected]>

Whilst BCM2712 does fix using odd horizontal timings, it doesn't work with interlaced modes. Drop the workaround for interlaced modes and revert to the same behaviour as BCM2711. raspberrypi#6281 Signed-off-by: Dave Stevenson <[email protected]>

This produces a hard fail on later (6.11) kernels. See: https://lore.kernel.org/all/[email protected]/ Signed-off-by: Dom Cobley <[email protected]>

Ensure the transmit FIFO has emptied before ending the transfer by dropping the TX threshold to 0 when the last byte has been pushed into the FIFO. Include a similar fix for the non-IRQ paths. See: raspberrypi#6285 Fixes: 6014649 ("spi: dw: Save bandwidth with the TMOD_TO feature") Signed-off-by: Phil Elwell <[email protected]>

The DW SPI interface has a 16-bit clock divider, where the bottom bit of the divisor must be 0. Limit how low the clock speed can go to prevent the clock divider from being truncated, as that could lead to a much higher clock rate than requested. Signed-off-by: Phil Elwell <[email protected]>

Signed-off-by: Phil Elwell <[email protected]>

There is now an ssd1327-spi overlay, but it's of little use without the corresponding display drivers. Add them as modules to the usual defconfig files. Signed-off-by: Phil Elwell <[email protected]>

Using the "cores * 1.5" heuristic, configure the kernel builds for the 4-core GitHub-hosted runners. Signed-off-by: Phil Elwell <[email protected]>

The DT property for the BQ32000 controlled by trickle-resistor-ohms parameter should be "trickle-resistor-ohms", not "abracon,tc-resistor". See: raspberrypi#6291 Signed-off-by: Phil Elwell <[email protected]>

Fix cut-and-paste error spotted during upstreaming process. Signed-off-by: Phil Elwell <[email protected]>

Many HD44780 LCD displays are connected via very common I2C GPIO expander. We have an overlay for connecting the displays directly to GPIOs, but not one for it connected via a backpack. Add such an overlay. Signed-off-by: Dave Stevenson <[email protected]>

The default values defining a 16x2 display weren't documented, so add them. Signed-off-by: Dave Stevenson <[email protected]>

The corresponding driver implementation has seen sufficient testing, so enable by default. Retain the dtparam so it can be turned off for test. Signed-off-by: Jonathan Bell <[email protected]>

In the same way that other subsystems support the setting of device id numbers from Device Tree aliases, allow gpiochip numbers to be derived from "gpiochip<n>" aliases. Signed-off-by: Phil Elwell <[email protected]>

Add a gpiochip0 aliase pointing to the rp1 GPIO node, making it appear as gpiochip0. Signed-off-by: Phil Elwell <[email protected]>

Make the BCM2712's onboard GPIOs start at gpiochip10, marking them out as system resources and preventing accidental use by existing Pi 5 code. Signed-off-by: Phil Elwell <[email protected]>

Allow block devices to be used as caches for other devices. The primary use is to allow small, low latency media to act as caches for spinning rust drives. See: raspberrypi#6303 raspberrypi#455 Signed-off-by: Phil Elwell <[email protected]>

Add CONFIG_ZRAM_WRITEBACK=y and CONFIG_ZRAM_MULTI_COMP=y. See: raspberrypi#2939 Signed-off-by: Phil Elwell <[email protected]>

This reverts commit abb1ad6. See: raspberrypi#6294 Signed-off-by: Phil Elwell <[email protected]>

Commits on Sep 17, 2024

RP1 clock debugging

pelwell committed Sep 17, 2024

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RP1 clock debugging #6363

RP1 clock debugging #6363

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Commits on Sep 17, 2024

RP1 clock debugging #6363

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RP1 clock debugging #6363

Commits on Jul 29, 2024

Commits on Jul 31, 2024

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Commits on Sep 17, 2024