Unmap C.NOP to NOP

qwe661234 · Oct 11, 2023 · 1dc4f9e · 1dc4f9e
1 parent 83a4692
commit 1dc4f9e
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Showing 4 changed files with 13 additions and 11 deletions.
diff --git a/src/decode.c b/src/decode.c
@@ -1255,7 +1255,7 @@ static inline bool op_caddi(rv_insn_t *ir, const uint32_t insn)
     /* dispatch from rd/rs1 field */
     switch (ir->rd) {
     case 0: /* C.NOP */
-        ir->opcode = rv_insn_nop;
+        ir->opcode = rv_insn_cnop;
         break;
     default: /* C.ADDI */
         /* Add 6-bit signed immediate to rds, serving as NOP for X0 register. */
@@ -1320,7 +1320,7 @@ static inline bool op_clui(rv_insn_t *ir, const uint32_t insn)
     /* dispatch from rd/rs1 region */
     switch (ir->rd) {
     case 0: /* Code point: rd = x0 is HINTS */
-        ir->opcode = rv_insn_nop;
+        ir->opcode = rv_insn_cnop;
         break;
     case 2: { /* C.ADDI16SP */
         ir->imm = c_decode_caddi16sp_nzimm(insn);
@@ -1381,7 +1381,7 @@ static inline bool op_cmisc_alu(rv_insn_t *ir, const uint32_t insn)
         /* Code point: rd = x0 is HINTS
          * Code point: shamt = 0 is HINTS
          */
-        ir->opcode = (!ir->rs1 || !ir->shamt) ? rv_insn_nop : rv_insn_csrli;
+        ir->opcode = (!ir->rs1 || !ir->shamt) ? rv_insn_cnop : rv_insn_csrli;
         break;
     case 1: /* C.SRAI */
         ir->shamt = c_decode_cbtype_shamt(insn);
@@ -1448,7 +1448,7 @@ static inline bool op_cslli(rv_insn_t *ir, const uint32_t insn)
     tmp |= (insn & FCI_IMM_6_2) >> 2;
     ir->imm = tmp;
     ir->rd = c_decode_rd(insn);
-    ir->opcode = ir->rd ? rv_insn_cslli : rv_insn_nop;
+    ir->opcode = ir->rd ? rv_insn_cslli : rv_insn_cnop;
     return true;
 }
 
@@ -1470,7 +1470,7 @@ static inline bool op_clwsp(rv_insn_t *ir, const uint32_t insn)
     ir->rd = c_decode_rd(insn);
 
     /* reserved for rd = x0 */
-    ir->opcode = ir->rd ? rv_insn_clwsp : rv_insn_nop;
+    ir->opcode = ir->rd ? rv_insn_clwsp : rv_insn_cnop;
     return true;
 }
 
@@ -1594,7 +1594,7 @@ static inline bool op_ccr(rv_insn_t *ir, const uint32_t insn)
             break;
         default: /* C.MV */
             /* Code point: rd = x0 is HINTS */
-            ir->opcode = ir->rd ? rv_insn_cmv : rv_insn_nop;
+            ir->opcode = ir->rd ? rv_insn_cmv : rv_insn_cnop;
             break;
         }
         break;
@@ -1603,12 +1603,12 @@ static inline bool op_ccr(rv_insn_t *ir, const uint32_t insn)
             ir->opcode = rv_insn_ebreak;
         else if (ir->rs1 && ir->rs2) { /* C.ADD */
             /* Code point: rd = x0 is HINTS */
-            ir->opcode = ir->rd ? rv_insn_cadd : rv_insn_nop;
+            ir->opcode = ir->rd ? rv_insn_cadd : rv_insn_cnop;
         } else if (ir->rs1 && !ir->rs2) /* C.JALR */
             ir->opcode = rv_insn_cjalr;
         else { /* rs2 != x0 AND rs1 = x0 */
             /* Hint */
-            ir->opcode = rv_insn_nop;
+            ir->opcode = rv_insn_cnop;
         }
         break;
     default:

diff --git a/src/decode.h b/src/decode.h
@@ -152,7 +152,7 @@ enum op_field {
         _(caddi4spn, 0, 2, ENC(rd))                 \
         _(clw, 0, 2, ENC(rs1, rd))                  \
         _(csw, 0, 2, ENC(rs1, rs2))                 \
-        /* cnop is mapped to nop */                 \
+        _(cnop, 0, 2, ENC())                        \
         _(caddi, 0, 2, ENC(rd))                     \
         _(cjal, 1, 2, ENC())                        \
         _(cli, 0, 2, ENC(rd))                       \

diff --git a/src/rv32_constopt.c b/src/rv32_constopt.c
@@ -717,7 +717,8 @@ CONSTOPT(clw, { info->is_constant[ir->rd] = false; })
  */
 CONSTOPT(csw, {})
 
-/* C.NOP is mapped to NOP */
+/* C.NOP */
+CONSTOPT(cnop, {})
 
 /* C.ADDI adds the non-zero sign-extended 6-bit immediate to the value in
  * register rd then writes the result to rd. C.ADDI expands into

diff --git a/src/rv32_template.c b/src/rv32_template.c
@@ -807,7 +807,8 @@ RVOP(csw, {
     rv->io.mem_write_w(addr, rv->X[ir->rs2]);
 })
 
-/* C.NOP is mapped to NOP */
+/* C.NOP */
+RVOP(cnop, {/* no operation */})
 
 /* C.ADDI adds the non-zero sign-extended 6-bit immediate to the value in
  * register rd then writes the result to rd. C.ADDI expands into