From d606b84c4ebf6561168b23df51a294dc9e25c451 Mon Sep 17 00:00:00 2001 From: Sean Khan Date: Mon, 8 Apr 2024 16:24:12 -0400 Subject: [PATCH 01/13] qualcommax: Skip compiling unnecessary dtbs Currently the compile phase of the kernel builds `Image dtbs modules`. However, none of the dtbs that get built are used for the final image. This ends up unnecessarily taking CPU cycles and produces a lot of `WARNINGS` that can lead users to believe there's cause for concern. I believe the same principle can be applied to other targets. ``` DTC arch/arm64/boot/dts/qcom/msm8996-mtp.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) DTC arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) DTC arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) DTC arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) DTC arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) DTC arch/arm64/boot/dts/qcom/msm8996-xiaomi-natrium.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) DTC arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dtb arch/arm64/boot/dts/qcom/msm8996.dtsi:2954.36-2962.5: Warning (clocks_property): /soc/clock-controller@6400000: Missing property '#clock-cells' in node /soc/mailbox@9820000 or bad phandle (referred from clocks[2]) ``` Signed-off-by: Sean Khan --- target/linux/qualcommax/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/qualcommax/Makefile b/target/linux/qualcommax/Makefile index ab7f52ae041abe..3c9bb840e31ca6 100644 --- a/target/linux/qualcommax/Makefile +++ b/target/linux/qualcommax/Makefile @@ -4,7 +4,7 @@ ARCH:=aarch64 BOARD:=qualcommax BOARDNAME:=Qualcomm Atheros 802.11ax WiSoC-s FEATURES:=squashfs ramdisk fpu nand rtc emmc -KERNELNAME:=Image dtbs +KERNELNAME:=Image CPU_TYPE:=cortex-a53 SUBTARGETS:=ipq807x ipq60xx From 7c39a95a2f6ae638f173833dc8d4c120e25475c8 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 8 Apr 2024 17:52:22 +0200 Subject: [PATCH 02/13] sdk: include lib/crtsavres.o for powerpc Trying to link certain kernel modules like dahdi-linux when building with the OpenWrt SDK will fail with: openwrt-sdk-apm821xx-sata_gcc-13.2.0_musl.Linux-x86_64/staging_dir/toolchain-powerpc_464fp_gcc-13.2.0_musl/bin/powerpc-openwrt-linux-musl-ld: cannot find arch/powerpc/lib/crtsavres.o: No such file or directory Previously this worked with the PowerPC SDK since we carried a hack that was passing --save-restore-funcs to module LDFLAGS so the linker provided the required functions automatically as without --save-restore-funcs it doesnt do so automatically on relocatable links and as a sideffect did not require the kernel provided crtsaves.o to link against. Now that hack has been removed as upstream kernel now compiles crtsaves.o by default so it can be linked against but its not included in the SDK. So, lets include lib/crtsavres.o when SDK is generated for PowerPC. Fixes: 99c9d8abd677 ("kernel: bump 5.15 to 5.15.148") Signed-off-by: Robert Marko --- target/sdk/Makefile | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/sdk/Makefile b/target/sdk/Makefile index c57a451617333a..d0c0ab7a2b1e3d 100644 --- a/target/sdk/Makefile +++ b/target/sdk/Makefile @@ -68,6 +68,10 @@ KERNEL_FILES_ARCH = \ kernel/asm-offsets.s \ kernel/module.lds +ifeq ($(LINUX_KARCH),powerpc) + KERNEL_FILES_ARCH += lib/crtsavres.o +endif + KERNEL_FILES_BASE := \ .config \ Makefile \ From d4e8653e1e9ec90404d12ea24fb0f8e507b337d5 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 9 Jan 2024 19:54:51 +0000 Subject: [PATCH 03/13] mvebu: puzzle-m90x: wipe rootfs_data on sysupgrade The sysupgrade formware of the Puzzle series is a slightly strange dual-boot approach while remaining compatible with Marvell's SDK firmware upgrade binary format -- which happens to be a full-disk image with GPT partition table. Hence that /lib/upgrade/emmc-puzzle.sh script is like an exotic disease which results from those decisions, and as we also want to somehow stay compatible with the IEI-World stock firmware we got to use it in that same way (we are not compatible with the QNAP-branded identical hardware device anyway). Currently, on sysupgrade the result is that one ends up with the old content of rootfs_data (a GPT partition on those devices) as nothing ever wipes or in any way re-creates the filesystem there. As a simple work-around, let's kill the filesystem on rootfs_data so fstools re-formats it on the next boot. Signed-off-by: Daniel Golle --- .../linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh index 5e5c356ed6946a..9a33b7714ccef2 100755 --- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh +++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh @@ -32,5 +32,7 @@ platform_do_upgrade_emmc() { v "Writing new UUID to /dev/$diskdev..." get_image_dd "$1" of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync + dd if=/dev/zero of=$(find_mmc_part rootfs_data) bs=512 count=8 + sleep 1 } From 1ae3c53466942e05d2ab91c9432c65156f7228a1 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Fri, 23 Feb 2024 16:03:00 +0000 Subject: [PATCH 04/13] mediatek: filogic: switch TP-LINK XDR series to fitblk Instead of using the deprecated FIT partition parser, use the new fitblk driver instead. Signed-off-by: Daniel Golle --- .../mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi | 11 ++++++++++- .../filogic/base-files/lib/upgrade/platform.sh | 6 +++--- target/linux/mediatek/image/filogic.mk | 2 +- 3 files changed, 14 insertions(+), 5 deletions(-) diff --git a/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi b/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi index c851853286a01d..1649b0775de02f 100644 --- a/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi +++ b/target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi @@ -17,6 +17,8 @@ }; chosen { + bootargs = "root=/dev/fit0 rootwait"; + rootdisk = <&ubi_rootdisk>; stdout-path = "serial0:115200n8"; }; @@ -217,8 +219,15 @@ }; partition@580000 { - label = "ubi"; + compatible = "linux,ubi"; reg = <0x580000 0x7800000>; + label = "ubi"; + + volumes { + ubi_rootdisk: ubi-volume-fit { + volname = "fit"; + }; + }; }; }; }; diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 380606412db6a5..6f69706d79b7ac 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -83,6 +83,9 @@ platform_do_upgrade() { bananapi,bpi-r3|\ bananapi,bpi-r3-mini|\ bananapi,bpi-r4|\ + tplink,tl-xdr4288|\ + tplink,tl-xdr6086|\ + tplink,tl-xdr6088|\ xiaomi,redmi-router-ax6000-ubootmod) [ -e /dev/fit0 ] && fitblk /dev/fit0 [ -e /dev/fitrw ] && fitblk /dev/fitrw @@ -132,9 +135,6 @@ platform_do_upgrade() { mediatek,mt7981-rfb|\ netcore,n60|\ qihoo,360t7|\ - tplink,tl-xdr4288|\ - tplink,tl-xdr6086|\ - tplink,tl-xdr6088|\ xiaomi,mi-router-ax3000t-ubootmod|\ xiaomi,mi-router-wr30u-ubootmod) CI_KERNPART="fit" diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index c3de23f5e8c432..818a7cef95b7d4 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -930,7 +930,7 @@ define Device/tplink_tl-xdr-common fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k IMAGE/sysupgrade.itb := append-kernel | \ fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | append-metadata - DEVICE_PACKAGES := kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware + DEVICE_PACKAGES := fitblk kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware ARTIFACTS := preloader.bin bl31-uboot.fip ARTIFACT/preloader.bin := mt7986-bl2 spim-nand-ddr3 endef From 204823ac287998c8725329ab75333ed1098d3cd8 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 8 Apr 2024 18:38:51 +0200 Subject: [PATCH 05/13] scripts/dl_github_archive: use tar -I for ZSTD Instead of relying on env variables for setting the ZSTD compression configuration we can simply do what we do for IB, SDK and the rest and use tar -I to pass "zstd -T0 --ultra -20" directly. This makes it rather clear what is being done and allows to drop the zstd CLI max level override as its usually capped at level 19. Signed-off-by: Robert Marko --- scripts/dl_github_archive.py | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/scripts/dl_github_archive.py b/scripts/dl_github_archive.py index 744c441ca70676..570ed3c62973f6 100755 --- a/scripts/dl_github_archive.py +++ b/scripts/dl_github_archive.py @@ -139,9 +139,7 @@ def tar(path, subdir, into=None, ts=None): if ts is not None: args.append('--mtime=@%d' % ts) if into.endswith('.zst'): - envs['ZSTD_CLEVEL'] = '20' - envs['ZSTD_NBTHREADS'] = '0' - args.append('--zstd') + args.append('-I zstd -T0 --ultra -20') elif into.endswith('.xz'): envs['XZ_OPT'] = '-7e' args.append('-J') From e65800d9484e49e81c5d226cc64f2bb47782c089 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 8 Apr 2024 18:35:45 +0200 Subject: [PATCH 06/13] tools: zstd: dont override CLI max level Now that instead of relying on env variables for the GH download script invoking ZSTD tarball compression it passes the full arguments via tar -I we can drop the CLI max compression level override. Signed-off-by: Robert Marko --- tools/zstd/Makefile | 3 --- 1 file changed, 3 deletions(-) diff --git a/tools/zstd/Makefile b/tools/zstd/Makefile index 728cef26b8fd4d..0264ac2422ecf6 100644 --- a/tools/zstd/Makefile +++ b/tools/zstd/Makefile @@ -17,9 +17,6 @@ include $(INCLUDE_DIR)/host-build.mk HOSTCC:= $(HOSTCC_NOCACHE) -HOST_CFLAGS += \ - -DZSTDCLI_CLEVEL_MAX=20 - HOST_MAKE_FLAGS += \ BACKTRACE=0 \ HAVE_THREAD=1 \ From a68eb991911794b1c3814acb17ca829cb311fdcd Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 9 Apr 2024 17:39:46 +0100 Subject: [PATCH 07/13] generic: add missing patch headers Make sure all patches can be applied to a git tree using 'git am' by adding missing patch headers where needed. Signed-off-by: Daniel Golle --- .../hack-5.15/781-usb-net-rndis-support-asr.patch | 13 +++++++++++++ .../hack-6.1/781-usb-net-rndis-support-asr.patch | 13 +++++++++++++ .../hack-6.6/781-usb-net-rndis-support-asr.patch | 13 +++++++++++++ ...-phy-realtek-support-interrupt-of-RTL8221B.patch | 12 ++++++++++++ ...-phy-realtek-support-interrupt-of-RTL8221B.patch | 12 ++++++++++++ ...-phy-realtek-support-interrupt-of-RTL8221B.patch | 12 ++++++++++++ 6 files changed, 75 insertions(+) diff --git a/target/linux/generic/hack-5.15/781-usb-net-rndis-support-asr.patch b/target/linux/generic/hack-5.15/781-usb-net-rndis-support-asr.patch index 9934bb8078efe4..47339b6c22f7b2 100644 --- a/target/linux/generic/hack-5.15/781-usb-net-rndis-support-asr.patch +++ b/target/linux/generic/hack-5.15/781-usb-net-rndis-support-asr.patch @@ -1,3 +1,16 @@ +From 9fabf60187f1fa19e6f6bb5441587d485bd534b0 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 9 Apr 2024 17:06:38 +0100 +Subject: [PATCH] rndis_host: add a bunch of USB IDs + +Add a bunch of USB IDs found in various places online to the +RNDIS USB network driver. + +Signed-off-by: Daniel Golle +--- + drivers/net/usb/rndis_host.c | 40 ++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + --- a/drivers/net/usb/rndis_host.c +++ b/drivers/net/usb/rndis_host.c @@ -630,6 +630,16 @@ static const struct driver_info zte_rndi diff --git a/target/linux/generic/hack-6.1/781-usb-net-rndis-support-asr.patch b/target/linux/generic/hack-6.1/781-usb-net-rndis-support-asr.patch index 9934bb8078efe4..47339b6c22f7b2 100644 --- a/target/linux/generic/hack-6.1/781-usb-net-rndis-support-asr.patch +++ b/target/linux/generic/hack-6.1/781-usb-net-rndis-support-asr.patch @@ -1,3 +1,16 @@ +From 9fabf60187f1fa19e6f6bb5441587d485bd534b0 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 9 Apr 2024 17:06:38 +0100 +Subject: [PATCH] rndis_host: add a bunch of USB IDs + +Add a bunch of USB IDs found in various places online to the +RNDIS USB network driver. + +Signed-off-by: Daniel Golle +--- + drivers/net/usb/rndis_host.c | 40 ++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + --- a/drivers/net/usb/rndis_host.c +++ b/drivers/net/usb/rndis_host.c @@ -630,6 +630,16 @@ static const struct driver_info zte_rndi diff --git a/target/linux/generic/hack-6.6/781-usb-net-rndis-support-asr.patch b/target/linux/generic/hack-6.6/781-usb-net-rndis-support-asr.patch index 9934bb8078efe4..47339b6c22f7b2 100644 --- a/target/linux/generic/hack-6.6/781-usb-net-rndis-support-asr.patch +++ b/target/linux/generic/hack-6.6/781-usb-net-rndis-support-asr.patch @@ -1,3 +1,16 @@ +From 9fabf60187f1fa19e6f6bb5441587d485bd534b0 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 9 Apr 2024 17:06:38 +0100 +Subject: [PATCH] rndis_host: add a bunch of USB IDs + +Add a bunch of USB IDs found in various places online to the +RNDIS USB network driver. + +Signed-off-by: Daniel Golle +--- + drivers/net/usb/rndis_host.c | 40 ++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + --- a/drivers/net/usb/rndis_host.c +++ b/drivers/net/usb/rndis_host.c @@ -630,6 +630,16 @@ static const struct driver_info zte_rndi diff --git a/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch index b2b41d9c61f74f..bf0e0aa66d84d6 100644 --- a/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch +++ b/target/linux/generic/pending-5.15/731-net-phy-realtek-support-interrupt-of-RTL8221B.patch @@ -1,3 +1,15 @@ +From d7943c31d57c11e1a517aa3ce2006fca44866870 Mon Sep 17 00:00:00 2001 +From: Jianhui Zhao +Date: Sun, 24 Sep 2023 22:15:00 +0800 +Subject: [PATCH] net: phy: realtek: add interrupt support for RTL8221B + +This commit introduces interrupt support for RTL8221B. + +Signed-off-by: Jianhui Zhao +--- + drivers/net/phy/realtek.c | 47 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -971,6 +971,51 @@ static int rtl8221b_config_init(struct p diff --git a/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch index 51cd98c883f828..82cd419a7e9069 100644 --- a/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch +++ b/target/linux/generic/pending-6.1/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch @@ -1,3 +1,15 @@ +From d7943c31d57c11e1a517aa3ce2006fca44866870 Mon Sep 17 00:00:00 2001 +From: Jianhui Zhao +Date: Sun, 24 Sep 2023 22:15:00 +0800 +Subject: [PATCH] net: phy: realtek: add interrupt support for RTL8221B + +This commit introduces interrupt support for RTL8221B. + +Signed-off-by: Jianhui Zhao +--- + drivers/net/phy/realtek.c | 47 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -981,6 +981,51 @@ static int rtl8221b_config_init(struct p diff --git a/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch b/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch index aab0d3f7d50258..e4fbf1f870f4e2 100644 --- a/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch +++ b/target/linux/generic/pending-6.6/741-net-phy-realtek-support-interrupt-of-RTL8221B.patch @@ -1,3 +1,15 @@ +From d7943c31d57c11e1a517aa3ce2006fca44866870 Mon Sep 17 00:00:00 2001 +From: Jianhui Zhao +Date: Sun, 24 Sep 2023 22:15:00 +0800 +Subject: [PATCH] net: phy: realtek: add interrupt support for RTL8221B + +This commit introduces interrupt support for RTL8221B. + +Signed-off-by: Jianhui Zhao +--- + drivers/net/phy/realtek.c | 47 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -1026,6 +1026,51 @@ static int rtl8221b_config_init(struct p From 12b2cb2ec3f1366b65caa0dbbdd83846c1c88d4e Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Mon, 8 Apr 2024 22:05:19 +0200 Subject: [PATCH 08/13] config: fix CONFIG_GDB appearing in main menuconfig menu I noticed that CONFIG_GDB was suddenly appearing in the main menuconfig menu despite the fact that it should be visible only when TOOLCHAINOPTS is selected and under a dedicated menu. After some trial and error, it seems that this was caused by the recent addition of GCC_USE_DEFAULT_VERSION, and after even more trial and error it gets fixed as soon GCC_USE_DEFAULT_VERSION is placed after GCC_VERSION. So, lets simply put GCC_USE_DEFAULT_VERSION after GCC_VERSION. Fixes: 501ef81040ba ("config: select KERNEL_WERROR if building with default GCC version") Signed-off-by: Robert Marko --- toolchain/gcc/Config.in | 5 ----- toolchain/gcc/Config.version | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in index fd98914075524c..85abbdabb7ac54 100644 --- a/toolchain/gcc/Config.in +++ b/toolchain/gcc/Config.in @@ -16,11 +16,6 @@ choice bool "gcc 13.x" endchoice -config GCC_USE_DEFAULT_VERSION - bool - default y if !TOOLCHAINOPTS || GCC_USE_VERSION_13 - imply KERNEL_WERROR - config GCC_USE_GRAPHITE bool prompt "Compile in support for the new Graphite framework in GCC 4.4+" if TOOLCHAINOPTS diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version index 54bb4445b3d127..fe956d65b7736a 100644 --- a/toolchain/gcc/Config.version +++ b/toolchain/gcc/Config.version @@ -12,3 +12,8 @@ config GCC_VERSION default "11.3.0" if GCC_VERSION_11 default "12.3.0" if GCC_VERSION_12 default "13.2.0" + +config GCC_USE_DEFAULT_VERSION + bool + default y if !TOOLCHAINOPTS || GCC_USE_VERSION_13 + imply KERNEL_WERROR From 08639a5e47d8ec2d78693493924081d841601028 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 9 Apr 2024 11:21:39 +0200 Subject: [PATCH 09/13] ucode: update to Git HEAD (2024-04-07) 1220992631d5 ubus: automatically clear error information d6fd94014eea uci: automatically clear error information 99837f280b61 uloop: automatically clear error information be767ae197ba vm: rework `in` operator semantics 4ade84e8fb81 ubus: add explicit support for deferring incoming requests Signed-off-by: Felix Fietkau --- package/utils/ucode/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/package/utils/ucode/Makefile b/package/utils/ucode/Makefile index fdaafdddcc827f..f9db6b060e0d7c 100644 --- a/package/utils/ucode/Makefile +++ b/package/utils/ucode/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/jow-/ucode.git -PKG_SOURCE_DATE:=2024-02-21 -PKG_SOURCE_VERSION:=ba3855ae3775197f3594fc2615cac539075bd2fb -PKG_MIRROR_HASH:=f585447ebbb5ef56ada3a9f8dbe71d5310cc8185d0e90676b512849eaf60f77c +PKG_SOURCE_DATE:=2024-04-07 +PKG_SOURCE_VERSION:=5507654a498a339c44b642f62e203e1d5fb1f725 +PKG_MIRROR_HASH:=40d3df5308faaf3cddfca4ebbcd9ee7fff98cf7e7d406dc177972a7abf0ca16b PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=ISC From d668c74fe6efb546f0fd65f0334a3f0bd7bf5df4 Mon Sep 17 00:00:00 2001 From: Oleg S Date: Sun, 24 Mar 2024 21:26:08 +0300 Subject: [PATCH 10/13] kernel: add kmod-hwmon-emc2305 support This module supports the Microchip Technology Inc (SMSC) EMC2301/EMC2302/EMC2303/EMC2305 fan speed PWM controller chips. Signed-off-by: Oleg S --- package/kernel/linux/modules/hwmon.mk | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/package/kernel/linux/modules/hwmon.mk b/package/kernel/linux/modules/hwmon.mk index be38a6071a7b7a..ba393ab8fa09fe 100644 --- a/package/kernel/linux/modules/hwmon.mk +++ b/package/kernel/linux/modules/hwmon.mk @@ -125,6 +125,21 @@ endef $(eval $(call KernelPackage,hwmon-drivetemp)) +define KernelPackage/hwmon-emc2305 + TITLE:=Microchip EMC2301/2/3/5 fan controller + KCONFIG:=CONFIG_SENSORS_EMC2305 + FILES:=$(LINUX_DIR)/drivers/hwmon/emc2305.ko + AUTOLOAD:=$(call AutoProbe,emc2305) + $(call AddDepends/hwmon,+kmod-i2c-core +PACKAGE_kmod-thermal:kmod-thermal +kmod-regmap-i2c @LINUX_6_1||LINUX_6_6) +endef + +define KernelPackage/hwmon-emc2305/description + Kernel module for Microchip EMC2301/EMC2302/EMC2303/EMC2305 fan controllers +endef + +$(eval $(call KernelPackage,hwmon-emc2305)) + + define KernelPackage/hwmon-gsc TITLE:=Gateworks System Controller support KCONFIG:=CONFIG_MFD_GATEWORKS_GSC \ From 401a6ccfaf835da0008f1d7a01b7757e063777ff Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 9 Apr 2024 23:33:05 +0100 Subject: [PATCH 11/13] generic: 6.1: sync mt7530 DSA driver with upstream MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Backport lots upstream changes, many of them fixes, for the mt7530 DSA driver. Some of them may or may not find they way into Linux 6.1 stable, some certainly won't because they are fixes for backported commits which aren't even present in Linux 6.1 upstream. Apart from adding new patches, also remove mutated patch 723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch which should never have been added for Linux 6.1 -- it was applied already upstream but coincidentally would fuzzy-apply in the wrong place as well (for MT7530 instead of MT7531). While that didn't really hurt anyone it is just unneeded. The other deleted patch 795-mt7530-register-OF-node-for-internal-MDIO-bus.patch has been replaced by an equivalent commit with a more complete patch description by upstream maintainer Arınç Ünal. The remaining differences compared to the upstream driver are: * C22/C45 MDIO ops aren't split Upstream did that, backporting it would require making changes to *all* DSA drivers * 'slave' -> 'user', 'master' -> 'conduit' language change in DSA * support for selecting preferred CPU port on MT7531 Also this would require too many DSA framework changes potentially affecting other devices. If we ever really use Linux 6.1 in a release (I hope not) we can still reconsider to make the effort to backport that. In addition to some minor bug fixes and style improvements the switch should now behave more conformant when it comes to link-local frames, and we will again be able to cleanly pick patches from upstream. MAINTAIERS NOTE: Three patches are already part of Linux stable and should be removed with the next minor kernel version bump: 789-STABLE-01-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch 789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch 789-STABLE-03-net-dsa-mt7530-fix-handling-of-all-link-local-frames.patch Signed-off-by: Daniel Golle --- ...revent-possible-incorrect-XTAL-frequ.patch | 172 ++++++++++ ...ix-link-local-frames-that-ingress-vl.patch | 173 ++++++++++ ...ix-handling-of-all-link-local-frames.patch | 133 ++++++++ ...a-mt7530-remove-redundant-assignment.patch | 32 ++ ...-dsa-mt7530-use-external-PCS-driver.patch} | 81 ++--- ...ke-some-noise-if-register-read-fail.patch} | 4 +- ...-mt7530-refactor-SGMII-PCS-creation.patch} | 8 +- ...t7530-use-unlocked-regmap-accessors.patch} | 10 +- ...e-regmap-to-access-switch-register-.patch} | 18 +- ...ve-SGMII-PCS-creation-to-mt7530_pro.patch} | 10 +- ...-dsa-mt7530-introduce-mutex-helpers.patch} | 16 +- ...ve-p5_intf_modes-function-to-mt7530.patch} | 6 +- ...troduce-mt7530_probe_common-helper-.patch} | 10 +- ...troduce-mt7530_remove_common-helper.patch} | 8 +- ...7530-introduce-separate-MDIO-driver.patch} | 32 +- ...ip-locking-if-MDIO-bus-isn-t-presen.patch} | 4 +- ...troduce-driver-for-MT7988-built-in-.patch} | 28 +- ...dsa-mt7530-fix-support-for-MT7531BE.patch} | 12 +- ...set-all-CPU-ports-in-MT7531_CPU_PMAP.patch | 79 +++++ ...30-update-PCS-driver-to-use-neg_mode.patch | 35 ++ ...onvert-to-platform-remove-callback-r.patch | 58 ++++ ...3x-remove-mt753x_phylink_pcs_link_up.patch | 51 +++ ...eplace-deprecated-strncpy-with-ethto.patch | 40 +++ ...upport-OF-based-registration-of-swit.patch | 116 +++++++ ...-fix-10M-100M-speed-on-MT7988-switch.patch | 34 ++ ...lways-trap-frames-to-active-CPU-port.patch | 125 +++++++ ...se-p5_interface_select-as-data-type-.patch | 45 +++ ...tore-port-5-SGMII-capability-of-MT75.patch | 227 +++++++++++++ ...mprove-comments-regarding-switch-por.patch | 133 ++++++++ ...mprove-code-path-for-setting-up-port.patch | 95 ++++++ ...o-not-set-priv-p5_interface-on-mt753.patch | 42 +++ ...o-not-run-mt7530_setup_port5-if-port.patch | 62 ++++ ...mpty-default-case-on-mt7530_setup_po.patch | 58 ++++ ...7530-move-XTAL-check-to-mt7530_setup.patch | 53 +++ ...mt7530-simplify-mt7530_pad_clk_setup.patch | 146 +++++++++ ...all-port-6-setup-from-mt7530_mac_con.patch | 97 ++++++ ...30-remove-pad_setup-function-pointer.patch | 148 +++++++++ ...-correct-port-capabilities-of-MT7988.patch | 36 +++ ...o-not-clear-config-supported_interfa.patch | 38 +++ ...emove-.mac_port_config-for-MT7988-an.patch | 81 +++++ ...et-interrupt-register-only-for-MT753.patch | 31 ++ ...o-not-use-SW_PHY_RST-to-reset-MT7531.patch | 41 +++ ...et-rid-of-useless-error-returns-on-p.patch | 217 +++++++++++++ ...get-rid-of-priv-info-cpu_port_config.patch | 305 ++++++++++++++++++ ...-mt7530-get-rid-of-mt753x_mac_config.patch | 48 +++ ...ut-initialising-PCS-devices-code-bac.patch | 57 ++++ ...ort-link-settings-ops-and-force-link.patch | 68 ++++ ...-dsa-mt7530-simplify-link-operations.patch | 83 +++++ ...ix-improper-frames-on-all-25MHz-and-.patch | 74 +++++ ...e-all-MACs-are-powered-down-before-r.patch | 28 -- ...gister-OF-node-for-internal-MDIO-bus.patch | 43 --- ...-fix-10M-100M-speed-on-MT7988-switch.patch | 45 --- 52 files changed, 3340 insertions(+), 256 deletions(-) create mode 100644 target/linux/generic/backport-6.1/789-STABLE-01-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch create mode 100644 target/linux/generic/backport-6.1/789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch create mode 100644 target/linux/generic/backport-6.1/789-STABLE-03-net-dsa-mt7530-fix-handling-of-all-link-local-frames.patch create mode 100644 target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch rename target/linux/generic/backport-6.1/{788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch => 790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch} (83%) rename target/linux/generic/backport-6.1/{790-v6.4-0001-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch => 790-03-v6.4-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch} (88%) rename target/linux/generic/backport-6.1/{790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch => 790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch} (92%) rename target/linux/generic/backport-6.1/{790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch => 790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch} (86%) rename target/linux/generic/backport-6.1/{790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch => 790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch} (90%) rename target/linux/generic/backport-6.1/{790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch => 790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch} (79%) rename target/linux/generic/backport-6.1/{790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch => 790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch} (93%) rename target/linux/generic/backport-6.1/{790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch => 790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch} (91%) rename target/linux/generic/backport-6.1/{790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch => 790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch} (93%) rename target/linux/generic/backport-6.1/{790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch => 790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch} (83%) rename target/linux/generic/backport-6.1/{790-v6.4-0010-net-dsa-mt7530-introduce-separate-MDIO-driver.patch => 790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch} (95%) rename target/linux/generic/backport-6.1/{790-v6.4-0011-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch => 790-13-v6.4-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch} (91%) rename target/linux/generic/backport-6.1/{790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch => 790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch} (93%) rename target/linux/generic/backport-6.1/{790-v6.4-0013-net-dsa-mt7530-fix-support-for-MT7531BE.patch => 790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch} (92%) create mode 100644 target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch create mode 100644 target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch create mode 100644 target/linux/generic/backport-6.1/790-18-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch create mode 100644 target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch create mode 100644 target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch create mode 100644 target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch create mode 100644 target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch create mode 100644 target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch create mode 100644 target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch create mode 100644 target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch create mode 100644 target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch create mode 100644 target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch create mode 100644 target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch create mode 100644 target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch create mode 100644 target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch create mode 100644 target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch create mode 100644 target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch create mode 100644 target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch create mode 100644 target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch create mode 100644 target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch create mode 100644 target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch create mode 100644 target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch create mode 100644 target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch create mode 100644 target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch create mode 100644 target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch create mode 100644 target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch create mode 100644 target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch create mode 100644 target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch create mode 100644 target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch create mode 100644 target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch create mode 100644 target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch delete mode 100644 target/linux/generic/pending-6.1/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch delete mode 100644 target/linux/generic/pending-6.1/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch delete mode 100644 target/linux/generic/pending-6.1/796-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch diff --git a/target/linux/generic/backport-6.1/789-STABLE-01-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch b/target/linux/generic/backport-6.1/789-STABLE-01-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch new file mode 100644 index 00000000000000..1b91663d39ac3a --- /dev/null +++ b/target/linux/generic/backport-6.1/789-STABLE-01-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch @@ -0,0 +1,172 @@ +From be4512b9ac6fc53e1ca8daccbda84f643215c547 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Thu, 14 Mar 2024 12:28:35 +0300 +Subject: [PATCH 1/3] net: dsa: mt7530: prevent possible incorrect XTAL + frequency selection +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +[ Upstream commit f490c492e946d8ffbe65ad4efc66de3c5ede30a4 ] + +On MT7530, the HT_XTAL_FSEL field of the HWTRAP register stores a 2-bit +value that represents the frequency of the crystal oscillator connected to +the switch IC. The field is populated by the state of the ESW_P4_LED_0 and +ESW_P4_LED_0 pins, which is done right after reset is deasserted. + + ESW_P4_LED_0 ESW_P3_LED_0 Frequency + ----------------------------------------- + 0 0 Reserved + 0 1 20MHz + 1 0 40MHz + 1 1 25MHz + +On MT7531, the XTAL25 bit of the STRAP register stores this. The LAN0LED0 +pin is used to populate the bit. 25MHz when the pin is high, 40MHz when +it's low. + +These pins are also used with LEDs, therefore, their state can be set to +something other than the bootstrapping configuration. For example, a link +may be established on port 3 before the DSA subdriver takes control of the +switch which would set ESW_P3_LED_0 to high. + +Currently on mt7530_setup() and mt7531_setup(), 1000 - 1100 usec delay is +described between reset assertion and deassertion. Some switch ICs in real +life conditions cannot always have these pins set back to the bootstrapping +configuration before reset deassertion in this amount of delay. This causes +wrong crystal frequency to be selected which puts the switch in a +nonfunctional state after reset deassertion. + +The tests below are conducted on an MT7530 with a 40MHz crystal oscillator +by Justin Swartz. + +With a cable from an active peer connected to port 3 before reset, an +incorrect crystal frequency (0b11 = 25MHz) is selected: + + [1] [3] [5] + : : : + _____________________________ __________________ +ESW_P4_LED_0 |_______| + _____________________________ +ESW_P3_LED_0 |__________________________ + + : : : : + : : [4]...: + : : + [2]................: + +[1] Reset is asserted. +[2] Period of 1000 - 1100 usec. +[3] Reset is deasserted. +[4] Period of 315 usec. HWTRAP register is populated with incorrect + XTAL frequency. +[5] Signals reflect the bootstrapped configuration. + +Increase the delay between reset_control_assert() and +reset_control_deassert(), and gpiod_set_value_cansleep(priv->reset, 0) and +gpiod_set_value_cansleep(priv->reset, 1) to 5000 - 5100 usec. This amount +ensures a higher possibility that the switch IC will have these pins back +to the bootstrapping configuration before reset deassertion. + +With a cable from an active peer connected to port 3 before reset, the +correct crystal frequency (0b10 = 40MHz) is selected: + + [1] [2-1] [3] [5] + : : : : + _____________________________ __________________ +ESW_P4_LED_0 |_______| + ___________________ _______ +ESW_P3_LED_0 |_________| |__________________ + + : : : : : + : [2-2]...: [4]...: + [2]................: + +[1] Reset is asserted. +[2] Period of 5000 - 5100 usec. +[2-1] ESW_P3_LED_0 goes low. +[2-2] Remaining period of 5000 - 5100 usec. +[3] Reset is deasserted. +[4] Period of 310 usec. HWTRAP register is populated with bootstrapped + XTAL frequency. +[5] Signals reflect the bootstrapped configuration. + +ESW_P3_LED_0 low period before reset deassertion: + + 5000 usec + - 5100 usec + TEST RESET HOLD + # (usec) + --------------------- + 1 5410 + 2 5440 + 3 4375 + 4 5490 + 5 5475 + 6 4335 + 7 4370 + 8 5435 + 9 4205 + 10 4335 + 11 3750 + 12 3170 + 13 4395 + 14 4375 + 15 3515 + 16 4335 + 17 4220 + 18 4175 + 19 4175 + 20 4350 + + Min 3170 + Max 5490 + + Median 4342.500 + Avg 4466.500 + +Revert commit 2920dd92b980 ("net: dsa: mt7530: disable LEDs before reset"). +Changing the state of pins via reset assertion is simpler and more +efficient than doing so by setting the LED controller off. + +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") +Co-developed-by: Justin Swartz +Signed-off-by: Justin Swartz +Signed-off-by: Arınç ÜNAL +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mt7530.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2187,11 +2187,11 @@ mt7530_setup(struct dsa_switch *ds) + */ + if (priv->mcm) { + reset_control_assert(priv->rstc); +- usleep_range(1000, 1100); ++ usleep_range(5000, 5100); + reset_control_deassert(priv->rstc); + } else { + gpiod_set_value_cansleep(priv->reset, 0); +- usleep_range(1000, 1100); ++ usleep_range(5000, 5100); + gpiod_set_value_cansleep(priv->reset, 1); + } + +@@ -2401,11 +2401,11 @@ mt7531_setup(struct dsa_switch *ds) + */ + if (priv->mcm) { + reset_control_assert(priv->rstc); +- usleep_range(1000, 1100); ++ usleep_range(5000, 5100); + reset_control_deassert(priv->rstc); + } else { + gpiod_set_value_cansleep(priv->reset, 0); +- usleep_range(1000, 1100); ++ usleep_range(5000, 5100); + gpiod_set_value_cansleep(priv->reset, 1); + } + diff --git a/target/linux/generic/backport-6.1/789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch b/target/linux/generic/backport-6.1/789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch new file mode 100644 index 00000000000000..0cc6bf7525c6fe --- /dev/null +++ b/target/linux/generic/backport-6.1/789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch @@ -0,0 +1,173 @@ +From f1fa919ea59655f73cb3972264e157b8831ba546 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Thu, 14 Mar 2024 12:33:41 +0300 +Subject: [PATCH 2/3] net: dsa: mt7530: fix link-local frames that ingress vlan + filtering ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +[ Upstream commit e8bf353577f382c7066c661fed41b2adc0fc7c40 ] + +Whether VLAN-aware or not, on every VID VLAN table entry that has the CPU +port as a member of it, frames are set to egress the CPU port with the VLAN +tag stacked. This is so that VLAN tags can be appended after hardware +special tag (called DSA tag in the context of Linux drivers). + +For user ports on a VLAN-unaware bridge, frame ingressing the user port +egresses CPU port with only the special tag. + +For user ports on a VLAN-aware bridge, frame ingressing the user port +egresses CPU port with the special tag and the VLAN tag. + +This causes issues with link-local frames, specifically BPDUs, because the +software expects to receive them VLAN-untagged. + +There are two options to make link-local frames egress untagged. Setting +CONSISTENT or UNTAGGED on the EG_TAG bits on the relevant register. +CONSISTENT means frames egress exactly as they ingress. That means +egressing with the VLAN tag they had at ingress or egressing untagged if +they ingressed untagged. Although link-local frames are not supposed to be +transmitted VLAN-tagged, if they are done so, when egressing through a CPU +port, the special tag field will be broken. + +BPDU egresses CPU port with VLAN tag egressing stacked, received on +software: + +00:01:25.104821 AF Unknown (382365846), length 106: + | STAG | | VLAN | + 0x0000: 0000 6c27 614d 4143 0001 0000 8100 0001 ..l'aMAC........ + 0x0010: 0026 4242 0300 0000 0000 0000 6c27 614d .&BB........l'aM + 0x0020: 4143 0000 0000 0000 6c27 614d 4143 0000 AC......l'aMAC.. + 0x0030: 0000 1400 0200 0f00 0000 0000 0000 0000 ................ + +BPDU egresses CPU port with VLAN tag egressing untagged, received on +software: + +00:23:56.628708 AF Unknown (25215488), length 64: + | STAG | + 0x0000: 0000 6c27 614d 4143 0001 0000 0026 4242 ..l'aMAC.....&BB + 0x0010: 0300 0000 0000 0000 6c27 614d 4143 0000 ........l'aMAC.. + 0x0020: 0000 0000 6c27 614d 4143 0000 0000 1400 ....l'aMAC...... + 0x0030: 0200 0f00 0000 0000 0000 0000 ............ + +BPDU egresses CPU port with VLAN tag egressing tagged, received on +software: + +00:01:34.311963 AF Unknown (25215488), length 64: + | Mess | + 0x0000: 0000 6c27 614d 4143 0001 0001 0026 4242 ..l'aMAC.....&BB + 0x0010: 0300 0000 0000 0000 6c27 614d 4143 0000 ........l'aMAC.. + 0x0020: 0000 0000 6c27 614d 4143 0000 0000 1400 ....l'aMAC...... + 0x0030: 0200 0f00 0000 0000 0000 0000 ............ + +To prevent confusing the software, force the frame to egress UNTAGGED +instead of CONSISTENT. This way, frames can't possibly be received TAGGED +by software which would have the special tag field broken. + +VLAN Tag Egress Procedure + + For all frames, one of these options set the earliest in this order will + apply to the frame: + + - EG_TAG in certain registers for certain frames. + This will apply to frame with matching MAC DA or EtherType. + + - EG_TAG in the address table. + This will apply to frame at its incoming port. + + - EG_TAG in the PVC register. + This will apply to frame at its incoming port. + + - EG_CON and [EG_TAG per port] in the VLAN table. + This will apply to frame at its outgoing port. + + - EG_TAG in the PCR register. + This will apply to frame at its outgoing port. + + EG_TAG in certain registers for certain frames: + + PPPoE Discovery_ARP/RARP: PPP_EG_TAG and ARP_EG_TAG in the APC register. + IGMP_MLD: IGMP_EG_TAG and MLD_EG_TAG in the IMC register. + BPDU and PAE: BPDU_EG_TAG and PAE_EG_TAG in the BPC register. + REV_01 and REV_02: R01_EG_TAG and R02_EG_TAG in the RGAC1 register. + REV_03 and REV_0E: R03_EG_TAG and R0E_EG_TAG in the RGAC2 register. + REV_10 and REV_20: R10_EG_TAG and R20_EG_TAG in the RGAC3 register. + REV_21 and REV_UN: R21_EG_TAG and RUN_EG_TAG in the RGAC4 register. + +With this change, it can be observed that a bridge interface with stp_state +and vlan_filtering enabled will properly block ports now. + +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mt7530.c | 23 +++++++++++++++-------- + drivers/net/dsa/mt7530.h | 9 ++++++++- + 2 files changed, 23 insertions(+), 9 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1001,16 +1001,23 @@ unlock_exit: + static void + mt753x_trap_frames(struct mt7530_priv *priv) + { +- /* Trap BPDUs to the CPU port(s) */ +- mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, ++ /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them ++ * VLAN-untagged. ++ */ ++ mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK | ++ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | ++ MT753X_BPDU_PORT_FW_MASK, ++ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + MT753X_BPDU_CPU_ONLY); + +- /* Trap 802.1X PAE frames to the CPU port(s) */ +- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_PORT_FW_MASK, +- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY)); +- +- /* Trap LLDP frames with :0E MAC DA to the CPU port(s) */ +- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_PORT_FW_MASK, ++ /* Trap LLDP frames with :0E MAC DA to the CPU port(s) and egress them ++ * VLAN-untagged. ++ */ ++ mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK | ++ MT753X_R0E_PORT_FW_MASK, ++ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY)); + } + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -63,12 +63,18 @@ enum mt753x_id { + + /* Registers for BPDU and PAE frame control*/ + #define MT753X_BPC 0x24 +-#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0) ++#define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22) ++#define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x) + #define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_PAE_PORT_FW(x) FIELD_PREP(MT753X_PAE_PORT_FW_MASK, x) ++#define MT753X_BPDU_EG_TAG_MASK GENMASK(8, 6) ++#define MT753X_BPDU_EG_TAG(x) FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x) ++#define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0) + + /* Register for :03 and :0E MAC DA frame control */ + #define MT753X_RGAC2 0x2c ++#define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22) ++#define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x) + #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) + +@@ -251,6 +257,7 @@ enum mt7530_port_mode { + enum mt7530_vlan_port_eg_tag { + MT7530_VLAN_EG_DISABLED = 0, + MT7530_VLAN_EG_CONSISTENT = 1, ++ MT7530_VLAN_EG_UNTAGGED = 4, + }; + + enum mt7530_vlan_port_attr { diff --git a/target/linux/generic/backport-6.1/789-STABLE-03-net-dsa-mt7530-fix-handling-of-all-link-local-frames.patch b/target/linux/generic/backport-6.1/789-STABLE-03-net-dsa-mt7530-fix-handling-of-all-link-local-frames.patch new file mode 100644 index 00000000000000..cf7a3c12837bb2 --- /dev/null +++ b/target/linux/generic/backport-6.1/789-STABLE-03-net-dsa-mt7530-fix-handling-of-all-link-local-frames.patch @@ -0,0 +1,133 @@ +From 86c0c154a759f2af9612a04bdf29110f02dce956 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Thu, 14 Mar 2024 12:33:42 +0300 +Subject: [PATCH 3/3] net: dsa: mt7530: fix handling of all link-local frames +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +[ Upstream commit 69ddba9d170bdaee1dc0eb4ced38d7e4bb7b92af ] + +Currently, the MT753X switches treat frames with :01-0D and :0F MAC DAs as +regular multicast frames, therefore flooding them to user ports. + +On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE +Std 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC +DA must only be propagated to C-VLAN and MAC Bridge components. That means +VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports, +these frames are supposed to be processed by the CPU (software). So we make +the switch only forward them to the CPU port. And if received from a CPU +port, forward to a single port. The software is responsible of making the +switch conform to the latter by setting a single port as destination port +on the special tag. + +This switch intellectual property cannot conform to this part of the +standard fully. Whilst the REV_UN frame tag covers the remaining :04-0D and +:0F MAC DAs, it also includes :22-FF which the scope of propagation is not +supposed to be restricted for these MAC DAs. + +Set frames with :01-03 MAC DAs to be trapped to the CPU port(s). Add a +comment for the remaining MAC DAs. + +Note that the ingress port must have a PVID assigned to it for the switch +to forward untagged frames. A PVID is set by default on VLAN-aware and +VLAN-unaware ports. However, when the network interface that pertains to +the ingress port is attached to a vlan_filtering enabled bridge, the user +can remove the PVID assignment from it which would prevent the link-local +frames from being trapped to the CPU port. I am yet to see a way to forward +link-local frames while preventing other untagged frames from being +forwarded too. + +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mt7530.c | 37 +++++++++++++++++++++++++++++++++---- + drivers/net/dsa/mt7530.h | 13 +++++++++++++ + 2 files changed, 46 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -998,6 +998,21 @@ unlock_exit: + mutex_unlock(&priv->reg_mutex); + } + ++/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std ++ * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA ++ * must only be propagated to C-VLAN and MAC Bridge components. That means ++ * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports, ++ * these frames are supposed to be processed by the CPU (software). So we make ++ * the switch only forward them to the CPU port. And if received from a CPU ++ * port, forward to a single port. The software is responsible of making the ++ * switch conform to the latter by setting a single port as destination port on ++ * the special tag. ++ * ++ * This switch intellectual property cannot conform to this part of the standard ++ * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC ++ * DAs, it also includes :22-FF which the scope of propagation is not supposed ++ * to be restricted for these MAC DAs. ++ */ + static void + mt753x_trap_frames(struct mt7530_priv *priv) + { +@@ -1012,13 +1027,27 @@ mt753x_trap_frames(struct mt7530_priv *p + MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + MT753X_BPDU_CPU_ONLY); + +- /* Trap LLDP frames with :0E MAC DA to the CPU port(s) and egress them +- * VLAN-untagged. ++ /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress ++ * them VLAN-untagged. ++ */ ++ mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK | ++ MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK | ++ MT753X_R01_PORT_FW_MASK, ++ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); ++ ++ /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress ++ * them VLAN-untagged. + */ + mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK | +- MT753X_R0E_PORT_FW_MASK, ++ MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK | ++ MT753X_R03_PORT_FW_MASK, + MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY)); ++ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + } + + static int +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -71,12 +71,25 @@ enum mt753x_id { + #define MT753X_BPDU_EG_TAG(x) FIELD_PREP(MT753X_BPDU_EG_TAG_MASK, x) + #define MT753X_BPDU_PORT_FW_MASK GENMASK(2, 0) + ++/* Register for :01 and :02 MAC DA frame control */ ++#define MT753X_RGAC1 0x28 ++#define MT753X_R02_EG_TAG_MASK GENMASK(24, 22) ++#define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x) ++#define MT753X_R02_PORT_FW_MASK GENMASK(18, 16) ++#define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x) ++#define MT753X_R01_EG_TAG_MASK GENMASK(8, 6) ++#define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x) ++#define MT753X_R01_PORT_FW_MASK GENMASK(2, 0) ++ + /* Register for :03 and :0E MAC DA frame control */ + #define MT753X_RGAC2 0x2c + #define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x) + #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) ++#define MT753X_R03_EG_TAG_MASK GENMASK(8, 6) ++#define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x) ++#define MT753X_R03_PORT_FW_MASK GENMASK(2, 0) + + enum mt753x_bpdu_port_fw { + MT753X_BPDU_FOLLOW_MFC, diff --git a/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch b/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch new file mode 100644 index 00000000000000..f662a7636862b3 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-01-v6.2-net-dsa-mt7530-remove-redundant-assignment.patch @@ -0,0 +1,32 @@ +From 27b692012840f658c84a3102c0aeca2676f03132 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Thu, 15 Dec 2022 03:47:59 +0000 +Subject: [PATCH 01/48] net: dsa: mt7530: remove redundant assignment + +Russell King correctly pointed out that the MAC_2500FD capability is +already added for port 5 (if not in RGMII mode) and port 6 (which only +supports SGMII) by mt7531_mac_port_get_caps. Remove the reduntant +setting of this capability flag which was added by a previous commit. + +Fixes: e19de30d2080 ("net: dsa: mt7530: add support for in-band link status") +Reported-by: Russell King (Oracle) +Reviewed-by: Russell King (Oracle) +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/Y5qY7x6la5TxZxzX@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 3 --- + 1 file changed, 3 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -3010,9 +3010,6 @@ static void mt753x_phylink_get_caps(stru + config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000FD; + +- if ((priv->id == ID_MT7531) && mt753x_is_mac_port(port)) +- config->mac_capabilities |= MAC_2500FD; +- + /* This driver does not make use of the speed, duplex, pause or the + * advertisement in its mac_config, so it is safe to mark this driver + * as non-legacy. diff --git a/target/linux/generic/backport-6.1/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch b/target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch similarity index 83% rename from target/linux/generic/backport-6.1/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch rename to target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch index 8010076fc003fa..36ff3549e9d0bb 100644 --- a/target/linux/generic/backport-6.1/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch +++ b/target/linux/generic/backport-6.1/790-02-v6.4-net-dsa-mt7530-use-external-PCS-driver.patch @@ -1,60 +1,23 @@ -From patchwork Thu Mar 9 10:57:44 2023 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 13167235 -X-Patchwork-Delegate: kuba@kernel.org -Return-Path: -Date: Thu, 9 Mar 2023 10:57:44 +0000 +From 05dc5ea089f947a69a5db092ef4cad6a0f3c96ce Mon Sep 17 00:00:00 2001 From: Daniel Golle -To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, - linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, - Russell King , - Heiner Kallweit , - Lorenzo Bianconi , - Mark Lee , - John Crispin , Felix Fietkau , - AngeloGioacchino Del Regno - , - Matthias Brugger , - DENG Qingfang , - Landen Chao , - Sean Wang , - Paolo Abeni , - Jakub Kicinski , - Eric Dumazet , - "David S. Miller" , - Vladimir Oltean , - Florian Fainelli , - Andrew Lunn , - Vladimir Oltean -Cc: =?iso-8859-1?q?Bj=F8rn?= Mork , - Frank Wunderlich , - Alexander Couzens -Subject: [PATCH net-next v13 11/16] net: dsa: mt7530: use external PCS driver -Message-ID: - <2ac2ee40d3b0e705461b50613fda6a7edfdbc4b3.1678357225.git.daniel@makrotopia.org> -References: +Date: Sun, 19 Mar 2023 12:58:43 +0000 +Subject: [PATCH 02/48] net: dsa: mt7530: use external PCS driver MIME-Version: 1.0 -Content-Disposition: inline -In-Reply-To: -Precedence: bulk -List-ID: -X-Mailing-List: netdev@vger.kernel.org -X-Patchwork-Delegate: kuba@kernel.org +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit Implement regmap access wrappers, for now only to be used by the -pcs-mtk driver. -Make use of external PCS driver and drop the reduntant implementation -in mt7530.c. +pcs-mtk-lynxi driver. +Make use of this external PCS driver and drop the now reduntant +implementation in mt7530.c. As a nice side effect the SGMII registers can now also more easily be inspected for debugging via /sys/kernel/debug/regmap. -Reviewed-by: Russell King (Oracle) Tested-by: Bjørn Mork Signed-off-by: Daniel Golle Tested-by: Frank Wunderlich +Reviewed-by: Russell King (Oracle) +Signed-off-by: Jakub Kicinski --- drivers/net/dsa/Kconfig | 1 + drivers/net/dsa/mt7530.c | 277 ++++++++++----------------------------- @@ -81,7 +44,7 @@ Tested-by: Frank Wunderlich #include #include #include -@@ -2615,128 +2616,11 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2651,128 +2652,11 @@ static int mt7531_rgmii_setup(struct mt7 return 0; } @@ -210,7 +173,7 @@ Tested-by: Frank Wunderlich static int mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) -@@ -2759,11 +2643,11 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2795,11 +2679,11 @@ mt7531_mac_config(struct dsa_switch *ds, phydev = dp->slave->phydev; return mt7531_rgmii_setup(priv, port, interface, phydev); case PHY_INTERFACE_MODE_SGMII: @@ -224,7 +187,7 @@ Tested-by: Frank Wunderlich default: return -EINVAL; } -@@ -2788,11 +2672,11 @@ mt753x_phylink_mac_select_pcs(struct dsa +@@ -2824,11 +2708,11 @@ mt753x_phylink_mac_select_pcs(struct dsa switch (interface) { case PHY_INTERFACE_MODE_TRGMII: @@ -238,7 +201,7 @@ Tested-by: Frank Wunderlich default: return NULL; } -@@ -3033,86 +2917,6 @@ static void mt7530_pcs_get_state(struct +@@ -3066,86 +2950,6 @@ static void mt7530_pcs_get_state(struct state->pause |= MLO_PAUSE_TX; } @@ -325,7 +288,7 @@ Tested-by: Frank Wunderlich static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, const unsigned long *advertising, -@@ -3132,18 +2936,57 @@ static const struct phylink_pcs_ops mt75 +@@ -3165,18 +2969,57 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -389,7 +352,7 @@ Tested-by: Frank Wunderlich int i, ret; /* Initialise the PCS devices */ -@@ -3151,8 +2994,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3184,8 +3027,6 @@ mt753x_setup(struct dsa_switch *ds) priv->pcs[i].pcs.ops = priv->info->pcs_ops; priv->pcs[i].priv = priv; priv->pcs[i].port = i; @@ -398,7 +361,7 @@ Tested-by: Frank Wunderlich } ret = priv->info->sw_setup(ds); -@@ -3167,6 +3008,16 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3200,6 +3041,16 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -415,7 +378,7 @@ Tested-by: Frank Wunderlich return ret; } -@@ -3258,7 +3109,7 @@ static const struct mt753x_info mt753x_t +@@ -3291,7 +3142,7 @@ static const struct mt753x_info mt753x_t }, [ID_MT7531] = { .id = ID_MT7531, @@ -424,7 +387,7 @@ Tested-by: Frank Wunderlich .sw_setup = mt7531_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, -@@ -3366,7 +3217,7 @@ static void +@@ -3399,7 +3250,7 @@ static void mt7530_remove(struct mdio_device *mdiodev) { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); @@ -433,7 +396,7 @@ Tested-by: Frank Wunderlich if (!priv) return; -@@ -3385,6 +3236,10 @@ mt7530_remove(struct mdio_device *mdiode +@@ -3418,6 +3269,10 @@ mt7530_remove(struct mdio_device *mdiode mt7530_free_irq(priv); dsa_unregister_switch(priv->ds); @@ -446,7 +409,7 @@ Tested-by: Frank Wunderlich --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -371,47 +371,8 @@ enum mt7530_vlan_port_acc_frm { +@@ -391,47 +391,8 @@ enum mt7530_vlan_port_acc_frm { CCR_TX_OCT_CNT_BAD) /* MT7531 SGMII register group */ @@ -496,7 +459,7 @@ Tested-by: Frank Wunderlich /* Register for system reset */ #define MT7530_SYS_CTRL 0x7000 -@@ -710,13 +671,13 @@ struct mt7530_fdb { +@@ -730,13 +691,13 @@ struct mt7530_fdb { * @pm: The matrix used to show all connections with the port. * @pvid: The VLAN specified is to be considered a PVID at ingress. Any * untagged frames will be assigned to the related VLAN. diff --git a/target/linux/generic/backport-6.1/790-v6.4-0001-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch b/target/linux/generic/backport-6.1/790-03-v6.4-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch similarity index 88% rename from target/linux/generic/backport-6.1/790-v6.4-0001-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch rename to target/linux/generic/backport-6.1/790-03-v6.4-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch index 4d024b063ab544..d8f559b4162691 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0001-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch +++ b/target/linux/generic/backport-6.1/790-03-v6.4-net-dsa-mt7530-make-some-noise-if-register-read-fail.patch @@ -1,7 +1,7 @@ -From c3552d3f85f06cf4b4818bd84c4fcc09d8d45165 Mon Sep 17 00:00:00 2001 +From cafbb70e148e7a4e318dcc1e36a96643815b6245 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:17:19 +0100 -Subject: [PATCH 01/13] net: dsa: mt7530: make some noise if register read +Subject: [PATCH 03/48] net: dsa: mt7530: make some noise if register read fails Simply returning the negative error value instead of the read value diff --git a/target/linux/generic/backport-6.1/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch b/target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch similarity index 92% rename from target/linux/generic/backport-6.1/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch rename to target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch index 56674492967b53..ed24c452e2b52f 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch +++ b/target/linux/generic/backport-6.1/790-04-v6.4-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch @@ -1,7 +1,7 @@ -From b896355fc4988216d4f38582d07add9252a795ae Mon Sep 17 00:00:00 2001 +From 8f83ad87e2df26ddf9b8afd4d2873644a872d929 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:17:30 +0100 -Subject: [PATCH 02/13] net: dsa: mt7530: refactor SGMII PCS creation +Subject: [PATCH 04/48] net: dsa: mt7530: refactor SGMII PCS creation Instead of macro templates use a dedidated function and allocated regmap_config when creating the regmaps for the pcs-mtk-lynxi @@ -18,7 +18,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2968,26 +2968,56 @@ static const struct regmap_bus mt7531_re +@@ -3001,26 +3001,56 @@ static const struct regmap_bus mt7531_re .reg_update_bits = mt7530_regmap_update_bits, }; @@ -88,7 +88,7 @@ Signed-off-by: David S. Miller int i, ret; /* Initialise the PCS devices */ -@@ -3009,15 +3039,11 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3042,15 +3072,11 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); diff --git a/target/linux/generic/backport-6.1/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch b/target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch similarity index 86% rename from target/linux/generic/backport-6.1/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch rename to target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch index 3b4689fb1947b1..0298ebd2740632 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch +++ b/target/linux/generic/backport-6.1/790-05-v6.4-net-dsa-mt7530-use-unlocked-regmap-accessors.patch @@ -1,7 +1,7 @@ -From 33396408776385f3d2f6069646169a6b5b28e3b3 Mon Sep 17 00:00:00 2001 +From efb41b8e9b7bbb08ace1930373bff63d4f5cc6e2 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:17:40 +0100 -Subject: [PATCH 03/13] net: dsa: mt7530: use unlocked regmap accessors +Subject: [PATCH 05/48] net: dsa: mt7530: use unlocked regmap accessors Instead of wrapping the locked register accessor functions, use the unlocked variants and add locking wrapper functions to let regmap @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2941,7 +2941,7 @@ static int mt7530_regmap_read(void *cont +@@ -2974,7 +2974,7 @@ static int mt7530_regmap_read(void *cont { struct mt7530_priv *priv = context; @@ -28,7 +28,7 @@ Signed-off-by: David S. Miller return 0; }; -@@ -2949,23 +2949,25 @@ static int mt7530_regmap_write(void *con +@@ -2982,23 +2982,25 @@ static int mt7530_regmap_write(void *con { struct mt7530_priv *priv = context; @@ -62,7 +62,7 @@ Signed-off-by: David S. Miller }; static int -@@ -2991,6 +2993,9 @@ mt7531_create_sgmii(struct mt7530_priv * +@@ -3024,6 +3026,9 @@ mt7531_create_sgmii(struct mt7530_priv * mt7531_pcs_config[i]->reg_stride = 4; mt7531_pcs_config[i]->reg_base = MT7531_SGMII_REG_BASE(5 + i); mt7531_pcs_config[i]->max_register = 0x17c; diff --git a/target/linux/generic/backport-6.1/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch b/target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch similarity index 90% rename from target/linux/generic/backport-6.1/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch rename to target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch index 04033f14f47632..e5625f67de0649 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch +++ b/target/linux/generic/backport-6.1/790-06-v6.4-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch @@ -1,7 +1,7 @@ -From 743cba4345cb366248f9d375c6a9e50243dc0677 Mon Sep 17 00:00:00 2001 +From c7945d11a060797c31b3f47d9c9e515b0bf2082f Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:17:52 +0100 -Subject: [PATCH 04/13] net: dsa: mt7530: use regmap to access switch register +Subject: [PATCH 06/48] net: dsa: mt7530: use regmap to access switch register space Use regmap API to access the switch register space. @@ -133,7 +133,7 @@ Signed-off-by: David S. Miller } static void -@@ -2937,22 +2958,6 @@ static const struct phylink_pcs_ops mt75 +@@ -2970,22 +2991,6 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -156,7 +156,7 @@ Signed-off-by: David S. Miller static void mt7530_mdio_regmap_lock(void *mdio_lock) { -@@ -2965,7 +2970,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc +@@ -2998,7 +3003,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc mutex_unlock(mdio_lock); } @@ -165,7 +165,7 @@ Signed-off-by: David S. Miller .reg_write = mt7530_regmap_write, .reg_read = mt7530_regmap_read, }; -@@ -2998,7 +3003,7 @@ mt7531_create_sgmii(struct mt7530_priv * +@@ -3031,7 +3036,7 @@ mt7531_create_sgmii(struct mt7530_priv * mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock; regmap = devm_regmap_init(priv->dev, @@ -174,7 +174,7 @@ Signed-off-by: David S. Miller mt7531_pcs_config[i]); if (IS_ERR(regmap)) { ret = PTR_ERR(regmap); -@@ -3163,6 +3168,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match) +@@ -3196,6 +3201,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match) static int mt7530_probe(struct mdio_device *mdiodev) { @@ -182,7 +182,7 @@ Signed-off-by: David S. Miller struct mt7530_priv *priv; struct device_node *dn; -@@ -3242,6 +3248,21 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3275,6 +3281,21 @@ mt7530_probe(struct mdio_device *mdiodev mutex_init(&priv->reg_mutex); dev_set_drvdata(&mdiodev->dev, priv); @@ -206,7 +206,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -754,6 +754,7 @@ struct mt753x_info { +@@ -774,6 +774,7 @@ struct mt753x_info { * @dev: The device pointer * @ds: The pointer to the dsa core structure * @bus: The bus used for the device and built-in PHY @@ -214,7 +214,7 @@ Signed-off-by: David S. Miller * @rstc: The pointer to reset control used by MCM * @core_pwr: The power supplied into the core * @io_pwr: The power supplied into the I/O -@@ -774,6 +775,7 @@ struct mt7530_priv { +@@ -794,6 +795,7 @@ struct mt7530_priv { struct device *dev; struct dsa_switch *ds; struct mii_bus *bus; diff --git a/target/linux/generic/backport-6.1/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch b/target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch similarity index 79% rename from target/linux/generic/backport-6.1/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch rename to target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch index 6c5bebdd8024df..ca1f38f9c23844 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch +++ b/target/linux/generic/backport-6.1/790-07-v6.4-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch @@ -1,7 +1,7 @@ -From f3cf1d06e2aef644b426c23b4bb570780b1f8d47 Mon Sep 17 00:00:00 2001 +From 6b64b5bc3045a7e1ee5278df4f4ff315cd43d88a Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:18:04 +0100 -Subject: [PATCH 05/13] net: dsa: mt7530: move SGMII PCS creation to +Subject: [PATCH 07/48] net: dsa: mt7530: move SGMII PCS creation to mt7530_probe function Move creating the SGMII PCS from mt753x_setup() to the more appropriate @@ -18,7 +18,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3049,12 +3049,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3082,12 +3082,6 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -31,7 +31,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -3171,6 +3165,7 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3204,6 +3198,7 @@ mt7530_probe(struct mdio_device *mdiodev static struct regmap_config *regmap_config; struct mt7530_priv *priv; struct device_node *dn; @@ -39,7 +39,7 @@ Signed-off-by: David S. Miller dn = mdiodev->dev.of_node; -@@ -3263,6 +3258,12 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3296,6 +3291,12 @@ mt7530_probe(struct mdio_device *mdiodev if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap); diff --git a/target/linux/generic/backport-6.1/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch b/target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch similarity index 93% rename from target/linux/generic/backport-6.1/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch rename to target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch index a8933d2cf4e9a2..813e976810525c 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch +++ b/target/linux/generic/backport-6.1/790-08-v6.4-net-dsa-mt7530-introduce-mutex-helpers.patch @@ -1,7 +1,7 @@ -From e4729ae7c095c0c87794bff47ea43e35d69de986 Mon Sep 17 00:00:00 2001 +From 504d39cbda402df3e6fd123d040520393b6a6297 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:18:16 +0100 -Subject: [PATCH 06/13] net: dsa: mt7530: introduce mutex helpers +Subject: [PATCH 08/48] net: dsa: mt7530: introduce mutex helpers As the MDIO bus lock only needs to be involved if actually operating on an MDIO-connected switch we will need to skip locking for built-in @@ -214,7 +214,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -1125,7 +1125,6 @@ static int +@@ -1161,7 +1161,6 @@ static int mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) { struct mt7530_priv *priv = ds->priv; @@ -222,7 +222,7 @@ Signed-off-by: David S. Miller int length; u32 val; -@@ -1136,7 +1135,7 @@ mt7530_port_change_mtu(struct dsa_switch +@@ -1172,7 +1171,7 @@ mt7530_port_change_mtu(struct dsa_switch if (!dsa_is_cpu_port(ds, port)) return 0; @@ -231,7 +231,7 @@ Signed-off-by: David S. Miller val = mt7530_mii_read(priv, MT7530_GMACCR); val &= ~MAX_RX_PKT_LEN_MASK; -@@ -1157,7 +1156,7 @@ mt7530_port_change_mtu(struct dsa_switch +@@ -1193,7 +1192,7 @@ mt7530_port_change_mtu(struct dsa_switch mt7530_mii_write(priv, MT7530_GMACCR, val); @@ -240,7 +240,7 @@ Signed-off-by: David S. Miller return 0; } -@@ -1958,10 +1957,10 @@ mt7530_irq_thread_fn(int irq, void *dev_ +@@ -1994,10 +1993,10 @@ mt7530_irq_thread_fn(int irq, void *dev_ u32 val; int p; @@ -253,7 +253,7 @@ Signed-off-by: David S. Miller for (p = 0; p < MT7530_NUM_PHYS; p++) { if (BIT(p) & val) { -@@ -1997,7 +1996,7 @@ mt7530_irq_bus_lock(struct irq_data *d) +@@ -2033,7 +2032,7 @@ mt7530_irq_bus_lock(struct irq_data *d) { struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); @@ -262,7 +262,7 @@ Signed-off-by: David S. Miller } static void -@@ -2006,7 +2005,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da +@@ -2042,7 +2041,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable); diff --git a/target/linux/generic/backport-6.1/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch b/target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch similarity index 91% rename from target/linux/generic/backport-6.1/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch rename to target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch index 6c68dc0c4fd3d3..177f6af78084c6 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch +++ b/target/linux/generic/backport-6.1/790-09-v6.4-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch @@ -1,7 +1,7 @@ -From 0d7ae94a0c581f86939bebec0b6ccd66e640d1d8 Mon Sep 17 00:00:00 2001 +From dbef24b66807eef7498740fa8b8441bee64a96c4 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:18:28 +0100 -Subject: [PATCH 07/13] net: dsa: mt7530: move p5_intf_modes() function to +Subject: [PATCH 09/48] net: dsa: mt7530: move p5_intf_modes() function to mt7530.c In preparation of splitting mt7530.c into a driver for MDIO-connected @@ -48,7 +48,7 @@ Signed-off-by: David S. Miller struct mt7530_priv *priv = ds->priv; --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -689,24 +689,6 @@ enum p5_interface_select { +@@ -709,24 +709,6 @@ enum p5_interface_select { P5_INTF_SEL_GMAC5_SGMII, }; diff --git a/target/linux/generic/backport-6.1/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch b/target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch similarity index 93% rename from target/linux/generic/backport-6.1/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch rename to target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch index dc4fcb6aa11fdc..8950caaaeff268 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch +++ b/target/linux/generic/backport-6.1/790-10-v6.4-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch @@ -1,7 +1,7 @@ -From 4d632005c90e253c000d0db73b7cdb9d8dc2e2dd Mon Sep 17 00:00:00 2001 +From a0c6527a38d518ff175c1b6ce248e9b06cc98d3b Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:18:39 +0100 -Subject: [PATCH 08/13] net: dsa: mt7530: introduce mt7530_probe_common helper +Subject: [PATCH 10/48] net: dsa: mt7530: introduce mt7530_probe_common helper function Move commonly used parts from mt7530_probe into new mt7530_probe_common @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3177,44 +3177,21 @@ static const struct of_device_id mt7530_ +@@ -3210,44 +3210,21 @@ static const struct of_device_id mt7530_ MODULE_DEVICE_TABLE(of, mt7530_of_match); static int @@ -67,7 +67,7 @@ Signed-off-by: David S. Miller if (!priv->info) return -EINVAL; -@@ -3228,23 +3205,53 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3261,23 +3238,53 @@ mt7530_probe(struct mdio_device *mdiodev return -EINVAL; priv->id = priv->info->id; @@ -131,7 +131,7 @@ Signed-off-by: David S. Miller priv->reset = devm_gpiod_get_optional(&mdiodev->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(priv->reset)) { -@@ -3253,12 +3260,15 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3286,12 +3293,15 @@ mt7530_probe(struct mdio_device *mdiodev } } diff --git a/target/linux/generic/backport-6.1/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch b/target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch similarity index 83% rename from target/linux/generic/backport-6.1/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch rename to target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch index 5df859d2dff26c..24eadb589e6c7f 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch +++ b/target/linux/generic/backport-6.1/790-11-v6.4-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch @@ -1,7 +1,7 @@ -From 69b838d2629e6b82bcd9e0ab3c1c03f46e5e01d3 Mon Sep 17 00:00:00 2001 +From a7783b0b6f3b38abd34cecf515811691714dee57 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:18:50 +0100 -Subject: [PATCH 09/13] net: dsa: mt7530: introduce mt7530_remove_common helper +Subject: [PATCH 11/48] net: dsa: mt7530: introduce mt7530_remove_common helper function Move commonly used parts from mt7530_remove into new @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3295,6 +3295,17 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3328,6 +3328,17 @@ mt7530_probe(struct mdio_device *mdiodev } static void @@ -35,7 +35,7 @@ Signed-off-by: David S. Miller mt7530_remove(struct mdio_device *mdiodev) { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); -@@ -3313,15 +3324,10 @@ mt7530_remove(struct mdio_device *mdiode +@@ -3346,15 +3357,10 @@ mt7530_remove(struct mdio_device *mdiode dev_err(priv->dev, "Failed to disable io pwr: %d\n", ret); diff --git a/target/linux/generic/backport-6.1/790-v6.4-0010-net-dsa-mt7530-introduce-separate-MDIO-driver.patch b/target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch similarity index 95% rename from target/linux/generic/backport-6.1/790-v6.4-0010-net-dsa-mt7530-introduce-separate-MDIO-driver.patch rename to target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch index f57a1bf06abc5c..a6bb7d9e7b1bba 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0010-net-dsa-mt7530-introduce-separate-MDIO-driver.patch +++ b/target/linux/generic/backport-6.1/790-12-v6.4-net-dsa-mt7530-introduce-separate-MDIO-driver.patch @@ -1,7 +1,7 @@ -From 8eceed6dbd74067dbf4d8e39f14734f4d2f35176 Mon Sep 17 00:00:00 2001 +From 5313432ca1e1a0677ad7b4f17a7e0186473f47aa Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:19:13 +0100 -Subject: [PATCH 10/13] net: dsa: mt7530: introduce separate MDIO driver +Subject: [PATCH 12/48] net: dsa: mt7530: introduce separate MDIO driver Split MT7530 switch driver into a common part and a part specific for MDIO connected switches and multi-chip modules. @@ -15,12 +15,12 @@ Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller --- MAINTAINERS | 1 + - drivers/net/dsa/Kconfig | 16 +- + drivers/net/dsa/Kconfig | 18 ++- drivers/net/dsa/Makefile | 1 + drivers/net/dsa/mt7530-mdio.c | 271 ++++++++++++++++++++++++++++++++++ drivers/net/dsa/mt7530.c | 264 +-------------------------------- drivers/net/dsa/mt7530.h | 6 + - 6 files changed, 301 insertions(+), 258 deletions(-) + 6 files changed, 302 insertions(+), 259 deletions(-) create mode 100644 drivers/net/dsa/mt7530-mdio.c --- a/MAINTAINERS @@ -35,10 +35,13 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/Kconfig +++ b/drivers/net/dsa/Kconfig -@@ -37,10 +37,22 @@ config NET_DSA_MT7530 - tristate "MediaTek MT753x and MT7621 Ethernet switch support" +@@ -34,13 +34,25 @@ config NET_DSA_LANTIQ_GSWIP + the xrx200 / VR9 SoC. + + config NET_DSA_MT7530 +- tristate "MediaTek MT753x and MT7621 Ethernet switch support" ++ tristate "MediaTek MT7530 and MT7531 Ethernet switch support" select NET_DSA_TAG_MTK - select MEDIATEK_GE_PHY + imply NET_DSA_MT7530_MDIO + help + This enables support for the MediaTek MT7530 and MT7531 Ethernet @@ -49,6 +52,7 @@ Signed-off-by: David S. Miller +config NET_DSA_MT7530_MDIO + tristate "MediaTek MT7530 MDIO interface driver" + depends on NET_DSA_MT7530 + select MEDIATEK_GE_PHY select PCS_MTK_LYNXI help - This enables support for the MediaTek MT7530, MT7531, and MT7621 @@ -416,7 +420,7 @@ Signed-off-by: David S. Miller static u32 mt7530_mii_read(struct mt7530_priv *priv, u32 reg) { -@@ -2975,72 +2926,6 @@ static const struct phylink_pcs_ops mt75 +@@ -3008,72 +2959,6 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -489,7 +493,7 @@ Signed-off-by: David S. Miller static int mt753x_setup(struct dsa_switch *ds) { -@@ -3099,7 +2984,7 @@ static int mt753x_set_mac_eee(struct dsa +@@ -3132,7 +3017,7 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -498,7 +502,7 @@ Signed-off-by: David S. Miller .get_tag_protocol = mtk_get_tag_protocol, .setup = mt753x_setup, .get_strings = mt7530_get_strings, -@@ -3133,8 +3018,9 @@ static const struct dsa_switch_ops mt753 +@@ -3166,8 +3051,9 @@ static const struct dsa_switch_ops mt753 .get_mac_eee = mt753x_get_mac_eee, .set_mac_eee = mt753x_set_mac_eee, }; @@ -509,7 +513,7 @@ Signed-off-by: David S. Miller [ID_MT7621] = { .id = ID_MT7621, .pcs_ops = &mt7530_pcs_ops, -@@ -3167,16 +3053,9 @@ static const struct mt753x_info mt753x_t +@@ -3200,16 +3086,9 @@ static const struct mt753x_info mt753x_t .mac_port_config = mt7531_mac_config, }, }; @@ -528,7 +532,7 @@ Signed-off-by: David S. Miller mt7530_probe_common(struct mt7530_priv *priv) { struct device *dev = priv->dev; -@@ -3213,88 +3092,9 @@ mt7530_probe_common(struct mt7530_priv * +@@ -3246,88 +3125,9 @@ mt7530_probe_common(struct mt7530_priv * return 0; } @@ -619,7 +623,7 @@ Signed-off-by: David S. Miller mt7530_remove_common(struct mt7530_priv *priv) { if (priv->irq) -@@ -3304,55 +3104,7 @@ mt7530_remove_common(struct mt7530_priv +@@ -3337,55 +3137,7 @@ mt7530_remove_common(struct mt7530_priv mutex_destroy(&priv->reg_mutex); } @@ -678,7 +682,7 @@ Signed-off-by: David S. Miller MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch"); --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -814,4 +814,10 @@ static inline void INIT_MT7530_DUMMY_POL +@@ -834,4 +834,10 @@ static inline void INIT_MT7530_DUMMY_POL p->reg = reg; } diff --git a/target/linux/generic/backport-6.1/790-v6.4-0011-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch b/target/linux/generic/backport-6.1/790-13-v6.4-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch similarity index 91% rename from target/linux/generic/backport-6.1/790-v6.4-0011-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch rename to target/linux/generic/backport-6.1/790-13-v6.4-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch index 01011ed1a001c4..dae7dd4a48c4cb 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0011-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch +++ b/target/linux/generic/backport-6.1/790-13-v6.4-net-dsa-mt7530-skip-locking-if-MDIO-bus-isn-t-presen.patch @@ -1,7 +1,7 @@ -From a52cadbf76593f8fcb2f4f62cb006e3f2a22ad06 Mon Sep 17 00:00:00 2001 +From 86e1168a214b7ab0883acf1e7a6885a7a949e3e7 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:19:28 +0100 -Subject: [PATCH 11/13] net: dsa: mt7530: skip locking if MDIO bus isn't +Subject: [PATCH 13/48] net: dsa: mt7530: skip locking if MDIO bus isn't present As MT7530 and MT7531 internally use 32-bit wide registers, each access diff --git a/target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch b/target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch similarity index 93% rename from target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch rename to target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch index 05adccf517143b..9bc3f54c235663 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch +++ b/target/linux/generic/backport-6.1/790-14-v6.4-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch @@ -1,7 +1,7 @@ -From b361015763fedea439f13b336b15ef7bdf1f7d4f Mon Sep 17 00:00:00 2001 +From a1b87b6322db9186c8689710fe3e98f59e540949 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 3 Apr 2023 02:19:40 +0100 -Subject: [PATCH 12/13] net: dsa: mt7530: introduce driver for MT7988 built-in +Subject: [PATCH 14/48] net: dsa: mt7530: introduce driver for MT7988 built-in switch Add driver for the built-in Gigabit Ethernet switch which can be found @@ -42,9 +42,9 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/Kconfig +++ b/drivers/net/dsa/Kconfig -@@ -38,6 +38,7 @@ config NET_DSA_MT7530 +@@ -37,6 +37,7 @@ config NET_DSA_MT7530 + tristate "MediaTek MT7530 and MT7531 Ethernet switch support" select NET_DSA_TAG_MTK - select MEDIATEK_GE_PHY imply NET_DSA_MT7530_MDIO + imply NET_DSA_MT7530_MMIO help @@ -184,7 +184,7 @@ Signed-off-by: David S. Miller +MODULE_LICENSE("GPL"); --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2005,6 +2005,47 @@ static const struct irq_domain_ops mt753 +@@ -2041,6 +2041,47 @@ static const struct irq_domain_ops mt753 }; static void @@ -232,7 +232,7 @@ Signed-off-by: David S. Miller mt7530_setup_mdio_irq(struct mt7530_priv *priv) { struct dsa_switch *ds = priv->ds; -@@ -2038,8 +2079,15 @@ mt7530_setup_irq(struct mt7530_priv *pri +@@ -2074,8 +2115,15 @@ mt7530_setup_irq(struct mt7530_priv *pri return priv->irq ? : -EINVAL; } @@ -250,7 +250,7 @@ Signed-off-by: David S. Miller if (!priv->irq_domain) { dev_err(dev, "failed to create IRQ domain\n"); return -ENOMEM; -@@ -2538,6 +2586,25 @@ static void mt7531_mac_port_get_caps(str +@@ -2574,6 +2622,25 @@ static void mt7531_mac_port_get_caps(str } } @@ -276,7 +276,7 @@ Signed-off-by: David S. Miller static int mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) { -@@ -2614,6 +2681,17 @@ static bool mt753x_is_mac_port(u32 port) +@@ -2650,6 +2717,17 @@ static bool mt753x_is_mac_port(u32 port) } static int @@ -294,7 +294,7 @@ Signed-off-by: David S. Miller mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2683,7 +2761,8 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2719,7 +2797,8 @@ mt753x_phylink_mac_config(struct dsa_swi switch (port) { case 0 ... 4: /* Internal phy */ @@ -304,7 +304,7 @@ Signed-off-by: David S. Miller goto unsupported; break; case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ -@@ -2761,7 +2840,8 @@ static void mt753x_phylink_mac_link_up(s +@@ -2797,7 +2876,8 @@ static void mt753x_phylink_mac_link_up(s /* MT753x MAC works in 1G full duplex mode for all up-clocked * variants. */ @@ -314,7 +314,7 @@ Signed-off-by: David S. Miller (phy_interface_mode_is_8023z(interface))) { speed = SPEED_1000; duplex = DUPLEX_FULL; -@@ -2841,6 +2921,21 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -2877,6 +2957,21 @@ mt7531_cpu_port_config(struct dsa_switch return 0; } @@ -336,7 +336,7 @@ Signed-off-by: David S. Miller static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { -@@ -2986,6 +3081,27 @@ static int mt753x_set_mac_eee(struct dsa +@@ -3019,6 +3114,27 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -364,7 +364,7 @@ Signed-off-by: David S. Miller const struct dsa_switch_ops mt7530_switch_ops = { .get_tag_protocol = mtk_get_tag_protocol, .setup = mt753x_setup, -@@ -3054,6 +3170,17 @@ const struct mt753x_info mt753x_table[] +@@ -3087,6 +3203,17 @@ const struct mt753x_info mt753x_table[] .mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_config = mt7531_mac_config, }, @@ -407,7 +407,7 @@ Signed-off-by: David S. Miller MT7531_MIRROR_MASK : MIRROR_MASK) /* Registers for BPDU and PAE frame control*/ -@@ -302,9 +303,8 @@ enum mt7530_vlan_port_acc_frm { +@@ -322,9 +323,8 @@ enum mt7530_vlan_port_acc_frm { MT7531_FORCE_DPX | \ MT7531_FORCE_RX_FC | \ MT7531_FORCE_TX_FC) diff --git a/target/linux/generic/backport-6.1/790-v6.4-0013-net-dsa-mt7530-fix-support-for-MT7531BE.patch b/target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch similarity index 92% rename from target/linux/generic/backport-6.1/790-v6.4-0013-net-dsa-mt7530-fix-support-for-MT7531BE.patch rename to target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch index 5b5f25e7afaf10..ef2d07ab79910e 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0013-net-dsa-mt7530-fix-support-for-MT7531BE.patch +++ b/target/linux/generic/backport-6.1/790-15-v6.4-net-dsa-mt7530-fix-support-for-MT7531BE.patch @@ -1,7 +1,7 @@ -From eb1dd407b4be7ca38166a38c56c8edf52c6a399f Mon Sep 17 00:00:00 2001 +From ed01748319b25456c5226ed0cb5e49e970da0e4f Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 16 Apr 2023 13:08:14 +0100 -Subject: [PATCH 13/13] net: dsa: mt7530: fix support for MT7531BE +Subject: [PATCH 15/48] net: dsa: mt7530: fix support for MT7531BE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -73,7 +73,7 @@ Signed-off-by: Jakub Kicinski } --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3048,6 +3048,12 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3081,6 +3081,12 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -88,7 +88,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -748,10 +748,10 @@ struct mt753x_info { +@@ -768,10 +768,10 @@ struct mt753x_info { * registers * @p6_interface Holding the current port 6 interface * @p5_intf_sel: Holding the current port 5 interface select @@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski */ struct mt7530_priv { struct device *dev; -@@ -770,7 +770,6 @@ struct mt7530_priv { +@@ -790,7 +790,6 @@ struct mt7530_priv { unsigned int p5_intf_sel; u8 mirror_rx; u8 mirror_tx; @@ -108,7 +108,7 @@ Signed-off-by: Jakub Kicinski struct mt7530_port ports[MT7530_NUM_PORTS]; struct mt753x_pcs pcs[MT7530_NUM_PORTS]; /* protect among processes for registers access*/ -@@ -778,6 +777,7 @@ struct mt7530_priv { +@@ -798,6 +797,7 @@ struct mt7530_priv { int irq; struct irq_domain *irq_domain; u32 irq_enable; diff --git a/target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch b/target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch new file mode 100644 index 00000000000000..068fb38a4ee110 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch @@ -0,0 +1,79 @@ +From 4b11e3eb0eb7245a0d22a5dc4161c54eea42910c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Sat, 17 Jun 2023 09:26:44 +0300 +Subject: [PATCH 16/48] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU +frames (further restricted by PCR_MATRIX). + +Currently the driver sets the first CPU port as the single port in this bit +mask, which works fine regardless of whether the device tree defines port +5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's +logic of picking the first CPU port as the CPU port that all user ports are +affine to, by default. + +An upcoming change would like to influence DSA's selection of the default +CPU port to no longer be the first one, and in that case, this logic needs +adaptation. + +Since there is no observed leakage or duplication of frames if all CPU +ports are defined in this bit mask, simply include them all. + +Suggested-by: Russell King (Oracle) +Suggested-by: Vladimir Oltean +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/mt7530.c | 15 +++++++-------- + drivers/net/dsa/mt7530.h | 1 + + 2 files changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1069,6 +1069,13 @@ mt753x_cpu_port_enable(struct dsa_switch + if (priv->id == ID_MT7530 || priv->id == ID_MT7621) + mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); + ++ /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on ++ * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that ++ * is affine to the inbound user port. ++ */ ++ if (priv->id == ID_MT7531 || priv->id == ID_MT7988) ++ mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port))); ++ + /* CPU port gets connected to all user ports of + * the switch. + */ +@@ -2411,16 +2418,8 @@ static int + mt7531_setup_common(struct dsa_switch *ds) + { + struct mt7530_priv *priv = ds->priv; +- struct dsa_port *cpu_dp; + int ret, i; + +- /* BPDU to CPU port */ +- dsa_switch_for_each_cpu_port(cpu_dp, ds) { +- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK, +- BIT(cpu_dp->index)); +- break; +- } +- + mt753x_trap_frames(priv); + + /* Enable and reset MIB counters */ +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -54,6 +54,7 @@ enum mt753x_id { + #define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK) + #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) + #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) ++#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) + + #define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ + MT7531_CFC : MT7530_MFC) diff --git a/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch b/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch new file mode 100644 index 00000000000000..bbf6d9b16ff9a8 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-17-v6.5-net-dsa-mt7530-update-PCS-driver-to-use-neg_mode.patch @@ -0,0 +1,35 @@ +From fb6858e2c3b931433ea4d25871c272ee4c01bd99 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Fri, 16 Jun 2023 13:07:29 +0100 +Subject: [PATCH 17/48] net: dsa: mt7530: update PCS driver to use neg_mode + +Update mt7530's embedded PCS driver to use neg_mode, even though it +makes no use of it or the "mode" argument. This makes the driver +consistent with converted drivers. + +Signed-off-by: Russell King (Oracle) +Link: https://lore.kernel.org/r/E1qA8Ej-00EaGR-Fk@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -3036,7 +3036,7 @@ static void mt7530_pcs_get_state(struct + state->pause |= MLO_PAUSE_TX; + } + +-static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode, ++static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, + phy_interface_t interface, + const unsigned long *advertising, + bool permit_pause_to_mac) +@@ -3064,6 +3064,7 @@ mt753x_setup(struct dsa_switch *ds) + /* Initialise the PCS devices */ + for (i = 0; i < priv->ds->num_ports; i++) { + priv->pcs[i].pcs.ops = priv->info->pcs_ops; ++ priv->pcs[i].pcs.neg_mode = true; + priv->pcs[i].priv = priv; + priv->pcs[i].port = i; + } diff --git a/target/linux/generic/backport-6.1/790-18-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch b/target/linux/generic/backport-6.1/790-18-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch new file mode 100644 index 00000000000000..ffcf51dab5eaaa --- /dev/null +++ b/target/linux/generic/backport-6.1/790-18-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch @@ -0,0 +1,58 @@ +From 03ede98ecc29b59fb364f735d6de0e6a4c1735fc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 18 Sep 2023 21:19:12 +0200 +Subject: [PATCH 18/48] net: dsa: mt7530: Convert to platform remove callback + returning void +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The .remove() callback for a platform driver returns an int which makes +many driver authors wrongly assume it's possible to do error handling by +returning an error code. However the value returned is ignored (apart +from emitting a warning) and this typically results in resource leaks. +To improve here there is a quest to make the remove callback return +void. In the first step of this quest all drivers are converted to +.remove_new() which already returns void. Eventually after all drivers +are converted, .remove_new() is renamed to .remove(). + +Trivially convert this driver from always returning zero in the remove +callback to the void returning variant. + +Signed-off-by: Uwe Kleine-König +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Acked-by: Daniel Golle +Signed-off-by: David S. Miller +--- + drivers/net/dsa/mt7530-mmio.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/net/dsa/mt7530-mmio.c ++++ b/drivers/net/dsa/mt7530-mmio.c +@@ -62,15 +62,12 @@ mt7988_probe(struct platform_device *pde + return dsa_register_switch(priv->ds); + } + +-static int +-mt7988_remove(struct platform_device *pdev) ++static void mt7988_remove(struct platform_device *pdev) + { + struct mt7530_priv *priv = platform_get_drvdata(pdev); + + if (priv) + mt7530_remove_common(priv); +- +- return 0; + } + + static void mt7988_shutdown(struct platform_device *pdev) +@@ -87,7 +84,7 @@ static void mt7988_shutdown(struct platf + + static struct platform_driver mt7988_platform_driver = { + .probe = mt7988_probe, +- .remove = mt7988_remove, ++ .remove_new = mt7988_remove, + .shutdown = mt7988_shutdown, + .driver = { + .name = "mt7530-mmio", diff --git a/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch b/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch new file mode 100644 index 00000000000000..e9a36eea41ac95 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-19-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch @@ -0,0 +1,51 @@ +From 1a1a723d47c046d6c251651c9ade589040dafacf Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Wed, 27 Sep 2023 13:13:56 +0100 +Subject: [PATCH 19/48] net: dsa: mt753x: remove mt753x_phylink_pcs_link_up() + +Remove the mt753x_phylink_pcs_link_up() function for two reasons: + +1) priv->pcs[i].pcs.neg_mode is set true, meaning it doesn't take a + MLO_AN_FIXED anymore, but one of PHYLINK_PCS_NEG_*. However, this + is inconsequential due to... +2) priv->pcs[port].pcs.ops is always initialised to point at + mt7530_pcs_ops, which does not have a pcs_link_up() member. + +So, let's remove mt753x_phylink_pcs_link_up() entirely. + +Signed-off-by: Russell King (Oracle) +Reviewed-by: Vladimir Oltean +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/E1qlTQS-008BWe-Va@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 11 ----------- + 1 file changed, 11 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2851,15 +2851,6 @@ static void mt753x_phylink_mac_link_down + mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); + } + +-static void mt753x_phylink_pcs_link_up(struct phylink_pcs *pcs, +- unsigned int mode, +- phy_interface_t interface, +- int speed, int duplex) +-{ +- if (pcs->ops->pcs_link_up) +- pcs->ops->pcs_link_up(pcs, mode, interface, speed, duplex); +-} +- + static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port, + unsigned int mode, + phy_interface_t interface, +@@ -2948,8 +2939,6 @@ mt7531_cpu_port_config(struct dsa_switch + return ret; + mt7530_write(priv, MT7530_PMCR_P(port), + PMCR_CPU_PORT_SETTING(priv->id)); +- mt753x_phylink_pcs_link_up(&priv->pcs[port].pcs, MLO_AN_FIXED, +- interface, speed, DUPLEX_FULL); + mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, + speed, DUPLEX_FULL, true, true); + diff --git a/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch b/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch new file mode 100644 index 00000000000000..e8fec3f6a1a45c --- /dev/null +++ b/target/linux/generic/backport-6.1/790-20-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch @@ -0,0 +1,40 @@ +From 51e9c79a4d40fa3a64c0fbdab1ebbebf7cce2dba Mon Sep 17 00:00:00 2001 +From: Justin Stitt +Date: Mon, 9 Oct 2023 18:29:19 +0000 +Subject: [PATCH 20/48] net: dsa: mt7530: replace deprecated strncpy with + ethtool_sprintf + +`strncpy` is deprecated for use on NUL-terminated destination strings +[1] and as such we should prefer more robust and less ambiguous string +interfaces. + +ethtool_sprintf() is designed specifically for get_strings() usage. +Let's replace strncpy in favor of this more robust and easier to +understand interface. + +Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings [1] +Link: https://manpages.debian.org/testing/linux-manual-4.8/strscpy.9.en.html [2] +Link: https://github.com/KSPP/linux/issues/90 +Signed-off-by: Justin Stitt +Reviewed-by: Kees Cook +Acked-by: Daniel Golle +Reviewed-by: Florian Fainelli +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20231009-strncpy-drivers-net-dsa-mt7530-c-v1-1-ec6677a6436a@google.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -829,8 +829,7 @@ mt7530_get_strings(struct dsa_switch *ds + return; + + for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++) +- strncpy(data + i * ETH_GSTRING_LEN, mt7530_mib[i].name, +- ETH_GSTRING_LEN); ++ ethtool_sprintf(&data, "%s", mt7530_mib[i].name); + } + + static void diff --git a/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch b/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch new file mode 100644 index 00000000000000..8b374679cadc0a --- /dev/null +++ b/target/linux/generic/backport-6.1/790-21-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch @@ -0,0 +1,116 @@ +From 38be6fdf7e93431e91aac3884837b22236325f68 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:34:31 +0300 +Subject: [PATCH 21/48] net: dsa: mt7530: support OF-based registration of + switch MDIO bus +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Currently the MDIO bus of the switches the MT7530 DSA subdriver controls +can only be registered as non-OF-based. Bring support for registering the +bus OF-based. + +The subdrivers that control switches [with MDIO bus] probed on OF must +follow this logic to support all cases properly: + +No switch MDIO bus defined: Populate ds->user_mii_bus, register the MDIO +bus, set the interrupts for PHYs if "interrupt-controller" is defined at +the switch node. This case should only be covered for the switches which +their dt-bindings documentation didn't document the MDIO bus from the +start. This is to keep supporting the device trees that do not describe the +MDIO bus on the device tree but the MDIO bus is being used nonetheless. + +Switch MDIO bus defined: Don't populate ds->user_mii_bus, register the MDIO +bus, set the interrupts for PHYs if ["interrupt-controller" is defined at +the switch node and "interrupts" is defined at the PHY nodes under the +switch MDIO bus node]. + +Switch MDIO bus defined but explicitly disabled: If the device tree says +status = "disabled" for the MDIO bus, we shouldn't need an MDIO bus at all. +Instead, just exit as early as possible and do not call any MDIO API. + +The use of ds->user_mii_bus is inappropriate when the MDIO bus of the +switch is described on the device tree [1], which is why we don't populate +ds->user_mii_bus in that case. + +Link: https://lore.kernel.org/netdev/20231213120656.x46fyad6ls7sqyzv@skbuf/ [1] +Suggested-by: David Bauer +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122053431.7751-1-arinc.unal@arinc9.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 34 ++++++++++++++++++++++++++-------- + 1 file changed, 26 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2175,24 +2175,40 @@ mt7530_free_irq_common(struct mt7530_pri + static void + mt7530_free_irq(struct mt7530_priv *priv) + { +- mt7530_free_mdio_irq(priv); ++ struct device_node *mnp, *np = priv->dev->of_node; ++ ++ mnp = of_get_child_by_name(np, "mdio"); ++ if (!mnp) ++ mt7530_free_mdio_irq(priv); ++ of_node_put(mnp); ++ + mt7530_free_irq_common(priv); + } + + static int + mt7530_setup_mdio(struct mt7530_priv *priv) + { ++ struct device_node *mnp, *np = priv->dev->of_node; + struct dsa_switch *ds = priv->ds; + struct device *dev = priv->dev; + struct mii_bus *bus; + static int idx; +- int ret; ++ int ret = 0; ++ ++ mnp = of_get_child_by_name(np, "mdio"); ++ ++ if (mnp && !of_device_is_available(mnp)) ++ goto out; + + bus = devm_mdiobus_alloc(dev); +- if (!bus) +- return -ENOMEM; ++ if (!bus) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ if (!mnp) ++ ds->slave_mii_bus = bus; + +- ds->slave_mii_bus = bus; + bus->priv = priv; + bus->name = KBUILD_MODNAME "-mii"; + snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); +@@ -2201,16 +2217,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr + bus->parent = dev; + bus->phy_mask = ~ds->phys_mii_mask; + +- if (priv->irq) ++ if (priv->irq && !mnp) + mt7530_setup_mdio_irq(priv); + +- ret = devm_mdiobus_register(dev, bus); ++ ret = devm_of_mdiobus_register(dev, bus, mnp); + if (ret) { + dev_err(dev, "failed to register MDIO bus: %d\n", ret); +- if (priv->irq) ++ if (priv->irq && !mnp) + mt7530_free_mdio_irq(priv); + } + ++out: ++ of_node_put(mnp); + return ret; + } + diff --git a/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch b/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch new file mode 100644 index 00000000000000..381902472c8ab3 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-22-v6.8-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch @@ -0,0 +1,34 @@ +From 022a254fafce88367914dfc8168fe687fc528cdb Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Wed, 24 Jan 2024 05:17:25 +0000 +Subject: [PATCH 22/48] net: dsa: mt7530: fix 10M/100M speed on MT7988 switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Setup PMCR port register for actual speed and duplex on internally +connected PHYs of the MT7988 built-in switch. This fixes links with +speeds other than 1000M. + +Fixes: 110c18bfed41 ("net: dsa: mt7530: introduce driver for MT7988 built-in switch") +Signed-off-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Acked-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/a5b04dfa8256d8302f402545a51ac4c626fdba25.1706071272.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2883,8 +2883,7 @@ static void mt753x_phylink_mac_link_up(s + /* MT753x MAC works in 1G full duplex mode for all up-clocked + * variants. + */ +- if (interface == PHY_INTERFACE_MODE_INTERNAL || +- interface == PHY_INTERFACE_MODE_TRGMII || ++ if (interface == PHY_INTERFACE_MODE_TRGMII || + (phy_interface_mode_is_8023z(interface))) { + speed = SPEED_1000; + duplex = DUPLEX_FULL; diff --git a/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch b/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch new file mode 100644 index 00000000000000..c3f55f8106d181 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-23-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch @@ -0,0 +1,125 @@ +From a385398f77fad9eabe7cdc253e1a356484acc316 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:52 +0300 +Subject: [PATCH 23/48] net: dsa: mt7530: always trap frames to active CPU port + on MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On the MT7530 switch, the CPU_PORT field indicates which CPU port to trap +frames to, regardless of the affinity of the inbound user port. + +When multiple CPU ports are in use, if the DSA conduit interface is down, +trapped frames won't be passed to the conduit interface. + +To make trapping frames work including this case, implement +ds->ops->conduit_state_change() on this subdriver and set the CPU_PORT +field to the numerically smallest CPU port whose conduit interface is up. +Introduce the active_cpu_ports field to store the information of the active +CPU ports. Correct the macros, CPU_PORT is bits 4 through 6 of the +register. + +Add a comment to explain frame trapping for this switch. + +Currently, the driver doesn't support the use of multiple CPU ports so this +is not necessarily a bug fix. + +Suggested-by: Vladimir Oltean +Suggested-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-1-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 35 +++++++++++++++++++++++++++++++---- + drivers/net/dsa/mt7530.h | 6 ++++-- + 2 files changed, 35 insertions(+), 6 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1064,10 +1064,6 @@ mt753x_cpu_port_enable(struct dsa_switch + mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | + UNU_FFP(BIT(port))); + +- /* Set CPU port number */ +- if (priv->id == ID_MT7530 || priv->id == ID_MT7621) +- mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); +- + /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on + * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that + * is affine to the inbound user port. +@@ -3125,6 +3121,36 @@ static int mt753x_set_mac_eee(struct dsa + return 0; + } + ++static void ++mt753x_conduit_state_change(struct dsa_switch *ds, ++ const struct net_device *conduit, ++ bool operational) ++{ ++ struct dsa_port *cpu_dp = conduit->dsa_ptr; ++ struct mt7530_priv *priv = ds->priv; ++ int val = 0; ++ u8 mask; ++ ++ /* Set the CPU port to trap frames to for MT7530. Trapped frames will be ++ * forwarded to the numerically smallest CPU port whose conduit ++ * interface is up. ++ */ ++ if (priv->id != ID_MT7530 && priv->id != ID_MT7621) ++ return; ++ ++ mask = BIT(cpu_dp->index); ++ ++ if (operational) ++ priv->active_cpu_ports |= mask; ++ else ++ priv->active_cpu_ports &= ~mask; ++ ++ if (priv->active_cpu_ports) ++ val = CPU_EN | CPU_PORT(__ffs(priv->active_cpu_ports)); ++ ++ mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); ++} ++ + static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) + { + return 0; +@@ -3179,6 +3205,7 @@ const struct dsa_switch_ops mt7530_switc + .phylink_mac_link_up = mt753x_phylink_mac_link_up, + .get_mac_eee = mt753x_get_mac_eee, + .set_mac_eee = mt753x_set_mac_eee, ++ .master_state_change = mt753x_conduit_state_change, + }; + EXPORT_SYMBOL_GPL(mt7530_switch_ops); + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -41,8 +41,8 @@ enum mt753x_id { + #define UNU_FFP(x) (((x) & 0xff) << 8) + #define UNU_FFP_MASK UNU_FFP(~0) + #define CPU_EN BIT(7) +-#define CPU_PORT(x) ((x) << 4) +-#define CPU_MASK (0xf << 4) ++#define CPU_PORT_MASK GENMASK(6, 4) ++#define CPU_PORT(x) FIELD_PREP(CPU_PORT_MASK, x) + #define MIRROR_EN BIT(3) + #define MIRROR_PORT(x) ((x) & 0x7) + #define MIRROR_MASK 0x7 +@@ -773,6 +773,7 @@ struct mt753x_info { + * @irq_domain: IRQ domain of the switch irq_chip + * @irq_enable: IRQ enable bits, synced to SYS_INT_EN + * @create_sgmii: Pointer to function creating SGMII PCS instance(s) ++ * @active_cpu_ports: Holding the active CPU ports + */ + struct mt7530_priv { + struct device *dev; +@@ -799,6 +800,7 @@ struct mt7530_priv { + struct irq_domain *irq_domain; + u32 irq_enable; + int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); ++ u8 active_cpu_ports; + }; + + struct mt7530_hw_vlan_entry { diff --git a/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch b/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch new file mode 100644 index 00000000000000..35abed6b037bd0 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-24-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch @@ -0,0 +1,45 @@ +From e3c8f69af69e6c4022094309445c009faf5e8cef Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:53 +0300 +Subject: [PATCH 24/48] net: dsa: mt7530: use p5_interface_select as data type + for p5_intf_sel +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use the p5_interface_select enumeration as the data type for the +p5_intf_sel field. This ensures p5_intf_sel can only take the values +defined in the p5_interface_select enumeration. + +Remove the explicit assignment of 0 to P5_DISABLED as the first enum item +is automatically assigned 0. + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-2-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -703,7 +703,7 @@ struct mt7530_port { + + /* Port 5 interface select definitions */ + enum p5_interface_select { +- P5_DISABLED = 0, ++ P5_DISABLED, + P5_INTF_SEL_PHY_P0, + P5_INTF_SEL_PHY_P4, + P5_INTF_SEL_GMAC5, +@@ -789,7 +789,7 @@ struct mt7530_priv { + bool mcm; + phy_interface_t p6_interface; + phy_interface_t p5_interface; +- unsigned int p5_intf_sel; ++ enum p5_interface_select p5_intf_sel; + u8 mirror_rx; + u8 mirror_tx; + struct mt7530_port ports[MT7530_NUM_PORTS]; diff --git a/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch b/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch new file mode 100644 index 00000000000000..03329f8ba88008 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch @@ -0,0 +1,227 @@ +From b0d590a5cdd95ed863717b279751d6166083889f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:54 +0300 +Subject: [PATCH 25/48] net: dsa: mt7530: store port 5 SGMII capability of + MT7531 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Introduce the p5_sgmii field to store the information for whether port 5 +has got SGMII or not. Instead of reading the MT7531_TOP_SIG_SR register +multiple times, the register will be read once and the value will be +stored on the p5_sgmii field. This saves unnecessary reads of the +register. + +Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the +switch is identified. + +Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the +information. Address the code where mt7531_dual_sgmii_supported() is used. + +Get rid of mt7531_is_rgmii_port() which just prints the opposite of +priv->p5_sgmii. + +Instead of calling mt7531_pll_setup() then returning, do not call it if +port 5 is SGMII. + +Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to +represent the mode that port 5 is being used in, not the hardware +information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if +port 5 is not dsa_is_unused_port(). + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-3-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530-mdio.c | 7 ++--- + drivers/net/dsa/mt7530.c | 48 ++++++++++++----------------------- + drivers/net/dsa/mt7530.h | 6 +++-- + 3 files changed, 22 insertions(+), 39 deletions(-) + +--- a/drivers/net/dsa/mt7530-mdio.c ++++ b/drivers/net/dsa/mt7530-mdio.c +@@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_re + }; + + static int +-mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii) ++mt7531_create_sgmii(struct mt7530_priv *priv) + { + struct regmap_config *mt7531_pcs_config[2] = {}; + struct phylink_pcs *pcs; + struct regmap *regmap; + int i, ret = 0; + +- /* MT7531AE has two SGMII units for port 5 and port 6 +- * MT7531BE has only one SGMII unit for port 6 +- */ +- for (i = dual_sgmii ? 0 : 1; i < 2; i++) { ++ for (i = priv->p5_sgmii ? 0 : 1; i < 2; i++) { + mt7531_pcs_config[i] = devm_kzalloc(priv->dev, + sizeof(struct regmap_config), + GFP_KERNEL); +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -473,15 +473,6 @@ mt7530_pad_clk_setup(struct dsa_switch * + return 0; + } + +-static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv) +-{ +- u32 val; +- +- val = mt7530_read(priv, MT7531_TOP_SIG_SR); +- +- return (val & PAD_DUAL_SGMII_EN) != 0; +-} +- + static int + mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) + { +@@ -496,9 +487,6 @@ mt7531_pll_setup(struct mt7530_priv *pri + u32 xtal; + u32 val; + +- if (mt7531_dual_sgmii_supported(priv)) +- return; +- + val = mt7530_read(priv, MT7531_CREV); + top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR); + hwstrap = mt7530_read(priv, MT7531_HWTRAP); +@@ -913,8 +901,6 @@ static const char *p5_intf_modes(unsigne + return "PHY P4"; + case P5_INTF_SEL_GMAC5: + return "GMAC5"; +- case P5_INTF_SEL_GMAC5_SGMII: +- return "GMAC5_SGMII"; + default: + return "unknown"; + } +@@ -2515,6 +2501,12 @@ mt7531_setup(struct dsa_switch *ds) + return -ENODEV; + } + ++ /* MT7531AE has got two SGMII units. One for port 5, one for port 6. ++ * MT7531BE has got only one SGMII unit which is for port 6. ++ */ ++ val = mt7530_read(priv, MT7531_TOP_SIG_SR); ++ priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); ++ + /* all MACs must be forced link-down before sw reset */ + for (i = 0; i < MT7530_NUM_PORTS; i++) + mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); +@@ -2524,21 +2516,18 @@ mt7531_setup(struct dsa_switch *ds) + SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | + SYS_CTRL_REG_RST); + +- mt7531_pll_setup(priv); +- +- if (mt7531_dual_sgmii_supported(priv)) { +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII; +- ++ if (!priv->p5_sgmii) { ++ mt7531_pll_setup(priv); ++ } else { + /* Let ds->slave_mii_bus be able to access external phy. */ + mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK, + MT7531_EXT_P_MDC_11); + mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK, + MT7531_EXT_P_MDIO_12); +- } else { +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5; + } +- dev_dbg(ds->dev, "P5 support %s interface\n", +- p5_intf_modes(priv->p5_intf_sel)); ++ ++ if (!dsa_is_unused_port(ds, 5)) ++ priv->p5_intf_sel = P5_INTF_SEL_GMAC5; + + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); +@@ -2598,11 +2587,6 @@ static void mt7530_mac_port_get_caps(str + } + } + +-static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port) +-{ +- return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII); +-} +- + static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { +@@ -2615,7 +2599,7 @@ static void mt7531_mac_port_get_caps(str + break; + + case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ +- if (mt7531_is_rgmii_port(priv, port)) { ++ if (!priv->p5_sgmii) { + phy_interface_set_rgmii(config->supported_interfaces); + break; + } +@@ -2682,7 +2666,7 @@ static int mt7531_rgmii_setup(struct mt7 + { + u32 val; + +- if (!mt7531_is_rgmii_port(priv, port)) { ++ if (priv->p5_sgmii) { + dev_err(priv->dev, "RGMII mode is not available for port %d\n", + port); + return -EINVAL; +@@ -2925,7 +2909,7 @@ mt7531_cpu_port_config(struct dsa_switch + + switch (port) { + case 5: +- if (mt7531_is_rgmii_port(priv, port)) ++ if (!priv->p5_sgmii) + interface = PHY_INTERFACE_MODE_RGMII; + else + interface = PHY_INTERFACE_MODE_2500BASEX; +@@ -3083,7 +3067,7 @@ mt753x_setup(struct dsa_switch *ds) + mt7530_free_irq_common(priv); + + if (priv->create_sgmii) { +- ret = priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv)); ++ ret = priv->create_sgmii(priv); + if (ret && priv->irq) + mt7530_free_irq(priv); + } +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -707,7 +707,6 @@ enum p5_interface_select { + P5_INTF_SEL_PHY_P0, + P5_INTF_SEL_PHY_P4, + P5_INTF_SEL_GMAC5, +- P5_INTF_SEL_GMAC5_SGMII, + }; + + struct mt7530_priv; +@@ -769,6 +768,8 @@ struct mt753x_info { + * registers + * @p6_interface Holding the current port 6 interface + * @p5_intf_sel: Holding the current port 5 interface select ++ * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch ++ * has got SGMII + * @irq: IRQ number of the switch + * @irq_domain: IRQ domain of the switch irq_chip + * @irq_enable: IRQ enable bits, synced to SYS_INT_EN +@@ -790,6 +791,7 @@ struct mt7530_priv { + phy_interface_t p6_interface; + phy_interface_t p5_interface; + enum p5_interface_select p5_intf_sel; ++ bool p5_sgmii; + u8 mirror_rx; + u8 mirror_tx; + struct mt7530_port ports[MT7530_NUM_PORTS]; +@@ -799,7 +801,7 @@ struct mt7530_priv { + int irq; + struct irq_domain *irq_domain; + u32 irq_enable; +- int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); ++ int (*create_sgmii)(struct mt7530_priv *priv); + u8 active_cpu_ports; + }; + diff --git a/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch b/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch new file mode 100644 index 00000000000000..1489c4f2f3ba29 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-26-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch @@ -0,0 +1,133 @@ +From 0dcde4c1e7c47822a6b00d6f96b7f19e51536026 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:55 +0300 +Subject: [PATCH 26/48] net: dsa: mt7530: improve comments regarding switch + ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's no logic to numerically order the CPU ports. Just state the port +number instead. + +Remove the irrelevant PHY muxing information from +mt7530_mac_port_get_caps(). Explain the supported MII modes instead. + +Remove the out of place PHY muxing information from +mt753x_phylink_mac_config(). The function is for MT7530, MT7531, and the +switch on the MT7988 SoC but there's no PHY muxing on MT7531 or the switch +on the MT7988 SoC. + +These comments were gradually introduced with the commits below. +commit ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API") +commit 38f790a80560 ("net: dsa: mt7530: Add support for port 5") +commit 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding +a new hardware") +commit c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Reviewed-by: Andrew Lunn +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-4-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 30 ++++++++++++++++++++---------- + 1 file changed, 20 insertions(+), 10 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2565,12 +2565,14 @@ static void mt7530_mac_port_get_caps(str + struct phylink_config *config) + { + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ /* Ports which are connected to switch PHYs. There is no MII pinout. */ ++ case 0 ... 4: + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + +- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ ++ /* Port 5 supports rgmii with delays, mii, and gmii. */ ++ case 5: + phy_interface_set_rgmii(config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_MII, + config->supported_interfaces); +@@ -2578,7 +2580,8 @@ static void mt7530_mac_port_get_caps(str + config->supported_interfaces); + break; + +- case 6: /* 1st cpu port */ ++ /* Port 6 supports rgmii and trgmii. */ ++ case 6: + __set_bit(PHY_INTERFACE_MODE_RGMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_TRGMII, +@@ -2593,19 +2596,24 @@ static void mt7531_mac_port_get_caps(str + struct mt7530_priv *priv = ds->priv; + + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ /* Ports which are connected to switch PHYs. There is no MII pinout. */ ++ case 0 ... 4: + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + +- case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ ++ /* Port 5 supports rgmii with delays on MT7531BE, sgmii/802.3z on ++ * MT7531AE. ++ */ ++ case 5: + if (!priv->p5_sgmii) { + phy_interface_set_rgmii(config->supported_interfaces); + break; + } + fallthrough; + +- case 6: /* 1st cpu port supports sgmii/8023z only */ ++ /* Port 6 supports sgmii/802.3z. */ ++ case 6: + __set_bit(PHY_INTERFACE_MODE_SGMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, +@@ -2624,11 +2632,13 @@ static void mt7988_mac_port_get_caps(str + phy_interface_zero(config->supported_interfaces); + + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ /* Ports which are connected to switch PHYs. There is no MII pinout. */ ++ case 0 ... 4: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); + break; + ++ /* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */ + case 6: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); +@@ -2792,12 +2802,12 @@ mt753x_phylink_mac_config(struct dsa_swi + u32 mcr_cur, mcr_new; + + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ case 0 ... 4: + if (state->interface != PHY_INTERFACE_MODE_GMII && + state->interface != PHY_INTERFACE_MODE_INTERNAL) + goto unsupported; + break; +- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ ++ case 5: + if (priv->p5_interface == state->interface) + break; + +@@ -2807,7 +2817,7 @@ mt753x_phylink_mac_config(struct dsa_swi + if (priv->p5_intf_sel != P5_DISABLED) + priv->p5_interface = state->interface; + break; +- case 6: /* 1st cpu port */ ++ case 6: + if (priv->p6_interface == state->interface) + break; + diff --git a/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch b/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch new file mode 100644 index 00000000000000..6fbf259735dd0a --- /dev/null +++ b/target/linux/generic/backport-6.1/790-27-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch @@ -0,0 +1,95 @@ +From 0f03d9bfa1da1d26cb950e4b35b1ff7b9be1828f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:56 +0300 +Subject: [PATCH 27/48] net: dsa: mt7530: improve code path for setting up port + 5 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There're two code paths for setting up port 5: + +mt7530_setup() +-> mt7530_setup_port5() + +mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt7530_mac_config() + -> mt7530_setup_port5() + +Currently mt7530_setup_port5() from mt7530_setup() always runs. If port 5 +is used as a CPU, DSA, or user port, mt7530_setup_port5() from +mt753x_phylink_mac_config() won't run. That is because priv->p5_interface +set on mt7530_setup_port5() will match state->interface on +mt753x_phylink_mac_config() which will stop running mt7530_setup_port5() +again. + +Therefore, mt7530_setup_port5() will never run from +mt753x_phylink_mac_config(). + +Address this by not running mt7530_setup_port5() from mt7530_setup() if +port 5 is used as a CPU, DSA, or user port. This driver isn't in the +dsa_switches_apply_workarounds[] array so phylink will always be present. + +To keep the cases where port 5 isn't controlled by phylink working as +before, preserve the mt7530_setup_port5() call from mt7530_setup(). + +Do not set priv->p5_intf_sel to P5_DISABLED. It is already set to that when +"priv" is allocated. + +Move setting the interface to a more specific location. It's supposed to be +overwritten if PHY muxing is detected. + +Improve the comment which explains the process. + +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-5-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 17 ++++++++--------- + 1 file changed, 8 insertions(+), 9 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2353,16 +2353,15 @@ mt7530_setup(struct dsa_switch *ds) + return ret; + + /* Setup port 5 */ +- priv->p5_intf_sel = P5_DISABLED; +- interface = PHY_INTERFACE_MODE_NA; +- + if (!dsa_is_unused_port(ds, 5)) { + priv->p5_intf_sel = P5_INTF_SEL_GMAC5; +- ret = of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface); +- if (ret && ret != -ENODEV) +- return ret; + } else { +- /* Scan the ethernet nodes. look for GMAC1, lookup used phy */ ++ /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. ++ * Set priv->p5_intf_sel to the appropriate value if PHY muxing ++ * is detected. ++ */ ++ interface = PHY_INTERFACE_MODE_NA; ++ + for_each_child_of_node(dn, mac_np) { + if (!of_device_is_compatible(mac_np, + "mediatek,eth-mac")) +@@ -2393,6 +2392,8 @@ mt7530_setup(struct dsa_switch *ds) + of_node_put(phy_node); + break; + } ++ ++ mt7530_setup_port5(ds, interface); + } + + #ifdef CONFIG_GPIOLIB +@@ -2403,8 +2404,6 @@ mt7530_setup(struct dsa_switch *ds) + } + #endif /* CONFIG_GPIOLIB */ + +- mt7530_setup_port5(ds, interface); +- + /* Flush the FDB table */ + ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); + if (ret < 0) diff --git a/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch b/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch new file mode 100644 index 00000000000000..94692d948ffbf1 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-28-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch @@ -0,0 +1,42 @@ +From 120581c81ad19704a9325505c83a82b7e760e96e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:57 +0300 +Subject: [PATCH 28/48] net: dsa: mt7530: do not set priv->p5_interface on + mt7530_setup_port5() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Running mt7530_setup_port5() from mt7530_setup() used to handle all cases +of configuring port 5, including phylink. + +Setting priv->p5_interface under mt7530_setup_port5() makes sure that +mt7530_setup_port5() from mt753x_phylink_mac_config() won't run. + +The commit ("net: dsa: mt7530: improve code path for setting up port 5") +makes so that mt7530_setup_port5() from mt7530_setup() runs only on +non-phylink cases. + +Get rid of unnecessarily setting priv->p5_interface under +mt7530_setup_port5() as port 5 phylink configuration will be done by +running mt7530_setup_port5() from mt753x_phylink_mac_config() now. + +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-6-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -971,8 +971,6 @@ static void mt7530_setup_port5(struct ds + dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", + val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); + +- priv->p5_interface = interface; +- + unlock_exit: + mutex_unlock(&priv->reg_mutex); + } diff --git a/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch b/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch new file mode 100644 index 00000000000000..c121eb4a358598 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-29-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch @@ -0,0 +1,62 @@ +From 3b423061eb3a62e59b57939ae1e1234756a0f6a1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:58 +0300 +Subject: [PATCH 29/48] net: dsa: mt7530: do not run mt7530_setup_port5() if + port 5 is disabled +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's no need to run all the code on mt7530_setup_port5() if port 5 is +disabled. The only case for calling mt7530_setup_port5() from +mt7530_setup() is when PHY muxing is enabled. That is because port 5 is not +defined as a port on the devicetree, therefore, it cannot be controlled by +phylink. + +Because of this, run mt7530_setup_port5() if priv->p5_intf_sel is +P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4. Remove the P5_DISABLED case from +mt7530_setup_port5(). + +Stop initialising the interface variable as the remaining cases will always +call mt7530_setup_port5() with it initialised. + +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-7-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -935,9 +935,6 @@ static void mt7530_setup_port5(struct ds + /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ + val &= ~MHWTRAP_P5_DIS; + break; +- case P5_DISABLED: +- interface = PHY_INTERFACE_MODE_NA; +- break; + default: + dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", + priv->p5_intf_sel); +@@ -2358,8 +2355,6 @@ mt7530_setup(struct dsa_switch *ds) + * Set priv->p5_intf_sel to the appropriate value if PHY muxing + * is detected. + */ +- interface = PHY_INTERFACE_MODE_NA; +- + for_each_child_of_node(dn, mac_np) { + if (!of_device_is_compatible(mac_np, + "mediatek,eth-mac")) +@@ -2391,7 +2386,9 @@ mt7530_setup(struct dsa_switch *ds) + break; + } + +- mt7530_setup_port5(ds, interface); ++ if (priv->p5_intf_sel == P5_INTF_SEL_PHY_P0 || ++ priv->p5_intf_sel == P5_INTF_SEL_PHY_P4) ++ mt7530_setup_port5(ds, interface); + } + + #ifdef CONFIG_GPIOLIB diff --git a/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch b/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch new file mode 100644 index 00000000000000..9b610e0bdb09b5 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-30-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch @@ -0,0 +1,58 @@ +From 959f4ac4940bebb84bdd25ac61470b3965e1e475 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:02 +0300 +Subject: [PATCH 30/48] net: dsa: mt7530: empty default case on + mt7530_setup_port5() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There're two code paths for setting up port 5: + +mt7530_setup() +-> mt7530_setup_port5() + +mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt7530_mac_config() + -> mt7530_setup_port5() + +On the first code path, priv->p5_intf_sel is either set to +P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4 when mt7530_setup_port5() is run. + +On the second code path, priv->p5_intf_sel is set to P5_INTF_SEL_GMAC5 when +mt7530_setup_port5() is run. + +Empty the default case which will never run but is needed nonetheless to +handle all the remaining enumeration values. + +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-1-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -936,9 +936,7 @@ static void mt7530_setup_port5(struct ds + val &= ~MHWTRAP_P5_DIS; + break; + default: +- dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", +- priv->p5_intf_sel); +- goto unlock_exit; ++ break; + } + + /* Setup RGMII settings */ +@@ -968,7 +966,6 @@ static void mt7530_setup_port5(struct ds + dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", + val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); + +-unlock_exit: + mutex_unlock(&priv->reg_mutex); + } + diff --git a/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch b/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch new file mode 100644 index 00000000000000..dba1cb734e8dd2 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-31-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch @@ -0,0 +1,53 @@ +From 9ec0a800c8e0850e1358b7402d6af557af81cb38 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:03 +0300 +Subject: [PATCH 31/48] net: dsa: mt7530: move XTAL check to mt7530_setup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The crystal frequency concerns the switch core. The frequency should be +checked when the switch is being set up so the driver can reject the +unsupported hardware earlier and without requiring port 6 to be used. + +Move it to mt7530_setup(). Drop the unnecessary function printing. + +Reviewed-by: Andrew Lunn +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-2-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -408,13 +408,6 @@ mt7530_pad_clk_setup(struct dsa_switch * + + xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; + +- if (xtal == HWTRAP_XTAL_20MHZ) { +- dev_err(priv->dev, +- "%s: MT7530 with a 20MHz XTAL is not supported!\n", +- __func__); +- return -EINVAL; +- } +- + switch (interface) { + case PHY_INTERFACE_MODE_RGMII: + trgint = 0; +@@ -2286,6 +2279,12 @@ mt7530_setup(struct dsa_switch *ds) + return -ENODEV; + } + ++ if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_20MHZ) { ++ dev_err(priv->dev, ++ "MT7530 with a 20MHz XTAL is not supported!\n"); ++ return -EINVAL; ++ } ++ + /* Reset the switch through internal reset */ + mt7530_write(priv, MT7530_SYS_CTRL, + SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | diff --git a/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch b/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch new file mode 100644 index 00000000000000..90f8e095ef0cbd --- /dev/null +++ b/target/linux/generic/backport-6.1/790-32-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch @@ -0,0 +1,146 @@ +From 7199c736aa8cd9c69ae681a9c733408372c2ce76 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:04 +0300 +Subject: [PATCH 32/48] net: dsa: mt7530: simplify mt7530_pad_clk_setup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This code is from before this driver was converted to phylink API. Phylink +deals with the unsupported interface cases before mt7530_pad_clk_setup() is +run. Therefore, the default case would never run. However, it must be +defined nonetheless to handle all the remaining enumeration values, the +phy-modes. + +Switch to if statement for RGMII and return which simplifies the code and +saves an indent. + +Set P6_INTF_MODE, which is the three least significant bits of the +MT7530_P6ECR register, to 0 for RGMII even though it will already be 0 +after reset. This is to keep supporting dynamic reconfiguration of the port +in the case the interface changes from TRGMII to RGMII. + +Disable the TRGMII clocks for all cases. They will be enabled if TRGMII is +being used. + +Read XTAL after checking for RGMII as it's only needed for the TRGMII +interface mode. + +Reviewed-by: Daniel Golle +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-3-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 91 ++++++++++++++++++---------------------- + 1 file changed, 40 insertions(+), 51 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -404,65 +404,54 @@ static int + mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) + { + struct mt7530_priv *priv = ds->priv; +- u32 ncpo1, ssc_delta, trgint, xtal; ++ u32 ncpo1, ssc_delta, xtal; + +- xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; ++ /* Disable the MT7530 TRGMII clocks */ ++ core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + +- switch (interface) { +- case PHY_INTERFACE_MODE_RGMII: +- trgint = 0; +- break; +- case PHY_INTERFACE_MODE_TRGMII: +- trgint = 1; +- if (xtal == HWTRAP_XTAL_25MHZ) +- ssc_delta = 0x57; +- else +- ssc_delta = 0x87; +- if (priv->id == ID_MT7621) { +- /* PLL frequency: 125MHz: 1.0GBit */ +- if (xtal == HWTRAP_XTAL_40MHZ) +- ncpo1 = 0x0640; +- if (xtal == HWTRAP_XTAL_25MHZ) +- ncpo1 = 0x0a00; +- } else { /* PLL frequency: 250MHz: 2.0Gbit */ +- if (xtal == HWTRAP_XTAL_40MHZ) +- ncpo1 = 0x0c80; +- if (xtal == HWTRAP_XTAL_25MHZ) +- ncpo1 = 0x1400; +- } +- break; +- default: +- dev_err(priv->dev, "xMII interface %d not supported\n", +- interface); +- return -EINVAL; ++ if (interface == PHY_INTERFACE_MODE_RGMII) { ++ mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, ++ P6_INTF_MODE(0)); ++ return 0; + } + +- mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, +- P6_INTF_MODE(trgint)); ++ mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); + +- if (trgint) { +- /* Disable the MT7530 TRGMII clocks */ +- core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); +- +- /* Setup the MT7530 TRGMII Tx Clock */ +- core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); +- core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); +- core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); +- core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); +- core_write(priv, CORE_PLL_GROUP4, +- RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN | +- RG_SYSPLL_BIAS_LPF_EN); +- core_write(priv, CORE_PLL_GROUP2, +- RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN | +- RG_SYSPLL_POSDIV(1)); +- core_write(priv, CORE_PLL_GROUP7, +- RG_LCDDS_PCW_NCPO_CHG | RG_LCCDS_C(3) | +- RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); ++ xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; + +- /* Enable the MT7530 TRGMII clocks */ +- core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); ++ if (xtal == HWTRAP_XTAL_25MHZ) ++ ssc_delta = 0x57; ++ else ++ ssc_delta = 0x87; ++ ++ if (priv->id == ID_MT7621) { ++ /* PLL frequency: 125MHz: 1.0GBit */ ++ if (xtal == HWTRAP_XTAL_40MHZ) ++ ncpo1 = 0x0640; ++ if (xtal == HWTRAP_XTAL_25MHZ) ++ ncpo1 = 0x0a00; ++ } else { /* PLL frequency: 250MHz: 2.0Gbit */ ++ if (xtal == HWTRAP_XTAL_40MHZ) ++ ncpo1 = 0x0c80; ++ if (xtal == HWTRAP_XTAL_25MHZ) ++ ncpo1 = 0x1400; + } + ++ /* Setup the MT7530 TRGMII Tx Clock */ ++ core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); ++ core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); ++ core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); ++ core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); ++ core_write(priv, CORE_PLL_GROUP4, RG_SYSPLL_DDSFBK_EN | ++ RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN); ++ core_write(priv, CORE_PLL_GROUP2, RG_SYSPLL_EN_NORMAL | ++ RG_SYSPLL_VODEN | RG_SYSPLL_POSDIV(1)); ++ core_write(priv, CORE_PLL_GROUP7, RG_LCDDS_PCW_NCPO_CHG | ++ RG_LCCDS_C(3) | RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); ++ ++ /* Enable the MT7530 TRGMII clocks */ ++ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); ++ + return 0; + } + diff --git a/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch b/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch new file mode 100644 index 00000000000000..93eccc8637b7db --- /dev/null +++ b/target/linux/generic/backport-6.1/790-33-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch @@ -0,0 +1,97 @@ +From 921a7deee767aa157b5372863a4c1cac53e5c53a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:05 +0300 +Subject: [PATCH 33/48] net: dsa: mt7530: call port 6 setup from + mt7530_mac_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +mt7530_pad_clk_setup() is called if port 6 is enabled. It used to do more +things than setting up port 6. That part was moved to more appropriate +locations, mt7530_setup() and mt7530_pll_setup(). + +Now that all it does is set up port 6, rename it to mt7530_setup_port6(), +and move it to a more appropriate location, under mt7530_mac_config(). + +Change mt7530_setup_port6() to void as there're no error cases. + +Leave an empty mt7530_pad_clk_setup() to satisfy the pad_setup function +pointer. + +This is the code path for setting up the ports before: + +dsa_switch_ops :: phylink_mac_config() -> mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt753x_info :: mac_port_config() -> mt7530_mac_config() + -> mt7530_setup_port5() +-> mt753x_pad_setup() + -> mt753x_info :: pad_setup() -> mt7530_pad_clk_setup() + +This is after: + +dsa_switch_ops :: phylink_mac_config() -> mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt753x_info :: mac_port_config() -> mt7530_mac_config() + -> mt7530_setup_port5() + -> mt7530_setup_port6() + +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-4-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -400,8 +400,8 @@ static void mt7530_pll_setup(struct mt75 + } + + /* Setup port 6 interface mode and TRGMII TX circuit */ +-static int +-mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) ++static void ++mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) + { + struct mt7530_priv *priv = ds->priv; + u32 ncpo1, ssc_delta, xtal; +@@ -412,7 +412,7 @@ mt7530_pad_clk_setup(struct dsa_switch * + if (interface == PHY_INTERFACE_MODE_RGMII) { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(0)); +- return 0; ++ return; + } + + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); +@@ -451,7 +451,11 @@ mt7530_pad_clk_setup(struct dsa_switch * + + /* Enable the MT7530 TRGMII clocks */ + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); ++} + ++static int ++mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) ++{ + return 0; + } + +@@ -2640,11 +2644,10 @@ mt7530_mac_config(struct dsa_switch *ds, + { + struct mt7530_priv *priv = ds->priv; + +- /* Only need to setup port5. */ +- if (port != 5) +- return 0; +- +- mt7530_setup_port5(priv->ds, interface); ++ if (port == 5) ++ mt7530_setup_port5(priv->ds, interface); ++ else if (port == 6) ++ mt7530_setup_port6(priv->ds, interface); + + return 0; + } diff --git a/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch b/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch new file mode 100644 index 00000000000000..a423c0899c805d --- /dev/null +++ b/target/linux/generic/backport-6.1/790-34-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch @@ -0,0 +1,148 @@ +From fcbc5d900fa53f79963fe4626069739ee5567b4b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:06 +0300 +Subject: [PATCH 34/48] net: dsa: mt7530: remove pad_setup function pointer +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The pad_setup function pointer was introduced with 88bdef8be9f6 ("net: dsa: +mt7530: Extend device data ready for adding a new hardware"). It was being +used to set up the core clock and port 6 of the MT7530 switch, and pll of +the MT7531 switch. + +All of these were moved to more appropriate locations, and it was never +used for the switch on the MT7988 SoC. Therefore, this function pointer +hasn't got a use anymore. Remove it. + +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-5-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 36 ++---------------------------------- + drivers/net/dsa/mt7530.h | 3 --- + 2 files changed, 2 insertions(+), 37 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -453,18 +453,6 @@ mt7530_setup_port6(struct dsa_switch *ds + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + } + +-static int +-mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +-{ +- return 0; +-} +- +-static int +-mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) +-{ +- return 0; +-} +- + static void + mt7531_pll_setup(struct mt7530_priv *priv) + { +@@ -2631,14 +2619,6 @@ static void mt7988_mac_port_get_caps(str + } + + static int +-mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) +-{ +- struct mt7530_priv *priv = ds->priv; +- +- return priv->info->pad_setup(ds, state->interface); +-} +- +-static int + mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2803,8 +2783,6 @@ mt753x_phylink_mac_config(struct dsa_swi + if (priv->p6_interface == state->interface) + break; + +- mt753x_pad_setup(ds, state); +- + if (mt753x_mac_config(ds, port, mode, state) < 0) + goto unsupported; + +@@ -3127,11 +3105,6 @@ mt753x_conduit_state_change(struct dsa_s + mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); + } + +-static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) +-{ +- return 0; +-} +- + static int mt7988_setup(struct dsa_switch *ds) + { + struct mt7530_priv *priv = ds->priv; +@@ -3192,7 +3165,6 @@ const struct mt753x_info mt753x_table[] + .sw_setup = mt7530_setup, + .phy_read = mt7530_phy_read, + .phy_write = mt7530_phy_write, +- .pad_setup = mt7530_pad_clk_setup, + .mac_port_get_caps = mt7530_mac_port_get_caps, + .mac_port_config = mt7530_mac_config, + }, +@@ -3202,7 +3174,6 @@ const struct mt753x_info mt753x_table[] + .sw_setup = mt7530_setup, + .phy_read = mt7530_phy_read, + .phy_write = mt7530_phy_write, +- .pad_setup = mt7530_pad_clk_setup, + .mac_port_get_caps = mt7530_mac_port_get_caps, + .mac_port_config = mt7530_mac_config, + }, +@@ -3212,7 +3183,6 @@ const struct mt753x_info mt753x_table[] + .sw_setup = mt7531_setup, + .phy_read = mt7531_ind_phy_read, + .phy_write = mt7531_ind_phy_write, +- .pad_setup = mt7531_pad_setup, + .cpu_port_config = mt7531_cpu_port_config, + .mac_port_get_caps = mt7531_mac_port_get_caps, + .mac_port_config = mt7531_mac_config, +@@ -3223,7 +3193,6 @@ const struct mt753x_info mt753x_table[] + .sw_setup = mt7988_setup, + .phy_read = mt7531_ind_phy_read, + .phy_write = mt7531_ind_phy_write, +- .pad_setup = mt7988_pad_setup, + .cpu_port_config = mt7988_cpu_port_config, + .mac_port_get_caps = mt7988_mac_port_get_caps, + .mac_port_config = mt7988_mac_config, +@@ -3253,9 +3222,8 @@ mt7530_probe_common(struct mt7530_priv * + /* Sanity check if these required device operations are filled + * properly. + */ +- if (!priv->info->sw_setup || !priv->info->pad_setup || +- !priv->info->phy_read || !priv->info->phy_write || +- !priv->info->mac_port_get_caps || ++ if (!priv->info->sw_setup || !priv->info->phy_read || ++ !priv->info->phy_write || !priv->info->mac_port_get_caps || + !priv->info->mac_port_config) + return -EINVAL; + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -722,8 +722,6 @@ struct mt753x_pcs { + * @sw_setup: Holding the handler to a device initialization + * @phy_read: Holding the way reading PHY port + * @phy_write: Holding the way writing PHY port +- * @pad_setup: Holding the way setting up the bus pad for a certain +- * MAC port + * @phy_mode_supported: Check if the PHY type is being supported on a certain + * port + * @mac_port_validate: Holding the way to set addition validate type for a +@@ -739,7 +737,6 @@ struct mt753x_info { + int (*sw_setup)(struct dsa_switch *ds); + int (*phy_read)(struct mt7530_priv *priv, int port, int regnum); + int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); +- int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); + int (*cpu_port_config)(struct dsa_switch *ds, int port); + void (*mac_port_get_caps)(struct dsa_switch *ds, int port, + struct phylink_config *config); diff --git a/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch b/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch new file mode 100644 index 00000000000000..3667dbf54a4d37 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-35-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch @@ -0,0 +1,36 @@ +From 58a94eb63233bb2ede13b183b6a6a03aa0a2dfc3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:07 +0300 +Subject: [PATCH 35/48] net: dsa: mt7530: correct port capabilities of MT7988 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page +125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open +Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for +ports which connect to switch PHYs to '0 ... 3'. + +Port 4 and 5 are not used at all in this design. + +Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1] +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-6-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2604,7 +2604,7 @@ static void mt7988_mac_port_get_caps(str + + switch (port) { + /* Ports which are connected to switch PHYs. There is no MII pinout. */ +- case 0 ... 4: ++ case 0 ... 3: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); + break; diff --git a/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch b/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch new file mode 100644 index 00000000000000..48433705f62504 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-36-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch @@ -0,0 +1,38 @@ +From 4440ce33074be6bd55d1a0c8b5f4b6d433ae2c74 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:08 +0300 +Subject: [PATCH 36/48] net: dsa: mt7530: do not clear + config->supported_interfaces +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's no need to clear the config->supported_interfaces bitmap before +reporting the supported interfaces as all bits in the bitmap will already +be initialized to zero when the phylink_config structure is allocated. The +"config" pointer points to &dp->phylink_config, and "dp" is allocated by +dsa_port_touch() with kzalloc(), so all its fields are filled with zeroes. + +There's no code that would change the bitmap beforehand. Remove it. + +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-7-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2600,8 +2600,6 @@ static void mt7531_mac_port_get_caps(str + static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { +- phy_interface_zero(config->supported_interfaces); +- + switch (port) { + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 3: diff --git a/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch b/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch new file mode 100644 index 00000000000000..b707de87ed2677 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-37-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch @@ -0,0 +1,81 @@ +From 2f507aaeb1a12044f2376a255c2afff1f7432b0b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:42:57 +0200 +Subject: [PATCH 37/48] net: dsa: mt7530: remove .mac_port_config for MT7988 + and make it optional +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +For the switch on the MT7988 SoC, the mac_port_config member for ID_MT7988 +in mt753x_table is not needed as the interfaces of all MACs are already +handled on mt7988_mac_port_get_caps(). + +Therefore, remove the mac_port_config member from ID_MT7988 in +mt753x_table. Before calling priv->info->mac_port_config(), if there's no +mac_port_config member in mt753x_table, exit mt753x_mac_config() +successfully. + +Remove calling priv->info->mac_port_config() from the sanity check as the +sanity check requires a pointer to a mac_port_config function to be +non-NULL. This will fail for MT7988 as mac_port_config won't be a member of +its info table. + +Co-developed-by: Daniel Golle +Signed-off-by: Daniel Golle +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 18 ++++-------------- + 1 file changed, 4 insertions(+), 14 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2683,17 +2683,6 @@ static bool mt753x_is_mac_port(u32 port) + } + + static int +-mt7988_mac_config(struct dsa_switch *ds, int port, unsigned int mode, +- phy_interface_t interface) +-{ +- if (dsa_is_cpu_port(ds, port) && +- interface == PHY_INTERFACE_MODE_INTERNAL) +- return 0; +- +- return -EINVAL; +-} +- +-static int + mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2733,6 +2722,9 @@ mt753x_mac_config(struct dsa_switch *ds, + { + struct mt7530_priv *priv = ds->priv; + ++ if (!priv->info->mac_port_config) ++ return 0; ++ + return priv->info->mac_port_config(ds, port, mode, state->interface); + } + +@@ -3193,7 +3185,6 @@ const struct mt753x_info mt753x_table[] + .phy_write = mt7531_ind_phy_write, + .cpu_port_config = mt7988_cpu_port_config, + .mac_port_get_caps = mt7988_mac_port_get_caps, +- .mac_port_config = mt7988_mac_config, + }, + }; + EXPORT_SYMBOL_GPL(mt753x_table); +@@ -3221,8 +3212,7 @@ mt7530_probe_common(struct mt7530_priv * + * properly. + */ + if (!priv->info->sw_setup || !priv->info->phy_read || +- !priv->info->phy_write || !priv->info->mac_port_get_caps || +- !priv->info->mac_port_config) ++ !priv->info->phy_write || !priv->info->mac_port_get_caps) + return -EINVAL; + + priv->id = priv->info->id; diff --git a/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch b/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch new file mode 100644 index 00000000000000..5dfb8bddbbef45 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-38-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch @@ -0,0 +1,31 @@ +From 0e297b1c662825f7dcd97272323c81f502987e0f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:42:58 +0200 +Subject: [PATCH 38/48] net: dsa: mt7530: set interrupt register only for + MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Setting this register related to interrupts is only needed for the MT7530 +switch. Make an exclusive check to ensure this. + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Tested-by: Daniel Golle +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2084,7 +2084,7 @@ mt7530_setup_irq(struct mt7530_priv *pri + } + + /* This register must be set for MT7530 to properly fire interrupts */ +- if (priv->id != ID_MT7531) ++ if (priv->id == ID_MT7530 || priv->id == ID_MT7621) + mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL); + + ret = request_threaded_irq(priv->irq, NULL, mt7530_irq_thread_fn, diff --git a/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch b/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch new file mode 100644 index 00000000000000..565f16a47f134e --- /dev/null +++ b/target/linux/generic/backport-6.1/790-39-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch @@ -0,0 +1,41 @@ +From 0eb6bc551371070325b6606cc3bed6734ecad87d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:42:59 +0200 +Subject: [PATCH 39/48] net: dsa: mt7530: do not use SW_PHY_RST to reset MT7531 + switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +According to the document MT7531 Reference Manual for Development Board +v1.0, the SW_PHY_RST bit on the SYS_CTRL register doesn't exist for +MT7531. This is likely why forcing link down on all ports is necessary for +MT7531. + +Therefore, do not set SW_PHY_RST on mt7531_setup(). + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2478,14 +2478,12 @@ mt7531_setup(struct dsa_switch *ds) + val = mt7530_read(priv, MT7531_TOP_SIG_SR); + priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); + +- /* all MACs must be forced link-down before sw reset */ ++ /* Force link down on all ports before internal reset */ + for (i = 0; i < MT7530_NUM_PORTS; i++) + mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); + + /* Reset the switch through internal reset */ +- mt7530_write(priv, MT7530_SYS_CTRL, +- SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | +- SYS_CTRL_REG_RST); ++ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); + + if (!priv->p5_sgmii) { + mt7531_pll_setup(priv); diff --git a/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch b/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch new file mode 100644 index 00000000000000..d636e2d56440c4 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-40-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch @@ -0,0 +1,217 @@ +From bb20b1b4d832de4eb98ec7c22906db7c04e3f7c5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:00 +0200 +Subject: [PATCH 40/48] net: dsa: mt7530: get rid of useless error returns on + phylink code path +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Remove error returns on the cases where they are already handled with the +function the mac_port_get_caps member in mt753x_table points to. + +mt7531_mac_config() is also called from mt7531_cpu_port_config() outside of +phylink but the port and interface modes are already handled there. + +Change the functions and the mac_port_config function pointer to void now +that there're no error returns anymore. + +Remove mt753x_is_mac_port() that used to help the said error returns. + +On mt7531_mac_config(), switch to if statements to simplify the code. + +Remove internal phy cases from mt753x_phylink_mac_config(), there is no +need to check the interface mode as that's already handled with the +function the mac_port_get_caps member in mt753x_table points to. + +Acked-by: Daniel Golle +Tested-by: Daniel Golle +Signed-off-by: Arınç ÜNAL +Reviewed-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 81 ++++++++-------------------------------- + drivers/net/dsa/mt7530.h | 6 +-- + 2 files changed, 19 insertions(+), 68 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2614,7 +2614,7 @@ static void mt7988_mac_port_get_caps(str + } + } + +-static int ++static void + mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2624,22 +2624,14 @@ mt7530_mac_config(struct dsa_switch *ds, + mt7530_setup_port5(priv->ds, interface); + else if (port == 6) + mt7530_setup_port6(priv->ds, interface); +- +- return 0; + } + +-static int mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, +- phy_interface_t interface, +- struct phy_device *phydev) ++static void mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, ++ phy_interface_t interface, ++ struct phy_device *phydev) + { + u32 val; + +- if (priv->p5_sgmii) { +- dev_err(priv->dev, "RGMII mode is not available for port %d\n", +- port); +- return -EINVAL; +- } +- + val = mt7530_read(priv, MT7531_CLKGEN_CTRL); + val |= GP_CLK_EN; + val &= ~GP_MODE_MASK; +@@ -2667,20 +2659,14 @@ static int mt7531_rgmii_setup(struct mt7 + case PHY_INTERFACE_MODE_RGMII_ID: + break; + default: +- return -EINVAL; ++ break; + } + } +- mt7530_write(priv, MT7531_CLKGEN_CTRL, val); + +- return 0; +-} +- +-static bool mt753x_is_mac_port(u32 port) +-{ +- return (port == 5 || port == 6); ++ mt7530_write(priv, MT7531_CLKGEN_CTRL, val); + } + +-static int ++static void + mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2688,42 +2674,21 @@ mt7531_mac_config(struct dsa_switch *ds, + struct phy_device *phydev; + struct dsa_port *dp; + +- if (!mt753x_is_mac_port(port)) { +- dev_err(priv->dev, "port %d is not a MAC port\n", port); +- return -EINVAL; +- } +- +- switch (interface) { +- case PHY_INTERFACE_MODE_RGMII: +- case PHY_INTERFACE_MODE_RGMII_ID: +- case PHY_INTERFACE_MODE_RGMII_RXID: +- case PHY_INTERFACE_MODE_RGMII_TXID: ++ if (phy_interface_mode_is_rgmii(interface)) { + dp = dsa_to_port(ds, port); + phydev = dp->slave->phydev; +- return mt7531_rgmii_setup(priv, port, interface, phydev); +- case PHY_INTERFACE_MODE_SGMII: +- case PHY_INTERFACE_MODE_NA: +- case PHY_INTERFACE_MODE_1000BASEX: +- case PHY_INTERFACE_MODE_2500BASEX: +- /* handled in SGMII PCS driver */ +- return 0; +- default: +- return -EINVAL; ++ mt7531_rgmii_setup(priv, port, interface, phydev); + } +- +- return -EINVAL; + } + +-static int ++static void + mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + const struct phylink_link_state *state) + { + struct mt7530_priv *priv = ds->priv; + +- if (!priv->info->mac_port_config) +- return 0; +- +- return priv->info->mac_port_config(ds, port, mode, state->interface); ++ if (priv->info->mac_port_config) ++ priv->info->mac_port_config(ds, port, mode, state->interface); + } + + static struct phylink_pcs * +@@ -2752,17 +2717,11 @@ mt753x_phylink_mac_config(struct dsa_swi + u32 mcr_cur, mcr_new; + + switch (port) { +- case 0 ... 4: +- if (state->interface != PHY_INTERFACE_MODE_GMII && +- state->interface != PHY_INTERFACE_MODE_INTERNAL) +- goto unsupported; +- break; + case 5: + if (priv->p5_interface == state->interface) + break; + +- if (mt753x_mac_config(ds, port, mode, state) < 0) +- goto unsupported; ++ mt753x_mac_config(ds, port, mode, state); + + if (priv->p5_intf_sel != P5_DISABLED) + priv->p5_interface = state->interface; +@@ -2771,16 +2730,10 @@ mt753x_phylink_mac_config(struct dsa_swi + if (priv->p6_interface == state->interface) + break; + +- if (mt753x_mac_config(ds, port, mode, state) < 0) +- goto unsupported; ++ mt753x_mac_config(ds, port, mode, state); + + priv->p6_interface = state->interface; + break; +- default: +-unsupported: +- dev_err(ds->dev, "%s: unsupported %s port: %i\n", +- __func__, phy_modes(state->interface), port); +- return; + } + + mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); +@@ -2863,7 +2816,6 @@ mt7531_cpu_port_config(struct dsa_switch + struct mt7530_priv *priv = ds->priv; + phy_interface_t interface; + int speed; +- int ret; + + switch (port) { + case 5: +@@ -2888,9 +2840,8 @@ mt7531_cpu_port_config(struct dsa_switch + else + speed = SPEED_1000; + +- ret = mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); +- if (ret) +- return ret; ++ mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); ++ + mt7530_write(priv, MT7530_PMCR_P(port), + PMCR_CPU_PORT_SETTING(priv->id)); + mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -743,9 +743,9 @@ struct mt753x_info { + void (*mac_port_validate)(struct dsa_switch *ds, int port, + phy_interface_t interface, + unsigned long *supported); +- int (*mac_port_config)(struct dsa_switch *ds, int port, +- unsigned int mode, +- phy_interface_t interface); ++ void (*mac_port_config)(struct dsa_switch *ds, int port, ++ unsigned int mode, ++ phy_interface_t interface); + }; + + /* struct mt7530_priv - This is the main data structure for holding the state diff --git a/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch b/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch new file mode 100644 index 00000000000000..60b369c8f8122f --- /dev/null +++ b/target/linux/generic/backport-6.1/790-41-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch @@ -0,0 +1,305 @@ +From 8554f6a7914d28b179671540f527897d85c88809 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:01 +0200 +Subject: [PATCH 41/48] net: dsa: mt7530: get rid of + priv->info->cpu_port_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +priv->info->cpu_port_config() is used for MT7531 and the switch on the +MT7988 SoC. It sets up the ports described as a CPU port earlier than the +phylink code path would do. + +This function is useless as: +- Configuring the MACs can be done from the phylink_mac_config code path + instead. +- All the link configuration it does on the CPU ports are later undone with + the port_enable, phylink_mac_config, and then phylink_mac_link_up code + path [1]. + +priv->p5_interface and priv->p6_interface were being used to prevent +configuring the MACs from the phylink_mac_config code path. Remove them now +that they hold no purpose. + +Remove priv->info->cpu_port_config(). On mt753x_phylink_mac_config, switch +to if statements to simplify the code. + +Remove the overwriting of the speed and duplex interfaces for certain +interface modes. Phylink already provides the speed and duplex variables +with proper values. Phylink already sets the max speed of TRGMII to +SPEED_1000. Add SPEED_2500 for PHY_INTERFACE_MODE_2500BASEX to where the +speed and EEE bits are set instead. + +On the switch on the MT7988 SoC, PHY_INTERFACE_MODE_INTERNAL is being used +to describe the interface mode of the 10G MAC, which is of port 6. On +mt7988_cpu_port_config() PMCR_FORCE_SPEED_1000 was set via the +PMCR_CPU_PORT_SETTING() mask. Add SPEED_10000 case to where the speed bits +are set to cover this. No need to add it to where the EEE bits are set as +the "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version) +v0.1" document shows that these bits don't exist on the MT7530_PMCR_P(6) +register. + +Remove the definition of PMCR_CPU_PORT_SETTING() now that it holds no +purpose. + +Change mt753x_cpu_port_enable() to void now that there're no error cases +left. + +Link: https://lore.kernel.org/netdev/ZHy2jQLesdYFMQtO@shell.armlinux.org.uk/ [1] +Suggested-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 114 +++------------------------------------ + drivers/net/dsa/mt7530.h | 11 ---- + 2 files changed, 7 insertions(+), 118 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -995,18 +995,10 @@ mt753x_trap_frames(struct mt7530_priv *p + MT753X_BPDU_CPU_ONLY); + } + +-static int ++static void + mt753x_cpu_port_enable(struct dsa_switch *ds, int port) + { + struct mt7530_priv *priv = ds->priv; +- int ret; +- +- /* Setup max capability of CPU port at first */ +- if (priv->info->cpu_port_config) { +- ret = priv->info->cpu_port_config(ds, port); +- if (ret) +- return ret; +- } + + /* Enable Mediatek header mode on the cpu port */ + mt7530_write(priv, MT7530_PVC_P(port), +@@ -1032,8 +1024,6 @@ mt753x_cpu_port_enable(struct dsa_switch + /* Set to fallback mode for independent VLAN learning */ + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, + MT7530_PORT_FALLBACK_MODE); +- +- return 0; + } + + static int +@@ -2288,8 +2278,6 @@ mt7530_setup(struct dsa_switch *ds) + val |= MHWTRAP_MANUAL; + mt7530_write(priv, MT7530_MHWTRAP, val); + +- priv->p6_interface = PHY_INTERFACE_MODE_NA; +- + mt753x_trap_frames(priv); + + /* Enable and reset MIB counters */ +@@ -2304,9 +2292,7 @@ mt7530_setup(struct dsa_switch *ds) + mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); + + if (dsa_is_cpu_port(ds, i)) { +- ret = mt753x_cpu_port_enable(ds, i); +- if (ret) +- return ret; ++ mt753x_cpu_port_enable(ds, i); + } else { + mt7530_port_disable(ds, i); + +@@ -2410,9 +2396,7 @@ mt7531_setup_common(struct dsa_switch *d + mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); + + if (dsa_is_cpu_port(ds, i)) { +- ret = mt753x_cpu_port_enable(ds, i); +- if (ret) +- return ret; ++ mt753x_cpu_port_enable(ds, i); + } else { + mt7530_port_disable(ds, i); + +@@ -2501,10 +2485,6 @@ mt7531_setup(struct dsa_switch *ds) + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); + +- /* Let phylink decide the interface later. */ +- priv->p5_interface = PHY_INTERFACE_MODE_NA; +- priv->p6_interface = PHY_INTERFACE_MODE_NA; +- + /* Enable PHY core PLL, since phy_device has not yet been created + * provided for phy_[read,write]_mmd_indirect is called, we provide + * our own mt7531_ind_mmd_phy_[read,write] to complete this +@@ -2716,26 +2696,9 @@ mt753x_phylink_mac_config(struct dsa_swi + struct mt7530_priv *priv = ds->priv; + u32 mcr_cur, mcr_new; + +- switch (port) { +- case 5: +- if (priv->p5_interface == state->interface) +- break; +- ++ if (port == 5 || port == 6) + mt753x_mac_config(ds, port, mode, state); + +- if (priv->p5_intf_sel != P5_DISABLED) +- priv->p5_interface = state->interface; +- break; +- case 6: +- if (priv->p6_interface == state->interface) +- break; +- +- mt753x_mac_config(ds, port, mode, state); +- +- priv->p6_interface = state->interface; +- break; +- } +- + mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); + mcr_new = mcr_cur; + mcr_new &= ~PMCR_LINK_SETTINGS_MASK; +@@ -2771,17 +2734,10 @@ static void mt753x_phylink_mac_link_up(s + + mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; + +- /* MT753x MAC works in 1G full duplex mode for all up-clocked +- * variants. +- */ +- if (interface == PHY_INTERFACE_MODE_TRGMII || +- (phy_interface_mode_is_8023z(interface))) { +- speed = SPEED_1000; +- duplex = DUPLEX_FULL; +- } +- + switch (speed) { + case SPEED_1000: ++ case SPEED_2500: ++ case SPEED_10000: + mcr |= PMCR_FORCE_SPEED_1000; + break; + case SPEED_100: +@@ -2799,6 +2755,7 @@ static void mt753x_phylink_mac_link_up(s + if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) { + switch (speed) { + case SPEED_1000: ++ case SPEED_2500: + mcr |= PMCR_FORCE_EEE1G; + break; + case SPEED_100: +@@ -2810,61 +2767,6 @@ static void mt753x_phylink_mac_link_up(s + mt7530_set(priv, MT7530_PMCR_P(port), mcr); + } + +-static int +-mt7531_cpu_port_config(struct dsa_switch *ds, int port) +-{ +- struct mt7530_priv *priv = ds->priv; +- phy_interface_t interface; +- int speed; +- +- switch (port) { +- case 5: +- if (!priv->p5_sgmii) +- interface = PHY_INTERFACE_MODE_RGMII; +- else +- interface = PHY_INTERFACE_MODE_2500BASEX; +- +- priv->p5_interface = interface; +- break; +- case 6: +- interface = PHY_INTERFACE_MODE_2500BASEX; +- +- priv->p6_interface = interface; +- break; +- default: +- return -EINVAL; +- } +- +- if (interface == PHY_INTERFACE_MODE_2500BASEX) +- speed = SPEED_2500; +- else +- speed = SPEED_1000; +- +- mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); +- +- mt7530_write(priv, MT7530_PMCR_P(port), +- PMCR_CPU_PORT_SETTING(priv->id)); +- mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, +- speed, DUPLEX_FULL, true, true); +- +- return 0; +-} +- +-static int +-mt7988_cpu_port_config(struct dsa_switch *ds, int port) +-{ +- struct mt7530_priv *priv = ds->priv; +- +- mt7530_write(priv, MT7530_PMCR_P(port), +- PMCR_CPU_PORT_SETTING(priv->id)); +- +- mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, +- PHY_INTERFACE_MODE_INTERNAL, NULL, +- SPEED_10000, DUPLEX_FULL, true, true); +- +- return 0; +-} +- + static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { +@@ -3122,7 +3024,6 @@ const struct mt753x_info mt753x_table[] + .sw_setup = mt7531_setup, + .phy_read = mt7531_ind_phy_read, + .phy_write = mt7531_ind_phy_write, +- .cpu_port_config = mt7531_cpu_port_config, + .mac_port_get_caps = mt7531_mac_port_get_caps, + .mac_port_config = mt7531_mac_config, + }, +@@ -3132,7 +3033,6 @@ const struct mt753x_info mt753x_table[] + .sw_setup = mt7988_setup, + .phy_read = mt7531_ind_phy_read, + .phy_write = mt7531_ind_phy_write, +- .cpu_port_config = mt7988_cpu_port_config, + .mac_port_get_caps = mt7988_mac_port_get_caps, + }, + }; +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -331,13 +331,6 @@ enum mt7530_vlan_port_acc_frm { + PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ + PMCR_FORCE_FDX | PMCR_FORCE_LNK | \ + PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100) +-#define PMCR_CPU_PORT_SETTING(id) (PMCR_FORCE_MODE_ID((id)) | \ +- PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \ +- PMCR_BACKOFF_EN | PMCR_BACKPR_EN | \ +- PMCR_TX_EN | PMCR_RX_EN | \ +- PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ +- PMCR_FORCE_SPEED_1000 | \ +- PMCR_FORCE_FDX | PMCR_FORCE_LNK) + + #define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) + #define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24) +@@ -737,7 +730,6 @@ struct mt753x_info { + int (*sw_setup)(struct dsa_switch *ds); + int (*phy_read)(struct mt7530_priv *priv, int port, int regnum); + int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); +- int (*cpu_port_config)(struct dsa_switch *ds, int port); + void (*mac_port_get_caps)(struct dsa_switch *ds, int port, + struct phylink_config *config); + void (*mac_port_validate)(struct dsa_switch *ds, int port, +@@ -763,7 +755,6 @@ struct mt753x_info { + * @ports: Holding the state among ports + * @reg_mutex: The lock for protecting among process accessing + * registers +- * @p6_interface Holding the current port 6 interface + * @p5_intf_sel: Holding the current port 5 interface select + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch + * has got SGMII +@@ -785,8 +776,6 @@ struct mt7530_priv { + const struct mt753x_info *info; + unsigned int id; + bool mcm; +- phy_interface_t p6_interface; +- phy_interface_t p5_interface; + enum p5_interface_select p5_intf_sel; + bool p5_sgmii; + u8 mirror_rx; diff --git a/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch b/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch new file mode 100644 index 00000000000000..f14634c17a1ae6 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-42-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch @@ -0,0 +1,48 @@ +From 0c282205ef8c6dd6d2c145fac1fb6aba3e65c02d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:02 +0200 +Subject: [PATCH 42/48] net: dsa: mt7530: get rid of mt753x_mac_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There is no need for a separate function to call +priv->info->mac_port_config(). Call it from mt753x_phylink_mac_config() +instead and remove mt753x_mac_config(). + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 14 ++------------ + 1 file changed, 2 insertions(+), 12 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2661,16 +2661,6 @@ mt7531_mac_config(struct dsa_switch *ds, + } + } + +-static void +-mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode, +- const struct phylink_link_state *state) +-{ +- struct mt7530_priv *priv = ds->priv; +- +- if (priv->info->mac_port_config) +- priv->info->mac_port_config(ds, port, mode, state->interface); +-} +- + static struct phylink_pcs * + mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port, + phy_interface_t interface) +@@ -2696,8 +2686,8 @@ mt753x_phylink_mac_config(struct dsa_swi + struct mt7530_priv *priv = ds->priv; + u32 mcr_cur, mcr_new; + +- if (port == 5 || port == 6) +- mt753x_mac_config(ds, port, mode, state); ++ if ((port == 5 || port == 6) && priv->info->mac_port_config) ++ priv->info->mac_port_config(ds, port, mode, state->interface); + + mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); + mcr_new = mcr_cur; diff --git a/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch b/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch new file mode 100644 index 00000000000000..2fa17d45582217 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-43-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch @@ -0,0 +1,57 @@ +From d55c300aa1fe240aa3eba18550ba6c4e2c4bd157 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:03 +0200 +Subject: [PATCH 43/48] net: dsa: mt7530: put initialising PCS devices code + back to original order +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The commit fae463084032 ("net: dsa: mt753x: fix pcs conversion regression") +fixes regression caused by cpu_port_config manually calling phylink +operations. cpu_port_config was deemed useless and was removed. Therefore, +put initialising PCS devices code back to its original order. + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2845,17 +2845,9 @@ static int + mt753x_setup(struct dsa_switch *ds) + { + struct mt7530_priv *priv = ds->priv; +- int i, ret; ++ int ret = priv->info->sw_setup(ds); ++ int i; + +- /* Initialise the PCS devices */ +- for (i = 0; i < priv->ds->num_ports; i++) { +- priv->pcs[i].pcs.ops = priv->info->pcs_ops; +- priv->pcs[i].pcs.neg_mode = true; +- priv->pcs[i].priv = priv; +- priv->pcs[i].port = i; +- } +- +- ret = priv->info->sw_setup(ds); + if (ret) + return ret; + +@@ -2867,6 +2859,14 @@ mt753x_setup(struct dsa_switch *ds) + if (ret && priv->irq) + mt7530_free_irq_common(priv); + ++ /* Initialise the PCS devices */ ++ for (i = 0; i < priv->ds->num_ports; i++) { ++ priv->pcs[i].pcs.ops = priv->info->pcs_ops; ++ priv->pcs[i].pcs.neg_mode = true; ++ priv->pcs[i].priv = priv; ++ priv->pcs[i].port = i; ++ } ++ + if (priv->create_sgmii) { + ret = priv->create_sgmii(priv); + if (ret && priv->irq) diff --git a/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch b/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch new file mode 100644 index 00000000000000..d7c8180c8a0006 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-44-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch @@ -0,0 +1,68 @@ +From a9544caa482a7ed215117a902f04185216997831 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:04 +0200 +Subject: [PATCH 44/48] net: dsa: mt7530: sort link settings ops and force link + down on all ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +port_enable and port_disable clears the link settings. Move that to +mt7530_setup() and mt7531_setup_common() which set up the switches. This +way, the link settings are cleared on all ports at setup, and then only +once with phylink_mac_link_down() when a link goes down. + +Enable force mode at setup to apply the force part of the link settings. +This ensures that disabled ports will have their link down. + +Suggested-by: Vladimir Oltean +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1047,7 +1047,6 @@ mt7530_port_enable(struct dsa_switch *ds + priv->ports[port].enable = true; + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, + priv->ports[port].pm); +- mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); + + mutex_unlock(&priv->reg_mutex); + +@@ -1067,7 +1066,6 @@ mt7530_port_disable(struct dsa_switch *d + priv->ports[port].enable = false; + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); +- mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); + + mutex_unlock(&priv->reg_mutex); + } +@@ -2284,6 +2282,12 @@ mt7530_setup(struct dsa_switch *ds) + mt7530_mib_reset(ds); + + for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ /* Clear link settings and enable force mode to force link down ++ * on all ports until they're enabled later. ++ */ ++ mt7530_rmw(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | ++ PMCR_FORCE_MODE, PMCR_FORCE_MODE); ++ + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); +@@ -2386,6 +2390,12 @@ mt7531_setup_common(struct dsa_switch *d + UNU_FFP_MASK); + + for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ /* Clear link settings and enable force mode to force link down ++ * on all ports until they're enabled later. ++ */ ++ mt7530_rmw(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | ++ MT7531_FORCE_MODE, MT7531_FORCE_MODE); ++ + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); diff --git a/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch b/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch new file mode 100644 index 00000000000000..d29b183be1f447 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-45-v6.9-net-dsa-mt7530-simplify-link-operations.patch @@ -0,0 +1,83 @@ +From 89017cac5f6fbaab23955818c31b3c7f1eb26f4a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:05 +0200 +Subject: [PATCH 45/48] net: dsa: mt7530: simplify link operations +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The "MT7621 Giga Switch Programming Guide v0.3", "MT7531 Reference Manual +for Development Board v1.0", and "MT7988A Wi-Fi 7 Generation Router +Platform: Datasheet (Open Version) v0.1" documents show that these bits are +enabled at reset: + +PMCR_IFG_XMIT(1) (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_MAC_MODE (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_TX_EN +PMCR_RX_EN +PMCR_BACKOFF_EN (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_BACKPR_EN (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_TX_FC_EN +PMCR_RX_FC_EN + +These bits also don't exist on the MT7530_PMCR_P(6) register of the switch +on the MT7988 SoC: + +PMCR_IFG_XMIT() +PMCR_MAC_MODE +PMCR_BACKOFF_EN +PMCR_BACKPR_EN + +Remove the setting of the bits not part of PMCR_LINK_SETTINGS_MASK on +phylink_mac_config as they're already set. + +The bit for setting the port on force mode is already done on +mt7530_setup() and mt7531_setup_common(). So get rid of +PMCR_FORCE_MODE_ID() which helped determine which bit to use for the switch +model. + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 12 +----------- + drivers/net/dsa/mt7530.h | 2 -- + 2 files changed, 1 insertion(+), 13 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2694,23 +2694,13 @@ mt753x_phylink_mac_config(struct dsa_swi + const struct phylink_link_state *state) + { + struct mt7530_priv *priv = ds->priv; +- u32 mcr_cur, mcr_new; + + if ((port == 5 || port == 6) && priv->info->mac_port_config) + priv->info->mac_port_config(ds, port, mode, state->interface); + +- mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); +- mcr_new = mcr_cur; +- mcr_new &= ~PMCR_LINK_SETTINGS_MASK; +- mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN | +- PMCR_BACKPR_EN | PMCR_FORCE_MODE_ID(priv->id); +- + /* Are we connected to external phy */ + if (port == 5 && dsa_is_user_port(ds, 5)) +- mcr_new |= PMCR_EXT_PHY; +- +- if (mcr_new != mcr_cur) +- mt7530_write(priv, MT7530_PMCR_P(port), mcr_new); ++ mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY); + } + + static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port, +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -324,8 +324,6 @@ enum mt7530_vlan_port_acc_frm { + MT7531_FORCE_DPX | \ + MT7531_FORCE_RX_FC | \ + MT7531_FORCE_TX_FC) +-#define PMCR_FORCE_MODE_ID(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ +- MT7531_FORCE_MODE : PMCR_FORCE_MODE) + #define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \ + PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \ + PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ diff --git a/target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch b/target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch new file mode 100644 index 00000000000000..e00615d5401833 --- /dev/null +++ b/target/linux/generic/backport-6.1/790-46-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch @@ -0,0 +1,74 @@ +From cfa7c85f92cd3814ad9748eb1ab25658c7f7cc67 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Wed, 20 Mar 2024 23:45:30 +0300 +Subject: [PATCH 48/48] net: dsa: mt7530: fix improper frames on all 25MHz and + 40MHz XTAL MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7530 switch after reset initialises with a core clock frequency that +works with a 25MHz XTAL connected to it. For 40MHz XTAL, the core clock +frequency must be set to 500MHz. + +The mt7530_pll_setup() function is responsible of setting the core clock +frequency. Currently, it runs on MT7530 with 25MHz and 40MHz XTAL. This +causes MT7530 switch with 25MHz XTAL to egress and ingress frames +improperly. + +Introduce a check to run it only on MT7530 with 40MHz XTAL. + +The core clock frequency is set by writing to a switch PHY's register. +Access to the PHY's register is done via the MDIO bus the switch is also +on. Therefore, it works only when the switch makes switch PHYs listen on +the MDIO bus the switch is on. This is controlled either by the state of +the ESW_P1_LED_1 pin after reset deassertion or modifying bit 5 of the +modifiable trap register. + +When ESW_P1_LED_1 is pulled high, PHY indirect access is used. That means +accessing PHY registers via the PHY indirect access control register of the +switch. + +When ESW_P1_LED_1 is pulled low, PHY direct access is used. That means +accessing PHY registers via the MDIO bus the switch is on. + +For MT7530 switch with 40MHz XTAL on a board with ESW_P1_LED_1 pulled high, +the core clock frequency won't be set to 500MHz, causing the switch to +egress and ingress frames improperly. + +Run mt7530_pll_setup() after PHY direct access is set on the modifiable +trap register. + +With these two changes, all MT7530 switches with 25MHz and 40MHz, and +P1_LED_1 pulled high or low, will egress and ingress frames properly. + +Link: https://github.com/BPI-SINOVOIP/BPI-R2-bsp/blob/4a5dd143f2172ec97a2872fa29c7c4cd520f45b5/linux-mt/drivers/net/ethernet/mediatek/gsw_mt7623.c#L1039 +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240320-for-net-mt7530-fix-25mhz-xtal-with-direct-phy-access-v1-1-d92f605f1160@arinc9.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2259,8 +2259,6 @@ mt7530_setup(struct dsa_switch *ds) + SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | + SYS_CTRL_REG_RST); + +- mt7530_pll_setup(priv); +- + /* Lower Tx driving for TRGMII path */ + for (i = 0; i < NUM_TRGMII_CTRL; i++) + mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), +@@ -2276,6 +2274,9 @@ mt7530_setup(struct dsa_switch *ds) + val |= MHWTRAP_MANUAL; + mt7530_write(priv, MT7530_MHWTRAP, val); + ++ if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ) ++ mt7530_pll_setup(priv); ++ + mt753x_trap_frames(priv); + + /* Enable and reset MIB counters */ diff --git a/target/linux/generic/pending-6.1/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch b/target/linux/generic/pending-6.1/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch deleted file mode 100644 index a18d1ad7173fe0..00000000000000 --- a/target/linux/generic/pending-6.1/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 3fb8841513c4ec3a2e5d366df86230c45f239a57 Mon Sep 17 00:00:00 2001 -From: Alexander Couzens -Date: Sat, 13 Aug 2022 13:08:22 +0200 -Subject: [PATCH 03/10] net: mt7531: ensure all MACs are powered down before - reset - -The datasheet [1] explicit describes it as requirement for a reset. - -[1] MT7531 Reference Manual for Development Board rev 1.0, page 735 - -Signed-off-by: Alexander Couzens ---- - drivers/net/dsa/mt7530.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2252,6 +2252,10 @@ mt7530_setup(struct dsa_switch *ds) - return -ENODEV; - } - -+ /* all MACs must be forced link-down before sw reset */ -+ for (i = 0; i < MT7530_NUM_PORTS; i++) -+ mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); -+ - /* Reset the switch through internal reset */ - mt7530_write(priv, MT7530_SYS_CTRL, - SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | diff --git a/target/linux/generic/pending-6.1/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch b/target/linux/generic/pending-6.1/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch deleted file mode 100644 index d333f3f4890da9..00000000000000 --- a/target/linux/generic/pending-6.1/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 1d81e51d6d79d9098013b2e8cdd677bae998c5d8 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 28 Apr 2023 02:22:59 +0200 -Subject: [PATCH 1/2] mt7530: register OF node for internal MDIO bus - -The MT753x switches provide a switch-internal MDIO bus for the embedded -PHYs. - -Register a OF sub-node on the switch OF-node for this internal MDIO bus. -This allows to configure the embedded PHYs using device-tree. - -Signed-off-by: David Bauer ---- - drivers/net/dsa/mt7530.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2142,10 +2142,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr - { - struct dsa_switch *ds = priv->ds; - struct device *dev = priv->dev; -+ struct device_node *np, *mnp; - struct mii_bus *bus; - static int idx; - int ret; - -+ np = priv->dev->of_node; -+ - bus = devm_mdiobus_alloc(dev); - if (!bus) - return -ENOMEM; -@@ -2162,7 +2165,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr - if (priv->irq) - mt7530_setup_mdio_irq(priv); - -- ret = devm_mdiobus_register(dev, bus); -+ mnp = of_get_child_by_name(np, "mdio"); -+ ret = devm_of_mdiobus_register(dev, bus, mnp); -+ of_node_put(mnp); - if (ret) { - dev_err(dev, "failed to register MDIO bus: %d\n", ret); - if (priv->irq) diff --git a/target/linux/generic/pending-6.1/796-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch b/target/linux/generic/pending-6.1/796-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch deleted file mode 100644 index 47e3b140c81e1c..00000000000000 --- a/target/linux/generic/pending-6.1/796-net-dsa-mt7530-fix-10M-100M-speed-on-MT7988-switch.patch +++ /dev/null @@ -1,45 +0,0 @@ -From a444877c10a665cd8a869e6d37facdb89fd95f79 Mon Sep 17 00:00:00 2001 -Message-ID: -From: Daniel Golle -Date: Wed, 24 Jan 2024 04:17:11 +0000 -Subject: [PATCH net] net: dsa: mt7530: fix 10M/100M speed on MT7988 switch -To: Arınç ÜNAL , - Daniel Golle , - DENG Qingfang , - Sean Wang , - Andrew Lunn , - Florian Fainelli , - Vladimir Oltean , - David S. Miller , - Eric Dumazet , - Jakub Kicinski , - Paolo Abeni , - Matthias Brugger , - AngeloGioacchino Del Regno , - netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, - linux-arm-kernel@lists.infradead.org, - linux-mediatek@lists.infradead.org - -Setup PMCR port register for actual speed and duplex on internally -connected PHYs of the MT7988 built-in switch. This fixes links with -speeds other than 1000M. - -Fixes: ("110c18bfed414 net: dsa: mt7530: introduce driver for MT7988 built-in switch") -Signed-off-by: Daniel Golle ---- - drivers/net/dsa/mt7530.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2849,8 +2849,7 @@ static void mt753x_phylink_mac_link_up(s - /* MT753x MAC works in 1G full duplex mode for all up-clocked - * variants. - */ -- if (interface == PHY_INTERFACE_MODE_INTERNAL || -- interface == PHY_INTERFACE_MODE_TRGMII || -+ if (interface == PHY_INTERFACE_MODE_TRGMII || - (phy_interface_mode_is_8023z(interface))) { - speed = SPEED_1000; - duplex = DUPLEX_FULL; From 4354b34f6fc5a36842112191732dadd9a2f4bea4 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Wed, 10 Apr 2024 15:14:32 +0100 Subject: [PATCH 12/13] generic: 6.6: sync mt7530 DSA driver with upstream Backport lots upstream changes, many of them fixes, for the mt7530 DSA driver, similar to how it was done for Linux 6.1 in the previous commit. The remaining differences compared to the upstream driver are only the 'slave' -> 'user', 'master' -> 'conduit' language change in DSA and the rename of 'struct ethtool_eee' to 'struct ethtool_keee' as well as tree-wide replacement of ethtool_sprintf with ethtool_puts, all of them do not have any functional impact. Apart from some minor bug fixes and style improvements the switch should now behave more conformant when it comes to link-local frames, and we will again be able to cleanly pick patches from upstream. Signed-off-by: Daniel Golle --- ...onvert-to-platform-remove-callback-r.patch | 58 ++++ ...3x-remove-mt753x_phylink_pcs_link_up.patch | 51 +++ ...eplace-deprecated-strncpy-with-ethto.patch | 40 +++ ...upport-OF-based-registration-of-swit.patch | 116 +++++++ ...lways-trap-frames-to-active-CPU-port.patch | 125 +++++++ ...se-p5_interface_select-as-data-type-.patch | 45 +++ ...tore-port-5-SGMII-capability-of-MT75.patch | 227 +++++++++++++ ...mprove-comments-regarding-switch-por.patch | 133 ++++++++ ...mprove-code-path-for-setting-up-port.patch | 95 ++++++ ...o-not-set-priv-p5_interface-on-mt753.patch | 42 +++ ...o-not-run-mt7530_setup_port5-if-port.patch | 62 ++++ ...mpty-default-case-on-mt7530_setup_po.patch | 58 ++++ ...7530-move-XTAL-check-to-mt7530_setup.patch | 53 +++ ...mt7530-simplify-mt7530_pad_clk_setup.patch | 146 +++++++++ ...all-port-6-setup-from-mt7530_mac_con.patch | 97 ++++++ ...30-remove-pad_setup-function-pointer.patch | 148 +++++++++ ...-correct-port-capabilities-of-MT7988.patch | 36 +++ ...o-not-clear-config-supported_interfa.patch | 38 +++ ...emove-.mac_port_config-for-MT7988-an.patch | 81 +++++ ...et-interrupt-register-only-for-MT753.patch | 31 ++ ...o-not-use-SW_PHY_RST-to-reset-MT7531.patch | 41 +++ ...et-rid-of-useless-error-returns-on-p.patch | 217 +++++++++++++ ...get-rid-of-priv-info-cpu_port_config.patch | 305 ++++++++++++++++++ ...-mt7530-get-rid-of-mt753x_mac_config.patch | 48 +++ ...ut-initialising-PCS-devices-code-bac.patch | 57 ++++ ...ort-link-settings-ops-and-force-link.patch | 68 ++++ ...-dsa-mt7530-simplify-link-operations.patch | 83 +++++ ...dsa-mt7530-disable-LEDs-before-reset.patch | 94 ++++++ ...ix-improper-frames-on-all-25MHz-and-.patch | 74 +++++ ...revent-possible-incorrect-XTAL-frequ.patch | 154 +++++++++ ...e-all-MACs-are-powered-down-before-r.patch | 28 -- ...gister-OF-node-for-internal-MDIO-bus.patch | 43 --- 32 files changed, 2823 insertions(+), 71 deletions(-) create mode 100644 target/linux/generic/backport-6.6/790-01-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch create mode 100644 target/linux/generic/backport-6.6/790-02-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch create mode 100644 target/linux/generic/backport-6.6/790-03-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch create mode 100644 target/linux/generic/backport-6.6/790-04-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch create mode 100644 target/linux/generic/backport-6.6/790-05-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch create mode 100644 target/linux/generic/backport-6.6/790-06-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch create mode 100644 target/linux/generic/backport-6.6/790-07-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch create mode 100644 target/linux/generic/backport-6.6/790-08-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch create mode 100644 target/linux/generic/backport-6.6/790-09-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch create mode 100644 target/linux/generic/backport-6.6/790-10-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch create mode 100644 target/linux/generic/backport-6.6/790-11-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch create mode 100644 target/linux/generic/backport-6.6/790-12-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch create mode 100644 target/linux/generic/backport-6.6/790-13-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch create mode 100644 target/linux/generic/backport-6.6/790-14-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch create mode 100644 target/linux/generic/backport-6.6/790-15-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch create mode 100644 target/linux/generic/backport-6.6/790-16-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch create mode 100644 target/linux/generic/backport-6.6/790-17-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch create mode 100644 target/linux/generic/backport-6.6/790-18-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch create mode 100644 target/linux/generic/backport-6.6/790-19-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch create mode 100644 target/linux/generic/backport-6.6/790-20-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch create mode 100644 target/linux/generic/backport-6.6/790-21-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch create mode 100644 target/linux/generic/backport-6.6/790-22-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch create mode 100644 target/linux/generic/backport-6.6/790-23-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch create mode 100644 target/linux/generic/backport-6.6/790-24-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch create mode 100644 target/linux/generic/backport-6.6/790-25-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch create mode 100644 target/linux/generic/backport-6.6/790-26-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch create mode 100644 target/linux/generic/backport-6.6/790-27-v6.9-net-dsa-mt7530-simplify-link-operations.patch create mode 100644 target/linux/generic/backport-6.6/790-28-v6.9-net-dsa-mt7530-disable-LEDs-before-reset.patch create mode 100644 target/linux/generic/backport-6.6/790-29-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch create mode 100644 target/linux/generic/backport-6.6/790-30-v6.9-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch delete mode 100644 target/linux/generic/pending-6.6/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch delete mode 100644 target/linux/generic/pending-6.6/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch diff --git a/target/linux/generic/backport-6.6/790-01-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch b/target/linux/generic/backport-6.6/790-01-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch new file mode 100644 index 00000000000000..95c6957596dcfe --- /dev/null +++ b/target/linux/generic/backport-6.6/790-01-v6.7-net-dsa-mt7530-Convert-to-platform-remove-callback-r.patch @@ -0,0 +1,58 @@ +From b91ef50f70e7c092c50c1b92e63ef3fb0041cdd4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= +Date: Mon, 18 Sep 2023 21:19:12 +0200 +Subject: [PATCH 01/30] net: dsa: mt7530: Convert to platform remove callback + returning void +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The .remove() callback for a platform driver returns an int which makes +many driver authors wrongly assume it's possible to do error handling by +returning an error code. However the value returned is ignored (apart +from emitting a warning) and this typically results in resource leaks. +To improve here there is a quest to make the remove callback return +void. In the first step of this quest all drivers are converted to +.remove_new() which already returns void. Eventually after all drivers +are converted, .remove_new() is renamed to .remove(). + +Trivially convert this driver from always returning zero in the remove +callback to the void returning variant. + +Signed-off-by: Uwe Kleine-König +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Acked-by: Daniel Golle +Signed-off-by: David S. Miller +--- + drivers/net/dsa/mt7530-mmio.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/net/dsa/mt7530-mmio.c ++++ b/drivers/net/dsa/mt7530-mmio.c +@@ -63,15 +63,12 @@ mt7988_probe(struct platform_device *pde + return dsa_register_switch(priv->ds); + } + +-static int +-mt7988_remove(struct platform_device *pdev) ++static void mt7988_remove(struct platform_device *pdev) + { + struct mt7530_priv *priv = platform_get_drvdata(pdev); + + if (priv) + mt7530_remove_common(priv); +- +- return 0; + } + + static void mt7988_shutdown(struct platform_device *pdev) +@@ -88,7 +85,7 @@ static void mt7988_shutdown(struct platf + + static struct platform_driver mt7988_platform_driver = { + .probe = mt7988_probe, +- .remove = mt7988_remove, ++ .remove_new = mt7988_remove, + .shutdown = mt7988_shutdown, + .driver = { + .name = "mt7530-mmio", diff --git a/target/linux/generic/backport-6.6/790-02-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch b/target/linux/generic/backport-6.6/790-02-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch new file mode 100644 index 00000000000000..9f0937b810d863 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-02-v6.7-net-dsa-mt753x-remove-mt753x_phylink_pcs_link_up.patch @@ -0,0 +1,51 @@ +From d22c85764665af931c5c61bbe282b4116a88e792 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Wed, 27 Sep 2023 13:13:56 +0100 +Subject: [PATCH 02/30] net: dsa: mt753x: remove mt753x_phylink_pcs_link_up() + +Remove the mt753x_phylink_pcs_link_up() function for two reasons: + +1) priv->pcs[i].pcs.neg_mode is set true, meaning it doesn't take a + MLO_AN_FIXED anymore, but one of PHYLINK_PCS_NEG_*. However, this + is inconsequential due to... +2) priv->pcs[port].pcs.ops is always initialised to point at + mt7530_pcs_ops, which does not have a pcs_link_up() member. + +So, let's remove mt753x_phylink_pcs_link_up() entirely. + +Signed-off-by: Russell King (Oracle) +Reviewed-by: Vladimir Oltean +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/E1qlTQS-008BWe-Va@rmk-PC.armlinux.org.uk +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 11 ----------- + 1 file changed, 11 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2860,15 +2860,6 @@ static void mt753x_phylink_mac_link_down + mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); + } + +-static void mt753x_phylink_pcs_link_up(struct phylink_pcs *pcs, +- unsigned int mode, +- phy_interface_t interface, +- int speed, int duplex) +-{ +- if (pcs->ops->pcs_link_up) +- pcs->ops->pcs_link_up(pcs, mode, interface, speed, duplex); +-} +- + static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port, + unsigned int mode, + phy_interface_t interface, +@@ -2956,8 +2947,6 @@ mt7531_cpu_port_config(struct dsa_switch + return ret; + mt7530_write(priv, MT7530_PMCR_P(port), + PMCR_CPU_PORT_SETTING(priv->id)); +- mt753x_phylink_pcs_link_up(&priv->pcs[port].pcs, MLO_AN_FIXED, +- interface, speed, DUPLEX_FULL); + mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, + speed, DUPLEX_FULL, true, true); + diff --git a/target/linux/generic/backport-6.6/790-03-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch b/target/linux/generic/backport-6.6/790-03-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch new file mode 100644 index 00000000000000..2da610ea42068c --- /dev/null +++ b/target/linux/generic/backport-6.6/790-03-v6.7-net-dsa-mt7530-replace-deprecated-strncpy-with-ethto.patch @@ -0,0 +1,40 @@ +From 9b4f1f5a0801652056670a38503b4049eb413caf Mon Sep 17 00:00:00 2001 +From: Justin Stitt +Date: Mon, 9 Oct 2023 18:29:19 +0000 +Subject: [PATCH 03/30] net: dsa: mt7530: replace deprecated strncpy with + ethtool_sprintf + +`strncpy` is deprecated for use on NUL-terminated destination strings +[1] and as such we should prefer more robust and less ambiguous string +interfaces. + +ethtool_sprintf() is designed specifically for get_strings() usage. +Let's replace strncpy in favor of this more robust and easier to +understand interface. + +Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings [1] +Link: https://manpages.debian.org/testing/linux-manual-4.8/strscpy.9.en.html [2] +Link: https://github.com/KSPP/linux/issues/90 +Signed-off-by: Justin Stitt +Reviewed-by: Kees Cook +Acked-by: Daniel Golle +Reviewed-by: Florian Fainelli +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20231009-strncpy-drivers-net-dsa-mt7530-c-v1-1-ec6677a6436a@google.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -836,8 +836,7 @@ mt7530_get_strings(struct dsa_switch *ds + return; + + for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++) +- strncpy(data + i * ETH_GSTRING_LEN, mt7530_mib[i].name, +- ETH_GSTRING_LEN); ++ ethtool_sprintf(&data, "%s", mt7530_mib[i].name); + } + + static void diff --git a/target/linux/generic/backport-6.6/790-04-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch b/target/linux/generic/backport-6.6/790-04-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch new file mode 100644 index 00000000000000..83738408ebf8bc --- /dev/null +++ b/target/linux/generic/backport-6.6/790-04-v6.9-net-dsa-mt7530-support-OF-based-registration-of-swit.patch @@ -0,0 +1,116 @@ +From af26b0d1bf934bbaa7cafb871a51e95087a088a0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:34:31 +0300 +Subject: [PATCH 04/30] net: dsa: mt7530: support OF-based registration of + switch MDIO bus +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Currently the MDIO bus of the switches the MT7530 DSA subdriver controls +can only be registered as non-OF-based. Bring support for registering the +bus OF-based. + +The subdrivers that control switches [with MDIO bus] probed on OF must +follow this logic to support all cases properly: + +No switch MDIO bus defined: Populate ds->user_mii_bus, register the MDIO +bus, set the interrupts for PHYs if "interrupt-controller" is defined at +the switch node. This case should only be covered for the switches which +their dt-bindings documentation didn't document the MDIO bus from the +start. This is to keep supporting the device trees that do not describe the +MDIO bus on the device tree but the MDIO bus is being used nonetheless. + +Switch MDIO bus defined: Don't populate ds->user_mii_bus, register the MDIO +bus, set the interrupts for PHYs if ["interrupt-controller" is defined at +the switch node and "interrupts" is defined at the PHY nodes under the +switch MDIO bus node]. + +Switch MDIO bus defined but explicitly disabled: If the device tree says +status = "disabled" for the MDIO bus, we shouldn't need an MDIO bus at all. +Instead, just exit as early as possible and do not call any MDIO API. + +The use of ds->user_mii_bus is inappropriate when the MDIO bus of the +switch is described on the device tree [1], which is why we don't populate +ds->user_mii_bus in that case. + +Link: https://lore.kernel.org/netdev/20231213120656.x46fyad6ls7sqyzv@skbuf/ [1] +Suggested-by: David Bauer +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122053431.7751-1-arinc.unal@arinc9.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 34 ++++++++++++++++++++++++++-------- + 1 file changed, 26 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2182,24 +2182,40 @@ mt7530_free_irq_common(struct mt7530_pri + static void + mt7530_free_irq(struct mt7530_priv *priv) + { +- mt7530_free_mdio_irq(priv); ++ struct device_node *mnp, *np = priv->dev->of_node; ++ ++ mnp = of_get_child_by_name(np, "mdio"); ++ if (!mnp) ++ mt7530_free_mdio_irq(priv); ++ of_node_put(mnp); ++ + mt7530_free_irq_common(priv); + } + + static int + mt7530_setup_mdio(struct mt7530_priv *priv) + { ++ struct device_node *mnp, *np = priv->dev->of_node; + struct dsa_switch *ds = priv->ds; + struct device *dev = priv->dev; + struct mii_bus *bus; + static int idx; +- int ret; ++ int ret = 0; ++ ++ mnp = of_get_child_by_name(np, "mdio"); ++ ++ if (mnp && !of_device_is_available(mnp)) ++ goto out; + + bus = devm_mdiobus_alloc(dev); +- if (!bus) +- return -ENOMEM; ++ if (!bus) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ if (!mnp) ++ ds->slave_mii_bus = bus; + +- ds->slave_mii_bus = bus; + bus->priv = priv; + bus->name = KBUILD_MODNAME "-mii"; + snprintf(bus->id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++); +@@ -2210,16 +2226,18 @@ mt7530_setup_mdio(struct mt7530_priv *pr + bus->parent = dev; + bus->phy_mask = ~ds->phys_mii_mask; + +- if (priv->irq) ++ if (priv->irq && !mnp) + mt7530_setup_mdio_irq(priv); + +- ret = devm_mdiobus_register(dev, bus); ++ ret = devm_of_mdiobus_register(dev, bus, mnp); + if (ret) { + dev_err(dev, "failed to register MDIO bus: %d\n", ret); +- if (priv->irq) ++ if (priv->irq && !mnp) + mt7530_free_mdio_irq(priv); + } + ++out: ++ of_node_put(mnp); + return ret; + } + diff --git a/target/linux/generic/backport-6.6/790-05-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch b/target/linux/generic/backport-6.6/790-05-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch new file mode 100644 index 00000000000000..56953fb364f2f6 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-05-v6.9-net-dsa-mt7530-always-trap-frames-to-active-CPU-port.patch @@ -0,0 +1,125 @@ +From 617b07e08bcb1f69a72a085a7d847d1ca2999830 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:52 +0300 +Subject: [PATCH 05/30] net: dsa: mt7530: always trap frames to active CPU port + on MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On the MT7530 switch, the CPU_PORT field indicates which CPU port to trap +frames to, regardless of the affinity of the inbound user port. + +When multiple CPU ports are in use, if the DSA conduit interface is down, +trapped frames won't be passed to the conduit interface. + +To make trapping frames work including this case, implement +ds->ops->conduit_state_change() on this subdriver and set the CPU_PORT +field to the numerically smallest CPU port whose conduit interface is up. +Introduce the active_cpu_ports field to store the information of the active +CPU ports. Correct the macros, CPU_PORT is bits 4 through 6 of the +register. + +Add a comment to explain frame trapping for this switch. + +Currently, the driver doesn't support the use of multiple CPU ports so this +is not necessarily a bug fix. + +Suggested-by: Vladimir Oltean +Suggested-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-1-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 35 +++++++++++++++++++++++++++++++---- + drivers/net/dsa/mt7530.h | 6 ++++-- + 2 files changed, 35 insertions(+), 6 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1071,10 +1071,6 @@ mt753x_cpu_port_enable(struct dsa_switch + mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | + UNU_FFP(BIT(port))); + +- /* Set CPU port number */ +- if (priv->id == ID_MT7530 || priv->id == ID_MT7621) +- mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); +- + /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on + * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that + * is affine to the inbound user port. +@@ -3128,6 +3124,36 @@ static int mt753x_set_mac_eee(struct dsa + return 0; + } + ++static void ++mt753x_conduit_state_change(struct dsa_switch *ds, ++ const struct net_device *conduit, ++ bool operational) ++{ ++ struct dsa_port *cpu_dp = conduit->dsa_ptr; ++ struct mt7530_priv *priv = ds->priv; ++ int val = 0; ++ u8 mask; ++ ++ /* Set the CPU port to trap frames to for MT7530. Trapped frames will be ++ * forwarded to the numerically smallest CPU port whose conduit ++ * interface is up. ++ */ ++ if (priv->id != ID_MT7530 && priv->id != ID_MT7621) ++ return; ++ ++ mask = BIT(cpu_dp->index); ++ ++ if (operational) ++ priv->active_cpu_ports |= mask; ++ else ++ priv->active_cpu_ports &= ~mask; ++ ++ if (priv->active_cpu_ports) ++ val = CPU_EN | CPU_PORT(__ffs(priv->active_cpu_ports)); ++ ++ mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); ++} ++ + static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) + { + return 0; +@@ -3183,6 +3209,7 @@ const struct dsa_switch_ops mt7530_switc + .phylink_mac_link_up = mt753x_phylink_mac_link_up, + .get_mac_eee = mt753x_get_mac_eee, + .set_mac_eee = mt753x_set_mac_eee, ++ .master_state_change = mt753x_conduit_state_change, + }; + EXPORT_SYMBOL_GPL(mt7530_switch_ops); + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -41,8 +41,8 @@ enum mt753x_id { + #define UNU_FFP(x) (((x) & 0xff) << 8) + #define UNU_FFP_MASK UNU_FFP(~0) + #define CPU_EN BIT(7) +-#define CPU_PORT(x) ((x) << 4) +-#define CPU_MASK (0xf << 4) ++#define CPU_PORT_MASK GENMASK(6, 4) ++#define CPU_PORT(x) FIELD_PREP(CPU_PORT_MASK, x) + #define MIRROR_EN BIT(3) + #define MIRROR_PORT(x) ((x) & 0x7) + #define MIRROR_MASK 0x7 +@@ -780,6 +780,7 @@ struct mt753x_info { + * @irq_domain: IRQ domain of the switch irq_chip + * @irq_enable: IRQ enable bits, synced to SYS_INT_EN + * @create_sgmii: Pointer to function creating SGMII PCS instance(s) ++ * @active_cpu_ports: Holding the active CPU ports + */ + struct mt7530_priv { + struct device *dev; +@@ -806,6 +807,7 @@ struct mt7530_priv { + struct irq_domain *irq_domain; + u32 irq_enable; + int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); ++ u8 active_cpu_ports; + }; + + struct mt7530_hw_vlan_entry { diff --git a/target/linux/generic/backport-6.6/790-06-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch b/target/linux/generic/backport-6.6/790-06-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch new file mode 100644 index 00000000000000..5e6f8c22ff6b71 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-06-v6.9-net-dsa-mt7530-use-p5_interface_select-as-data-type-.patch @@ -0,0 +1,45 @@ +From 07f411e26f82d75723df1c0c072e5602d06f4e30 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:53 +0300 +Subject: [PATCH 06/30] net: dsa: mt7530: use p5_interface_select as data type + for p5_intf_sel +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use the p5_interface_select enumeration as the data type for the +p5_intf_sel field. This ensures p5_intf_sel can only take the values +defined in the p5_interface_select enumeration. + +Remove the explicit assignment of 0 to P5_DISABLED as the first enum item +is automatically assigned 0. + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-2-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -703,7 +703,7 @@ struct mt7530_port { + + /* Port 5 interface select definitions */ + enum p5_interface_select { +- P5_DISABLED = 0, ++ P5_DISABLED, + P5_INTF_SEL_PHY_P0, + P5_INTF_SEL_PHY_P4, + P5_INTF_SEL_GMAC5, +@@ -796,7 +796,7 @@ struct mt7530_priv { + bool mcm; + phy_interface_t p6_interface; + phy_interface_t p5_interface; +- unsigned int p5_intf_sel; ++ enum p5_interface_select p5_intf_sel; + u8 mirror_rx; + u8 mirror_tx; + struct mt7530_port ports[MT7530_NUM_PORTS]; diff --git a/target/linux/generic/backport-6.6/790-07-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch b/target/linux/generic/backport-6.6/790-07-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch new file mode 100644 index 00000000000000..5bbdc6d0e0a0f3 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-07-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch @@ -0,0 +1,227 @@ +From 8f7db12efc189eedd196ed8d053236ce27add484 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:54 +0300 +Subject: [PATCH 07/30] net: dsa: mt7530: store port 5 SGMII capability of + MT7531 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Introduce the p5_sgmii field to store the information for whether port 5 +has got SGMII or not. Instead of reading the MT7531_TOP_SIG_SR register +multiple times, the register will be read once and the value will be +stored on the p5_sgmii field. This saves unnecessary reads of the +register. + +Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the +switch is identified. + +Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the +information. Address the code where mt7531_dual_sgmii_supported() is used. + +Get rid of mt7531_is_rgmii_port() which just prints the opposite of +priv->p5_sgmii. + +Instead of calling mt7531_pll_setup() then returning, do not call it if +port 5 is SGMII. + +Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to +represent the mode that port 5 is being used in, not the hardware +information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if +port 5 is not dsa_is_unused_port(). + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-3-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530-mdio.c | 7 ++--- + drivers/net/dsa/mt7530.c | 48 ++++++++++++----------------------- + drivers/net/dsa/mt7530.h | 6 +++-- + 3 files changed, 22 insertions(+), 39 deletions(-) + +--- a/drivers/net/dsa/mt7530-mdio.c ++++ b/drivers/net/dsa/mt7530-mdio.c +@@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_re + }; + + static int +-mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii) ++mt7531_create_sgmii(struct mt7530_priv *priv) + { + struct regmap_config *mt7531_pcs_config[2] = {}; + struct phylink_pcs *pcs; + struct regmap *regmap; + int i, ret = 0; + +- /* MT7531AE has two SGMII units for port 5 and port 6 +- * MT7531BE has only one SGMII unit for port 6 +- */ +- for (i = dual_sgmii ? 0 : 1; i < 2; i++) { ++ for (i = priv->p5_sgmii ? 0 : 1; i < 2; i++) { + mt7531_pcs_config[i] = devm_kzalloc(priv->dev, + sizeof(struct regmap_config), + GFP_KERNEL); +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -487,15 +487,6 @@ mt7530_pad_clk_setup(struct dsa_switch * + return 0; + } + +-static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv) +-{ +- u32 val; +- +- val = mt7530_read(priv, MT7531_TOP_SIG_SR); +- +- return (val & PAD_DUAL_SGMII_EN) != 0; +-} +- + static int + mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) + { +@@ -510,9 +501,6 @@ mt7531_pll_setup(struct mt7530_priv *pri + u32 xtal; + u32 val; + +- if (mt7531_dual_sgmii_supported(priv)) +- return; +- + val = mt7530_read(priv, MT7531_CREV); + top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR); + hwstrap = mt7530_read(priv, MT7531_HWTRAP); +@@ -920,8 +908,6 @@ static const char *p5_intf_modes(unsigne + return "PHY P4"; + case P5_INTF_SEL_GMAC5: + return "GMAC5"; +- case P5_INTF_SEL_GMAC5_SGMII: +- return "GMAC5_SGMII"; + default: + return "unknown"; + } +@@ -2524,6 +2510,12 @@ mt7531_setup(struct dsa_switch *ds) + return -ENODEV; + } + ++ /* MT7531AE has got two SGMII units. One for port 5, one for port 6. ++ * MT7531BE has got only one SGMII unit which is for port 6. ++ */ ++ val = mt7530_read(priv, MT7531_TOP_SIG_SR); ++ priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); ++ + /* all MACs must be forced link-down before sw reset */ + for (i = 0; i < MT7530_NUM_PORTS; i++) + mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); +@@ -2533,21 +2525,18 @@ mt7531_setup(struct dsa_switch *ds) + SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | + SYS_CTRL_REG_RST); + +- mt7531_pll_setup(priv); +- +- if (mt7531_dual_sgmii_supported(priv)) { +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII; +- ++ if (!priv->p5_sgmii) { ++ mt7531_pll_setup(priv); ++ } else { + /* Let ds->slave_mii_bus be able to access external phy. */ + mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK, + MT7531_EXT_P_MDC_11); + mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK, + MT7531_EXT_P_MDIO_12); +- } else { +- priv->p5_intf_sel = P5_INTF_SEL_GMAC5; + } +- dev_dbg(ds->dev, "P5 support %s interface\n", +- p5_intf_modes(priv->p5_intf_sel)); ++ ++ if (!dsa_is_unused_port(ds, 5)) ++ priv->p5_intf_sel = P5_INTF_SEL_GMAC5; + + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); +@@ -2607,11 +2596,6 @@ static void mt7530_mac_port_get_caps(str + } + } + +-static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port) +-{ +- return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII); +-} +- + static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { +@@ -2624,7 +2608,7 @@ static void mt7531_mac_port_get_caps(str + break; + + case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ +- if (mt7531_is_rgmii_port(priv, port)) { ++ if (!priv->p5_sgmii) { + phy_interface_set_rgmii(config->supported_interfaces); + break; + } +@@ -2691,7 +2675,7 @@ static int mt7531_rgmii_setup(struct mt7 + { + u32 val; + +- if (!mt7531_is_rgmii_port(priv, port)) { ++ if (priv->p5_sgmii) { + dev_err(priv->dev, "RGMII mode is not available for port %d\n", + port); + return -EINVAL; +@@ -2934,7 +2918,7 @@ mt7531_cpu_port_config(struct dsa_switch + + switch (port) { + case 5: +- if (mt7531_is_rgmii_port(priv, port)) ++ if (!priv->p5_sgmii) + interface = PHY_INTERFACE_MODE_RGMII; + else + interface = PHY_INTERFACE_MODE_2500BASEX; +@@ -3086,7 +3070,7 @@ mt753x_setup(struct dsa_switch *ds) + mt7530_free_irq_common(priv); + + if (priv->create_sgmii) { +- ret = priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv)); ++ ret = priv->create_sgmii(priv); + if (ret && priv->irq) + mt7530_free_irq(priv); + } +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -707,7 +707,6 @@ enum p5_interface_select { + P5_INTF_SEL_PHY_P0, + P5_INTF_SEL_PHY_P4, + P5_INTF_SEL_GMAC5, +- P5_INTF_SEL_GMAC5_SGMII, + }; + + struct mt7530_priv; +@@ -776,6 +775,8 @@ struct mt753x_info { + * registers + * @p6_interface Holding the current port 6 interface + * @p5_intf_sel: Holding the current port 5 interface select ++ * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch ++ * has got SGMII + * @irq: IRQ number of the switch + * @irq_domain: IRQ domain of the switch irq_chip + * @irq_enable: IRQ enable bits, synced to SYS_INT_EN +@@ -797,6 +798,7 @@ struct mt7530_priv { + phy_interface_t p6_interface; + phy_interface_t p5_interface; + enum p5_interface_select p5_intf_sel; ++ bool p5_sgmii; + u8 mirror_rx; + u8 mirror_tx; + struct mt7530_port ports[MT7530_NUM_PORTS]; +@@ -806,7 +808,7 @@ struct mt7530_priv { + int irq; + struct irq_domain *irq_domain; + u32 irq_enable; +- int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); ++ int (*create_sgmii)(struct mt7530_priv *priv); + u8 active_cpu_ports; + }; + diff --git a/target/linux/generic/backport-6.6/790-08-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch b/target/linux/generic/backport-6.6/790-08-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch new file mode 100644 index 00000000000000..c23074a03056fc --- /dev/null +++ b/target/linux/generic/backport-6.6/790-08-v6.9-net-dsa-mt7530-improve-comments-regarding-switch-por.patch @@ -0,0 +1,133 @@ +From c91b7fb8fbb2e18ebb497e67f4252cec78e3a29b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:55 +0300 +Subject: [PATCH 08/30] net: dsa: mt7530: improve comments regarding switch + ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's no logic to numerically order the CPU ports. Just state the port +number instead. + +Remove the irrelevant PHY muxing information from +mt7530_mac_port_get_caps(). Explain the supported MII modes instead. + +Remove the out of place PHY muxing information from +mt753x_phylink_mac_config(). The function is for MT7530, MT7531, and the +switch on the MT7988 SoC but there's no PHY muxing on MT7531 or the switch +on the MT7988 SoC. + +These comments were gradually introduced with the commits below. +commit ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API") +commit 38f790a80560 ("net: dsa: mt7530: Add support for port 5") +commit 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding +a new hardware") +commit c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Reviewed-by: Andrew Lunn +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-4-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 30 ++++++++++++++++++++---------- + 1 file changed, 20 insertions(+), 10 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2574,12 +2574,14 @@ static void mt7530_mac_port_get_caps(str + struct phylink_config *config) + { + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ /* Ports which are connected to switch PHYs. There is no MII pinout. */ ++ case 0 ... 4: + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + +- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ ++ /* Port 5 supports rgmii with delays, mii, and gmii. */ ++ case 5: + phy_interface_set_rgmii(config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_MII, + config->supported_interfaces); +@@ -2587,7 +2589,8 @@ static void mt7530_mac_port_get_caps(str + config->supported_interfaces); + break; + +- case 6: /* 1st cpu port */ ++ /* Port 6 supports rgmii and trgmii. */ ++ case 6: + __set_bit(PHY_INTERFACE_MODE_RGMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_TRGMII, +@@ -2602,19 +2605,24 @@ static void mt7531_mac_port_get_caps(str + struct mt7530_priv *priv = ds->priv; + + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ /* Ports which are connected to switch PHYs. There is no MII pinout. */ ++ case 0 ... 4: + __set_bit(PHY_INTERFACE_MODE_GMII, + config->supported_interfaces); + break; + +- case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ ++ /* Port 5 supports rgmii with delays on MT7531BE, sgmii/802.3z on ++ * MT7531AE. ++ */ ++ case 5: + if (!priv->p5_sgmii) { + phy_interface_set_rgmii(config->supported_interfaces); + break; + } + fallthrough; + +- case 6: /* 1st cpu port supports sgmii/8023z only */ ++ /* Port 6 supports sgmii/802.3z. */ ++ case 6: + __set_bit(PHY_INTERFACE_MODE_SGMII, + config->supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, +@@ -2633,11 +2641,13 @@ static void mt7988_mac_port_get_caps(str + phy_interface_zero(config->supported_interfaces); + + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ /* Ports which are connected to switch PHYs. There is no MII pinout. */ ++ case 0 ... 4: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); + break; + ++ /* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */ + case 6: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); +@@ -2801,12 +2811,12 @@ mt753x_phylink_mac_config(struct dsa_swi + u32 mcr_cur, mcr_new; + + switch (port) { +- case 0 ... 4: /* Internal phy */ ++ case 0 ... 4: + if (state->interface != PHY_INTERFACE_MODE_GMII && + state->interface != PHY_INTERFACE_MODE_INTERNAL) + goto unsupported; + break; +- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ ++ case 5: + if (priv->p5_interface == state->interface) + break; + +@@ -2816,7 +2826,7 @@ mt753x_phylink_mac_config(struct dsa_swi + if (priv->p5_intf_sel != P5_DISABLED) + priv->p5_interface = state->interface; + break; +- case 6: /* 1st cpu port */ ++ case 6: + if (priv->p6_interface == state->interface) + break; + diff --git a/target/linux/generic/backport-6.6/790-09-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch b/target/linux/generic/backport-6.6/790-09-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch new file mode 100644 index 00000000000000..a0f565906bb678 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-09-v6.9-net-dsa-mt7530-improve-code-path-for-setting-up-port.patch @@ -0,0 +1,95 @@ +From c1b2294a9b4b9b6c0cbe58666cb86e0a9cb0abfd Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:56 +0300 +Subject: [PATCH 09/30] net: dsa: mt7530: improve code path for setting up port + 5 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There're two code paths for setting up port 5: + +mt7530_setup() +-> mt7530_setup_port5() + +mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt7530_mac_config() + -> mt7530_setup_port5() + +Currently mt7530_setup_port5() from mt7530_setup() always runs. If port 5 +is used as a CPU, DSA, or user port, mt7530_setup_port5() from +mt753x_phylink_mac_config() won't run. That is because priv->p5_interface +set on mt7530_setup_port5() will match state->interface on +mt753x_phylink_mac_config() which will stop running mt7530_setup_port5() +again. + +Therefore, mt7530_setup_port5() will never run from +mt753x_phylink_mac_config(). + +Address this by not running mt7530_setup_port5() from mt7530_setup() if +port 5 is used as a CPU, DSA, or user port. This driver isn't in the +dsa_switches_apply_workarounds[] array so phylink will always be present. + +To keep the cases where port 5 isn't controlled by phylink working as +before, preserve the mt7530_setup_port5() call from mt7530_setup(). + +Do not set priv->p5_intf_sel to P5_DISABLED. It is already set to that when +"priv" is allocated. + +Move setting the interface to a more specific location. It's supposed to be +overwritten if PHY muxing is detected. + +Improve the comment which explains the process. + +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-5-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 17 ++++++++--------- + 1 file changed, 8 insertions(+), 9 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2362,16 +2362,15 @@ mt7530_setup(struct dsa_switch *ds) + return ret; + + /* Setup port 5 */ +- priv->p5_intf_sel = P5_DISABLED; +- interface = PHY_INTERFACE_MODE_NA; +- + if (!dsa_is_unused_port(ds, 5)) { + priv->p5_intf_sel = P5_INTF_SEL_GMAC5; +- ret = of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface); +- if (ret && ret != -ENODEV) +- return ret; + } else { +- /* Scan the ethernet nodes. look for GMAC1, lookup used phy */ ++ /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. ++ * Set priv->p5_intf_sel to the appropriate value if PHY muxing ++ * is detected. ++ */ ++ interface = PHY_INTERFACE_MODE_NA; ++ + for_each_child_of_node(dn, mac_np) { + if (!of_device_is_compatible(mac_np, + "mediatek,eth-mac")) +@@ -2402,6 +2401,8 @@ mt7530_setup(struct dsa_switch *ds) + of_node_put(phy_node); + break; + } ++ ++ mt7530_setup_port5(ds, interface); + } + + #ifdef CONFIG_GPIOLIB +@@ -2412,8 +2413,6 @@ mt7530_setup(struct dsa_switch *ds) + } + #endif /* CONFIG_GPIOLIB */ + +- mt7530_setup_port5(ds, interface); +- + /* Flush the FDB table */ + ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); + if (ret < 0) diff --git a/target/linux/generic/backport-6.6/790-10-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch b/target/linux/generic/backport-6.6/790-10-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch new file mode 100644 index 00000000000000..0b021f07c655a3 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-10-v6.9-net-dsa-mt7530-do-not-set-priv-p5_interface-on-mt753.patch @@ -0,0 +1,42 @@ +From cd1cee68e57eedb460a68d1f42abf9f740b17e94 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:57 +0300 +Subject: [PATCH 10/30] net: dsa: mt7530: do not set priv->p5_interface on + mt7530_setup_port5() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Running mt7530_setup_port5() from mt7530_setup() used to handle all cases +of configuring port 5, including phylink. + +Setting priv->p5_interface under mt7530_setup_port5() makes sure that +mt7530_setup_port5() from mt753x_phylink_mac_config() won't run. + +The commit ("net: dsa: mt7530: improve code path for setting up port 5") +makes so that mt7530_setup_port5() from mt7530_setup() runs only on +non-phylink cases. + +Get rid of unnecessarily setting priv->p5_interface under +mt7530_setup_port5() as port 5 phylink configuration will be done by +running mt7530_setup_port5() from mt753x_phylink_mac_config() now. + +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-6-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -978,8 +978,6 @@ static void mt7530_setup_port5(struct ds + dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", + val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); + +- priv->p5_interface = interface; +- + unlock_exit: + mutex_unlock(&priv->reg_mutex); + } diff --git a/target/linux/generic/backport-6.6/790-11-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch b/target/linux/generic/backport-6.6/790-11-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch new file mode 100644 index 00000000000000..9eecede95e435e --- /dev/null +++ b/target/linux/generic/backport-6.6/790-11-v6.9-net-dsa-mt7530-do-not-run-mt7530_setup_port5-if-port.patch @@ -0,0 +1,62 @@ +From e55a68aeb0f8b9c74b582b7a5e92b82988832bf8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 22 Jan 2024 08:35:58 +0300 +Subject: [PATCH 11/30] net: dsa: mt7530: do not run mt7530_setup_port5() if + port 5 is disabled +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's no need to run all the code on mt7530_setup_port5() if port 5 is +disabled. The only case for calling mt7530_setup_port5() from +mt7530_setup() is when PHY muxing is enabled. That is because port 5 is not +defined as a port on the devicetree, therefore, it cannot be controlled by +phylink. + +Because of this, run mt7530_setup_port5() if priv->p5_intf_sel is +P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4. Remove the P5_DISABLED case from +mt7530_setup_port5(). + +Stop initialising the interface variable as the remaining cases will always +call mt7530_setup_port5() with it initialised. + +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-7-042401f2b279@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -942,9 +942,6 @@ static void mt7530_setup_port5(struct ds + /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ + val &= ~MHWTRAP_P5_DIS; + break; +- case P5_DISABLED: +- interface = PHY_INTERFACE_MODE_NA; +- break; + default: + dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", + priv->p5_intf_sel); +@@ -2367,8 +2364,6 @@ mt7530_setup(struct dsa_switch *ds) + * Set priv->p5_intf_sel to the appropriate value if PHY muxing + * is detected. + */ +- interface = PHY_INTERFACE_MODE_NA; +- + for_each_child_of_node(dn, mac_np) { + if (!of_device_is_compatible(mac_np, + "mediatek,eth-mac")) +@@ -2400,7 +2395,9 @@ mt7530_setup(struct dsa_switch *ds) + break; + } + +- mt7530_setup_port5(ds, interface); ++ if (priv->p5_intf_sel == P5_INTF_SEL_PHY_P0 || ++ priv->p5_intf_sel == P5_INTF_SEL_PHY_P4) ++ mt7530_setup_port5(ds, interface); + } + + #ifdef CONFIG_GPIOLIB diff --git a/target/linux/generic/backport-6.6/790-12-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch b/target/linux/generic/backport-6.6/790-12-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch new file mode 100644 index 00000000000000..c9a57e36a374de --- /dev/null +++ b/target/linux/generic/backport-6.6/790-12-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch @@ -0,0 +1,58 @@ +From 1f538cda24bcb69919da2fcac0211b66281d3d4e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:02 +0300 +Subject: [PATCH 12/30] net: dsa: mt7530: empty default case on + mt7530_setup_port5() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There're two code paths for setting up port 5: + +mt7530_setup() +-> mt7530_setup_port5() + +mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt7530_mac_config() + -> mt7530_setup_port5() + +On the first code path, priv->p5_intf_sel is either set to +P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4 when mt7530_setup_port5() is run. + +On the second code path, priv->p5_intf_sel is set to P5_INTF_SEL_GMAC5 when +mt7530_setup_port5() is run. + +Empty the default case which will never run but is needed nonetheless to +handle all the remaining enumeration values. + +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-1-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -943,9 +943,7 @@ static void mt7530_setup_port5(struct ds + val &= ~MHWTRAP_P5_DIS; + break; + default: +- dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", +- priv->p5_intf_sel); +- goto unlock_exit; ++ break; + } + + /* Setup RGMII settings */ +@@ -975,7 +973,6 @@ static void mt7530_setup_port5(struct ds + dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", + val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); + +-unlock_exit: + mutex_unlock(&priv->reg_mutex); + } + diff --git a/target/linux/generic/backport-6.6/790-13-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch b/target/linux/generic/backport-6.6/790-13-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch new file mode 100644 index 00000000000000..575352dbb18e3b --- /dev/null +++ b/target/linux/generic/backport-6.6/790-13-v6.9-net-dsa-mt7530-move-XTAL-check-to-mt7530_setup.patch @@ -0,0 +1,53 @@ +From 12c511cd31c2dc6bd96e4a89f7709d515aa8a76b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:03 +0300 +Subject: [PATCH 13/30] net: dsa: mt7530: move XTAL check to mt7530_setup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The crystal frequency concerns the switch core. The frequency should be +checked when the switch is being set up so the driver can reject the +unsupported hardware earlier and without requiring port 6 to be used. + +Move it to mt7530_setup(). Drop the unnecessary function printing. + +Reviewed-by: Andrew Lunn +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-2-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -422,13 +422,6 @@ mt7530_pad_clk_setup(struct dsa_switch * + + xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; + +- if (xtal == HWTRAP_XTAL_20MHZ) { +- dev_err(priv->dev, +- "%s: MT7530 with a 20MHz XTAL is not supported!\n", +- __func__); +- return -EINVAL; +- } +- + switch (interface) { + case PHY_INTERFACE_MODE_RGMII: + trgint = 0; +@@ -2295,6 +2288,12 @@ mt7530_setup(struct dsa_switch *ds) + return -ENODEV; + } + ++ if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_20MHZ) { ++ dev_err(priv->dev, ++ "MT7530 with a 20MHz XTAL is not supported!\n"); ++ return -EINVAL; ++ } ++ + /* Reset the switch through internal reset */ + mt7530_write(priv, MT7530_SYS_CTRL, + SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | diff --git a/target/linux/generic/backport-6.6/790-14-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch b/target/linux/generic/backport-6.6/790-14-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch new file mode 100644 index 00000000000000..75c90b9ad585b5 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-14-v6.9-net-dsa-mt7530-simplify-mt7530_pad_clk_setup.patch @@ -0,0 +1,146 @@ +From c33899a6a8c1a5723afbfc075600aba2e2bdbea7 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:04 +0300 +Subject: [PATCH 14/30] net: dsa: mt7530: simplify mt7530_pad_clk_setup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This code is from before this driver was converted to phylink API. Phylink +deals with the unsupported interface cases before mt7530_pad_clk_setup() is +run. Therefore, the default case would never run. However, it must be +defined nonetheless to handle all the remaining enumeration values, the +phy-modes. + +Switch to if statement for RGMII and return which simplifies the code and +saves an indent. + +Set P6_INTF_MODE, which is the three least significant bits of the +MT7530_P6ECR register, to 0 for RGMII even though it will already be 0 +after reset. This is to keep supporting dynamic reconfiguration of the port +in the case the interface changes from TRGMII to RGMII. + +Disable the TRGMII clocks for all cases. They will be enabled if TRGMII is +being used. + +Read XTAL after checking for RGMII as it's only needed for the TRGMII +interface mode. + +Reviewed-by: Daniel Golle +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-3-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 91 ++++++++++++++++++---------------------- + 1 file changed, 40 insertions(+), 51 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -418,65 +418,54 @@ static int + mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) + { + struct mt7530_priv *priv = ds->priv; +- u32 ncpo1, ssc_delta, trgint, xtal; ++ u32 ncpo1, ssc_delta, xtal; + +- xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; ++ /* Disable the MT7530 TRGMII clocks */ ++ core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + +- switch (interface) { +- case PHY_INTERFACE_MODE_RGMII: +- trgint = 0; +- break; +- case PHY_INTERFACE_MODE_TRGMII: +- trgint = 1; +- if (xtal == HWTRAP_XTAL_25MHZ) +- ssc_delta = 0x57; +- else +- ssc_delta = 0x87; +- if (priv->id == ID_MT7621) { +- /* PLL frequency: 125MHz: 1.0GBit */ +- if (xtal == HWTRAP_XTAL_40MHZ) +- ncpo1 = 0x0640; +- if (xtal == HWTRAP_XTAL_25MHZ) +- ncpo1 = 0x0a00; +- } else { /* PLL frequency: 250MHz: 2.0Gbit */ +- if (xtal == HWTRAP_XTAL_40MHZ) +- ncpo1 = 0x0c80; +- if (xtal == HWTRAP_XTAL_25MHZ) +- ncpo1 = 0x1400; +- } +- break; +- default: +- dev_err(priv->dev, "xMII interface %d not supported\n", +- interface); +- return -EINVAL; ++ if (interface == PHY_INTERFACE_MODE_RGMII) { ++ mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, ++ P6_INTF_MODE(0)); ++ return 0; + } + +- mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, +- P6_INTF_MODE(trgint)); ++ mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); + +- if (trgint) { +- /* Disable the MT7530 TRGMII clocks */ +- core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); +- +- /* Setup the MT7530 TRGMII Tx Clock */ +- core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); +- core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); +- core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); +- core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); +- core_write(priv, CORE_PLL_GROUP4, +- RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN | +- RG_SYSPLL_BIAS_LPF_EN); +- core_write(priv, CORE_PLL_GROUP2, +- RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN | +- RG_SYSPLL_POSDIV(1)); +- core_write(priv, CORE_PLL_GROUP7, +- RG_LCDDS_PCW_NCPO_CHG | RG_LCCDS_C(3) | +- RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); ++ xtal = mt7530_read(priv, MT7530_MHWTRAP) & HWTRAP_XTAL_MASK; + +- /* Enable the MT7530 TRGMII clocks */ +- core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); ++ if (xtal == HWTRAP_XTAL_25MHZ) ++ ssc_delta = 0x57; ++ else ++ ssc_delta = 0x87; ++ ++ if (priv->id == ID_MT7621) { ++ /* PLL frequency: 125MHz: 1.0GBit */ ++ if (xtal == HWTRAP_XTAL_40MHZ) ++ ncpo1 = 0x0640; ++ if (xtal == HWTRAP_XTAL_25MHZ) ++ ncpo1 = 0x0a00; ++ } else { /* PLL frequency: 250MHz: 2.0Gbit */ ++ if (xtal == HWTRAP_XTAL_40MHZ) ++ ncpo1 = 0x0c80; ++ if (xtal == HWTRAP_XTAL_25MHZ) ++ ncpo1 = 0x1400; + } + ++ /* Setup the MT7530 TRGMII Tx Clock */ ++ core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); ++ core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); ++ core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); ++ core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); ++ core_write(priv, CORE_PLL_GROUP4, RG_SYSPLL_DDSFBK_EN | ++ RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN); ++ core_write(priv, CORE_PLL_GROUP2, RG_SYSPLL_EN_NORMAL | ++ RG_SYSPLL_VODEN | RG_SYSPLL_POSDIV(1)); ++ core_write(priv, CORE_PLL_GROUP7, RG_LCDDS_PCW_NCPO_CHG | ++ RG_LCCDS_C(3) | RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); ++ ++ /* Enable the MT7530 TRGMII clocks */ ++ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); ++ + return 0; + } + diff --git a/target/linux/generic/backport-6.6/790-15-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch b/target/linux/generic/backport-6.6/790-15-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch new file mode 100644 index 00000000000000..dd886adaa282db --- /dev/null +++ b/target/linux/generic/backport-6.6/790-15-v6.9-net-dsa-mt7530-call-port-6-setup-from-mt7530_mac_con.patch @@ -0,0 +1,97 @@ +From e612922de7070a28802216650ee88128a57290de Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:05 +0300 +Subject: [PATCH 15/30] net: dsa: mt7530: call port 6 setup from + mt7530_mac_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +mt7530_pad_clk_setup() is called if port 6 is enabled. It used to do more +things than setting up port 6. That part was moved to more appropriate +locations, mt7530_setup() and mt7530_pll_setup(). + +Now that all it does is set up port 6, rename it to mt7530_setup_port6(), +and move it to a more appropriate location, under mt7530_mac_config(). + +Change mt7530_setup_port6() to void as there're no error cases. + +Leave an empty mt7530_pad_clk_setup() to satisfy the pad_setup function +pointer. + +This is the code path for setting up the ports before: + +dsa_switch_ops :: phylink_mac_config() -> mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt753x_info :: mac_port_config() -> mt7530_mac_config() + -> mt7530_setup_port5() +-> mt753x_pad_setup() + -> mt753x_info :: pad_setup() -> mt7530_pad_clk_setup() + +This is after: + +dsa_switch_ops :: phylink_mac_config() -> mt753x_phylink_mac_config() +-> mt753x_mac_config() + -> mt753x_info :: mac_port_config() -> mt7530_mac_config() + -> mt7530_setup_port5() + -> mt7530_setup_port6() + +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-4-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -414,8 +414,8 @@ mt753x_preferred_default_local_cpu_port( + } + + /* Setup port 6 interface mode and TRGMII TX circuit */ +-static int +-mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) ++static void ++mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface) + { + struct mt7530_priv *priv = ds->priv; + u32 ncpo1, ssc_delta, xtal; +@@ -426,7 +426,7 @@ mt7530_pad_clk_setup(struct dsa_switch * + if (interface == PHY_INTERFACE_MODE_RGMII) { + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, + P6_INTF_MODE(0)); +- return 0; ++ return; + } + + mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1)); +@@ -465,7 +465,11 @@ mt7530_pad_clk_setup(struct dsa_switch * + + /* Enable the MT7530 TRGMII clocks */ + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); ++} + ++static int ++mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) ++{ + return 0; + } + +@@ -2649,11 +2653,10 @@ mt7530_mac_config(struct dsa_switch *ds, + { + struct mt7530_priv *priv = ds->priv; + +- /* Only need to setup port5. */ +- if (port != 5) +- return 0; +- +- mt7530_setup_port5(priv->ds, interface); ++ if (port == 5) ++ mt7530_setup_port5(priv->ds, interface); ++ else if (port == 6) ++ mt7530_setup_port6(priv->ds, interface); + + return 0; + } diff --git a/target/linux/generic/backport-6.6/790-16-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch b/target/linux/generic/backport-6.6/790-16-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch new file mode 100644 index 00000000000000..efe554b292fd9a --- /dev/null +++ b/target/linux/generic/backport-6.6/790-16-v6.9-net-dsa-mt7530-remove-pad_setup-function-pointer.patch @@ -0,0 +1,148 @@ +From af83e0c7d766078fcd5580c0c81b9e5b55ff5906 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:06 +0300 +Subject: [PATCH 16/30] net: dsa: mt7530: remove pad_setup function pointer +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The pad_setup function pointer was introduced with 88bdef8be9f6 ("net: dsa: +mt7530: Extend device data ready for adding a new hardware"). It was being +used to set up the core clock and port 6 of the MT7530 switch, and pll of +the MT7531 switch. + +All of these were moved to more appropriate locations, and it was never +used for the switch on the MT7988 SoC. Therefore, this function pointer +hasn't got a use anymore. Remove it. + +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-5-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 36 ++---------------------------------- + drivers/net/dsa/mt7530.h | 3 --- + 2 files changed, 2 insertions(+), 37 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -467,18 +467,6 @@ mt7530_setup_port6(struct dsa_switch *ds + core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN); + } + +-static int +-mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) +-{ +- return 0; +-} +- +-static int +-mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) +-{ +- return 0; +-} +- + static void + mt7531_pll_setup(struct mt7530_priv *priv) + { +@@ -2640,14 +2628,6 @@ static void mt7988_mac_port_get_caps(str + } + + static int +-mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) +-{ +- struct mt7530_priv *priv = ds->priv; +- +- return priv->info->pad_setup(ds, state->interface); +-} +- +-static int + mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2812,8 +2792,6 @@ mt753x_phylink_mac_config(struct dsa_swi + if (priv->p6_interface == state->interface) + break; + +- mt753x_pad_setup(ds, state); +- + if (mt753x_mac_config(ds, port, mode, state) < 0) + goto unsupported; + +@@ -3130,11 +3108,6 @@ mt753x_conduit_state_change(struct dsa_s + mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); + } + +-static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) +-{ +- return 0; +-} +- + static int mt7988_setup(struct dsa_switch *ds) + { + struct mt7530_priv *priv = ds->priv; +@@ -3198,7 +3171,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c22 = mt7530_phy_write_c22, + .phy_read_c45 = mt7530_phy_read_c45, + .phy_write_c45 = mt7530_phy_write_c45, +- .pad_setup = mt7530_pad_clk_setup, + .mac_port_get_caps = mt7530_mac_port_get_caps, + .mac_port_config = mt7530_mac_config, + }, +@@ -3210,7 +3182,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c22 = mt7530_phy_write_c22, + .phy_read_c45 = mt7530_phy_read_c45, + .phy_write_c45 = mt7530_phy_write_c45, +- .pad_setup = mt7530_pad_clk_setup, + .mac_port_get_caps = mt7530_mac_port_get_caps, + .mac_port_config = mt7530_mac_config, + }, +@@ -3222,7 +3193,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c22 = mt7531_ind_c22_phy_write, + .phy_read_c45 = mt7531_ind_c45_phy_read, + .phy_write_c45 = mt7531_ind_c45_phy_write, +- .pad_setup = mt7531_pad_setup, + .cpu_port_config = mt7531_cpu_port_config, + .mac_port_get_caps = mt7531_mac_port_get_caps, + .mac_port_config = mt7531_mac_config, +@@ -3235,7 +3205,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c22 = mt7531_ind_c22_phy_write, + .phy_read_c45 = mt7531_ind_c45_phy_read, + .phy_write_c45 = mt7531_ind_c45_phy_write, +- .pad_setup = mt7988_pad_setup, + .cpu_port_config = mt7988_cpu_port_config, + .mac_port_get_caps = mt7988_mac_port_get_caps, + .mac_port_config = mt7988_mac_config, +@@ -3265,9 +3234,8 @@ mt7530_probe_common(struct mt7530_priv * + /* Sanity check if these required device operations are filled + * properly. + */ +- if (!priv->info->sw_setup || !priv->info->pad_setup || +- !priv->info->phy_read_c22 || !priv->info->phy_write_c22 || +- !priv->info->mac_port_get_caps || ++ if (!priv->info->sw_setup || !priv->info->phy_read_c22 || ++ !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || + !priv->info->mac_port_config) + return -EINVAL; + +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -724,8 +724,6 @@ struct mt753x_pcs { + * @phy_write_c22: Holding the way writing PHY port using C22 + * @phy_read_c45: Holding the way reading PHY port using C45 + * @phy_write_c45: Holding the way writing PHY port using C45 +- * @pad_setup: Holding the way setting up the bus pad for a certain +- * MAC port + * @phy_mode_supported: Check if the PHY type is being supported on a certain + * port + * @mac_port_validate: Holding the way to set addition validate type for a +@@ -746,7 +744,6 @@ struct mt753x_info { + int regnum); + int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, + int regnum, u16 val); +- int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); + int (*cpu_port_config)(struct dsa_switch *ds, int port); + void (*mac_port_get_caps)(struct dsa_switch *ds, int port, + struct phylink_config *config); diff --git a/target/linux/generic/backport-6.6/790-17-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch b/target/linux/generic/backport-6.6/790-17-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch new file mode 100644 index 00000000000000..b707c3f6e936ff --- /dev/null +++ b/target/linux/generic/backport-6.6/790-17-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch @@ -0,0 +1,36 @@ +From 9716e3e2c21547c97a9d79119da8fdce5659c2cc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:07 +0300 +Subject: [PATCH 17/30] net: dsa: mt7530: correct port capabilities of MT7988 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page +125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open +Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for +ports which connect to switch PHYs to '0 ... 3'. + +Port 4 and 5 are not used at all in this design. + +Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1] +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-6-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2613,7 +2613,7 @@ static void mt7988_mac_port_get_caps(str + + switch (port) { + /* Ports which are connected to switch PHYs. There is no MII pinout. */ +- case 0 ... 4: ++ case 0 ... 3: + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + config->supported_interfaces); + break; diff --git a/target/linux/generic/backport-6.6/790-18-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch b/target/linux/generic/backport-6.6/790-18-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch new file mode 100644 index 00000000000000..4d781836dac36a --- /dev/null +++ b/target/linux/generic/backport-6.6/790-18-v6.9-net-dsa-mt7530-do-not-clear-config-supported_interfa.patch @@ -0,0 +1,38 @@ +From 4d7b17712513710778c0f2f83ea5d9b55ed58c36 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 6 Feb 2024 01:08:08 +0300 +Subject: [PATCH 18/30] net: dsa: mt7530: do not clear + config->supported_interfaces +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's no need to clear the config->supported_interfaces bitmap before +reporting the supported interfaces as all bits in the bitmap will already +be initialized to zero when the phylink_config structure is allocated. The +"config" pointer points to &dp->phylink_config, and "dp" is allocated by +dsa_port_touch() with kzalloc(), so all its fields are filled with zeroes. + +There's no code that would change the bitmap beforehand. Remove it. + +Acked-by: Daniel Golle +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-7-d7d92a185cb1@arinc9.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2609,8 +2609,6 @@ static void mt7531_mac_port_get_caps(str + static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { +- phy_interface_zero(config->supported_interfaces); +- + switch (port) { + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 3: diff --git a/target/linux/generic/backport-6.6/790-19-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch b/target/linux/generic/backport-6.6/790-19-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch new file mode 100644 index 00000000000000..d05b8ea5b954f1 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-19-v6.9-net-dsa-mt7530-remove-.mac_port_config-for-MT7988-an.patch @@ -0,0 +1,81 @@ +From 69e689e28191f9a242de6821a85f2c5ae4dbd5ae Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:42:57 +0200 +Subject: [PATCH 19/30] net: dsa: mt7530: remove .mac_port_config for MT7988 + and make it optional +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +For the switch on the MT7988 SoC, the mac_port_config member for ID_MT7988 +in mt753x_table is not needed as the interfaces of all MACs are already +handled on mt7988_mac_port_get_caps(). + +Therefore, remove the mac_port_config member from ID_MT7988 in +mt753x_table. Before calling priv->info->mac_port_config(), if there's no +mac_port_config member in mt753x_table, exit mt753x_mac_config() +successfully. + +Remove calling priv->info->mac_port_config() from the sanity check as the +sanity check requires a pointer to a mac_port_config function to be +non-NULL. This will fail for MT7988 as mac_port_config won't be a member of +its info table. + +Co-developed-by: Daniel Golle +Signed-off-by: Daniel Golle +Signed-off-by: Arınç ÜNAL +Reviewed-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 18 ++++-------------- + 1 file changed, 4 insertions(+), 14 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2692,17 +2692,6 @@ static bool mt753x_is_mac_port(u32 port) + } + + static int +-mt7988_mac_config(struct dsa_switch *ds, int port, unsigned int mode, +- phy_interface_t interface) +-{ +- if (dsa_is_cpu_port(ds, port) && +- interface == PHY_INTERFACE_MODE_INTERNAL) +- return 0; +- +- return -EINVAL; +-} +- +-static int + mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2742,6 +2731,9 @@ mt753x_mac_config(struct dsa_switch *ds, + { + struct mt7530_priv *priv = ds->priv; + ++ if (!priv->info->mac_port_config) ++ return 0; ++ + return priv->info->mac_port_config(ds, port, mode, state->interface); + } + +@@ -3205,7 +3197,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c45 = mt7531_ind_c45_phy_write, + .cpu_port_config = mt7988_cpu_port_config, + .mac_port_get_caps = mt7988_mac_port_get_caps, +- .mac_port_config = mt7988_mac_config, + }, + }; + EXPORT_SYMBOL_GPL(mt753x_table); +@@ -3233,8 +3224,7 @@ mt7530_probe_common(struct mt7530_priv * + * properly. + */ + if (!priv->info->sw_setup || !priv->info->phy_read_c22 || +- !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps || +- !priv->info->mac_port_config) ++ !priv->info->phy_write_c22 || !priv->info->mac_port_get_caps) + return -EINVAL; + + priv->id = priv->info->id; diff --git a/target/linux/generic/backport-6.6/790-20-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch b/target/linux/generic/backport-6.6/790-20-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch new file mode 100644 index 00000000000000..143dd0dc1ac064 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-20-v6.9-net-dsa-mt7530-set-interrupt-register-only-for-MT753.patch @@ -0,0 +1,31 @@ +From f8faa3a04ca860b31f22d7d526c5e3f3de511a8f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:42:58 +0200 +Subject: [PATCH 20/30] net: dsa: mt7530: set interrupt register only for + MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Setting this register related to interrupts is only needed for the MT7530 +switch. Make an exclusive check to ensure this. + +Signed-off-by: Arınç ÜNAL +Acked-by: Daniel Golle +Tested-by: Daniel Golle +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2091,7 +2091,7 @@ mt7530_setup_irq(struct mt7530_priv *pri + } + + /* This register must be set for MT7530 to properly fire interrupts */ +- if (priv->id != ID_MT7531) ++ if (priv->id == ID_MT7530 || priv->id == ID_MT7621) + mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL); + + ret = request_threaded_irq(priv->irq, NULL, mt7530_irq_thread_fn, diff --git a/target/linux/generic/backport-6.6/790-21-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch b/target/linux/generic/backport-6.6/790-21-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch new file mode 100644 index 00000000000000..24d0ab16335308 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-21-v6.9-net-dsa-mt7530-do-not-use-SW_PHY_RST-to-reset-MT7531.patch @@ -0,0 +1,41 @@ +From 80f4f866d7dad41b12cf37476c38766a89b8b5c4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:42:59 +0200 +Subject: [PATCH 21/30] net: dsa: mt7530: do not use SW_PHY_RST to reset MT7531 + switch +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +According to the document MT7531 Reference Manual for Development Board +v1.0, the SW_PHY_RST bit on the SYS_CTRL register doesn't exist for +MT7531. This is likely why forcing link down on all ports is necessary for +MT7531. + +Therefore, do not set SW_PHY_RST on mt7531_setup(). + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2487,14 +2487,12 @@ mt7531_setup(struct dsa_switch *ds) + val = mt7530_read(priv, MT7531_TOP_SIG_SR); + priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); + +- /* all MACs must be forced link-down before sw reset */ ++ /* Force link down on all ports before internal reset */ + for (i = 0; i < MT7530_NUM_PORTS; i++) + mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); + + /* Reset the switch through internal reset */ +- mt7530_write(priv, MT7530_SYS_CTRL, +- SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | +- SYS_CTRL_REG_RST); ++ mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); + + if (!priv->p5_sgmii) { + mt7531_pll_setup(priv); diff --git a/target/linux/generic/backport-6.6/790-22-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch b/target/linux/generic/backport-6.6/790-22-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch new file mode 100644 index 00000000000000..e311a9314f7a8c --- /dev/null +++ b/target/linux/generic/backport-6.6/790-22-v6.9-net-dsa-mt7530-get-rid-of-useless-error-returns-on-p.patch @@ -0,0 +1,217 @@ +From 58670652cacb7c5752e01f29979d0ca4cdbfcc0a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:00 +0200 +Subject: [PATCH 22/30] net: dsa: mt7530: get rid of useless error returns on + phylink code path +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Remove error returns on the cases where they are already handled with the +function the mac_port_get_caps member in mt753x_table points to. + +mt7531_mac_config() is also called from mt7531_cpu_port_config() outside of +phylink but the port and interface modes are already handled there. + +Change the functions and the mac_port_config function pointer to void now +that there're no error returns anymore. + +Remove mt753x_is_mac_port() that used to help the said error returns. + +On mt7531_mac_config(), switch to if statements to simplify the code. + +Remove internal phy cases from mt753x_phylink_mac_config(), there is no +need to check the interface mode as that's already handled with the +function the mac_port_get_caps member in mt753x_table points to. + +Acked-by: Daniel Golle +Tested-by: Daniel Golle +Signed-off-by: Arınç ÜNAL +Reviewed-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 81 ++++++++-------------------------------- + drivers/net/dsa/mt7530.h | 6 +-- + 2 files changed, 19 insertions(+), 68 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2623,7 +2623,7 @@ static void mt7988_mac_port_get_caps(str + } + } + +-static int ++static void + mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2633,22 +2633,14 @@ mt7530_mac_config(struct dsa_switch *ds, + mt7530_setup_port5(priv->ds, interface); + else if (port == 6) + mt7530_setup_port6(priv->ds, interface); +- +- return 0; + } + +-static int mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, +- phy_interface_t interface, +- struct phy_device *phydev) ++static void mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, ++ phy_interface_t interface, ++ struct phy_device *phydev) + { + u32 val; + +- if (priv->p5_sgmii) { +- dev_err(priv->dev, "RGMII mode is not available for port %d\n", +- port); +- return -EINVAL; +- } +- + val = mt7530_read(priv, MT7531_CLKGEN_CTRL); + val |= GP_CLK_EN; + val &= ~GP_MODE_MASK; +@@ -2676,20 +2668,14 @@ static int mt7531_rgmii_setup(struct mt7 + case PHY_INTERFACE_MODE_RGMII_ID: + break; + default: +- return -EINVAL; ++ break; + } + } +- mt7530_write(priv, MT7531_CLKGEN_CTRL, val); + +- return 0; +-} +- +-static bool mt753x_is_mac_port(u32 port) +-{ +- return (port == 5 || port == 6); ++ mt7530_write(priv, MT7531_CLKGEN_CTRL, val); + } + +-static int ++static void + mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + phy_interface_t interface) + { +@@ -2697,42 +2683,21 @@ mt7531_mac_config(struct dsa_switch *ds, + struct phy_device *phydev; + struct dsa_port *dp; + +- if (!mt753x_is_mac_port(port)) { +- dev_err(priv->dev, "port %d is not a MAC port\n", port); +- return -EINVAL; +- } +- +- switch (interface) { +- case PHY_INTERFACE_MODE_RGMII: +- case PHY_INTERFACE_MODE_RGMII_ID: +- case PHY_INTERFACE_MODE_RGMII_RXID: +- case PHY_INTERFACE_MODE_RGMII_TXID: ++ if (phy_interface_mode_is_rgmii(interface)) { + dp = dsa_to_port(ds, port); + phydev = dp->slave->phydev; +- return mt7531_rgmii_setup(priv, port, interface, phydev); +- case PHY_INTERFACE_MODE_SGMII: +- case PHY_INTERFACE_MODE_NA: +- case PHY_INTERFACE_MODE_1000BASEX: +- case PHY_INTERFACE_MODE_2500BASEX: +- /* handled in SGMII PCS driver */ +- return 0; +- default: +- return -EINVAL; ++ mt7531_rgmii_setup(priv, port, interface, phydev); + } +- +- return -EINVAL; + } + +-static int ++static void + mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode, + const struct phylink_link_state *state) + { + struct mt7530_priv *priv = ds->priv; + +- if (!priv->info->mac_port_config) +- return 0; +- +- return priv->info->mac_port_config(ds, port, mode, state->interface); ++ if (priv->info->mac_port_config) ++ priv->info->mac_port_config(ds, port, mode, state->interface); + } + + static struct phylink_pcs * +@@ -2761,17 +2726,11 @@ mt753x_phylink_mac_config(struct dsa_swi + u32 mcr_cur, mcr_new; + + switch (port) { +- case 0 ... 4: +- if (state->interface != PHY_INTERFACE_MODE_GMII && +- state->interface != PHY_INTERFACE_MODE_INTERNAL) +- goto unsupported; +- break; + case 5: + if (priv->p5_interface == state->interface) + break; + +- if (mt753x_mac_config(ds, port, mode, state) < 0) +- goto unsupported; ++ mt753x_mac_config(ds, port, mode, state); + + if (priv->p5_intf_sel != P5_DISABLED) + priv->p5_interface = state->interface; +@@ -2780,16 +2739,10 @@ mt753x_phylink_mac_config(struct dsa_swi + if (priv->p6_interface == state->interface) + break; + +- if (mt753x_mac_config(ds, port, mode, state) < 0) +- goto unsupported; ++ mt753x_mac_config(ds, port, mode, state); + + priv->p6_interface = state->interface; + break; +- default: +-unsupported: +- dev_err(ds->dev, "%s: unsupported %s port: %i\n", +- __func__, phy_modes(state->interface), port); +- return; + } + + mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); +@@ -2872,7 +2825,6 @@ mt7531_cpu_port_config(struct dsa_switch + struct mt7530_priv *priv = ds->priv; + phy_interface_t interface; + int speed; +- int ret; + + switch (port) { + case 5: +@@ -2897,9 +2849,8 @@ mt7531_cpu_port_config(struct dsa_switch + else + speed = SPEED_1000; + +- ret = mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); +- if (ret) +- return ret; ++ mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); ++ + mt7530_write(priv, MT7530_PMCR_P(port), + PMCR_CPU_PORT_SETTING(priv->id)); + mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -750,9 +750,9 @@ struct mt753x_info { + void (*mac_port_validate)(struct dsa_switch *ds, int port, + phy_interface_t interface, + unsigned long *supported); +- int (*mac_port_config)(struct dsa_switch *ds, int port, +- unsigned int mode, +- phy_interface_t interface); ++ void (*mac_port_config)(struct dsa_switch *ds, int port, ++ unsigned int mode, ++ phy_interface_t interface); + }; + + /* struct mt7530_priv - This is the main data structure for holding the state diff --git a/target/linux/generic/backport-6.6/790-23-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch b/target/linux/generic/backport-6.6/790-23-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch new file mode 100644 index 00000000000000..e07a7ee71b8b99 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-23-v6.9-net-dsa-mt7530-get-rid-of-priv-info-cpu_port_config.patch @@ -0,0 +1,305 @@ +From 859df5cf6ff07a9c930be4681284346aa73dd1fb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:01 +0200 +Subject: [PATCH 23/30] net: dsa: mt7530: get rid of + priv->info->cpu_port_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +priv->info->cpu_port_config() is used for MT7531 and the switch on the +MT7988 SoC. It sets up the ports described as a CPU port earlier than the +phylink code path would do. + +This function is useless as: +- Configuring the MACs can be done from the phylink_mac_config code path + instead. +- All the link configuration it does on the CPU ports are later undone with + the port_enable, phylink_mac_config, and then phylink_mac_link_up code + path [1]. + +priv->p5_interface and priv->p6_interface were being used to prevent +configuring the MACs from the phylink_mac_config code path. Remove them now +that they hold no purpose. + +Remove priv->info->cpu_port_config(). On mt753x_phylink_mac_config, switch +to if statements to simplify the code. + +Remove the overwriting of the speed and duplex interfaces for certain +interface modes. Phylink already provides the speed and duplex variables +with proper values. Phylink already sets the max speed of TRGMII to +SPEED_1000. Add SPEED_2500 for PHY_INTERFACE_MODE_2500BASEX to where the +speed and EEE bits are set instead. + +On the switch on the MT7988 SoC, PHY_INTERFACE_MODE_INTERNAL is being used +to describe the interface mode of the 10G MAC, which is of port 6. On +mt7988_cpu_port_config() PMCR_FORCE_SPEED_1000 was set via the +PMCR_CPU_PORT_SETTING() mask. Add SPEED_10000 case to where the speed bits +are set to cover this. No need to add it to where the EEE bits are set as +the "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version) +v0.1" document shows that these bits don't exist on the MT7530_PMCR_P(6) +register. + +Remove the definition of PMCR_CPU_PORT_SETTING() now that it holds no +purpose. + +Change mt753x_cpu_port_enable() to void now that there're no error cases +left. + +Link: https://lore.kernel.org/netdev/ZHy2jQLesdYFMQtO@shell.armlinux.org.uk/ [1] +Suggested-by: Russell King (Oracle) +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 114 +++------------------------------------ + drivers/net/dsa/mt7530.h | 11 ---- + 2 files changed, 7 insertions(+), 118 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1002,18 +1002,10 @@ mt753x_trap_frames(struct mt7530_priv *p + MT753X_BPDU_CPU_ONLY); + } + +-static int ++static void + mt753x_cpu_port_enable(struct dsa_switch *ds, int port) + { + struct mt7530_priv *priv = ds->priv; +- int ret; +- +- /* Setup max capability of CPU port at first */ +- if (priv->info->cpu_port_config) { +- ret = priv->info->cpu_port_config(ds, port); +- if (ret) +- return ret; +- } + + /* Enable Mediatek header mode on the cpu port */ + mt7530_write(priv, MT7530_PVC_P(port), +@@ -1039,8 +1031,6 @@ mt753x_cpu_port_enable(struct dsa_switch + /* Set to fallback mode for independent VLAN learning */ + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, + MT7530_PORT_FALLBACK_MODE); +- +- return 0; + } + + static int +@@ -2297,8 +2287,6 @@ mt7530_setup(struct dsa_switch *ds) + val |= MHWTRAP_MANUAL; + mt7530_write(priv, MT7530_MHWTRAP, val); + +- priv->p6_interface = PHY_INTERFACE_MODE_NA; +- + mt753x_trap_frames(priv); + + /* Enable and reset MIB counters */ +@@ -2313,9 +2301,7 @@ mt7530_setup(struct dsa_switch *ds) + mt7530_set(priv, MT7530_PSC_P(i), SA_DIS); + + if (dsa_is_cpu_port(ds, i)) { +- ret = mt753x_cpu_port_enable(ds, i); +- if (ret) +- return ret; ++ mt753x_cpu_port_enable(ds, i); + } else { + mt7530_port_disable(ds, i); + +@@ -2419,9 +2405,7 @@ mt7531_setup_common(struct dsa_switch *d + mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR); + + if (dsa_is_cpu_port(ds, i)) { +- ret = mt753x_cpu_port_enable(ds, i); +- if (ret) +- return ret; ++ mt753x_cpu_port_enable(ds, i); + } else { + mt7530_port_disable(ds, i); + +@@ -2510,10 +2494,6 @@ mt7531_setup(struct dsa_switch *ds) + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); + +- /* Let phylink decide the interface later. */ +- priv->p5_interface = PHY_INTERFACE_MODE_NA; +- priv->p6_interface = PHY_INTERFACE_MODE_NA; +- + /* Enable PHY core PLL, since phy_device has not yet been created + * provided for phy_[read,write]_mmd_indirect is called, we provide + * our own mt7531_ind_mmd_phy_[read,write] to complete this +@@ -2725,26 +2705,9 @@ mt753x_phylink_mac_config(struct dsa_swi + struct mt7530_priv *priv = ds->priv; + u32 mcr_cur, mcr_new; + +- switch (port) { +- case 5: +- if (priv->p5_interface == state->interface) +- break; +- ++ if (port == 5 || port == 6) + mt753x_mac_config(ds, port, mode, state); + +- if (priv->p5_intf_sel != P5_DISABLED) +- priv->p5_interface = state->interface; +- break; +- case 6: +- if (priv->p6_interface == state->interface) +- break; +- +- mt753x_mac_config(ds, port, mode, state); +- +- priv->p6_interface = state->interface; +- break; +- } +- + mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); + mcr_new = mcr_cur; + mcr_new &= ~PMCR_LINK_SETTINGS_MASK; +@@ -2780,17 +2743,10 @@ static void mt753x_phylink_mac_link_up(s + + mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; + +- /* MT753x MAC works in 1G full duplex mode for all up-clocked +- * variants. +- */ +- if (interface == PHY_INTERFACE_MODE_TRGMII || +- (phy_interface_mode_is_8023z(interface))) { +- speed = SPEED_1000; +- duplex = DUPLEX_FULL; +- } +- + switch (speed) { + case SPEED_1000: ++ case SPEED_2500: ++ case SPEED_10000: + mcr |= PMCR_FORCE_SPEED_1000; + break; + case SPEED_100: +@@ -2808,6 +2764,7 @@ static void mt753x_phylink_mac_link_up(s + if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, false) >= 0) { + switch (speed) { + case SPEED_1000: ++ case SPEED_2500: + mcr |= PMCR_FORCE_EEE1G; + break; + case SPEED_100: +@@ -2819,61 +2776,6 @@ static void mt753x_phylink_mac_link_up(s + mt7530_set(priv, MT7530_PMCR_P(port), mcr); + } + +-static int +-mt7531_cpu_port_config(struct dsa_switch *ds, int port) +-{ +- struct mt7530_priv *priv = ds->priv; +- phy_interface_t interface; +- int speed; +- +- switch (port) { +- case 5: +- if (!priv->p5_sgmii) +- interface = PHY_INTERFACE_MODE_RGMII; +- else +- interface = PHY_INTERFACE_MODE_2500BASEX; +- +- priv->p5_interface = interface; +- break; +- case 6: +- interface = PHY_INTERFACE_MODE_2500BASEX; +- +- priv->p6_interface = interface; +- break; +- default: +- return -EINVAL; +- } +- +- if (interface == PHY_INTERFACE_MODE_2500BASEX) +- speed = SPEED_2500; +- else +- speed = SPEED_1000; +- +- mt7531_mac_config(ds, port, MLO_AN_FIXED, interface); +- +- mt7530_write(priv, MT7530_PMCR_P(port), +- PMCR_CPU_PORT_SETTING(priv->id)); +- mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, +- speed, DUPLEX_FULL, true, true); +- +- return 0; +-} +- +-static int +-mt7988_cpu_port_config(struct dsa_switch *ds, int port) +-{ +- struct mt7530_priv *priv = ds->priv; +- +- mt7530_write(priv, MT7530_PMCR_P(port), +- PMCR_CPU_PORT_SETTING(priv->id)); +- +- mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, +- PHY_INTERFACE_MODE_INTERNAL, NULL, +- SPEED_10000, DUPLEX_FULL, true, true); +- +- return 0; +-} +- + static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, + struct phylink_config *config) + { +@@ -3132,7 +3034,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c22 = mt7531_ind_c22_phy_write, + .phy_read_c45 = mt7531_ind_c45_phy_read, + .phy_write_c45 = mt7531_ind_c45_phy_write, +- .cpu_port_config = mt7531_cpu_port_config, + .mac_port_get_caps = mt7531_mac_port_get_caps, + .mac_port_config = mt7531_mac_config, + }, +@@ -3144,7 +3045,6 @@ const struct mt753x_info mt753x_table[] + .phy_write_c22 = mt7531_ind_c22_phy_write, + .phy_read_c45 = mt7531_ind_c45_phy_read, + .phy_write_c45 = mt7531_ind_c45_phy_write, +- .cpu_port_config = mt7988_cpu_port_config, + .mac_port_get_caps = mt7988_mac_port_get_caps, + }, + }; +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -331,13 +331,6 @@ enum mt7530_vlan_port_acc_frm { + PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ + PMCR_FORCE_FDX | PMCR_FORCE_LNK | \ + PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100) +-#define PMCR_CPU_PORT_SETTING(id) (PMCR_FORCE_MODE_ID((id)) | \ +- PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \ +- PMCR_BACKOFF_EN | PMCR_BACKPR_EN | \ +- PMCR_TX_EN | PMCR_RX_EN | \ +- PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ +- PMCR_FORCE_SPEED_1000 | \ +- PMCR_FORCE_FDX | PMCR_FORCE_LNK) + + #define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100) + #define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24) +@@ -744,7 +737,6 @@ struct mt753x_info { + int regnum); + int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad, + int regnum, u16 val); +- int (*cpu_port_config)(struct dsa_switch *ds, int port); + void (*mac_port_get_caps)(struct dsa_switch *ds, int port, + struct phylink_config *config); + void (*mac_port_validate)(struct dsa_switch *ds, int port, +@@ -770,7 +762,6 @@ struct mt753x_info { + * @ports: Holding the state among ports + * @reg_mutex: The lock for protecting among process accessing + * registers +- * @p6_interface Holding the current port 6 interface + * @p5_intf_sel: Holding the current port 5 interface select + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch + * has got SGMII +@@ -792,8 +783,6 @@ struct mt7530_priv { + const struct mt753x_info *info; + unsigned int id; + bool mcm; +- phy_interface_t p6_interface; +- phy_interface_t p5_interface; + enum p5_interface_select p5_intf_sel; + bool p5_sgmii; + u8 mirror_rx; diff --git a/target/linux/generic/backport-6.6/790-24-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch b/target/linux/generic/backport-6.6/790-24-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch new file mode 100644 index 00000000000000..95226ace494284 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-24-v6.9-net-dsa-mt7530-get-rid-of-mt753x_mac_config.patch @@ -0,0 +1,48 @@ +From c74a98baa8d098157975b3f94e496dd3a73e0864 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:02 +0200 +Subject: [PATCH 24/30] net: dsa: mt7530: get rid of mt753x_mac_config() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There is no need for a separate function to call +priv->info->mac_port_config(). Call it from mt753x_phylink_mac_config() +instead and remove mt753x_mac_config(). + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 14 ++------------ + 1 file changed, 2 insertions(+), 12 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2670,16 +2670,6 @@ mt7531_mac_config(struct dsa_switch *ds, + } + } + +-static void +-mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode, +- const struct phylink_link_state *state) +-{ +- struct mt7530_priv *priv = ds->priv; +- +- if (priv->info->mac_port_config) +- priv->info->mac_port_config(ds, port, mode, state->interface); +-} +- + static struct phylink_pcs * + mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port, + phy_interface_t interface) +@@ -2705,8 +2695,8 @@ mt753x_phylink_mac_config(struct dsa_swi + struct mt7530_priv *priv = ds->priv; + u32 mcr_cur, mcr_new; + +- if (port == 5 || port == 6) +- mt753x_mac_config(ds, port, mode, state); ++ if ((port == 5 || port == 6) && priv->info->mac_port_config) ++ priv->info->mac_port_config(ds, port, mode, state->interface); + + mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); + mcr_new = mcr_cur; diff --git a/target/linux/generic/backport-6.6/790-25-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch b/target/linux/generic/backport-6.6/790-25-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch new file mode 100644 index 00000000000000..44668444cf7aa4 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-25-v6.9-net-dsa-mt7530-put-initialising-PCS-devices-code-bac.patch @@ -0,0 +1,57 @@ +From ab1ddb241bc1cb3d80aa51207810edd5cb0bbdc5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:03 +0200 +Subject: [PATCH 25/30] net: dsa: mt7530: put initialising PCS devices code + back to original order +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The commit fae463084032 ("net: dsa: mt753x: fix pcs conversion regression") +fixes regression caused by cpu_port_config manually calling phylink +operations. cpu_port_config was deemed useless and was removed. Therefore, +put initialising PCS devices code back to its original order. + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2848,17 +2848,9 @@ static int + mt753x_setup(struct dsa_switch *ds) + { + struct mt7530_priv *priv = ds->priv; +- int i, ret; ++ int ret = priv->info->sw_setup(ds); ++ int i; + +- /* Initialise the PCS devices */ +- for (i = 0; i < priv->ds->num_ports; i++) { +- priv->pcs[i].pcs.ops = priv->info->pcs_ops; +- priv->pcs[i].pcs.neg_mode = true; +- priv->pcs[i].priv = priv; +- priv->pcs[i].port = i; +- } +- +- ret = priv->info->sw_setup(ds); + if (ret) + return ret; + +@@ -2870,6 +2862,14 @@ mt753x_setup(struct dsa_switch *ds) + if (ret && priv->irq) + mt7530_free_irq_common(priv); + ++ /* Initialise the PCS devices */ ++ for (i = 0; i < priv->ds->num_ports; i++) { ++ priv->pcs[i].pcs.ops = priv->info->pcs_ops; ++ priv->pcs[i].pcs.neg_mode = true; ++ priv->pcs[i].priv = priv; ++ priv->pcs[i].port = i; ++ } ++ + if (priv->create_sgmii) { + ret = priv->create_sgmii(priv); + if (ret && priv->irq) diff --git a/target/linux/generic/backport-6.6/790-26-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch b/target/linux/generic/backport-6.6/790-26-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch new file mode 100644 index 00000000000000..4992230dc51a28 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-26-v6.9-net-dsa-mt7530-sort-link-settings-ops-and-force-link.patch @@ -0,0 +1,68 @@ +From aa474698f75f4790a4de2052dd487736d2361b2e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:04 +0200 +Subject: [PATCH 26/30] net: dsa: mt7530: sort link settings ops and force link + down on all ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +port_enable and port_disable clears the link settings. Move that to +mt7530_setup() and mt7531_setup_common() which set up the switches. This +way, the link settings are cleared on all ports at setup, and then only +once with phylink_mac_link_down() when a link goes down. + +Enable force mode at setup to apply the force part of the link settings. +This ensures that disabled ports will have their link down. + +Suggested-by: Vladimir Oltean +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -1054,7 +1054,6 @@ mt7530_port_enable(struct dsa_switch *ds + priv->ports[port].enable = true; + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, + priv->ports[port].pm); +- mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); + + mutex_unlock(&priv->reg_mutex); + +@@ -1074,7 +1073,6 @@ mt7530_port_disable(struct dsa_switch *d + priv->ports[port].enable = false; + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); +- mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); + + mutex_unlock(&priv->reg_mutex); + } +@@ -2293,6 +2291,12 @@ mt7530_setup(struct dsa_switch *ds) + mt7530_mib_reset(ds); + + for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ /* Clear link settings and enable force mode to force link down ++ * on all ports until they're enabled later. ++ */ ++ mt7530_rmw(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | ++ PMCR_FORCE_MODE, PMCR_FORCE_MODE); ++ + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); +@@ -2395,6 +2399,12 @@ mt7531_setup_common(struct dsa_switch *d + UNU_FFP_MASK); + + for (i = 0; i < MT7530_NUM_PORTS; i++) { ++ /* Clear link settings and enable force mode to force link down ++ * on all ports until they're enabled later. ++ */ ++ mt7530_rmw(priv, MT7530_PMCR_P(i), PMCR_LINK_SETTINGS_MASK | ++ MT7531_FORCE_MODE, MT7531_FORCE_MODE); ++ + /* Disable forwarding by default on all ports */ + mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, + PCR_MATRIX_CLR); diff --git a/target/linux/generic/backport-6.6/790-27-v6.9-net-dsa-mt7530-simplify-link-operations.patch b/target/linux/generic/backport-6.6/790-27-v6.9-net-dsa-mt7530-simplify-link-operations.patch new file mode 100644 index 00000000000000..ee5353673cf51d --- /dev/null +++ b/target/linux/generic/backport-6.6/790-27-v6.9-net-dsa-mt7530-simplify-link-operations.patch @@ -0,0 +1,83 @@ +From 1ca89c2e349d7c5e045911d741dacf4c83d029e7 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Fri, 1 Mar 2024 12:43:05 +0200 +Subject: [PATCH 27/30] net: dsa: mt7530: simplify link operations +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The "MT7621 Giga Switch Programming Guide v0.3", "MT7531 Reference Manual +for Development Board v1.0", and "MT7988A Wi-Fi 7 Generation Router +Platform: Datasheet (Open Version) v0.1" documents show that these bits are +enabled at reset: + +PMCR_IFG_XMIT(1) (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_MAC_MODE (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_TX_EN +PMCR_RX_EN +PMCR_BACKOFF_EN (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_BACKPR_EN (not part of PMCR_LINK_SETTINGS_MASK) +PMCR_TX_FC_EN +PMCR_RX_FC_EN + +These bits also don't exist on the MT7530_PMCR_P(6) register of the switch +on the MT7988 SoC: + +PMCR_IFG_XMIT() +PMCR_MAC_MODE +PMCR_BACKOFF_EN +PMCR_BACKPR_EN + +Remove the setting of the bits not part of PMCR_LINK_SETTINGS_MASK on +phylink_mac_config as they're already set. + +The bit for setting the port on force mode is already done on +mt7530_setup() and mt7531_setup_common(). So get rid of +PMCR_FORCE_MODE_ID() which helped determine which bit to use for the switch +model. + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 12 +----------- + drivers/net/dsa/mt7530.h | 2 -- + 2 files changed, 1 insertion(+), 13 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2703,23 +2703,13 @@ mt753x_phylink_mac_config(struct dsa_swi + const struct phylink_link_state *state) + { + struct mt7530_priv *priv = ds->priv; +- u32 mcr_cur, mcr_new; + + if ((port == 5 || port == 6) && priv->info->mac_port_config) + priv->info->mac_port_config(ds, port, mode, state->interface); + +- mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); +- mcr_new = mcr_cur; +- mcr_new &= ~PMCR_LINK_SETTINGS_MASK; +- mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN | +- PMCR_BACKPR_EN | PMCR_FORCE_MODE_ID(priv->id); +- + /* Are we connected to external phy */ + if (port == 5 && dsa_is_user_port(ds, 5)) +- mcr_new |= PMCR_EXT_PHY; +- +- if (mcr_new != mcr_cur) +- mt7530_write(priv, MT7530_PMCR_P(port), mcr_new); ++ mt7530_set(priv, MT7530_PMCR_P(port), PMCR_EXT_PHY); + } + + static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port, +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -324,8 +324,6 @@ enum mt7530_vlan_port_acc_frm { + MT7531_FORCE_DPX | \ + MT7531_FORCE_RX_FC | \ + MT7531_FORCE_TX_FC) +-#define PMCR_FORCE_MODE_ID(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ +- MT7531_FORCE_MODE : PMCR_FORCE_MODE) + #define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \ + PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \ + PMCR_TX_FC_EN | PMCR_RX_FC_EN | \ diff --git a/target/linux/generic/backport-6.6/790-28-v6.9-net-dsa-mt7530-disable-LEDs-before-reset.patch b/target/linux/generic/backport-6.6/790-28-v6.9-net-dsa-mt7530-disable-LEDs-before-reset.patch new file mode 100644 index 00000000000000..19a04a7164148a --- /dev/null +++ b/target/linux/generic/backport-6.6/790-28-v6.9-net-dsa-mt7530-disable-LEDs-before-reset.patch @@ -0,0 +1,94 @@ +From de16cf680331cd0bd7db97c3f8d376f5eac39cae Mon Sep 17 00:00:00 2001 +From: Justin Swartz +Date: Tue, 5 Mar 2024 06:39:51 +0200 +Subject: [PATCH 28/30] net: dsa: mt7530: disable LEDs before reset + +Disable LEDs just before resetting the MT7530 to avoid +situations where the ESW_P4_LED_0 and ESW_P3_LED_0 pin +states may cause an unintended external crystal frequency +to be selected. + +The HT_XTAL_FSEL (External Crystal Frequency Selection) +field of HWTRAP (the Hardware Trap register) stores a +2-bit value that represents the state of the ESW_P4_LED_0 +and ESW_P4_LED_0 pins (seemingly) sampled just after the +MT7530 has been reset, as: + + ESW_P4_LED_0 ESW_P3_LED_0 Frequency + ----------------------------------------- + 0 1 20MHz + 1 0 40MHz + 1 1 25MHz + +The value of HT_XTAL_FSEL is bootstrapped by pulling +ESW_P4_LED_0 and ESW_P3_LED_0 up or down accordingly, +but: + + if a 40MHz crystal has been selected and + the ESW_P3_LED_0 pin is high during reset, + + or a 20MHz crystal has been selected and + the ESW_P4_LED_0 pin is high during reset, + + then the value of HT_XTAL_FSEL will indicate + that a 25MHz crystal is present. + +By default, the state of the LED pins is PHY controlled +to reflect the link state. + +To illustrate, if a board has: + + 5 ports with active low LED control, + and HT_XTAL_FSEL bootstrapped for 40MHz. + +When the MT7530 is powered up without any external +connection, only the LED associated with Port 3 is +illuminated as ESW_P3_LED_0 is low. + +In this state, directly after mt7530_setup()'s reset +is performed, the HWTRAP register (0x7800) reflects +the intended HT_XTAL_FSEL (HWTRAP bits 10:9) of 40MHz: + + mt7530-mdio mdio-bus:1f: mt7530_read: 00007800 == 00007dcf + + >>> bin(0x7dcf >> 9 & 0b11) + '0b10' + +But if a cable is connected to Port 3 and the link +is active before mt7530_setup()'s reset takes place, +then HT_XTAL_FSEL seems to be set for 25MHz: + + mt7530-mdio mdio-bus:1f: mt7530_read: 00007800 == 00007fcf + + >>> bin(0x7fcf >> 9 & 0b11) + '0b11' + +Once HT_XTAL_FSEL reflects 25MHz, none of the ports +are functional until the MT7621 (or MT7530 itself) +is reset. + +By disabling the LED pins just before reset, the chance +of an unintended HT_XTAL_FSEL value is reduced. + +Signed-off-by: Justin Swartz +Link: https://lore.kernel.org/r/20240305043952.21590-1-justin.swartz@risingedge.co.za +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/mt7530.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2228,6 +2228,12 @@ mt7530_setup(struct dsa_switch *ds) + } + } + ++ /* Disable LEDs before reset to prevent the MT7530 sampling a ++ * potentially incorrect HT_XTAL_FSEL value. ++ */ ++ mt7530_write(priv, MT7530_LED_EN, 0); ++ usleep_range(1000, 1100); ++ + /* Reset whole chip through gpio pin or memory-mapped registers for + * different type of hardware + */ diff --git a/target/linux/generic/backport-6.6/790-29-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch b/target/linux/generic/backport-6.6/790-29-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch new file mode 100644 index 00000000000000..57a775da395cd4 --- /dev/null +++ b/target/linux/generic/backport-6.6/790-29-v6.9-net-dsa-mt7530-fix-improper-frames-on-all-25MHz-and-.patch @@ -0,0 +1,74 @@ +From fa14c96eab3ec5b7cb44b06c0a54a851849a9810 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Wed, 20 Mar 2024 23:45:30 +0300 +Subject: [PATCH 29/30] net: dsa: mt7530: fix improper frames on all 25MHz and + 40MHz XTAL MT7530 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The MT7530 switch after reset initialises with a core clock frequency that +works with a 25MHz XTAL connected to it. For 40MHz XTAL, the core clock +frequency must be set to 500MHz. + +The mt7530_pll_setup() function is responsible of setting the core clock +frequency. Currently, it runs on MT7530 with 25MHz and 40MHz XTAL. This +causes MT7530 switch with 25MHz XTAL to egress and ingress frames +improperly. + +Introduce a check to run it only on MT7530 with 40MHz XTAL. + +The core clock frequency is set by writing to a switch PHY's register. +Access to the PHY's register is done via the MDIO bus the switch is also +on. Therefore, it works only when the switch makes switch PHYs listen on +the MDIO bus the switch is on. This is controlled either by the state of +the ESW_P1_LED_1 pin after reset deassertion or modifying bit 5 of the +modifiable trap register. + +When ESW_P1_LED_1 is pulled high, PHY indirect access is used. That means +accessing PHY registers via the PHY indirect access control register of the +switch. + +When ESW_P1_LED_1 is pulled low, PHY direct access is used. That means +accessing PHY registers via the MDIO bus the switch is on. + +For MT7530 switch with 40MHz XTAL on a board with ESW_P1_LED_1 pulled high, +the core clock frequency won't be set to 500MHz, causing the switch to +egress and ingress frames improperly. + +Run mt7530_pll_setup() after PHY direct access is set on the modifiable +trap register. + +With these two changes, all MT7530 switches with 25MHz and 40MHz, and +P1_LED_1 pulled high or low, will egress and ingress frames properly. + +Link: https://github.com/BPI-SINOVOIP/BPI-R2-bsp/blob/4a5dd143f2172ec97a2872fa29c7c4cd520f45b5/linux-mt/drivers/net/ethernet/mediatek/gsw_mt7623.c#L1039 +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Signed-off-by: Arınç ÜNAL +Link: https://lore.kernel.org/r/20240320-for-net-mt7530-fix-25mhz-xtal-with-direct-phy-access-v1-1-d92f605f1160@arinc9.com +Signed-off-by: Paolo Abeni +--- + drivers/net/dsa/mt7530.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2274,8 +2274,6 @@ mt7530_setup(struct dsa_switch *ds) + SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | + SYS_CTRL_REG_RST); + +- mt7530_pll_setup(priv); +- + /* Lower Tx driving for TRGMII path */ + for (i = 0; i < NUM_TRGMII_CTRL; i++) + mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), +@@ -2291,6 +2289,9 @@ mt7530_setup(struct dsa_switch *ds) + val |= MHWTRAP_MANUAL; + mt7530_write(priv, MT7530_MHWTRAP, val); + ++ if ((val & HWTRAP_XTAL_MASK) == HWTRAP_XTAL_40MHZ) ++ mt7530_pll_setup(priv); ++ + mt753x_trap_frames(priv); + + /* Enable and reset MIB counters */ diff --git a/target/linux/generic/backport-6.6/790-30-v6.9-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch b/target/linux/generic/backport-6.6/790-30-v6.9-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch new file mode 100644 index 00000000000000..f1c4db49dcd5da --- /dev/null +++ b/target/linux/generic/backport-6.6/790-30-v6.9-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch @@ -0,0 +1,154 @@ +From b9547109205c5e0a27e5bed568b0fc183fff906b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Thu, 14 Mar 2024 12:28:35 +0300 +Subject: [PATCH 30/30] net: dsa: mt7530: prevent possible incorrect XTAL + frequency selection +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +On MT7530, the HT_XTAL_FSEL field of the HWTRAP register stores a 2-bit +value that represents the frequency of the crystal oscillator connected to +the switch IC. The field is populated by the state of the ESW_P4_LED_0 and +ESW_P4_LED_0 pins, which is done right after reset is deasserted. + + ESW_P4_LED_0 ESW_P3_LED_0 Frequency + ----------------------------------------- + 0 0 Reserved + 0 1 20MHz + 1 0 40MHz + 1 1 25MHz + +On MT7531, the XTAL25 bit of the STRAP register stores this. The LAN0LED0 +pin is used to populate the bit. 25MHz when the pin is high, 40MHz when +it's low. + +These pins are also used with LEDs, therefore, their state can be set to +something other than the bootstrapping configuration. For example, a link +may be established on port 3 before the DSA subdriver takes control of the +switch which would set ESW_P3_LED_0 to high. + +Currently on mt7530_setup() and mt7531_setup(), 1000 - 1100 usec delay is +described between reset assertion and deassertion. Some switch ICs in real +life conditions cannot always have these pins set back to the bootstrapping +configuration before reset deassertion in this amount of delay. This causes +wrong crystal frequency to be selected which puts the switch in a +nonfunctional state after reset deassertion. + +The tests below are conducted on an MT7530 with a 40MHz crystal oscillator +by Justin Swartz. + +With a cable from an active peer connected to port 3 before reset, an +incorrect crystal frequency (0b11 = 25MHz) is selected: + + [1] [3] [5] + : : : + _____________________________ __________________ +ESW_P4_LED_0 |_______| + _____________________________ +ESW_P3_LED_0 |__________________________ + + : : : : + : : [4]...: + : : + [2]................: + +[1] Reset is asserted. +[2] Period of 1000 - 1100 usec. +[3] Reset is deasserted. +[4] Period of 315 usec. HWTRAP register is populated with incorrect + XTAL frequency. +[5] Signals reflect the bootstrapped configuration. + +Increase the delay between reset_control_assert() and +reset_control_deassert(), and gpiod_set_value_cansleep(priv->reset, 0) and +gpiod_set_value_cansleep(priv->reset, 1) to 5000 - 5100 usec. This amount +ensures a higher possibility that the switch IC will have these pins back +to the bootstrapping configuration before reset deassertion. + +With a cable from an active peer connected to port 3 before reset, the +correct crystal frequency (0b10 = 40MHz) is selected: + + [1] [2-1] [3] [5] + : : : : + _____________________________ __________________ +ESW_P4_LED_0 |_______| + ___________________ _______ +ESW_P3_LED_0 |_________| |__________________ + + : : : : : + : [2-2]...: [4]...: + [2]................: + +[1] Reset is asserted. +[2] Period of 5000 - 5100 usec. +[2-1] ESW_P3_LED_0 goes low. +[2-2] Remaining period of 5000 - 5100 usec. +[3] Reset is deasserted. +[4] Period of 310 usec. HWTRAP register is populated with bootstrapped + XTAL frequency. +[5] Signals reflect the bootstrapped configuration. + +ESW_P3_LED_0 low period before reset deassertion: + + 5000 usec + - 5100 usec + TEST RESET HOLD + # (usec) + --------------------- + 1 5410 + 2 5440 + 3 4375 + 4 5490 + 5 5475 + 6 4335 + 7 4370 + 8 5435 + 9 4205 + 10 4335 + 11 3750 + 12 3170 + 13 4395 + 14 4375 + 15 3515 + 16 4335 + 17 4220 + 18 4175 + 19 4175 + 20 4350 + + Min 3170 + Max 5490 + + Median 4342.500 + Avg 4466.500 + +Revert commit 2920dd92b980 ("net: dsa: mt7530: disable LEDs before reset"). +Changing the state of pins via reset assertion is simpler and more +efficient than doing so by setting the LED controller off. + +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") +Co-developed-by: Justin Swartz +Signed-off-by: Justin Swartz +Signed-off-by: Arınç ÜNAL +Signed-off-by: David S. Miller +--- + drivers/net/dsa/mt7530.c | 6 ------ + 1 file changed, 6 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2228,12 +2228,6 @@ mt7530_setup(struct dsa_switch *ds) + } + } + +- /* Disable LEDs before reset to prevent the MT7530 sampling a +- * potentially incorrect HT_XTAL_FSEL value. +- */ +- mt7530_write(priv, MT7530_LED_EN, 0); +- usleep_range(1000, 1100); +- + /* Reset whole chip through gpio pin or memory-mapped registers for + * different type of hardware + */ diff --git a/target/linux/generic/pending-6.6/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch b/target/linux/generic/pending-6.6/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch deleted file mode 100644 index 8028dc826f6fb9..00000000000000 --- a/target/linux/generic/pending-6.6/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 3fb8841513c4ec3a2e5d366df86230c45f239a57 Mon Sep 17 00:00:00 2001 -From: Alexander Couzens -Date: Sat, 13 Aug 2022 13:08:22 +0200 -Subject: [PATCH 03/10] net: mt7531: ensure all MACs are powered down before - reset - -The datasheet [1] explicit describes it as requirement for a reset. - -[1] MT7531 Reference Manual for Development Board rev 1.0, page 735 - -Signed-off-by: Alexander Couzens ---- - drivers/net/dsa/mt7530.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2304,6 +2304,10 @@ mt7530_setup(struct dsa_switch *ds) - return -ENODEV; - } - -+ /* all MACs must be forced link-down before sw reset */ -+ for (i = 0; i < MT7530_NUM_PORTS; i++) -+ mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); -+ - /* Reset the switch through internal reset */ - mt7530_write(priv, MT7530_SYS_CTRL, - SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | diff --git a/target/linux/generic/pending-6.6/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch b/target/linux/generic/pending-6.6/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch deleted file mode 100644 index 4fa5c4ea96e71f..00000000000000 --- a/target/linux/generic/pending-6.6/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 1d81e51d6d79d9098013b2e8cdd677bae998c5d8 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 28 Apr 2023 02:22:59 +0200 -Subject: [PATCH 1/2] mt7530: register OF node for internal MDIO bus - -The MT753x switches provide a switch-internal MDIO bus for the embedded -PHYs. - -Register a OF sub-node on the switch OF-node for this internal MDIO bus. -This allows to configure the embedded PHYs using device-tree. - -Signed-off-by: David Bauer ---- - drivers/net/dsa/mt7530.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -2192,10 +2192,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr - { - struct dsa_switch *ds = priv->ds; - struct device *dev = priv->dev; -+ struct device_node *np, *mnp; - struct mii_bus *bus; - static int idx; - int ret; - -+ np = priv->dev->of_node; -+ - bus = devm_mdiobus_alloc(dev); - if (!bus) - return -ENOMEM; -@@ -2214,7 +2217,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr - if (priv->irq) - mt7530_setup_mdio_irq(priv); - -- ret = devm_mdiobus_register(dev, bus); -+ mnp = of_get_child_by_name(np, "mdio"); -+ ret = devm_of_mdiobus_register(dev, bus, mnp); -+ of_node_put(mnp); - if (ret) { - dev_err(dev, "failed to register MDIO bus: %d\n", ret); - if (priv->irq) From 98f9154316fe8371c709bd11ae8f263e22075ec6 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Wed, 10 Apr 2024 15:53:11 +0100 Subject: [PATCH 13/13] generic: 6.1, 6.6: import two pending patches for mt7530 DSA driver First patch allows to inquire and modify Energy-Efficient-Ethernet (EEE) settings via ethtool and thereby override the default setting of a board done via bootstrap pins. The second patch fixes a long-standing issue with STP (and similar protocols) when using boards (or SoCs) governed by the mt7530 DSA driver. Both patches could also be (dirty-)applied to Linux 5.15, but I'd rather just wait for that to happen via linux-stable to avoid the mess. Signed-off-by: Daniel Golle --- ...ix-enabling-EEE-on-MT7531-switch-on-.patch | 92 ++++ ...rap-link-local-frames-regardless-of-.patch | 483 ++++++++++++++++++ ...ix-enabling-EEE-on-MT7531-switch-on-.patch | 92 ++++ ...rap-link-local-frames-regardless-of-.patch | 483 ++++++++++++++++++ 4 files changed, 1150 insertions(+) create mode 100644 target/linux/generic/pending-6.1/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch create mode 100644 target/linux/generic/pending-6.1/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch create mode 100644 target/linux/generic/pending-6.6/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch create mode 100644 target/linux/generic/pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch diff --git a/target/linux/generic/pending-6.1/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch b/target/linux/generic/pending-6.1/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch new file mode 100644 index 00000000000000..dc202a55e69df4 --- /dev/null +++ b/target/linux/generic/pending-6.1/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch @@ -0,0 +1,92 @@ +From ef972fc9f5743da589ce9546dd565d6c56e679b8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 8 Apr 2024 10:08:53 +0300 +Subject: [PATCH 1/2] net: dsa: mt7530: fix enabling EEE on MT7531 switch on + all boards +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") +brought EEE support but did not enable EEE on MT7531 switch MACs. EEE is +enabled on MT7531 switch MACs by pulling the LAN2LED0 pin low on the board +(bootstrapping), unsetting the EEE_DIS bit on the trap register, or setting +the internal EEE switch bit on the CORE_PLL_GROUP4 register. Thanks to +SkyLake Huang (黃啟澤) from MediaTek for providing information on the +internal EEE switch bit. + +There are existing boards that were not designed to pull the pin low. +Because of that, the EEE status currently depends on the board design. + +The EEE_DIS bit on the trap pertains to the LAN2LED0 pin which is usually +used to control an LED. Once the bit is unset, the pin will be low. That +will make the active low LED turn on. The pin is controlled by the switch +PHY. It seems that the PHY controls the pin in the way that it inverts the +pin state. That means depending on the wiring of the LED connected to +LAN2LED0 on the board, the LED may be on without an active link. + +To not cause this unwanted behaviour whilst enabling EEE on all boards, set +the internal EEE switch bit on the CORE_PLL_GROUP4 register. + +My testing on MT7531 shows a certain amount of traffic loss when EEE is +enabled. That said, I haven't come across a board that enables EEE. So +enable EEE on the switch MACs but disable EEE advertisement on the switch +PHYs. This way, we don't change the behaviour of the majority of the boards +that have this switch. The mediatek-ge PHY driver already disables EEE +advertisement on the switch PHYs but my testing shows that it is somehow +enabled afterwards. Disabling EEE advertisement before the PHY driver +initialises keeps it off. + +With this change, EEE can now be enabled using ethtool. + +Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") +Reviewed-by: Florian Fainelli +Signed-off-by: Arınç ÜNAL +--- + drivers/net/dsa/mt7530.c | 17 ++++++++++++----- + drivers/net/dsa/mt7530.h | 1 + + 2 files changed, 13 insertions(+), 5 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2496,18 +2496,25 @@ mt7531_setup(struct dsa_switch *ds) + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); + +- /* Enable PHY core PLL, since phy_device has not yet been created +- * provided for phy_[read,write]_mmd_indirect is called, we provide +- * our own mt7531_ind_mmd_phy_[read,write] to complete this +- * function. ++ /* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since ++ * phy_device has not yet been created provided for ++ * phy_[read,write]_mmd_indirect is called, we provide our own ++ * mt7531_ind_mmd_phy_[read,write] to complete this function. + */ + val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR, + MDIO_MMD_VEND2, CORE_PLL_GROUP4); +- val |= MT7531_PHY_PLL_BYPASS_MODE; ++ val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE; + val &= ~MT7531_PHY_PLL_OFF; + mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2, + CORE_PLL_GROUP4, val); + ++ /* Disable EEE advertisement on the switch PHYs. */ ++ for (i = MT753X_CTRL_PHY_ADDR; ++ i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) { ++ mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV, ++ 0); ++ } ++ + mt7531_setup_common(ds); + + /* Setup VLAN ID 0 for VLAN-unaware bridges */ +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -616,6 +616,7 @@ enum mt7531_clk_skew { + #define RG_SYSPLL_DDSFBK_EN BIT(12) + #define RG_SYSPLL_BIAS_EN BIT(11) + #define RG_SYSPLL_BIAS_LPF_EN BIT(10) ++#define MT7531_RG_SYSPLL_DMY2 BIT(6) + #define MT7531_PHY_PLL_OFF BIT(5) + #define MT7531_PHY_PLL_BYPASS_MODE BIT(4) + diff --git a/target/linux/generic/pending-6.1/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch b/target/linux/generic/pending-6.1/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch new file mode 100644 index 00000000000000..4d70e774a4d510 --- /dev/null +++ b/target/linux/generic/pending-6.1/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch @@ -0,0 +1,483 @@ +From b7427d66cb3d6dca5165de5f7d80d59f08c2795b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 9 Apr 2024 18:01:14 +0300 +Subject: [PATCH 2/2] net: dsa: mt7530: trap link-local frames regardless of ST + Port State +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer +(DLL) of the Open Systems Interconnection basic reference model (OSI/RM) +are described; the medium access control (MAC) and logical link control +(LLC) sublayers. The MAC sublayer is the one facing the physical layer. + +In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A +Bridge component comprises a MAC Relay Entity for interconnecting the Ports +of the Bridge, at least two Ports, and higher layer entities with at least +a Spanning Tree Protocol Entity included. + +Each Bridge Port also functions as an end station and shall provide the MAC +Service to an LLC Entity. Each instance of the MAC Service is provided to a +distinct LLC Entity that supports protocol identification, multiplexing, +and demultiplexing, for protocol data unit (PDU) transmission and reception +by one or more higher layer entities. + +It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC +Entity associated with each Bridge Port is modeled as being directly +connected to the attached Local Area Network (LAN). + +On the switch with CPU port architecture, CPU port functions as Management +Port, and the Management Port functionality is provided by software which +functions as an end station. Software is connected to an IEEE 802 LAN that +is wholly contained within the system that incorporates the Bridge. +Software provides access to the LLC Entity associated with each Bridge Port +by the value of the source port field on the special tag on the frame +received by software. + +We call frames that carry control information to determine the active +topology and current extent of each Virtual Local Area Network (VLAN), +i.e., spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN +Registration Protocol Data Units (MVRPDUs), and frames from other link +constrained protocols, such as Extensible Authentication Protocol over LAN +(EAPOL) and Link Layer Discovery Protocol (LLDP), link-local frames. They +are not forwarded by a Bridge. Permanently configured entries in the +filtering database (FDB) ensure that such frames are discarded by the +Forwarding Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in +detail: + +Each of the reserved MAC addresses specified in Table 8-1 +(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be +permanently configured in the FDB in C-VLAN components and ERs. + +Each of the reserved MAC addresses specified in Table 8-2 +(01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently +configured in the FDB in S-VLAN components. + +Each of the reserved MAC addresses specified in Table 8-3 +(01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB +in TPMR components. + +The FDB entries for reserved MAC addresses shall specify filtering for all +Bridge Ports and all VIDs. Management shall not provide the capability to +modify or remove entries for reserved MAC addresses. + +The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of +propagation of PDUs within a Bridged Network, as follows: + + The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that + no conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN) + component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward. + PDUs transmitted using this destination address, or any other addresses + that appear in Table 8-1, Table 8-2, and Table 8-3 + (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can + therefore travel no further than those stations that can be reached via a + single individual LAN from the originating station. + + The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an + address that no conformant S-VLAN component, C-VLAN component, or MAC + Bridge can forward; however, this address is relayed by a TPMR component. + PDUs using this destination address, or any of the other addresses that + appear in both Table 8-1 and Table 8-2 but not in Table 8-3 + (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed + by any TPMRs but will propagate no further than the nearest S-VLAN + component, C-VLAN component, or MAC Bridge. + + The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an + address that no conformant C-VLAN component, MAC Bridge can forward; + however, it is relayed by TPMR components and S-VLAN components. PDUs + using this destination address, or any of the other addresses that appear + in Table 8-1 but not in either Table 8-2 or Table 8-3 + (01-80-C2-00-00-[00,0B,0C,0D,0F]), will be relayed by TPMR components and + S-VLAN components but will propagate no further than the nearest C-VLAN + component or MAC Bridge. + +Because the LLC Entity associated with each Bridge Port is provided via CPU +port, we must not filter these frames but forward them to CPU port. + +In a Bridge, the transmission Port is majorly decided by ingress and egress +rules, FDB, and spanning tree Port State functions of the Forwarding +Process. For link-local frames, only CPU port should be designated as +destination port in the FDB, and the other functions of the Forwarding +Process must not interfere with the decision of the transmission Port. We +call this process trapping frames to CPU port. + +Therefore, on the switch with CPU port architecture, link-local frames must +be trapped to CPU port, and certain link-local frames received by a Port of +a Bridge comprising a TPMR component or an S-VLAN component must be +excluded from it. + +A Bridge of the switch with CPU port architecture cannot comprise a +Two-Port MAC Relay (TPMR) component as a TPMR component supports only a +subset of the functionality of a MAC Bridge. A Bridge comprising two Ports +(Management Port doesn't count) of this architecture will either function +as a standard MAC Bridge or a standard VLAN Bridge. + +Therefore, a Bridge of this architecture can only comprise S-VLAN +components, C-VLAN components, or MAC Bridge components. Since there's no +TPMR component, we don't need to relay PDUs using the destination addresses +specified on the Nearest non-TPMR section, and the proportion of the +Nearest Customer Bridge section where they must be relayed by TPMR +components. + +One option to trap link-local frames to CPU port is to add static FDB +entries with CPU port designated as destination port. However, because that +Independent VLAN Learning (IVL) is being used on every VID, each entry only +applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC +Bridge component or a C-VLAN component, there would have to be 16 times +4096 entries. This switch intellectual property can only hold a maximum of +2048 entries. Using this option, there also isn't a mechanism to prevent +link-local frames from being discarded when the spanning tree Port State of +the reception Port is discarding. + +The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4 +registers. Whilst this applies to every VID, it doesn't contain all of the +reserved MAC addresses without affecting the remaining Standard Group MAC +Addresses. The REV_UN frame tag utilised using the RGAC4 register covers +the remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination +addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF +destination addresses which may be relayed by MAC Bridges or VLAN Bridges. +The latter option provides better but not complete conformance. + +This switch intellectual property also does not provide a mechanism to trap +link-local frames with specific destination addresses to CPU port by +Bridge, to conform to the filtering rules for the distinct Bridge +components. + +Therefore, regardless of the type of the Bridge component, link-local +frames with these destination addresses will be trapped to CPU port: + +01-80-C2-00-00-[00,01,02,03,0E] + +In a Bridge comprising a MAC Bridge component or a C-VLAN component: + + Link-local frames with these destination addresses won't be trapped to + CPU port which won't conform to IEEE Std 802.1Q-2022: + + 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] + +In a Bridge comprising an S-VLAN component: + + Link-local frames with these destination addresses will be trapped to CPU + port which won't conform to IEEE Std 802.1Q-2022: + + 01-80-C2-00-00-00 + + Link-local frames with these destination addresses won't be trapped to + CPU port which won't conform to IEEE Std 802.1Q-2022: + + 01-80-C2-00-00-[04,05,06,07,08,09,0A] + +Currently on this switch intellectual property, if the spanning tree Port +State of the reception Port is discarding, link-local frames will be +discarded. + +To trap link-local frames regardless of the spanning tree Port State, make +the switch regard them as Bridge Protocol Data Units (BPDUs). This switch +intellectual property only lets the frames regarded as BPDUs bypass the +spanning tree Port State function of the Forwarding Process. + +With this change, the only remaining interference is the ingress rules. +When the reception Port has no PVID assigned on software, VLAN-untagged +frames won't be allowed in. There doesn't seem to be a mechanism on the +switch intellectual property to have link-local frames bypass this function +of the Forwarding Process. + +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Reviewed-by: Daniel Golle +Signed-off-by: Arınç ÜNAL +--- + drivers/net/dsa/mt7530.c | 229 +++++++++++++++++++++++++++++++++------ + drivers/net/dsa/mt7530.h | 5 + + 2 files changed, 200 insertions(+), 34 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -943,20 +943,173 @@ static void mt7530_setup_port5(struct ds + mutex_unlock(&priv->reg_mutex); + } + +-/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std +- * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA +- * must only be propagated to C-VLAN and MAC Bridge components. That means +- * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports, +- * these frames are supposed to be processed by the CPU (software). So we make +- * the switch only forward them to the CPU port. And if received from a CPU +- * port, forward to a single port. The software is responsible of making the +- * switch conform to the latter by setting a single port as destination port on +- * the special tag. +- * +- * This switch intellectual property cannot conform to this part of the standard +- * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC +- * DAs, it also includes :22-FF which the scope of propagation is not supposed +- * to be restricted for these MAC DAs. ++/* In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer (DLL) ++ * of the Open Systems Interconnection basic reference model (OSI/RM) are ++ * described; the medium access control (MAC) and logical link control (LLC) ++ * sublayers. The MAC sublayer is the one facing the physical layer. ++ * ++ * In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A ++ * Bridge component comprises a MAC Relay Entity for interconnecting the Ports ++ * of the Bridge, at least two Ports, and higher layer entities with at least a ++ * Spanning Tree Protocol Entity included. ++ * ++ * Each Bridge Port also functions as an end station and shall provide the MAC ++ * Service to an LLC Entity. Each instance of the MAC Service is provided to a ++ * distinct LLC Entity that supports protocol identification, multiplexing, and ++ * demultiplexing, for protocol data unit (PDU) transmission and reception by ++ * one or more higher layer entities. ++ * ++ * It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC ++ * Entity associated with each Bridge Port is modeled as being directly ++ * connected to the attached Local Area Network (LAN). ++ * ++ * On the switch with CPU port architecture, CPU port functions as Management ++ * Port, and the Management Port functionality is provided by software which ++ * functions as an end station. Software is connected to an IEEE 802 LAN that is ++ * wholly contained within the system that incorporates the Bridge. Software ++ * provides access to the LLC Entity associated with each Bridge Port by the ++ * value of the source port field on the special tag on the frame received by ++ * software. ++ * ++ * We call frames that carry control information to determine the active ++ * topology and current extent of each Virtual Local Area Network (VLAN), i.e., ++ * spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN Registration ++ * Protocol Data Units (MVRPDUs), and frames from other link constrained ++ * protocols, such as Extensible Authentication Protocol over LAN (EAPOL) and ++ * Link Layer Discovery Protocol (LLDP), link-local frames. They are not ++ * forwarded by a Bridge. Permanently configured entries in the filtering ++ * database (FDB) ensure that such frames are discarded by the Forwarding ++ * Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in detail: ++ * ++ * Each of the reserved MAC addresses specified in Table 8-1 ++ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be ++ * permanently configured in the FDB in C-VLAN components and ERs. ++ * ++ * Each of the reserved MAC addresses specified in Table 8-2 ++ * (01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently ++ * configured in the FDB in S-VLAN components. ++ * ++ * Each of the reserved MAC addresses specified in Table 8-3 ++ * (01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB in ++ * TPMR components. ++ * ++ * The FDB entries for reserved MAC addresses shall specify filtering for all ++ * Bridge Ports and all VIDs. Management shall not provide the capability to ++ * modify or remove entries for reserved MAC addresses. ++ * ++ * The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of ++ * propagation of PDUs within a Bridged Network, as follows: ++ * ++ * The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that no ++ * conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN) ++ * component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward. ++ * PDUs transmitted using this destination address, or any other addresses ++ * that appear in Table 8-1, Table 8-2, and Table 8-3 ++ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can ++ * therefore travel no further than those stations that can be reached via a ++ * single individual LAN from the originating station. ++ * ++ * The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an ++ * address that no conformant S-VLAN component, C-VLAN component, or MAC ++ * Bridge can forward; however, this address is relayed by a TPMR component. ++ * PDUs using this destination address, or any of the other addresses that ++ * appear in both Table 8-1 and Table 8-2 but not in Table 8-3 ++ * (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed by ++ * any TPMRs but will propagate no further than the nearest S-VLAN component, ++ * C-VLAN component, or MAC Bridge. ++ * ++ * The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an address ++ * that no conformant C-VLAN component, MAC Bridge can forward; however, it is ++ * relayed by TPMR components and S-VLAN components. PDUs using this ++ * destination address, or any of the other addresses that appear in Table 8-1 ++ * but not in either Table 8-2 or Table 8-3 (01-80-C2-00-00-[00,0B,0C,0D,0F]), ++ * will be relayed by TPMR components and S-VLAN components but will propagate ++ * no further than the nearest C-VLAN component or MAC Bridge. ++ * ++ * Because the LLC Entity associated with each Bridge Port is provided via CPU ++ * port, we must not filter these frames but forward them to CPU port. ++ * ++ * In a Bridge, the transmission Port is majorly decided by ingress and egress ++ * rules, FDB, and spanning tree Port State functions of the Forwarding Process. ++ * For link-local frames, only CPU port should be designated as destination port ++ * in the FDB, and the other functions of the Forwarding Process must not ++ * interfere with the decision of the transmission Port. We call this process ++ * trapping frames to CPU port. ++ * ++ * Therefore, on the switch with CPU port architecture, link-local frames must ++ * be trapped to CPU port, and certain link-local frames received by a Port of a ++ * Bridge comprising a TPMR component or an S-VLAN component must be excluded ++ * from it. ++ * ++ * A Bridge of the switch with CPU port architecture cannot comprise a Two-Port ++ * MAC Relay (TPMR) component as a TPMR component supports only a subset of the ++ * functionality of a MAC Bridge. A Bridge comprising two Ports (Management Port ++ * doesn't count) of this architecture will either function as a standard MAC ++ * Bridge or a standard VLAN Bridge. ++ * ++ * Therefore, a Bridge of this architecture can only comprise S-VLAN components, ++ * C-VLAN components, or MAC Bridge components. Since there's no TPMR component, ++ * we don't need to relay PDUs using the destination addresses specified on the ++ * Nearest non-TPMR section, and the proportion of the Nearest Customer Bridge ++ * section where they must be relayed by TPMR components. ++ * ++ * One option to trap link-local frames to CPU port is to add static FDB entries ++ * with CPU port designated as destination port. However, because that ++ * Independent VLAN Learning (IVL) is being used on every VID, each entry only ++ * applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC ++ * Bridge component or a C-VLAN component, there would have to be 16 times 4096 ++ * entries. This switch intellectual property can only hold a maximum of 2048 ++ * entries. Using this option, there also isn't a mechanism to prevent ++ * link-local frames from being discarded when the spanning tree Port State of ++ * the reception Port is discarding. ++ * ++ * The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4 ++ * registers. Whilst this applies to every VID, it doesn't contain all of the ++ * reserved MAC addresses without affecting the remaining Standard Group MAC ++ * Addresses. The REV_UN frame tag utilised using the RGAC4 register covers the ++ * remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination ++ * addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF ++ * destination addresses which may be relayed by MAC Bridges or VLAN Bridges. ++ * The latter option provides better but not complete conformance. ++ * ++ * This switch intellectual property also does not provide a mechanism to trap ++ * link-local frames with specific destination addresses to CPU port by Bridge, ++ * to conform to the filtering rules for the distinct Bridge components. ++ * ++ * Therefore, regardless of the type of the Bridge component, link-local frames ++ * with these destination addresses will be trapped to CPU port: ++ * ++ * 01-80-C2-00-00-[00,01,02,03,0E] ++ * ++ * In a Bridge comprising a MAC Bridge component or a C-VLAN component: ++ * ++ * Link-local frames with these destination addresses won't be trapped to CPU ++ * port which won't conform to IEEE Std 802.1Q-2022: ++ * ++ * 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] ++ * ++ * In a Bridge comprising an S-VLAN component: ++ * ++ * Link-local frames with these destination addresses will be trapped to CPU ++ * port which won't conform to IEEE Std 802.1Q-2022: ++ * ++ * 01-80-C2-00-00-00 ++ * ++ * Link-local frames with these destination addresses won't be trapped to CPU ++ * port which won't conform to IEEE Std 802.1Q-2022: ++ * ++ * 01-80-C2-00-00-[04,05,06,07,08,09,0A] ++ * ++ * To trap link-local frames to CPU port as conformant as this switch ++ * intellectual property can allow, link-local frames are made to be regarded as ++ * Bridge Protocol Data Units (BPDUs). This is because this switch intellectual ++ * property only lets the frames regarded as BPDUs bypass the spanning tree Port ++ * State function of the Forwarding Process. ++ * ++ * The only remaining interference is the ingress rules. When the reception Port ++ * has no PVID assigned on software, VLAN-untagged frames won't be allowed in. ++ * There doesn't seem to be a mechanism on the switch intellectual property to ++ * have link-local frames bypass this function of the Forwarding Process. + */ + static void + mt753x_trap_frames(struct mt7530_priv *priv) +@@ -964,35 +1117,43 @@ mt753x_trap_frames(struct mt7530_priv *p + /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them + * VLAN-untagged. + */ +- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK | +- MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | +- MT753X_BPDU_PORT_FW_MASK, +- MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ mt7530_rmw(priv, MT753X_BPC, ++ MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK | ++ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | ++ MT753X_BPDU_PORT_FW_MASK, ++ MT753X_PAE_BPDU_FR | ++ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + + /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress + * them VLAN-untagged. + */ +- mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK | +- MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK | +- MT753X_R01_PORT_FW_MASK, +- MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ mt7530_rmw(priv, MT753X_RGAC1, ++ MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK | ++ MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR | ++ MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK, ++ MT753X_R02_BPDU_FR | ++ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_R01_BPDU_FR | ++ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + + /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress + * them VLAN-untagged. + */ +- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK | +- MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK | +- MT753X_R03_PORT_FW_MASK, +- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ mt7530_rmw(priv, MT753X_RGAC2, ++ MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK | ++ MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR | ++ MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK, ++ MT753X_R0E_BPDU_FR | ++ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_R03_BPDU_FR | ++ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + } + + static void +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -65,6 +65,7 @@ enum mt753x_id { + + /* Registers for BPDU and PAE frame control*/ + #define MT753X_BPC 0x24 ++#define MT753X_PAE_BPDU_FR BIT(25) + #define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x) + #define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16) +@@ -75,20 +76,24 @@ enum mt753x_id { + + /* Register for :01 and :02 MAC DA frame control */ + #define MT753X_RGAC1 0x28 ++#define MT753X_R02_BPDU_FR BIT(25) + #define MT753X_R02_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x) + #define MT753X_R02_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x) ++#define MT753X_R01_BPDU_FR BIT(9) + #define MT753X_R01_EG_TAG_MASK GENMASK(8, 6) + #define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x) + #define MT753X_R01_PORT_FW_MASK GENMASK(2, 0) + + /* Register for :03 and :0E MAC DA frame control */ + #define MT753X_RGAC2 0x2c ++#define MT753X_R0E_BPDU_FR BIT(25) + #define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x) + #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) ++#define MT753X_R03_BPDU_FR BIT(9) + #define MT753X_R03_EG_TAG_MASK GENMASK(8, 6) + #define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x) + #define MT753X_R03_PORT_FW_MASK GENMASK(2, 0) diff --git a/target/linux/generic/pending-6.6/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch b/target/linux/generic/pending-6.6/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch new file mode 100644 index 00000000000000..17f03b48a452f2 --- /dev/null +++ b/target/linux/generic/pending-6.6/795-net-dsa-mt7530-fix-enabling-EEE-on-MT7531-switch-on-.patch @@ -0,0 +1,92 @@ +From ef972fc9f5743da589ce9546dd565d6c56e679b8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Mon, 8 Apr 2024 10:08:53 +0300 +Subject: [PATCH 1/2] net: dsa: mt7530: fix enabling EEE on MT7531 switch on + all boards +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") +brought EEE support but did not enable EEE on MT7531 switch MACs. EEE is +enabled on MT7531 switch MACs by pulling the LAN2LED0 pin low on the board +(bootstrapping), unsetting the EEE_DIS bit on the trap register, or setting +the internal EEE switch bit on the CORE_PLL_GROUP4 register. Thanks to +SkyLake Huang (黃啟澤) from MediaTek for providing information on the +internal EEE switch bit. + +There are existing boards that were not designed to pull the pin low. +Because of that, the EEE status currently depends on the board design. + +The EEE_DIS bit on the trap pertains to the LAN2LED0 pin which is usually +used to control an LED. Once the bit is unset, the pin will be low. That +will make the active low LED turn on. The pin is controlled by the switch +PHY. It seems that the PHY controls the pin in the way that it inverts the +pin state. That means depending on the wiring of the LED connected to +LAN2LED0 on the board, the LED may be on without an active link. + +To not cause this unwanted behaviour whilst enabling EEE on all boards, set +the internal EEE switch bit on the CORE_PLL_GROUP4 register. + +My testing on MT7531 shows a certain amount of traffic loss when EEE is +enabled. That said, I haven't come across a board that enables EEE. So +enable EEE on the switch MACs but disable EEE advertisement on the switch +PHYs. This way, we don't change the behaviour of the majority of the boards +that have this switch. The mediatek-ge PHY driver already disables EEE +advertisement on the switch PHYs but my testing shows that it is somehow +enabled afterwards. Disabling EEE advertisement before the PHY driver +initialises keeps it off. + +With this change, EEE can now be enabled using ethtool. + +Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features") +Reviewed-by: Florian Fainelli +Signed-off-by: Arınç ÜNAL +--- + drivers/net/dsa/mt7530.c | 17 ++++++++++++----- + drivers/net/dsa/mt7530.h | 1 + + 2 files changed, 13 insertions(+), 5 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -2505,18 +2505,25 @@ mt7531_setup(struct dsa_switch *ds) + mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, + MT7531_GPIO0_INTERRUPT); + +- /* Enable PHY core PLL, since phy_device has not yet been created +- * provided for phy_[read,write]_mmd_indirect is called, we provide +- * our own mt7531_ind_mmd_phy_[read,write] to complete this +- * function. ++ /* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since ++ * phy_device has not yet been created provided for ++ * phy_[read,write]_mmd_indirect is called, we provide our own ++ * mt7531_ind_mmd_phy_[read,write] to complete this function. + */ + val = mt7531_ind_c45_phy_read(priv, MT753X_CTRL_PHY_ADDR, + MDIO_MMD_VEND2, CORE_PLL_GROUP4); +- val |= MT7531_PHY_PLL_BYPASS_MODE; ++ val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE; + val &= ~MT7531_PHY_PLL_OFF; + mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2, + CORE_PLL_GROUP4, val); + ++ /* Disable EEE advertisement on the switch PHYs. */ ++ for (i = MT753X_CTRL_PHY_ADDR; ++ i < MT753X_CTRL_PHY_ADDR + MT7530_NUM_PHYS; i++) { ++ mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV, ++ 0); ++ } ++ + mt7531_setup_common(ds); + + /* Setup VLAN ID 0 for VLAN-unaware bridges */ +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -616,6 +616,7 @@ enum mt7531_clk_skew { + #define RG_SYSPLL_DDSFBK_EN BIT(12) + #define RG_SYSPLL_BIAS_EN BIT(11) + #define RG_SYSPLL_BIAS_LPF_EN BIT(10) ++#define MT7531_RG_SYSPLL_DMY2 BIT(6) + #define MT7531_PHY_PLL_OFF BIT(5) + #define MT7531_PHY_PLL_BYPASS_MODE BIT(4) + diff --git a/target/linux/generic/pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch b/target/linux/generic/pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch new file mode 100644 index 00000000000000..d88060896b75f2 --- /dev/null +++ b/target/linux/generic/pending-6.6/796-net-dsa-mt7530-trap-link-local-frames-regardless-of-.patch @@ -0,0 +1,483 @@ +From b7427d66cb3d6dca5165de5f7d80d59f08c2795b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Tue, 9 Apr 2024 18:01:14 +0300 +Subject: [PATCH 2/2] net: dsa: mt7530: trap link-local frames regardless of ST + Port State +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer +(DLL) of the Open Systems Interconnection basic reference model (OSI/RM) +are described; the medium access control (MAC) and logical link control +(LLC) sublayers. The MAC sublayer is the one facing the physical layer. + +In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A +Bridge component comprises a MAC Relay Entity for interconnecting the Ports +of the Bridge, at least two Ports, and higher layer entities with at least +a Spanning Tree Protocol Entity included. + +Each Bridge Port also functions as an end station and shall provide the MAC +Service to an LLC Entity. Each instance of the MAC Service is provided to a +distinct LLC Entity that supports protocol identification, multiplexing, +and demultiplexing, for protocol data unit (PDU) transmission and reception +by one or more higher layer entities. + +It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC +Entity associated with each Bridge Port is modeled as being directly +connected to the attached Local Area Network (LAN). + +On the switch with CPU port architecture, CPU port functions as Management +Port, and the Management Port functionality is provided by software which +functions as an end station. Software is connected to an IEEE 802 LAN that +is wholly contained within the system that incorporates the Bridge. +Software provides access to the LLC Entity associated with each Bridge Port +by the value of the source port field on the special tag on the frame +received by software. + +We call frames that carry control information to determine the active +topology and current extent of each Virtual Local Area Network (VLAN), +i.e., spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN +Registration Protocol Data Units (MVRPDUs), and frames from other link +constrained protocols, such as Extensible Authentication Protocol over LAN +(EAPOL) and Link Layer Discovery Protocol (LLDP), link-local frames. They +are not forwarded by a Bridge. Permanently configured entries in the +filtering database (FDB) ensure that such frames are discarded by the +Forwarding Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in +detail: + +Each of the reserved MAC addresses specified in Table 8-1 +(01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be +permanently configured in the FDB in C-VLAN components and ERs. + +Each of the reserved MAC addresses specified in Table 8-2 +(01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently +configured in the FDB in S-VLAN components. + +Each of the reserved MAC addresses specified in Table 8-3 +(01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB +in TPMR components. + +The FDB entries for reserved MAC addresses shall specify filtering for all +Bridge Ports and all VIDs. Management shall not provide the capability to +modify or remove entries for reserved MAC addresses. + +The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of +propagation of PDUs within a Bridged Network, as follows: + + The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that + no conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN) + component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward. + PDUs transmitted using this destination address, or any other addresses + that appear in Table 8-1, Table 8-2, and Table 8-3 + (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can + therefore travel no further than those stations that can be reached via a + single individual LAN from the originating station. + + The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an + address that no conformant S-VLAN component, C-VLAN component, or MAC + Bridge can forward; however, this address is relayed by a TPMR component. + PDUs using this destination address, or any of the other addresses that + appear in both Table 8-1 and Table 8-2 but not in Table 8-3 + (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed + by any TPMRs but will propagate no further than the nearest S-VLAN + component, C-VLAN component, or MAC Bridge. + + The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an + address that no conformant C-VLAN component, MAC Bridge can forward; + however, it is relayed by TPMR components and S-VLAN components. PDUs + using this destination address, or any of the other addresses that appear + in Table 8-1 but not in either Table 8-2 or Table 8-3 + (01-80-C2-00-00-[00,0B,0C,0D,0F]), will be relayed by TPMR components and + S-VLAN components but will propagate no further than the nearest C-VLAN + component or MAC Bridge. + +Because the LLC Entity associated with each Bridge Port is provided via CPU +port, we must not filter these frames but forward them to CPU port. + +In a Bridge, the transmission Port is majorly decided by ingress and egress +rules, FDB, and spanning tree Port State functions of the Forwarding +Process. For link-local frames, only CPU port should be designated as +destination port in the FDB, and the other functions of the Forwarding +Process must not interfere with the decision of the transmission Port. We +call this process trapping frames to CPU port. + +Therefore, on the switch with CPU port architecture, link-local frames must +be trapped to CPU port, and certain link-local frames received by a Port of +a Bridge comprising a TPMR component or an S-VLAN component must be +excluded from it. + +A Bridge of the switch with CPU port architecture cannot comprise a +Two-Port MAC Relay (TPMR) component as a TPMR component supports only a +subset of the functionality of a MAC Bridge. A Bridge comprising two Ports +(Management Port doesn't count) of this architecture will either function +as a standard MAC Bridge or a standard VLAN Bridge. + +Therefore, a Bridge of this architecture can only comprise S-VLAN +components, C-VLAN components, or MAC Bridge components. Since there's no +TPMR component, we don't need to relay PDUs using the destination addresses +specified on the Nearest non-TPMR section, and the proportion of the +Nearest Customer Bridge section where they must be relayed by TPMR +components. + +One option to trap link-local frames to CPU port is to add static FDB +entries with CPU port designated as destination port. However, because that +Independent VLAN Learning (IVL) is being used on every VID, each entry only +applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC +Bridge component or a C-VLAN component, there would have to be 16 times +4096 entries. This switch intellectual property can only hold a maximum of +2048 entries. Using this option, there also isn't a mechanism to prevent +link-local frames from being discarded when the spanning tree Port State of +the reception Port is discarding. + +The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4 +registers. Whilst this applies to every VID, it doesn't contain all of the +reserved MAC addresses without affecting the remaining Standard Group MAC +Addresses. The REV_UN frame tag utilised using the RGAC4 register covers +the remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination +addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF +destination addresses which may be relayed by MAC Bridges or VLAN Bridges. +The latter option provides better but not complete conformance. + +This switch intellectual property also does not provide a mechanism to trap +link-local frames with specific destination addresses to CPU port by +Bridge, to conform to the filtering rules for the distinct Bridge +components. + +Therefore, regardless of the type of the Bridge component, link-local +frames with these destination addresses will be trapped to CPU port: + +01-80-C2-00-00-[00,01,02,03,0E] + +In a Bridge comprising a MAC Bridge component or a C-VLAN component: + + Link-local frames with these destination addresses won't be trapped to + CPU port which won't conform to IEEE Std 802.1Q-2022: + + 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] + +In a Bridge comprising an S-VLAN component: + + Link-local frames with these destination addresses will be trapped to CPU + port which won't conform to IEEE Std 802.1Q-2022: + + 01-80-C2-00-00-00 + + Link-local frames with these destination addresses won't be trapped to + CPU port which won't conform to IEEE Std 802.1Q-2022: + + 01-80-C2-00-00-[04,05,06,07,08,09,0A] + +Currently on this switch intellectual property, if the spanning tree Port +State of the reception Port is discarding, link-local frames will be +discarded. + +To trap link-local frames regardless of the spanning tree Port State, make +the switch regard them as Bridge Protocol Data Units (BPDUs). This switch +intellectual property only lets the frames regarded as BPDUs bypass the +spanning tree Port State function of the Forwarding Process. + +With this change, the only remaining interference is the ingress rules. +When the reception Port has no PVID assigned on software, VLAN-untagged +frames won't be allowed in. There doesn't seem to be a mechanism on the +switch intellectual property to have link-local frames bypass this function +of the Forwarding Process. + +Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch") +Reviewed-by: Daniel Golle +Signed-off-by: Arınç ÜNAL +--- + drivers/net/dsa/mt7530.c | 229 +++++++++++++++++++++++++++++++++------ + drivers/net/dsa/mt7530.h | 5 + + 2 files changed, 200 insertions(+), 34 deletions(-) + +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -950,20 +950,173 @@ static void mt7530_setup_port5(struct ds + mutex_unlock(&priv->reg_mutex); + } + +-/* On page 205, section "8.6.3 Frame filtering" of the active standard, IEEE Std +- * 802.1Q™-2022, it is stated that frames with 01:80:C2:00:00:00-0F as MAC DA +- * must only be propagated to C-VLAN and MAC Bridge components. That means +- * VLAN-aware and VLAN-unaware bridges. On the switch designs with CPU ports, +- * these frames are supposed to be processed by the CPU (software). So we make +- * the switch only forward them to the CPU port. And if received from a CPU +- * port, forward to a single port. The software is responsible of making the +- * switch conform to the latter by setting a single port as destination port on +- * the special tag. +- * +- * This switch intellectual property cannot conform to this part of the standard +- * fully. Whilst the REV_UN frame tag covers the remaining :04-0D and :0F MAC +- * DAs, it also includes :22-FF which the scope of propagation is not supposed +- * to be restricted for these MAC DAs. ++/* In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer (DLL) ++ * of the Open Systems Interconnection basic reference model (OSI/RM) are ++ * described; the medium access control (MAC) and logical link control (LLC) ++ * sublayers. The MAC sublayer is the one facing the physical layer. ++ * ++ * In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A ++ * Bridge component comprises a MAC Relay Entity for interconnecting the Ports ++ * of the Bridge, at least two Ports, and higher layer entities with at least a ++ * Spanning Tree Protocol Entity included. ++ * ++ * Each Bridge Port also functions as an end station and shall provide the MAC ++ * Service to an LLC Entity. Each instance of the MAC Service is provided to a ++ * distinct LLC Entity that supports protocol identification, multiplexing, and ++ * demultiplexing, for protocol data unit (PDU) transmission and reception by ++ * one or more higher layer entities. ++ * ++ * It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC ++ * Entity associated with each Bridge Port is modeled as being directly ++ * connected to the attached Local Area Network (LAN). ++ * ++ * On the switch with CPU port architecture, CPU port functions as Management ++ * Port, and the Management Port functionality is provided by software which ++ * functions as an end station. Software is connected to an IEEE 802 LAN that is ++ * wholly contained within the system that incorporates the Bridge. Software ++ * provides access to the LLC Entity associated with each Bridge Port by the ++ * value of the source port field on the special tag on the frame received by ++ * software. ++ * ++ * We call frames that carry control information to determine the active ++ * topology and current extent of each Virtual Local Area Network (VLAN), i.e., ++ * spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN Registration ++ * Protocol Data Units (MVRPDUs), and frames from other link constrained ++ * protocols, such as Extensible Authentication Protocol over LAN (EAPOL) and ++ * Link Layer Discovery Protocol (LLDP), link-local frames. They are not ++ * forwarded by a Bridge. Permanently configured entries in the filtering ++ * database (FDB) ensure that such frames are discarded by the Forwarding ++ * Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in detail: ++ * ++ * Each of the reserved MAC addresses specified in Table 8-1 ++ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be ++ * permanently configured in the FDB in C-VLAN components and ERs. ++ * ++ * Each of the reserved MAC addresses specified in Table 8-2 ++ * (01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently ++ * configured in the FDB in S-VLAN components. ++ * ++ * Each of the reserved MAC addresses specified in Table 8-3 ++ * (01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB in ++ * TPMR components. ++ * ++ * The FDB entries for reserved MAC addresses shall specify filtering for all ++ * Bridge Ports and all VIDs. Management shall not provide the capability to ++ * modify or remove entries for reserved MAC addresses. ++ * ++ * The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of ++ * propagation of PDUs within a Bridged Network, as follows: ++ * ++ * The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that no ++ * conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN) ++ * component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward. ++ * PDUs transmitted using this destination address, or any other addresses ++ * that appear in Table 8-1, Table 8-2, and Table 8-3 ++ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can ++ * therefore travel no further than those stations that can be reached via a ++ * single individual LAN from the originating station. ++ * ++ * The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an ++ * address that no conformant S-VLAN component, C-VLAN component, or MAC ++ * Bridge can forward; however, this address is relayed by a TPMR component. ++ * PDUs using this destination address, or any of the other addresses that ++ * appear in both Table 8-1 and Table 8-2 but not in Table 8-3 ++ * (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed by ++ * any TPMRs but will propagate no further than the nearest S-VLAN component, ++ * C-VLAN component, or MAC Bridge. ++ * ++ * The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an address ++ * that no conformant C-VLAN component, MAC Bridge can forward; however, it is ++ * relayed by TPMR components and S-VLAN components. PDUs using this ++ * destination address, or any of the other addresses that appear in Table 8-1 ++ * but not in either Table 8-2 or Table 8-3 (01-80-C2-00-00-[00,0B,0C,0D,0F]), ++ * will be relayed by TPMR components and S-VLAN components but will propagate ++ * no further than the nearest C-VLAN component or MAC Bridge. ++ * ++ * Because the LLC Entity associated with each Bridge Port is provided via CPU ++ * port, we must not filter these frames but forward them to CPU port. ++ * ++ * In a Bridge, the transmission Port is majorly decided by ingress and egress ++ * rules, FDB, and spanning tree Port State functions of the Forwarding Process. ++ * For link-local frames, only CPU port should be designated as destination port ++ * in the FDB, and the other functions of the Forwarding Process must not ++ * interfere with the decision of the transmission Port. We call this process ++ * trapping frames to CPU port. ++ * ++ * Therefore, on the switch with CPU port architecture, link-local frames must ++ * be trapped to CPU port, and certain link-local frames received by a Port of a ++ * Bridge comprising a TPMR component or an S-VLAN component must be excluded ++ * from it. ++ * ++ * A Bridge of the switch with CPU port architecture cannot comprise a Two-Port ++ * MAC Relay (TPMR) component as a TPMR component supports only a subset of the ++ * functionality of a MAC Bridge. A Bridge comprising two Ports (Management Port ++ * doesn't count) of this architecture will either function as a standard MAC ++ * Bridge or a standard VLAN Bridge. ++ * ++ * Therefore, a Bridge of this architecture can only comprise S-VLAN components, ++ * C-VLAN components, or MAC Bridge components. Since there's no TPMR component, ++ * we don't need to relay PDUs using the destination addresses specified on the ++ * Nearest non-TPMR section, and the proportion of the Nearest Customer Bridge ++ * section where they must be relayed by TPMR components. ++ * ++ * One option to trap link-local frames to CPU port is to add static FDB entries ++ * with CPU port designated as destination port. However, because that ++ * Independent VLAN Learning (IVL) is being used on every VID, each entry only ++ * applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC ++ * Bridge component or a C-VLAN component, there would have to be 16 times 4096 ++ * entries. This switch intellectual property can only hold a maximum of 2048 ++ * entries. Using this option, there also isn't a mechanism to prevent ++ * link-local frames from being discarded when the spanning tree Port State of ++ * the reception Port is discarding. ++ * ++ * The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4 ++ * registers. Whilst this applies to every VID, it doesn't contain all of the ++ * reserved MAC addresses without affecting the remaining Standard Group MAC ++ * Addresses. The REV_UN frame tag utilised using the RGAC4 register covers the ++ * remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination ++ * addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF ++ * destination addresses which may be relayed by MAC Bridges or VLAN Bridges. ++ * The latter option provides better but not complete conformance. ++ * ++ * This switch intellectual property also does not provide a mechanism to trap ++ * link-local frames with specific destination addresses to CPU port by Bridge, ++ * to conform to the filtering rules for the distinct Bridge components. ++ * ++ * Therefore, regardless of the type of the Bridge component, link-local frames ++ * with these destination addresses will be trapped to CPU port: ++ * ++ * 01-80-C2-00-00-[00,01,02,03,0E] ++ * ++ * In a Bridge comprising a MAC Bridge component or a C-VLAN component: ++ * ++ * Link-local frames with these destination addresses won't be trapped to CPU ++ * port which won't conform to IEEE Std 802.1Q-2022: ++ * ++ * 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] ++ * ++ * In a Bridge comprising an S-VLAN component: ++ * ++ * Link-local frames with these destination addresses will be trapped to CPU ++ * port which won't conform to IEEE Std 802.1Q-2022: ++ * ++ * 01-80-C2-00-00-00 ++ * ++ * Link-local frames with these destination addresses won't be trapped to CPU ++ * port which won't conform to IEEE Std 802.1Q-2022: ++ * ++ * 01-80-C2-00-00-[04,05,06,07,08,09,0A] ++ * ++ * To trap link-local frames to CPU port as conformant as this switch ++ * intellectual property can allow, link-local frames are made to be regarded as ++ * Bridge Protocol Data Units (BPDUs). This is because this switch intellectual ++ * property only lets the frames regarded as BPDUs bypass the spanning tree Port ++ * State function of the Forwarding Process. ++ * ++ * The only remaining interference is the ingress rules. When the reception Port ++ * has no PVID assigned on software, VLAN-untagged frames won't be allowed in. ++ * There doesn't seem to be a mechanism on the switch intellectual property to ++ * have link-local frames bypass this function of the Forwarding Process. + */ + static void + mt753x_trap_frames(struct mt7530_priv *priv) +@@ -971,35 +1124,43 @@ mt753x_trap_frames(struct mt7530_priv *p + /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them + * VLAN-untagged. + */ +- mt7530_rmw(priv, MT753X_BPC, MT753X_PAE_EG_TAG_MASK | +- MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | +- MT753X_BPDU_PORT_FW_MASK, +- MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ mt7530_rmw(priv, MT753X_BPC, ++ MT753X_PAE_BPDU_FR | MT753X_PAE_EG_TAG_MASK | ++ MT753X_PAE_PORT_FW_MASK | MT753X_BPDU_EG_TAG_MASK | ++ MT753X_BPDU_PORT_FW_MASK, ++ MT753X_PAE_BPDU_FR | ++ MT753X_PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_PAE_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + + /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress + * them VLAN-untagged. + */ +- mt7530_rmw(priv, MT753X_RGAC1, MT753X_R02_EG_TAG_MASK | +- MT753X_R02_PORT_FW_MASK | MT753X_R01_EG_TAG_MASK | +- MT753X_R01_PORT_FW_MASK, +- MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ mt7530_rmw(priv, MT753X_RGAC1, ++ MT753X_R02_BPDU_FR | MT753X_R02_EG_TAG_MASK | ++ MT753X_R02_PORT_FW_MASK | MT753X_R01_BPDU_FR | ++ MT753X_R01_EG_TAG_MASK | MT753X_R01_PORT_FW_MASK, ++ MT753X_R02_BPDU_FR | ++ MT753X_R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_R02_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_R01_BPDU_FR | ++ MT753X_R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + + /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress + * them VLAN-untagged. + */ +- mt7530_rmw(priv, MT753X_RGAC2, MT753X_R0E_EG_TAG_MASK | +- MT753X_R0E_PORT_FW_MASK | MT753X_R03_EG_TAG_MASK | +- MT753X_R03_PORT_FW_MASK, +- MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | +- MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | +- MT753X_BPDU_CPU_ONLY); ++ mt7530_rmw(priv, MT753X_RGAC2, ++ MT753X_R0E_BPDU_FR | MT753X_R0E_EG_TAG_MASK | ++ MT753X_R0E_PORT_FW_MASK | MT753X_R03_BPDU_FR | ++ MT753X_R03_EG_TAG_MASK | MT753X_R03_PORT_FW_MASK, ++ MT753X_R0E_BPDU_FR | ++ MT753X_R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_R0E_PORT_FW(MT753X_BPDU_CPU_ONLY) | ++ MT753X_R03_BPDU_FR | ++ MT753X_R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | ++ MT753X_BPDU_CPU_ONLY); + } + + static void +--- a/drivers/net/dsa/mt7530.h ++++ b/drivers/net/dsa/mt7530.h +@@ -65,6 +65,7 @@ enum mt753x_id { + + /* Registers for BPDU and PAE frame control*/ + #define MT753X_BPC 0x24 ++#define MT753X_PAE_BPDU_FR BIT(25) + #define MT753X_PAE_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_PAE_EG_TAG(x) FIELD_PREP(MT753X_PAE_EG_TAG_MASK, x) + #define MT753X_PAE_PORT_FW_MASK GENMASK(18, 16) +@@ -75,20 +76,24 @@ enum mt753x_id { + + /* Register for :01 and :02 MAC DA frame control */ + #define MT753X_RGAC1 0x28 ++#define MT753X_R02_BPDU_FR BIT(25) + #define MT753X_R02_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_R02_EG_TAG(x) FIELD_PREP(MT753X_R02_EG_TAG_MASK, x) + #define MT753X_R02_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_R02_PORT_FW(x) FIELD_PREP(MT753X_R02_PORT_FW_MASK, x) ++#define MT753X_R01_BPDU_FR BIT(9) + #define MT753X_R01_EG_TAG_MASK GENMASK(8, 6) + #define MT753X_R01_EG_TAG(x) FIELD_PREP(MT753X_R01_EG_TAG_MASK, x) + #define MT753X_R01_PORT_FW_MASK GENMASK(2, 0) + + /* Register for :03 and :0E MAC DA frame control */ + #define MT753X_RGAC2 0x2c ++#define MT753X_R0E_BPDU_FR BIT(25) + #define MT753X_R0E_EG_TAG_MASK GENMASK(24, 22) + #define MT753X_R0E_EG_TAG(x) FIELD_PREP(MT753X_R0E_EG_TAG_MASK, x) + #define MT753X_R0E_PORT_FW_MASK GENMASK(18, 16) + #define MT753X_R0E_PORT_FW(x) FIELD_PREP(MT753X_R0E_PORT_FW_MASK, x) ++#define MT753X_R03_BPDU_FR BIT(9) + #define MT753X_R03_EG_TAG_MASK GENMASK(8, 6) + #define MT753X_R03_EG_TAG(x) FIELD_PREP(MT753X_R03_EG_TAG_MASK, x) + #define MT753X_R03_PORT_FW_MASK GENMASK(2, 0)