From bc104777d67546ea5c5669c4fd179411fcb8b56e Mon Sep 17 00:00:00 2001 From: Manuel Eggimann Date: Mon, 11 Jan 2021 15:46:05 +0100 Subject: [PATCH] Update changelog --- CHANGELOG.md | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6ef47b3f..cca69c39 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,17 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ### Removed ### Fixed +## [2.0.1] - 2021-01-11 +### Added +### Changed +- Changed address aliasing rules to be identical to the behavior of the legacy + interconnect. +### Removed +### Fixed +- Fix wrong address part select in SRAM wrappers that caused part of the + memories to be inaccessible and alias into lower address ranges. + + ## [2.0.0] - 2020-12-11 ### Added - Completely replaced `soc_interconnect` with a new parametric version