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Zce Branch Current Status #7

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abukharmeh opened this issue Dec 14, 2021 · 7 comments
Open

Zce Branch Current Status #7

abukharmeh opened this issue Dec 14, 2021 · 7 comments

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@abukharmeh
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Hi,

I am building and running Zce branch, and it feels like its detecting new instructions correctly but not executing them correctly.

So I have two questions,

  1. What is the recommended configuration parameters I should use to build and run binaries with Zce support.

  2. What is the status of the tracer support (e.g when running with -d) for Zce instructions (as its currently showing the correct instructions, but showing unrecognized operands)

Kind regards,
Ibrahim

@abukharmeh abukharmeh changed the title Zce Branch Zce Branch Current Status Dec 14, 2021
@liweiwei90
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  1. What is the recommended configuration parameters I should use to build and run binaries with Zce support.

If run binaries with zcee support, add '_zcee' to the isa string
If run binaries with zcea support, add '_zcea' to the isa string
If run binaries with zceb support, add '_zceb' to the isa string
If run binaries with all zce support, you can also use '_zce' instead of "_zcea_zceb_zcee"
Note that you should disable 'D' support to enable zceb. That is you cannot use isa string like 'rv64gc_zceb', you can use rv64imafc_zceb

@liweiwei90
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2. What is the status of the tracer support (e.g when running with -d) for Zce instructions (as its currently showing the correct instructions, but showing unrecognized operands)

Disasm support for zce has not been developed currently. We'll try to add it recently.

@abukharmeh
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abukharmeh commented Dec 15, 2021

Thank you for the quick response.

plct-spike/riscv/encoding.h

Lines 2810 to 2813 in 7cdbbef

#define MATCH_C_NOT 0x8018
#define MASK_C_NOT 0xfc7f
#define MATCH_C_NEG 0x801c
#define MASK_C_NEG 0xfc7f

C.NOT and C.NEG are swapped around according to the document I am looking at ( Release 0.50.1 from https://github.com/riscv/riscv-code-size-reduction/releases )

@liweiwei90
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That is true. I have fixed it. Thanks a lot.
The disasm for zce have been finished. However there is still a problem left that disasm cannot distinguish part of zceb and D instructions.

@abukharmeh
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abukharmeh commented Dec 16, 2021

Hi, thank you for the fix.

We think there is a typo in these line as in the tracer, sign extend instructions are not showing their arguments:

plct-spike/disasm/disasm.cc

Lines 1504 to 1510 in ff442e3

DISASM_INSN("c.zext.b", c_zext_b, 0, {&rvc_rs1s});
DISASM_INSN("c.sext.b", c_zext_b, 0, {&rvc_rs1s});
DISASM_INSN("c.zext.h", c_zext_h, 0, {&rvc_rs1s});
DISASM_INSN("c.sext.h", c_zext_h, 0, {&rvc_rs1s});
if (xlen == 64) {
DISASM_INSN("c.sext.w", c_zext_w, 0, {&rvc_rs1s});
}

Also we think c.mul was not added ?

@liweiwei90
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Sorry. I forgot to change the second parameter after copy.
I have fixed them and added disasm for c.mul.

@abukharmeh
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No worry, thank you for quick responses.

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