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battleship_pad.csv
We can make this file beautiful and searchable if this error is corrected: It looks like row 5 should actually have 1 column, instead of 3 in line 4.
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battleship_pad.csv
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Release 8.1i - Fit P.40xd
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
6- 7-2015 9:17PM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The comma ','
character is used as the data field separator.
This file is also designed to support parsing.
Input file: battleship.ngd
output file: battleship_pad.csv
Part type: xc2c64a
Speed grade: -7
Package: vq44
Pinout by Pin Number:
-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
Pin Number,Signal Name,Pin Usage,Pin Name,Direction,IO Standard,IO Bank Number,{blank},Slew Rate,Termination,{blank},Voltage,Constraint,
P1,outR[4],O,I/O/GCK2,OUTPUT,LVCMOS18,1,,FAST,,,,
P2,outR[3],O,I/O,OUTPUT,LVCMOS18,1,,FAST,,,,
P3,outR[2],O,I/O,OUTPUT,LVCMOS18,1,,FAST,,,,
P4,GND,,GND,,,,,,,,,,
P5,outR[1],O,I/O,OUTPUT,LVCMOS18,1,,FAST,,,,
P6,outR[0],O,I/O,OUTPUT,LVCMOS18,1,,FAST,,,,
P7,,VCCIO-1.8,VCCIO,,,1,,,,,,,
P8,KPR,,I/O,,,1,,,,,,,
P9,TDI,,TDI,,,,,,,,,,
P10,TMS,,TMS,,,,,,,,,,
P11,TCK,,TCK,,,,,,,,,,
P12,row0,I,I/O,INPUT,LVCMOS18,1,,FAST,,,,
P13,row1,I,I/O,INPUT,LVCMOS18,1,,FAST,,,,
P14,row2,I,I/O,INPUT,LVCMOS18,1,,FAST,,,,
P15,,VCC,VCC,,,,,,,,,,
P16,KPR,,I/O,,,1,,,,,,,
P17,GND,,GND,,,,,,,,,,
P18,col0,I,I/O,INPUT,LVCMOS18,2,,FAST,,,,
P19,col1,I,I/O,INPUT,LVCMOS18,2,,FAST,,,,
P20,col2,I,I/O,INPUT,LVCMOS18,2,,FAST,,,,
P21,count0,I,I/O,INPUT,LVCMOS18,2,,FAST,,,,
P22,count1,I,I/O,INPUT,LVCMOS18,2,,FAST,,,,
P23,count2,I,I/O,INPUT,LVCMOS18,2,,FAST,,,,
P24,TDO,,TDO,,,,,,,,,,
P25,GND,,GND,,,,,,,,,,
P26,,VCCIO-1.8,VCCIO,,,2,,,,,,,
P27,outG[7],O,I/O,OUTPUT,LVCMOS18,2,,FAST,,,,
P28,outG[6],O,I/O,OUTPUT,LVCMOS18,2,,FAST,,,,
P29,outG[5],O,I/O,OUTPUT,LVCMOS18,2,,FAST,,,,
P30,KPR,,I/O/GSR,,,2,,,,,,,
P31,outG[4],O,I/O/GTS2,OUTPUT,LVCMOS18,2,,FAST,,,,
P32,outG[3],O,I/O/GTS3,OUTPUT,LVCMOS18,2,,FAST,,,,
P33,outG[2],O,I/O/GTS0,OUTPUT,LVCMOS18,2,,FAST,,,,
P34,outG[1],O,I/O/GTS1,OUTPUT,LVCMOS18,2,,FAST,,,,
P35,,VCCAUX,VAUX,,,,,,,,,,
P36,outG[0],O,I/O,OUTPUT,LVCMOS18,2,,FAST,,,,
P37,KPR,,I/O,,,2,,,,,,,
P38,KPR,,I/O,,,2,,,,,,,
P39,KPR,,I/O,,,1,,,,,,,
P40,KPR,,I/O,,,1,,,,,,,
P41,KPR,,I/O,,,1,,,,,,,
P42,outR[7],O,I/O,OUTPUT,LVCMOS18,1,,FAST,,,,
P43,outR[6],O,I/O/GCK0,OUTPUT,LVCMOS18,1,,FAST,,,,
P44,outR[5],O,I/O/GCK1,OUTPUT,LVCMOS18,1,,FAST,,,,
To preserve the pinout above for future design iterations in
Project Navigator simply execute the (Lock Pins) process
located under the (Implement Design) process in a toolbox named
(Optional Implementation Tools) or invoke PIN2UCF from the
command line. The location constraints will be written into your
specified UCF file