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battleship.mfd
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battleship.mfd
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MDF Database: version 1.0
MDF_INFO | battleship | XC2C64A-7-VQ44
MACROCELL | 0 | 2 | outG[0]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[0] = !row2 & !row1 & !row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 0 | 15 | N_PZ_25_MC
ATTRIBUTES | 536871680 | 0
OUTPUTMC | 8 | 0 | 2 | 0 | 8 | 0 | 9 | 0 | 10 | 0 | 11 | 2 | 0 | 2 | 1 | 2 | 2
INPUTS | 6 | col0 | count0 | col1 | count1 | col2 | count2
INPUTP | 6 | 55 | 60 | 56 | 61 | 59 | 65
EQ | 6 |
N_PZ_25 = col0 & !count0
# !col0 & count0
# col1 & !count1
# !col1 & count1
# col2 & !count2
# !col2 & count2; // (6 pt, 6 inp)
MACROCELL | 0 | 8 | outG[1]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[1] = !row2 & !row1 & row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 0 | 9 | outG[2]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[2] = !row2 & row1 & !row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 0 | 10 | outG[3]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[3] = !row2 & row1 & row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 0 | 11 | outG[4]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[4] = row2 & !row1 & !row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 2 | 0 | outG[5]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[5] = row2 & !row1 & row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 2 | 1 | outG[6]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[6] = row2 & row1 & !row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 2 | 2 | outG[7]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 4 | row2 | row1 | row0 | N_PZ_25
INPUTMC | 1 | 0 | 15
INPUTP | 3 | 49 | 48 | 46
EQ | 1 |
outG[7] = row2 & row1 & row0 & !N_PZ_25; // (1 pt, 4 inp)
MACROCELL | 3 | 1 | outR[0]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[0] = Gnd; // (0 pt, 0 inp)
MACROCELL | 3 | 0 | outR[1]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[1] = Gnd; // (0 pt, 0 inp)
MACROCELL | 1 | 12 | outR[2]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[2] = Gnd; // (0 pt, 0 inp)
MACROCELL | 1 | 11 | outR[3]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[3] = Gnd; // (0 pt, 0 inp)
MACROCELL | 1 | 9 | outR[4]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[4] = Gnd; // (0 pt, 0 inp)
MACROCELL | 1 | 7 | outR[5]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[5] = Gnd; // (0 pt, 0 inp)
MACROCELL | 1 | 6 | outR[6]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[6] = Gnd; // (0 pt, 0 inp)
MACROCELL | 1 | 5 | outR[7]_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 0
EQ | 1 |
outR[7] = Gnd; // (0 pt, 0 inp)
PIN | col0 | 64 | 16 | LVCMOS18 | 55 | 1 | 0 | 15
PIN | col1 | 64 | 16 | LVCMOS18 | 56 | 1 | 0 | 15
PIN | col2 | 64 | 16 | LVCMOS18 | 59 | 1 | 0 | 15
PIN | count0 | 64 | 16 | LVCMOS18 | 60 | 1 | 0 | 15
PIN | count1 | 64 | 16 | LVCMOS18 | 61 | 1 | 0 | 15
PIN | count2 | 64 | 16 | LVCMOS18 | 65 | 1 | 0 | 15
PIN | row2 | 64 | 16 | LVCMOS18 | 49 | 8 | 0 | 2 | 0 | 8 | 0 | 9 | 0 | 10 | 0 | 11 | 2 | 0 | 2 | 1 | 2 | 2
PIN | row1 | 64 | 16 | LVCMOS18 | 48 | 8 | 0 | 2 | 0 | 8 | 0 | 9 | 0 | 10 | 0 | 11 | 2 | 0 | 2 | 1 | 2 | 2
PIN | row0 | 64 | 16 | LVCMOS18 | 46 | 8 | 0 | 2 | 0 | 8 | 0 | 9 | 0 | 10 | 0 | 11 | 2 | 0 | 2 | 1 | 2 | 2
PIN | outG[0] | 536871040 | 0 | LVCMOS18 | 9
PIN | outG[1] | 536871040 | 0 | LVCMOS18 | 2
PIN | outG[2] | 536871040 | 0 | LVCMOS18 | 1
PIN | outG[3] | 536871040 | 0 | LVCMOS18 | 81
PIN | outG[4] | 536871040 | 0 | LVCMOS18 | 80
PIN | outG[5] | 536871040 | 0 | LVCMOS18 | 73
PIN | outG[6] | 536871040 | 0 | LVCMOS18 | 72
PIN | outG[7] | 536871040 | 0 | LVCMOS18 | 71
PIN | outR[0] | 536871040 | 0 | LVCMOS18 | 32
PIN | outR[1] | 536871040 | 0 | LVCMOS18 | 31
PIN | outR[2] | 536871040 | 0 | LVCMOS18 | 26
PIN | outR[3] | 536871040 | 0 | LVCMOS18 | 25
PIN | outR[4] | 536871040 | 0 | LVCMOS18 | 23
PIN | outR[5] | 536871040 | 0 | LVCMOS18 | 20
PIN | outR[6] | 536871040 | 0 | LVCMOS18 | 19
PIN | outR[7] | 536871040 | 0 | LVCMOS18 | 17