Tomasulo Web Simulator
This simulator has been developed to illustrate Tomasulo's Out-of-Order Dynamic Instruction Scheduling Algorithm with a web application to support teaching this topic in the lecutre "Advanced Computer Architecture".
The simulator can be accessed here: https://pc2.github.io/Tomasulo-Web-Simulator/
The simulator has been developed by Md.Ashraf Uddin ([email protected]) as part of this Master's Thesis with the title "Web-Based Simulator For Out-Of-Order Execution And Dynamic Scheduling Algorithm".
Abstract
Out-of-order and dynamic instruction scheduling exploit modern proces- sor performance by minimizing hazards and maximizing parallel instruction execution. Extensive use of those techniques has made it significant to study the dynamic nature of the processor scheduling algorithm. The classical teaching approach emphasizes abstract concepts and top-down analysis of the content. The static nature of teaching methods causes learners boredom when it is subject to processor internal architecture and its dynamic property. Students face difficulties to map the theoretical under- standing into effective learning because it requires in-depth knowledge of processor components, structure, and scheduling algorithms. A simulation tool can be an ef- fective medium to analyze the different behaviors of processor pipeline property and instruction scheduling mechanism. This thesis aims to bridge the gap between theo- retical and practical learning by illustrating different phases of processor scheduling technique through a feature-rich simulator.