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CHANGELOG
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CHANGELOG
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# Changelog
This file contains all changes made to the source code for each release.
# 1.7
#### Changed:
- Fix output of matrix size in benchmark
#### Added:
- Support for arbitrary FPGA grids with P!=Q for the PCIe base implementation
- Support for arbitrary global matrix sizes (no need to be dividable by P and Q)
## 1.6
#### Added:
- MPI + PCIe base implementations for Intel and Xilinx FPGAs
## 1.5
#### Changed:
- Refactored the code to support different execution kernels and data distributions
- Changed formatting of the output metrics
#### Added:
- CPU only implementation or diagonal and PQ data distribution
- FPGA kernel with communication via PCIe and MPI for diagonal and PQ distribution
- FPGA kernel with communication via external channels for PQ distribution
## 1.4
#### Changed:
- Ordering of FPGAs for diagonal transpose: Now the highest ranks will calculate the diagonal blocks instead of the lowest
- Provide execution example in scripts folder
- Host code now also aggregates the measurements from other MPI ranks
## 1.3
#### Added:
- Distributed matrix transpose kernel transpose_diagonal
#### Changed:
- Host code to support different data distribution schemes using the TransposeDataHandler class
- Support for kernel replications
#### Removed:
- Old non-distributed kernels transpose_default and transpose_optimized as well as host code support for both
## 1.2
#### Added:
- Base implementation tests are now build and linked with the unit test binary
- Support for custom kernel designs
## 1.1.1
#### Changed:
- Converted host code to new OO code
## 1.1
#### Added:
- Optimized kernel for Xilinx Vitis toolchain
## 1.0.1
#### Added:
- Support for Xilinx Vitis toolchain