Accelerating Self-Driving Satellite for Deep Space

Info & Description

This project will focus on profiling the application, designing an accelerator for the most compute intensive part to pave the way of novel generation of deep space satellites.

	Information
Team number	AOHW-342
Project name	Accelerating Self-Driving Satellite for Deep Space
YouTube's video	https://youtu.be/EagT6V492NI
Project's repository	https://github.com/necst/orbit-boost
University name	Politecnico di Milano
Participant (email)	Marco Laurenzi ([email protected])
Participant (email)	Alessandro Aldo Marina ([email protected])
Supervisor name	Davide Conficconi
Supervisor email	[email protected]
Board used	Kria KD240 Drives Starter Kit
Software version	2024.1

Description of the repository

The archive is structured as follows:

├─ hardware/           # Host application
|  └─ native/          # C host code
|  └─ python/          # python host code + testbench
└─ IP/                 # everything needed to generate the .bit and .hwh files
|  └─ Vitis HLS/       # C++ code to generate the package
|  └─ Vivado/Package/  # Package to generate .bit and .hwh files

Instructions to build and test project with the Python host code

Step 1 - Clone the repository

Open a terminal, then clone the repository by running the following command

git clone https://github.com/necst/orbit-boost.git

Then, move into the repository with

cd orbit-boost

Step 2 - Generate the .bit and .hwh files

Vitis HLS 2024.1

Open Vitis HLS 2024.1 and import the code in the folder: /IP/Vitis HLS/ Select ldl_dsolve as top function and generate the package by running C_SYNTH and the Package.

The same output file generated by the Package run is already available in the /IP/Vivado/ folder

Vivado 2024.1

Open VIvado 2024.1 and proceed with the Block design:

1. Add the IP core to the IP repository of Vivado by importing the package previously generated
2. Create a Block Design
3. Add the IP core to the Block design
4. Add the MPSoC to the Block design
5. Run the block automation
6. Configure the Zynq IP to have 3 AXI_SLAVE_HP
7. Run the connection automation and change the conncetion automation to connect each IP port to a different Zynq AXI_SLAVE_HP
8. Validate and optimize the Block design
9. Save it
10. Create the HDL wrapper and let Vivado auto-manage it
11. Run all the steps toward the Bitstream generation
12. Export the .bit and .hwh files

The .bit and .hwh files generated are already available in the /hardware/python/bitstream/ folder

Step 3 - Connect to the Kria KD240

Preliminary work

Carefully connect the Kria KD240 and proceed with the setup following this link: https://www.amd.com/en/products/system-on-modules/kria/k24/kd240-drives-starter-kit/getting-started/getting-started.html

Install Pynq on the Board: https://github.com/Xilinx/Kria-PYNQ

Connection to Pynq

While you are in the same network of the Board, search on a browser:

<Kria_IP>:9090

A Jupiter Notebook should appear. Now you are ready to upload all the files, be sure to follow the same folder arrangment provided below:

├─ bitstream/                            # Upload here the .bit and .hwh files named as doublerate.<bit | hwh>    
├─ Host.ipynb                            # A notebook that acts as the Python host, managing communication and control for the FPGA
├─ execution_time_plotter.ipynb          # A Python notebook designed to plot and compare the execution times of software (non- accelerated) versus hardware (accelerated) implementations
├─ demo_hardware_division.ipynb          # A Python notebook that demonstrates the division function running on the Kria KD240 FPGA
└─ ldl_dsolve_hardware.py                #  A Python function that runs on the hardware, ready to be called for accelerated computation

To test the bitstream execute the Host.ipynb file entirely

Additional information to run the C host with an already loaded input

Preliminary work

Carefully connect the Kria KD240 and proceed with the setup following this link: https://www.amd.com/en/products/system-on-modules/kria/k24/kd240-drives-starter-kit/getting-started/getting-started.html

Install Pynq on the Board: https://github.com/Xilinx/Kria-PYNQ

Spet 0: follow Step 1 of the Python host code guide

Step 1: enter the native folder

Execute the following command from the base folder:

cd /hardware/native/

Step 2: building the host

Execute the following command to build the host:

make clean all

Step 3: prepare the environment for the execution

Execute the following commands: Activate PYNQ venv

source /usr/local/share/pynq-venv/bin/activate

Setup the XRT environment

source /home/ubuntu/pynq/Kria-PYNQ/pynq/sdbuild/packages/xrt/xrt_setup.sh

Download the bitstream

python -c "from pynq import Overlay; o = Overlay('./bitstream/doublerate.bit'); o.download()"

Step 4: execute the host code

Execute the host code by runnning the following command:

./ldl_dsolve