-
Notifications
You must be signed in to change notification settings - Fork 0
/
timing_generate.v
337 lines (319 loc) · 9.2 KB
/
timing_generate.v
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 2022/06/19 12:33:41
// Design Name:
// Module Name: timing_generate
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module timing_generate(
input clk,
input rst_n,
input RUN,
input stop,
input done,
input [1:0] cnt_set,
output Mif,
output Mex,
output T1,
output T2,
output T3,
output T4,
output T1_Mif,
output T2_Mif,
output [2:0] cur_state_out
);
assign cur_state_out = cur_state;
localparam [2:0] IDLE = 3'd0,
IF1 = 3'd1,
IF2 = 3'd2,
EX1 = 3'd3,
EX2 = 3'd4,
EX3 = 3'd5,
EX4 = 3'd6;
reg [3:0] cur_state, next_state;
reg [1:0] cnt;
reg Mif_r, Mex_r, T1_r, T2_r, T3_r, T4_r;
reg T1_Mif_r, T2_Mif_r;
reg T1_act, T2_act, T3_act, T4_act;
reg T1_Mif_act, T2_Mif_act;
assign T1_Mif = T1_Mif_r;
assign T2_Mif = T2_Mif_r;
always @(posedge clk or negedge rst_n) begin
if (!rst_n || next_state != IF1) begin
T1_Mif_act <= 1'b0;
end
else if (next_state == IF1 || T1_Mif_r) begin
T1_Mif_act <= 1'b1;
end
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n || next_state != IF2) begin
T2_Mif_act <= 1'b0;
end
else if (next_state == IF2 || T2_Mif_r) begin
T2_Mif_act <= 1'b1;
end
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n || next_state != EX1) begin
T1_act <= 1'b0;
end
else if (next_state == EX1 || T1) begin
T1_act <= 1'b1;
end
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n || next_state != EX2) begin
T2_act <= 1'b0;
end
else if (next_state == EX2 || T2) begin
T2_act <= 1'b1;
end
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n || next_state != EX3) begin
T3_act <= 1'b0;
end
else if (next_state == EX3 || T3) begin
T3_act <= 1'b1;
end
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n || next_state != EX4) begin
T4_act <= 1'b0;
end
else if (next_state == EX4 || T4) begin
T4_act <= 1'b1;
end
end
assign Mif = Mif_r;
assign Mex = Mex_r;
assign T1 = T1_r;
assign T2 = T2_r;
assign T3 = T3_r;
assign T4 = T4_r;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
cur_state <= IDLE;
end
else begin
cur_state <= next_state;
end
end
always @(*) begin
next_state = IDLE;
case (cur_state)
IDLE: begin
if (RUN == 1'b1) begin
next_state = IF1;
end
else begin
next_state = IDLE;
end
end
IF1: begin
if (done) begin
next_state = IF2;
end
else begin
next_state = IF1;
end
end
IF2: begin
if (stop) begin
next_state = IDLE;
end
else if (~stop) begin
next_state = EX1;
end
else begin
next_state = IF2;
end
end
EX1: begin
if (done && cnt != 0) begin
next_state = EX2;
end
else if (done && cnt == 0) begin
next_state = IF1;
end
else begin
next_state = EX1;
end
end
EX2: begin
if (done && cnt != 0) begin
next_state = EX3;
end
else if (done && cnt == 0) begin
next_state = IF1;
end
else begin
next_state = EX2;
end
end
EX3: begin
if (done && cnt != 0) begin
next_state = EX4;
end
else if (done && cnt == 0) begin
next_state = IF1;
end
end
EX4: begin
if (done) begin
next_state = IF1;
end
else begin
next_state = EX4;
end
end
default: next_state = IDLE;
endcase
end
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
Mif_r = 1'b0;
Mex_r = 1'b0;
T1_r = 1'b0;
T2_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
cnt = 2'd0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
end
else begin
case (next_state)
IDLE: begin
Mif_r = 1'b0;
Mex_r = 1'b0;
T1_r = 1'b0;
T2_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
end
IF1: begin
Mif_r = 1'b1;
Mex_r = 1'b0;
T1_r = 1'b0;
T2_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
if (~T1_Mif_act && ~T1_Mif_r) begin
T1_Mif_r = 1'b1;
end
else begin
T1_Mif_r = 1'b0;
end
end
IF2: begin
Mif_r = 1'b1;
Mex_r = 1'b0;
T1_r = 1'b0;
T2_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
if (~T2_Mif_act && ~T2_Mif_r) begin
T2_Mif_r = 1'b1;
end
else begin
T2_Mif_r = 1'b0;
end
end
EX1: begin
cnt = cnt_set;
Mif_r = 1'b0;
Mex_r = 1'b1;
T2_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
if (~T1_act && ~T1) begin
T1_r = 1'b1;
end
else begin
T1_r = 1'b0;
end
end
EX2: begin
Mif_r = 1'b0;
Mex_r = 1'b1;
T1_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
if (~T2_act && ~T2) begin
cnt = cnt - 1;
T2_r = 1'b1;
end
else begin
T2_r = 1'b0;
end
end
EX3: begin
Mif_r = 1'b0;
Mex_r = 1'b1;
T1_r = 1'b0;
T2_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
if (~T3_act && ~T3) begin
cnt = cnt - 1;
T3_r = 1'b1;
end
else begin
T3_r = 1'b0;
end
end
EX4: begin
Mif_r = 1'b0;
Mex_r = 1'b1;
T1_r = 1'b0;
T2_r = 1'b0;
T3_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
if (~T4_act && ~T4) begin
cnt = cnt - 1;
T4_r = 1'b1;
end
else begin
T4_r = 1'b0;
end
end
default: begin
Mif_r = 1'b0;
Mex_r = 1'b0;
T1_r = 1'b0;
T2_r = 1'b0;
T3_r = 1'b0;
T4_r = 1'b0;
T1_Mif_r = 1'b0;
T2_Mif_r = 1'b0;
end
endcase
end
end
endmodule