Problem with multiple bit manipulation instructions

[itsomaia]

Observed Behavior

In the case of multiple bit manipulation instructions, such as BINVI, the result of the operation is computed incorrectly due to an incorrect operand. The operand value passed from the decode stage and the input of the ALU, differ from the value used in the operation. This issue arises because the core incorrectly assumes it is not in the first cycle for BINVI, even though it is, due to an illegal CHERI exception that occurred a few cycles earlier.

Please see the waveform for more details.

Expected Behavior

Getting correct operands for the instruction.

Steps to reproduce the issue

Illegal_reg_cheri exception before the bit manipulation instructions.

My Environment

Running formalISA v 3.0 app with Cadence JasperGold 2023.09

EDA tool and version:

Running formalISA v 3.0 app with Cadence JasperGold 2023.09

Operating system:

Running formalISA v 3.0 app with Cadence JasperGold 2023.09

Version of the Ibex source code: