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Destination register not taken into account for detection of illegal load instruction #42
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Thanks. This is indeed a corner case that I have overlooked. In the ibex decoder implementation rf_we is not set for load instructions since in that case the actual regfile writes are generated by LSU responses. So we should include that in the condition for illegal register detection. I will fix this in the next commit. |
kliuMsft
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Jul 26, 2024
…leanup in cheri_regfile, hardcode NCAPS to 16 in ibex_top
Commit 3f0ec86 should fix the issue, please confirm. Thanks, |
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Observed Behavior
In ibex_decoder, rf_we is not assigned in opcode case block
"unique case (opcode)
...
OPCODE_LOAD: begin
rf_ren_a_o = 1'b1;
data_req_o = 1'b1;
data_type_o = 2'b00;
..
"
For configuration RV32E, illegal destination not detetcted as in example for instruction lh x20, 1956(x4)
See snap
Expected Behavior
Steps to reproduce the issue
My Environment
EDA tool and version:
Operating system:
Version of the Ibex source code:
d3672fe
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