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Hi, thanks for your great work and sharing. When I try to compile the hls project for shiftnet, and program is pending in the syn process. May I know if your code is deployed on FPGA sucessfully? thanks
The text was updated successfully, but these errors were encountered:
Hi, thanks for your great work and sharing. When I try to compile the hls project for shiftnet, and program is pending in the syn process. May I know if your code is deployed on FPGA sucessfully? thanks
The text was updated successfully, but these errors were encountered: