From db22443350c8edee6c0208a33dd5cad53446ba4c Mon Sep 17 00:00:00 2001 From: Marco Castelluccio Date: Mon, 16 Oct 2023 11:45:41 +0000 Subject: [PATCH] Bug 1850864 - [riscv]wasm: Generalize load/store instructions for multiple memories. r=jseward Depends on D187164 Differential Revision: https://phabricator.services.mozilla.com/D187165 UltraBlame original commit: 98f0129136a137644c8fa17d85f655c7d98abeb1 --- js/src/jit/riscv64/LIR-riscv64.h | 16 ++++++++++++++++ js/src/wasm/WasmBCMemory.cpp | 17 ++++++----------- 2 files changed, 22 insertions(+), 11 deletions(-) diff --git a/js/src/jit/riscv64/LIR-riscv64.h b/js/src/jit/riscv64/LIR-riscv64.h index eb87e7448dfc5..bdd68a54ef9f5 100644 --- a/js/src/jit/riscv64/LIR-riscv64.h +++ b/js/src/jit/riscv64/LIR-riscv64.h @@ -1629,6 +1629,22 @@ getInt64Operand ; } const +LAllocation +* +memoryBase +( +) +{ +return +getOperand +( +1 ++ +INT64_PIECES +) +; +} +const MWasmAtomicExchangeHeap * mir diff --git a/js/src/wasm/WasmBCMemory.cpp b/js/src/wasm/WasmBCMemory.cpp index a2c2d14522cda..979d5191e868b 100644 --- a/js/src/wasm/WasmBCMemory.cpp +++ b/js/src/wasm/WasmBCMemory.cpp @@ -5000,12 +5000,6 @@ temp elif defined ( -JS_CODEGEN_MIPS64 -) -| -| -defined -( JS_CODEGEN_RISCV64 ) / @@ -5063,6 +5057,7 @@ executeLoad access check instance +memoryBase RegI32 ( ptr @@ -9824,7 +9819,7 @@ const MemoryAccessDesc & access -BaseIndex +Address srcAddr AtomicOp op @@ -11094,7 +11089,7 @@ const MemoryAccessDesc & access -BaseIndex +Address srcAddr AtomicOp op @@ -12547,7 +12542,7 @@ const MemoryAccessDesc & access -BaseIndex +Address srcAddr RegI32 rv @@ -15080,7 +15075,7 @@ const MemoryAccessDesc & access -BaseIndex +Address srcAddr RegI32 rexpect @@ -16783,7 +16778,7 @@ const MemoryAccessDesc & access -BaseIndex +Address srcAddr RegI64 rexpect