[capture] CW310 / Husky power measurements, level toggles during capture

[johannheyszl]

When capturing traces on a CW310 / Husky setup we get traces on two different levels seemingly at random. Tested using: ./capture.py --cfg-file capture_aes_cw310.yaml capture aes-random --num-traces 100 --plot-traces 100. Traces distributions are on those two levels:

cc @vogelpi @vrozic @nasahlpa

[jpcrypt]

If you're using an externally generated sampling clock (i.e. from CW310; not a Husky-generated clock), you could be running into this problem (which we've since fixed): newaetech/chipwhisperer#448

[johannheyszl]

Thanks, the description says "Once the clocks are set, their relative phase stays constant, but any changes to scope.clock can affect the phase.", however, we seem to see toggles between traces in a long set where scope.clock.clkgen_src = 'extclk' is only done once at beginning. Does it still apply?

[jpcrypt]

No, it wouldn't - I had a closer look at your capture.py script and the only way I can see for the issue that I highlighted to arise is across multiple capture.py runs (not within the same run). Sorry for the misdirect!

[johannheyszl]

Issue not present when using Waverunner scope (same node on CW310, 1GS/s)

[johannheyszl]

Found out that when changing the binary running on OT, this issue can go away, but there is no reasonable explanation. In this commit I have added a function that is not called in the test, but leads to the issue going away (both freshly compiled for comparison under the same environment). The entire issue is reproducible on different setups using the same bitstreams and binaries.

Will not investigate further since not expected to be issue on post silicon.
Inspection of captured traces is recommended to detect issue.