From 4ced6e4c51342ae2c5cb7ee74f7e0dcf222c1908 Mon Sep 17 00:00:00 2001 From: Piotr Wegrzyn Date: Mon, 25 Nov 2024 12:30:15 +0100 Subject: [PATCH] cores/clock/intel: add reset to Intel PLLs --- litex/soc/cores/clock/intel_common.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/litex/soc/cores/clock/intel_common.py b/litex/soc/cores/clock/intel_common.py index d5ea7d012..9789003b9 100644 --- a/litex/soc/cores/clock/intel_common.py +++ b/litex/soc/cores/clock/intel_common.py @@ -116,7 +116,7 @@ def do_finalize(self): p_OPERATION_MODE = "NORMAL", i_INCLK = self.clkin, o_CLK = clks, - i_ARESET = 0, + i_ARESET = self.reset, i_CLKENA = 2**self.nclkouts_max - 1, i_EXTCLKENA = 0xf, i_FBIN = 1,