From 2ccd9d708ff15c9eed297839d18c53200eb6486b Mon Sep 17 00:00:00 2001 From: Marek Materzok Date: Fri, 3 Nov 2023 10:00:49 +0100 Subject: [PATCH 1/4] Fix alignment of data segments --- test/regression/memory.py | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/test/regression/memory.py b/test/regression/memory.py index 9b26209f4..1eadede2c 100644 --- a/test/regression/memory.py +++ b/test/regression/memory.py @@ -3,6 +3,7 @@ from enum import Enum, IntFlag, auto from typing import Optional, TypeVar from dataclasses import dataclass, replace +from amaranth.utils import log2_int from elftools.elf.constants import P_FLAGS from elftools.elf.elffile import ELFFile, Segment from coreblocks.params.configurations import CoreConfiguration @@ -160,17 +161,21 @@ def load_segment(segment: Segment, *, disable_write_protection: bool = False) -> if flags_raw & P_FLAGS.PF_X: flags |= SegmentFlags.EXECUTABLE + config = CoreConfiguration() if flags_raw & P_FLAGS.PF_X: - # align only instruction section to full icache lines - align_bits = CoreConfiguration().icache_block_size_bits + # align instruction section to full icache lines + align_bits = config.icache_block_size_bits + else: + # align to memory words + align_bits = log2_int(config.xlen // 8) - align_data_front = seg_start - align_down_to_power_of_two(seg_start, align_bits) - align_data_back = align_to_power_of_two(seg_end, align_bits) - seg_end + align_data_front = seg_start - align_down_to_power_of_two(seg_start, align_bits) + align_data_back = align_to_power_of_two(seg_end, align_bits) - seg_end - data = b"\x00" * align_data_front + data + b"\x00" * align_data_back + data = b"\x00" * align_data_front + data + b"\x00" * align_data_back - seg_start = align_down_to_power_of_two(seg_start, align_bits) - seg_end = align_to_power_of_two(seg_end, align_bits) + seg_start = align_down_to_power_of_two(seg_start, align_bits) + seg_end = align_to_power_of_two(seg_end, align_bits) return RandomAccessMemory(range(seg_start, seg_end), flags, data) From f1b24bd2b7567832193997de0592b5577a1b148a Mon Sep 17 00:00:00 2001 From: Marek Materzok Date: Fri, 3 Nov 2023 11:36:53 +0100 Subject: [PATCH 2/4] No fail on undefined by default --- test/regression/memory.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/regression/memory.py b/test/regression/memory.py index 1eadede2c..876883d77 100644 --- a/test/regression/memory.py +++ b/test/regression/memory.py @@ -98,7 +98,7 @@ def write(self, req: WriteRequest) -> WriteReply: class CoreMemoryModel: - def __init__(self, segments: list[MemorySegment], fail_on_undefined=True): + def __init__(self, segments: list[MemorySegment], fail_on_undefined=False): self.segments = segments self.fail_on_undefined = fail_on_undefined From de02c823b0f6049990eec4b395043ec416053e13 Mon Sep 17 00:00:00 2001 From: Marek Materzok Date: Fri, 3 Nov 2023 12:18:38 +0100 Subject: [PATCH 3/4] Workaround --- test/regression/memory.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/test/regression/memory.py b/test/regression/memory.py index 876883d77..4ec073459 100644 --- a/test/regression/memory.py +++ b/test/regression/memory.py @@ -165,9 +165,10 @@ def load_segment(segment: Segment, *, disable_write_protection: bool = False) -> if flags_raw & P_FLAGS.PF_X: # align instruction section to full icache lines align_bits = config.icache_block_size_bits + # workaround for fetching/stalling issue + align_bits += 1 else: - # align to memory words - align_bits = log2_int(config.xlen // 8) + align_bits = 0 align_data_front = seg_start - align_down_to_power_of_two(seg_start, align_bits) align_data_back = align_to_power_of_two(seg_end, align_bits) - seg_end From 7d45ab28c2cedb14104500eb8aa41d66a5237b92 Mon Sep 17 00:00:00 2001 From: Marek Materzok Date: Fri, 3 Nov 2023 12:48:24 +0100 Subject: [PATCH 4/4] Workaround --- test/regression/memory.py | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/test/regression/memory.py b/test/regression/memory.py index 4ec073459..f1640f71a 100644 --- a/test/regression/memory.py +++ b/test/regression/memory.py @@ -3,7 +3,6 @@ from enum import Enum, IntFlag, auto from typing import Optional, TypeVar from dataclasses import dataclass, replace -from amaranth.utils import log2_int from elftools.elf.constants import P_FLAGS from elftools.elf.elffile import ELFFile, Segment from coreblocks.params.configurations import CoreConfiguration @@ -98,7 +97,7 @@ def write(self, req: WriteRequest) -> WriteReply: class CoreMemoryModel: - def __init__(self, segments: list[MemorySegment], fail_on_undefined=False): + def __init__(self, segments: list[MemorySegment], fail_on_undefined=True): self.segments = segments self.fail_on_undefined = fail_on_undefined @@ -166,17 +165,18 @@ def load_segment(segment: Segment, *, disable_write_protection: bool = False) -> # align instruction section to full icache lines align_bits = config.icache_block_size_bits # workaround for fetching/stalling issue - align_bits += 1 + extend_end = 2**config.icache_block_size_bits else: align_bits = 0 + extend_end = 0 align_data_front = seg_start - align_down_to_power_of_two(seg_start, align_bits) - align_data_back = align_to_power_of_two(seg_end, align_bits) - seg_end + align_data_back = align_to_power_of_two(seg_end, align_bits) - seg_end + extend_end data = b"\x00" * align_data_front + data + b"\x00" * align_data_back seg_start = align_down_to_power_of_two(seg_start, align_bits) - seg_end = align_to_power_of_two(seg_end, align_bits) + seg_end = align_to_power_of_two(seg_end, align_bits) + extend_end return RandomAccessMemory(range(seg_start, seg_end), flags, data)