diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree
index 223e434cd..19112a7e0 100644
Binary files a/.doctrees/api.doctree and b/.doctrees/api.doctree differ
diff --git a/.doctrees/auto_graph.doctree b/.doctrees/auto_graph.doctree
index 406a5c8fa..8dbfba44e 100644
Binary files a/.doctrees/auto_graph.doctree and b/.doctrees/auto_graph.doctree differ
diff --git a/.doctrees/current-graph.doctree b/.doctrees/current-graph.doctree
index 9c1fd0fb5..421bb7c31 100644
Binary files a/.doctrees/current-graph.doctree and b/.doctrees/current-graph.doctree differ
diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle
index 55aa34e22..d870bb378 100644
Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ
diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt
index ecd50e847..37f3bf235 100644
--- a/_sources/auto_graph.rst.txt
+++ b/_sources/auto_graph.rst.txt
@@ -4,24 +4,24 @@
        subgraph TransactionModule["TransactionModule"]
            subgraph CoreTestElaboratable["elaboratable CoreTestElaboratable"]
                subgraph Core["core Core"]
-                   Core_DiscardBranchVerify["DiscardBranchVerify"]
                    Core_InitFreeRFFifo["InitFreeRFFifo"]
+                   Core_DiscardBranchVerify["DiscardBranchVerify"]
                    subgraph WishboneMaster["wb_master_instr WishboneMaster"]
                        WishboneMaster_WishboneMaster["WishboneMaster"]
                        WishboneMaster_result["result"]
                        WishboneMaster_request["request"]
                        subgraph Forwarder["result Forwarder"]
-                           Forwarder_read["read"]
                            Forwarder_write["write"]
+                           Forwarder_read["read"]
                        end
                    end
                    subgraph WishboneMaster1["wb_master_data WishboneMaster"]
-                       WishboneMaster1_result["result"]
-                       WishboneMaster1_request["request"]
                        WishboneMaster1_WishboneMaster["WishboneMaster"]
+                       WishboneMaster1_request["request"]
+                       WishboneMaster1_result["result"]
                        subgraph Forwarder1["result Forwarder"]
-                           Forwarder1_write["write"]
                            Forwarder1_read["read"]
+                           Forwarder1_write["write"]
                        end
                    end
                    subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"]
@@ -47,8 +47,8 @@
                            Serializer1_Serializer2["Serializer"]
                            Serializer1_Serializer3["Serializer"]
                            subgraph BasicFifo1["pending_requests BasicFifo"]
-                               BasicFifo1_read["read"]
                                BasicFifo1_write["write"]
+                               BasicFifo1_read["read"]
                            end
                        end
                    end
@@ -57,8 +57,8 @@
                        CoreInstructionCounter_decrement["decrement"]
                    end
                    subgraph FIFO["fifo_fetch FIFO"]
-                       FIFO_write["write"]
                        FIFO_read["read"]
+                       FIFO_write["write"]
                    end
                    subgraph MethodMap["core_counter_increment_discard_map MethodMap"]
                        MethodMap_method["method"]
@@ -75,15 +75,15 @@
                        SimpleCommonBusCacheRefiller_accept_refill["accept_refill"]
                        SimpleCommonBusCacheRefiller_start_refill["start_refill"]
                        subgraph Forwarder2["address_fwd Forwarder"]
-                           Forwarder2_read["read"]
                            Forwarder2_write["write"]
+                           Forwarder2_read["read"]
                        end
                    end
                    subgraph ICache["icache ICache"]
                        ICache_ICache["ICache"]
+                       ICache_accept_res["accept_res"]
                        ICache_ICache1["ICache"]
                        ICache_ICache2["ICache"]
-                       ICache_accept_res["accept_res"]
                        ICache_issue_req["issue_req"]
                        ICache_ICache3["ICache"]
                        subgraph HwCounter["perf_loads HwCounter"]
@@ -117,8 +117,8 @@
                            FIFO2_write["write"]
                        end
                        subgraph Forwarder3["res_fwd Forwarder"]
-                           Forwarder3_read["read"]
                            Forwarder3_write["write"]
+                           Forwarder3_read["read"]
                        end
                    end
                    subgraph FRAT["FRAT FRAT"]
@@ -129,10 +129,10 @@
                        RRAT_peek["peek"]
                    end
                    subgraph RegisterFile["RF RegisterFile"]
-                       RegisterFile_write["write"]
-                       RegisterFile_read2["read2"]
                        RegisterFile_read1["read1"]
                        RegisterFile_free["free"]
+                       RegisterFile_write["write"]
+                       RegisterFile_read2["read2"]
                    end
                    subgraph ReorderBuffer["ROB ReorderBuffer"]
                        ReorderBuffer_put["put"]
@@ -141,8 +141,8 @@
                        ReorderBuffer_retire["retire"]
                        ReorderBuffer_peek["peek"]
                        subgraph LatencyMeasurer1["perf_rob_wait_time LatencyMeasurer"]
-                           LatencyMeasurer1__start["_start"]
                            LatencyMeasurer1__stop["_stop"]
+                           LatencyMeasurer1__start["_start"]
                            subgraph HwExpHistogram1["histogram HwExpHistogram"]
                                HwExpHistogram1__add["_add"]
                            end
@@ -153,22 +153,22 @@
                        end
                    end
                    subgraph Fetch["fetch Fetch"]
-                       Fetch_resume["resume"]
                        Fetch_Fetch["Fetch"]
-                       Fetch_stall_exception["stall_exception"]
                        Fetch_Fetch1["Fetch"]
+                       Fetch_resume["resume"]
+                       Fetch_stall_exception["stall_exception"]
                        subgraph BasicFifo3["fetch_target_queue BasicFifo"]
                            BasicFifo3_read["read"]
                            BasicFifo3_write["write"]
                        end
                    end
                    subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"]
+                       ExceptionCauseRegister_get["get"]
                        ExceptionCauseRegister_report["report"]
                        ExceptionCauseRegister_clear["clear"]
-                       ExceptionCauseRegister_get["get"]
                        subgraph BasicFifo4["fu_report_fifo BasicFifo"]
-                           BasicFifo4_write["write"]
                            BasicFifo4_read["read"]
+                           BasicFifo4_write["write"]
                        end
                        subgraph ConnectTrans["report_connector ConnectTrans"]
                            ConnectTrans_ConnectTrans["ConnectTrans"]
@@ -197,10 +197,10 @@
                            MethodProduct1_method["method"]
                        end
                        subgraph RSFuncBlock["rs_block_0 RSFuncBlock"]
-                           RSFuncBlock_update["update"]
-                           RSFuncBlock_insert["insert"]
-                           RSFuncBlock_select["select"]
                            RSFuncBlock_get_result["get_result"]
+                           RSFuncBlock_select["select"]
+                           RSFuncBlock_insert["insert"]
+                           RSFuncBlock_update["update"]
                            subgraph RS["rs RS"]
                                RS_update["update"]
                                RS_RS["RS"]
@@ -213,22 +213,22 @@
                                RS_insert["insert"]
                            end
                            subgraph AluFuncUnit["func_unit_0 AluFuncUnit"]
-                               AluFuncUnit_accept["accept"]
                                AluFuncUnit_issue["issue"]
+                               AluFuncUnit_accept["accept"]
                                subgraph FIFO4["fifo FIFO"]
-                                   FIFO4_write["write"]
                                    FIFO4_read["read"]
+                                   FIFO4_write["write"]
                                end
                            end
                            subgraph WakeupSelect["wakeup_select_0 WakeupSelect"]
                                WakeupSelect_WakeupSelect["WakeupSelect"]
                            end
                            subgraph ShiftFuncUnit["func_unit_1 ShiftFuncUnit"]
-                               ShiftFuncUnit_accept["accept"]
                                ShiftFuncUnit_issue["issue"]
+                               ShiftFuncUnit_accept["accept"]
                                subgraph FIFO5["fifo FIFO"]
-                                   FIFO5_write["write"]
                                    FIFO5_read["read"]
+                                   FIFO5_write["write"]
                                end
                            end
                            subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"]
@@ -259,8 +259,8 @@
                                WakeupSelect2_WakeupSelect["WakeupSelect"]
                            end
                            subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"]
-                               ExceptionFuncUnit_accept["accept"]
                                ExceptionFuncUnit_issue["issue"]
+                               ExceptionFuncUnit_accept["accept"]
                                subgraph FIFO8["fifo FIFO"]
                                    FIFO8_read["read"]
                                    FIFO8_write["write"]
@@ -270,12 +270,12 @@
                                WakeupSelect3_WakeupSelect["WakeupSelect"]
                            end
                            subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"]
-                               PrivilegedFuncUnit_issue["issue"]
                                PrivilegedFuncUnit_accept["accept"]
                                PrivilegedFuncUnit_precommit["precommit"]
+                               PrivilegedFuncUnit_issue["issue"]
                                subgraph BasicFifo5["fetch_resume_fifo BasicFifo"]
-                                   BasicFifo5_write["write"]
                                    BasicFifo5_read["read"]
+                                   BasicFifo5_write["write"]
                                end
                            end
                            subgraph WakeupSelect4["wakeup_select_4 WakeupSelect"]
@@ -307,41 +307,41 @@
                            end
                        end
                        subgraph LSUDummy["rs_block_1 LSUDummy"]
-                           LSUDummy_select["select"]
+                           LSUDummy_insert["insert"]
+                           LSUDummy_precommit["precommit"]
                            LSUDummy_get_result["get_result"]
+                           LSUDummy_update["update"]
                            LSUDummy_LSUDummy["LSUDummy"]
                            LSUDummy_LSUDummy1["LSUDummy"]
-                           LSUDummy_update["update"]
-                           LSUDummy_insert["insert"]
                            LSUDummy_LSUDummy2["LSUDummy"]
-                           LSUDummy_precommit["precommit"]
+                           LSUDummy_select["select"]
                            subgraph Forwarder6["forwarder Forwarder"]
                                Forwarder6_write["write"]
                                Forwarder6_read["read"]
                            end
                            subgraph LSURequester["requester LSURequester"]
-                               LSURequester_issue_cond0["issue_cond0"]
-                               LSURequester_accept_cond1["accept_cond1"]
-                               LSURequester_issue_cond1["issue_cond1"]
                                LSURequester_accept["accept"]
-                               LSURequester_issue_cond2["issue_cond2"]
                                LSURequester_accept_cond0["accept_cond0"]
+                               LSURequester_issue_cond2["issue_cond2"]
                                LSURequester_issue["issue"]
+                               LSURequester_accept_cond1["accept_cond1"]
+                               LSURequester_issue_cond0["issue_cond0"]
+                               LSURequester_issue_cond1["issue_cond1"]
                            end
                        end
                        subgraph CSRUnit["rs_block_2 CSRUnit"]
-                           CSRUnit_get_result["get_result"]
+                           CSRUnit_select["select"]
+                           CSRUnit_CSRUnit["CSRUnit"]
+                           CSRUnit_update["update"]
                            CSRUnit_precommit["precommit"]
+                           CSRUnit_get_result["get_result"]
                            CSRUnit_insert["insert"]
-                           CSRUnit_CSRUnit["CSRUnit"]
                            CSRUnit_fetch_resume["fetch_resume"]
-                           CSRUnit_select["select"]
-                           CSRUnit_update["update"]
                        end
                        subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"]
                            MethodTryProduct_MethodTryProduct["MethodTryProduct"]
-                           MethodTryProduct_MethodTryProduct1["MethodTryProduct"]
                            MethodTryProduct_method["method"]
+                           MethodTryProduct_MethodTryProduct1["MethodTryProduct"]
                            MethodTryProduct_MethodTryProduct2["MethodTryProduct"]
                        end
                        subgraph Collector2["FetchResumeKey_unifier Collector"]
@@ -364,16 +364,16 @@
                        ResultAnnouncement_ResultAnnouncement["ResultAnnouncement"]
                    end
                    subgraph InterruptController["interrupt_controller InterruptController"]
+                       InterruptController_report_interrupt["report_interrupt"]
                        InterruptController_entry["entry"]
                        InterruptController_mret["mret"]
-                       InterruptController_report_interrupt["report_interrupt"]
                    end
                    subgraph GenericCSRRegisters["csr_generic GenericCSRRegisters"]
                        GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"]
                        subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"]
                            subgraph CSRRegister["mcause CSRRegister"]
-                               CSRRegister__fu_read["_fu_read"]
                                CSRRegister__fu_write["_fu_write"]
+                               CSRRegister__fu_read["_fu_read"]
                                CSRRegister_write["write"]
                            end
                            subgraph CSRRegister1["mtvec CSRRegister"]
@@ -382,36 +382,36 @@
                                CSRRegister1__fu_write["_fu_write"]
                            end
                            subgraph CSRRegister2["mepc CSRRegister"]
+                               CSRRegister2_read["read"]
                                CSRRegister2_write["write"]
                                CSRRegister2__fu_write["_fu_write"]
-                               CSRRegister2_read["read"]
                                CSRRegister2__fu_read["_fu_read"]
                            end
                        end
                        subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"]
                            DoubleCounterCSR_increment["increment"]
                            subgraph CSRRegister3["register_low CSRRegister"]
+                               CSRRegister3__fu_read["_fu_read"]
                                CSRRegister3_write["write"]
                                CSRRegister3_read["read"]
-                               CSRRegister3__fu_read["_fu_read"]
                            end
                            subgraph CSRRegister4["register_high CSRRegister"]
                                CSRRegister4_read["read"]
-                               CSRRegister4__fu_read["_fu_read"]
                                CSRRegister4_write["write"]
+                               CSRRegister4__fu_read["_fu_read"]
                            end
                        end
                        subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"]
                            DoubleCounterCSR1_increment["increment"]
                            subgraph CSRRegister5["register_low CSRRegister"]
+                               CSRRegister5__fu_read["_fu_read"]
                                CSRRegister5_read["read"]
                                CSRRegister5_write["write"]
-                               CSRRegister5__fu_read["_fu_read"]
                            end
                            subgraph CSRRegister6["register_high CSRRegister"]
-                               CSRRegister6_read["read"]
-                               CSRRegister6__fu_read["_fu_read"]
                                CSRRegister6_write["write"]
+                               CSRRegister6__fu_read["_fu_read"]
+                               CSRRegister6_read["read"]
                            end
                        end
                    end
@@ -427,15 +427,15 @@
                    end
                    subgraph Scheduler["scheduler Scheduler"]
                        subgraph FIFO10["alloc_rename_buf FIFO"]
-                           FIFO10_write["write"]
                            FIFO10_read["read"]
+                           FIFO10_write["write"]
                        end
                        subgraph RegAllocation["reg_alloc RegAllocation"]
                            RegAllocation_RegAllocation["RegAllocation"]
                        end
                        subgraph FIFO11["rename_out_buf FIFO"]
-                           FIFO11_read["read"]
                            FIFO11_write["write"]
+                           FIFO11_read["read"]
                        end
                        subgraph Renaming["renaming Renaming"]
                            Renaming_Renaming["Renaming"]
@@ -448,8 +448,8 @@
                            ROBAllocation_ROBAllocation["ROBAllocation"]
                        end
                        subgraph FIFO13["rs_select_out_buf FIFO"]
-                           FIFO13_read["read"]
                            FIFO13_write["write"]
+                           FIFO13_read["read"]
                        end
                        subgraph RSSelection["rs_selector RSSelection"]
                            RSSelection_RSSelection["RSSelection"]
@@ -469,25 +469,25 @@
                        ConnectTrans11_ConnectTrans["ConnectTrans"]
                    end
                    subgraph Retirement["retirement Retirement"]
+                       Retirement_Retirement_cond1["Retirement_cond1"]
                        Retirement_Retirement["Retirement"]
-                       Retirement_core_state["core_state"]
                        Retirement_Retirement1["Retirement"]
-                       Retirement_Retirement_cond1["Retirement_cond1"]
                        Retirement_Retirement2["Retirement"]
-                       Retirement_Retirement_cond0["Retirement_cond0"]
                        Retirement_Retirement3["Retirement"]
                        Retirement_Retirement4["Retirement"]
+                       Retirement_Retirement_cond0["Retirement_cond0"]
+                       Retirement_core_state["core_state"]
                        subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"]
                            DoubleCounterCSR2_increment["increment"]
                            subgraph CSRRegister7["register_low CSRRegister"]
                                CSRRegister7__fu_read["_fu_read"]
-                               CSRRegister7_read["read"]
                                CSRRegister7_write["write"]
+                               CSRRegister7_read["read"]
                            end
                            subgraph CSRRegister8["register_high CSRRegister"]
-                               CSRRegister8__fu_read["_fu_read"]
                                CSRRegister8_read["read"]
                                CSRRegister8_write["write"]
+                               CSRRegister8__fu_read["_fu_read"]
                            end
                        end
                        subgraph HwCounter9["perf_instr_ret HwCounter"]
@@ -508,16 +508,16 @@
            end
            subgraph TransactionManager["transactionManager TransactionManager"]
                TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"]
-               TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"]
-               TransactionManager_accept_cond1_LSUDummy["accept_cond1_LSUDummy"]
-               TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"]
-               TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"]
                TransactionManager_accept_cond0_LSUDummy["accept_cond0_LSUDummy"]
+               TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"]
+               TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"]
+               TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"]
                TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"]
+               TransactionManager_accept_cond1_LSUDummy["accept_cond1_LSUDummy"]
            end
        end
    Core_InitFreeRFFifo --> BasicFifo2_write
-   Retirement_Retirement3 --> BasicFifo2_write
+   Retirement_Retirement --> BasicFifo2_write
    TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write
    TransactionManager_Retirement_Retirement_cond0 --> BasicFifo2_write
    FIFO6_read --> Core_DiscardBranchVerify
@@ -528,20 +528,20 @@
    SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1
    SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write
    SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request
-   ICache_ICache <--> HwCounter4__incr
-   ICache_ICache3 <--> HwCounter3__incr
-   ICache_ICache3 <--> HwCounter2__incr
-   ICache_ICache3 <--> HwCounter1__incr
-   ICache_ICache3 --> Forwarder3_write
-   ICache_ICache1 --> SimpleCommonBusCacheRefiller_start_refill
-   ICache_ICache1 --> Forwarder2_write
-   ICache_ICache2 --> Forwarder2_write
-   SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache2
-   WishboneMasterAdapter_get_read_response --> ICache_ICache2
-   Serializer_Serializer --> ICache_ICache2
-   BasicFifo_read --> ICache_ICache2
-   WishboneMaster_result --> ICache_ICache2
-   Forwarder_read --> ICache_ICache2
+   ICache_ICache1 <--> HwCounter4__incr
+   ICache_ICache2 <--> HwCounter3__incr
+   ICache_ICache2 <--> HwCounter2__incr
+   ICache_ICache2 <--> HwCounter1__incr
+   ICache_ICache2 --> Forwarder3_write
+   ICache_ICache --> SimpleCommonBusCacheRefiller_start_refill
+   ICache_ICache --> Forwarder2_write
+   ICache_ICache3 --> Forwarder2_write
+   SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache3
+   WishboneMasterAdapter_get_read_response --> ICache_ICache3
+   Serializer_Serializer --> ICache_ICache3
+   BasicFifo_read --> ICache_ICache3
+   WishboneMaster_result --> ICache_ICache3
+   Forwarder_read --> ICache_ICache3
    Fetch_Fetch --> ICache_issue_req
    Fetch_Fetch <--> HwCounter__incr
    Fetch_Fetch <--> LatencyMeasurer__start
@@ -571,7 +571,7 @@
    RegAllocation_RegAllocation --> FIFO10_write
    FIFO10_read --> Renaming_Renaming
    Renaming_Renaming --> FRAT_rename
-   Retirement_Retirement3 --> FRAT_rename
+   Retirement_Retirement --> FRAT_rename
    TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename
    Renaming_Renaming --> FIFO11_write
    FIFO11_read --> ROBAllocation_ROBAllocation
@@ -579,18 +579,18 @@
    ROBAllocation_ROBAllocation <--> LatencyMeasurer1__start
    ROBAllocation_ROBAllocation --> FIFO3_write
    ROBAllocation_ROBAllocation --> FIFO12_write
-   FIFO12_read --> RSSelection_RSSelection
-   RSSelection_RSSelection --> Forwarder8_write
-   Forwarder8_read --> RSSelection_RSSelection2
+   FIFO12_read --> RSSelection_RSSelection1
+   RSSelection_RSSelection1 --> Forwarder8_write
+   Forwarder8_read --> RSSelection_RSSelection
    Forwarder8_read --> RSSelection_RSSelection3
-   Forwarder8_read --> RSSelection_RSSelection1
-   RSFuncBlock_select --> RSSelection_RSSelection2
-   RS_select --> RSSelection_RSSelection2
-   RSSelection_RSSelection2 --> FIFO13_write
+   Forwarder8_read --> RSSelection_RSSelection2
+   RSFuncBlock_select --> RSSelection_RSSelection
+   RS_select --> RSSelection_RSSelection
+   RSSelection_RSSelection --> FIFO13_write
    RSSelection_RSSelection3 --> FIFO13_write
-   RSSelection_RSSelection1 --> FIFO13_write
+   RSSelection_RSSelection2 --> FIFO13_write
    RSSelection_RSSelection3 <--> LSUDummy_select
-   RSSelection_RSSelection1 <--> CSRUnit_select
+   RSSelection_RSSelection2 <--> CSRUnit_select
    FIFO13_read --> RSInsertion_RSInsertion
    RegisterFile_read1 --> RSInsertion_RSInsertion
    RegisterFile_read2 --> RSInsertion_RSInsertion
@@ -606,7 +606,7 @@
    Collector2_method --> ConnectTrans11_ConnectTrans
    Forwarder7_read --> ConnectTrans11_ConnectTrans
    ConnectTrans11_ConnectTrans --> Fetch_resume
-   Retirement_Retirement1 --> Fetch_resume
+   Retirement_Retirement4 --> Fetch_resume
    Collector_method --> ResultAnnouncement_ResultAnnouncement
    Forwarder4_read --> ResultAnnouncement_ResultAnnouncement
    ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done
@@ -660,12 +660,12 @@
    PrivilegedFuncUnit_accept --> ConnectTrans8_ConnectTrans
    CSRRegister2_read --> ConnectTrans8_ConnectTrans
    ConnectTrans8_ConnectTrans --> BasicFifo5_write
-   LSUDummy_LSUDummy --> Forwarder6_write
+   LSUDummy_LSUDummy1 --> Forwarder6_write
    TransactionManager_accept_cond0_LSUDummy --> Forwarder6_write
    TransactionManager_issue_cond1_LSUDummy --> Forwarder6_write
-   TransactionManager_accept_cond1_LSUDummy --> Forwarder6_write
    TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write
-   TransactionManager_LSUDummy_issue_cond0 --> Forwarder6_write
+   TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write
+   TransactionManager_accept_cond1_LSUDummy --> Forwarder6_write
    CSRRegister__fu_read --> CSRUnit_CSRUnit
    CSRUnit_CSRUnit --> CSRRegister__fu_write
    CSRRegister1__fu_read --> CSRUnit_CSRUnit
@@ -687,45 +687,45 @@
    LSUDummy_get_result --> ConnectTrans2_ConnectTrans
    Forwarder6_read --> ConnectTrans2_ConnectTrans
    CSRUnit_get_result --> ConnectTrans3_ConnectTrans
-   MethodTryProduct_MethodTryProduct --> PrivilegedFuncUnit_precommit
-   MethodTryProduct_MethodTryProduct <--> InterruptController_mret
-   MethodTryProduct_MethodTryProduct2 --> LSUDummy_precommit
+   MethodTryProduct_MethodTryProduct2 --> PrivilegedFuncUnit_precommit
+   MethodTryProduct_MethodTryProduct2 <--> InterruptController_mret
+   MethodTryProduct_MethodTryProduct --> LSUDummy_precommit
    MethodTryProduct_MethodTryProduct1 --> CSRUnit_precommit
    ConnectTrans9_ConnectTrans --> Forwarder7_write
    ConnectTrans10_ConnectTrans --> Forwarder7_write
    BasicFifo5_read --> ConnectTrans9_ConnectTrans
    CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans
-   ReorderBuffer_peek --> Retirement_Retirement4
-   ReorderBuffer_peek --> Retirement_Retirement
+   ReorderBuffer_peek --> Retirement_Retirement2
    ReorderBuffer_peek --> Retirement_Retirement3
+   ReorderBuffer_peek --> Retirement_Retirement
    ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1
    ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0
-   Retirement_Retirement4 --> MethodTryProduct_method
-   ExceptionCauseRegister_get --> Retirement_Retirement
+   Retirement_Retirement2 --> MethodTryProduct_method
+   ExceptionCauseRegister_get --> Retirement_Retirement3
    ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1
    ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0
-   Retirement_Retirement3 <--> ReorderBuffer_retire
+   Retirement_Retirement <--> ReorderBuffer_retire
    TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire
    TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire
-   Retirement_Retirement3 <--> LatencyMeasurer1__stop
+   Retirement_Retirement <--> LatencyMeasurer1__stop
    TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop
    TransactionManager_Retirement_Retirement_cond0 <--> LatencyMeasurer1__stop
-   FIFO3_read --> Retirement_Retirement3
+   FIFO3_read --> Retirement_Retirement
    FIFO3_read --> TransactionManager_Retirement_Retirement_cond1
    FIFO3_read --> TransactionManager_Retirement_Retirement_cond0
-   Retirement_Retirement3 --> HwExpHistogram1__add
+   Retirement_Retirement --> HwExpHistogram1__add
    TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add
    TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add
-   CoreInstructionCounter_decrement --> Retirement_Retirement3
+   CoreInstructionCounter_decrement --> Retirement_Retirement
    CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1
    CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0
-   RRAT_peek --> Retirement_Retirement3
+   RRAT_peek --> Retirement_Retirement
    RRAT_peek --> TransactionManager_Retirement_Retirement_cond1
-   Retirement_Retirement3 --> RegisterFile_free
+   Retirement_Retirement --> RegisterFile_free
    TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free
    TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free
-   CSRRegister1_read --> Retirement_Retirement1
-   Retirement_Retirement1 <--> ExceptionCauseRegister_clear
+   CSRRegister1_read --> Retirement_Retirement4
+   Retirement_Retirement4 <--> ExceptionCauseRegister_clear
    GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment
    CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters
    GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write
@@ -754,17 +754,24 @@
    TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read
    TransactionManager_issue_cond1_LSUDummy --> Serializer1_Serializer3
    TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write
-   TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write
+   TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write
    TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request
-   TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request
-   TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy1
-   TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy1
-   TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy1
+   TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request
+   TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy
+   TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy
+   TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy
    TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue
    TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue
-   TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue
-   TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement2
-   TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2
+   TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue
+   TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2
+   TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0
+   TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write
+   TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer2
+   TransactionManager_accept_cond1_LSUDummy <--> LSURequester_accept_cond1
+   WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_LSUDummy
+   Serializer1_Serializer --> TransactionManager_accept_cond1_LSUDummy
+   TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement1
+   TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement1
    TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write
    TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write
    TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write
@@ -772,10 +779,6 @@
    TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry
    TransactionManager_Retirement_Retirement_cond0 <--> InterruptController_entry
    TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1
-   TransactionManager_accept_cond1_LSUDummy <--> LSURequester_accept_cond1
-   WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_LSUDummy
-   Serializer1_Serializer2 --> TransactionManager_accept_cond1_LSUDummy
-   TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2
    TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0
    TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit
    TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment
@@ -784,6 +787,3 @@
    CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0
    TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write
    TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr
-   TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0
-   TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write
-   TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer
diff --git a/api.html b/api.html
index f86a2c32a..1253a360c 100644
--- a/api.html
+++ b/api.html
@@ -259,7 +259,7 @@ <h2>transactron<a class="headerlink" href="#transactron" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/assumptions.html b/assumptions.html
index d5bb64ee3..0cecb73f5 100644
--- a/assumptions.html
+++ b/assumptions.html
@@ -104,7 +104,7 @@ <h1>List of assumptions made during development<a class="headerlink" href="#list
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/auto_graph.html b/auto_graph.html
index 534a12154..6a7c82749 100644
--- a/auto_graph.html
+++ b/auto_graph.html
@@ -83,24 +83,24 @@
     subgraph TransactionModule[&quot;TransactionModule&quot;]
         subgraph CoreTestElaboratable[&quot;elaboratable CoreTestElaboratable&quot;]
             subgraph Core[&quot;core Core&quot;]
-                Core_DiscardBranchVerify[&quot;DiscardBranchVerify&quot;]
                 Core_InitFreeRFFifo[&quot;InitFreeRFFifo&quot;]
+                Core_DiscardBranchVerify[&quot;DiscardBranchVerify&quot;]
                 subgraph WishboneMaster[&quot;wb_master_instr WishboneMaster&quot;]
                     WishboneMaster_WishboneMaster[&quot;WishboneMaster&quot;]
                     WishboneMaster_result[&quot;result&quot;]
                     WishboneMaster_request[&quot;request&quot;]
                     subgraph Forwarder[&quot;result Forwarder&quot;]
-                        Forwarder_read[&quot;read&quot;]
                         Forwarder_write[&quot;write&quot;]
+                        Forwarder_read[&quot;read&quot;]
                     end
                 end
                 subgraph WishboneMaster1[&quot;wb_master_data WishboneMaster&quot;]
-                    WishboneMaster1_result[&quot;result&quot;]
-                    WishboneMaster1_request[&quot;request&quot;]
                     WishboneMaster1_WishboneMaster[&quot;WishboneMaster&quot;]
+                    WishboneMaster1_request[&quot;request&quot;]
+                    WishboneMaster1_result[&quot;result&quot;]
                     subgraph Forwarder1[&quot;result Forwarder&quot;]
-                        Forwarder1_write[&quot;write&quot;]
                         Forwarder1_read[&quot;read&quot;]
+                        Forwarder1_write[&quot;write&quot;]
                     end
                 end
                 subgraph WishboneMasterAdapter[&quot;bus_master_instr_adapter WishboneMasterAdapter&quot;]
@@ -126,8 +126,8 @@
                         Serializer1_Serializer2[&quot;Serializer&quot;]
                         Serializer1_Serializer3[&quot;Serializer&quot;]
                         subgraph BasicFifo1[&quot;pending_requests BasicFifo&quot;]
-                            BasicFifo1_read[&quot;read&quot;]
                             BasicFifo1_write[&quot;write&quot;]
+                            BasicFifo1_read[&quot;read&quot;]
                         end
                     end
                 end
@@ -136,8 +136,8 @@
                     CoreInstructionCounter_decrement[&quot;decrement&quot;]
                 end
                 subgraph FIFO[&quot;fifo_fetch FIFO&quot;]
-                    FIFO_write[&quot;write&quot;]
                     FIFO_read[&quot;read&quot;]
+                    FIFO_write[&quot;write&quot;]
                 end
                 subgraph MethodMap[&quot;core_counter_increment_discard_map MethodMap&quot;]
                     MethodMap_method[&quot;method&quot;]
@@ -154,15 +154,15 @@
                     SimpleCommonBusCacheRefiller_accept_refill[&quot;accept_refill&quot;]
                     SimpleCommonBusCacheRefiller_start_refill[&quot;start_refill&quot;]
                     subgraph Forwarder2[&quot;address_fwd Forwarder&quot;]
-                        Forwarder2_read[&quot;read&quot;]
                         Forwarder2_write[&quot;write&quot;]
+                        Forwarder2_read[&quot;read&quot;]
                     end
                 end
                 subgraph ICache[&quot;icache ICache&quot;]
                     ICache_ICache[&quot;ICache&quot;]
+                    ICache_accept_res[&quot;accept_res&quot;]
                     ICache_ICache1[&quot;ICache&quot;]
                     ICache_ICache2[&quot;ICache&quot;]
-                    ICache_accept_res[&quot;accept_res&quot;]
                     ICache_issue_req[&quot;issue_req&quot;]
                     ICache_ICache3[&quot;ICache&quot;]
                     subgraph HwCounter[&quot;perf_loads HwCounter&quot;]
@@ -196,8 +196,8 @@
                         FIFO2_write[&quot;write&quot;]
                     end
                     subgraph Forwarder3[&quot;res_fwd Forwarder&quot;]
-                        Forwarder3_read[&quot;read&quot;]
                         Forwarder3_write[&quot;write&quot;]
+                        Forwarder3_read[&quot;read&quot;]
                     end
                 end
                 subgraph FRAT[&quot;FRAT FRAT&quot;]
@@ -208,10 +208,10 @@
                     RRAT_peek[&quot;peek&quot;]
                 end
                 subgraph RegisterFile[&quot;RF RegisterFile&quot;]
-                    RegisterFile_write[&quot;write&quot;]
-                    RegisterFile_read2[&quot;read2&quot;]
                     RegisterFile_read1[&quot;read1&quot;]
                     RegisterFile_free[&quot;free&quot;]
+                    RegisterFile_write[&quot;write&quot;]
+                    RegisterFile_read2[&quot;read2&quot;]
                 end
                 subgraph ReorderBuffer[&quot;ROB ReorderBuffer&quot;]
                     ReorderBuffer_put[&quot;put&quot;]
@@ -220,8 +220,8 @@
                     ReorderBuffer_retire[&quot;retire&quot;]
                     ReorderBuffer_peek[&quot;peek&quot;]
                     subgraph LatencyMeasurer1[&quot;perf_rob_wait_time LatencyMeasurer&quot;]
-                        LatencyMeasurer1__start[&quot;_start&quot;]
                         LatencyMeasurer1__stop[&quot;_stop&quot;]
+                        LatencyMeasurer1__start[&quot;_start&quot;]
                         subgraph HwExpHistogram1[&quot;histogram HwExpHistogram&quot;]
                             HwExpHistogram1__add[&quot;_add&quot;]
                         end
@@ -232,22 +232,22 @@
                     end
                 end
                 subgraph Fetch[&quot;fetch Fetch&quot;]
-                    Fetch_resume[&quot;resume&quot;]
                     Fetch_Fetch[&quot;Fetch&quot;]
-                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     Fetch_Fetch1[&quot;Fetch&quot;]
+                    Fetch_resume[&quot;resume&quot;]
+                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     subgraph BasicFifo3[&quot;fetch_target_queue BasicFifo&quot;]
                         BasicFifo3_read[&quot;read&quot;]
                         BasicFifo3_write[&quot;write&quot;]
                     end
                 end
                 subgraph ExceptionCauseRegister[&quot;exception_cause_register ExceptionCauseRegister&quot;]
+                    ExceptionCauseRegister_get[&quot;get&quot;]
                     ExceptionCauseRegister_report[&quot;report&quot;]
                     ExceptionCauseRegister_clear[&quot;clear&quot;]
-                    ExceptionCauseRegister_get[&quot;get&quot;]
                     subgraph BasicFifo4[&quot;fu_report_fifo BasicFifo&quot;]
-                        BasicFifo4_write[&quot;write&quot;]
                         BasicFifo4_read[&quot;read&quot;]
+                        BasicFifo4_write[&quot;write&quot;]
                     end
                     subgraph ConnectTrans[&quot;report_connector ConnectTrans&quot;]
                         ConnectTrans_ConnectTrans[&quot;ConnectTrans&quot;]
@@ -276,10 +276,10 @@
                         MethodProduct1_method[&quot;method&quot;]
                     end
                     subgraph RSFuncBlock[&quot;rs_block_0 RSFuncBlock&quot;]
-                        RSFuncBlock_update[&quot;update&quot;]
-                        RSFuncBlock_insert[&quot;insert&quot;]
-                        RSFuncBlock_select[&quot;select&quot;]
                         RSFuncBlock_get_result[&quot;get_result&quot;]
+                        RSFuncBlock_select[&quot;select&quot;]
+                        RSFuncBlock_insert[&quot;insert&quot;]
+                        RSFuncBlock_update[&quot;update&quot;]
                         subgraph RS[&quot;rs RS&quot;]
                             RS_update[&quot;update&quot;]
                             RS_RS[&quot;RS&quot;]
@@ -292,22 +292,22 @@
                             RS_insert[&quot;insert&quot;]
                         end
                         subgraph AluFuncUnit[&quot;func_unit_0 AluFuncUnit&quot;]
-                            AluFuncUnit_accept[&quot;accept&quot;]
                             AluFuncUnit_issue[&quot;issue&quot;]
+                            AluFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO4[&quot;fifo FIFO&quot;]
-                                FIFO4_write[&quot;write&quot;]
                                 FIFO4_read[&quot;read&quot;]
+                                FIFO4_write[&quot;write&quot;]
                             end
                         end
                         subgraph WakeupSelect[&quot;wakeup_select_0 WakeupSelect&quot;]
                             WakeupSelect_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph ShiftFuncUnit[&quot;func_unit_1 ShiftFuncUnit&quot;]
-                            ShiftFuncUnit_accept[&quot;accept&quot;]
                             ShiftFuncUnit_issue[&quot;issue&quot;]
+                            ShiftFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO5[&quot;fifo FIFO&quot;]
-                                FIFO5_write[&quot;write&quot;]
                                 FIFO5_read[&quot;read&quot;]
+                                FIFO5_write[&quot;write&quot;]
                             end
                         end
                         subgraph WakeupSelect1[&quot;wakeup_select_1 WakeupSelect&quot;]
@@ -338,8 +338,8 @@
                             WakeupSelect2_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph ExceptionFuncUnit[&quot;func_unit_3 ExceptionFuncUnit&quot;]
-                            ExceptionFuncUnit_accept[&quot;accept&quot;]
                             ExceptionFuncUnit_issue[&quot;issue&quot;]
+                            ExceptionFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO8[&quot;fifo FIFO&quot;]
                                 FIFO8_read[&quot;read&quot;]
                                 FIFO8_write[&quot;write&quot;]
@@ -349,12 +349,12 @@
                             WakeupSelect3_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph PrivilegedFuncUnit[&quot;func_unit_4 PrivilegedFuncUnit&quot;]
-                            PrivilegedFuncUnit_issue[&quot;issue&quot;]
                             PrivilegedFuncUnit_accept[&quot;accept&quot;]
                             PrivilegedFuncUnit_precommit[&quot;precommit&quot;]
+                            PrivilegedFuncUnit_issue[&quot;issue&quot;]
                             subgraph BasicFifo5[&quot;fetch_resume_fifo BasicFifo&quot;]
-                                BasicFifo5_write[&quot;write&quot;]
                                 BasicFifo5_read[&quot;read&quot;]
+                                BasicFifo5_write[&quot;write&quot;]
                             end
                         end
                         subgraph WakeupSelect4[&quot;wakeup_select_4 WakeupSelect&quot;]
@@ -386,41 +386,41 @@
                         end
                     end
                     subgraph LSUDummy[&quot;rs_block_1 LSUDummy&quot;]
-                        LSUDummy_select[&quot;select&quot;]
+                        LSUDummy_insert[&quot;insert&quot;]
+                        LSUDummy_precommit[&quot;precommit&quot;]
                         LSUDummy_get_result[&quot;get_result&quot;]
+                        LSUDummy_update[&quot;update&quot;]
                         LSUDummy_LSUDummy[&quot;LSUDummy&quot;]
                         LSUDummy_LSUDummy1[&quot;LSUDummy&quot;]
-                        LSUDummy_update[&quot;update&quot;]
-                        LSUDummy_insert[&quot;insert&quot;]
                         LSUDummy_LSUDummy2[&quot;LSUDummy&quot;]
-                        LSUDummy_precommit[&quot;precommit&quot;]
+                        LSUDummy_select[&quot;select&quot;]
                         subgraph Forwarder6[&quot;forwarder Forwarder&quot;]
                             Forwarder6_write[&quot;write&quot;]
                             Forwarder6_read[&quot;read&quot;]
                         end
                         subgraph LSURequester[&quot;requester LSURequester&quot;]
-                            LSURequester_issue_cond0[&quot;issue_cond0&quot;]
-                            LSURequester_accept_cond1[&quot;accept_cond1&quot;]
-                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                             LSURequester_accept[&quot;accept&quot;]
-                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
                             LSURequester_accept_cond0[&quot;accept_cond0&quot;]
+                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
                             LSURequester_issue[&quot;issue&quot;]
+                            LSURequester_accept_cond1[&quot;accept_cond1&quot;]
+                            LSURequester_issue_cond0[&quot;issue_cond0&quot;]
+                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                         end
                     end
                     subgraph CSRUnit[&quot;rs_block_2 CSRUnit&quot;]
-                        CSRUnit_get_result[&quot;get_result&quot;]
+                        CSRUnit_select[&quot;select&quot;]
+                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
+                        CSRUnit_update[&quot;update&quot;]
                         CSRUnit_precommit[&quot;precommit&quot;]
+                        CSRUnit_get_result[&quot;get_result&quot;]
                         CSRUnit_insert[&quot;insert&quot;]
-                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
                         CSRUnit_fetch_resume[&quot;fetch_resume&quot;]
-                        CSRUnit_select[&quot;select&quot;]
-                        CSRUnit_update[&quot;update&quot;]
                     end
                     subgraph MethodTryProduct[&quot;InstructionPrecommitKey_unifier MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct[&quot;MethodTryProduct&quot;]
-                        MethodTryProduct_MethodTryProduct1[&quot;MethodTryProduct&quot;]
                         MethodTryProduct_method[&quot;method&quot;]
+                        MethodTryProduct_MethodTryProduct1[&quot;MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct2[&quot;MethodTryProduct&quot;]
                     end
                     subgraph Collector2[&quot;FetchResumeKey_unifier Collector&quot;]
@@ -443,16 +443,16 @@
                     ResultAnnouncement_ResultAnnouncement[&quot;ResultAnnouncement&quot;]
                 end
                 subgraph InterruptController[&quot;interrupt_controller InterruptController&quot;]
+                    InterruptController_report_interrupt[&quot;report_interrupt&quot;]
                     InterruptController_entry[&quot;entry&quot;]
                     InterruptController_mret[&quot;mret&quot;]
-                    InterruptController_report_interrupt[&quot;report_interrupt&quot;]
                 end
                 subgraph GenericCSRRegisters[&quot;csr_generic GenericCSRRegisters&quot;]
                     GenericCSRRegisters_GenericCSRRegisters[&quot;GenericCSRRegisters&quot;]
                     subgraph MachineModeCSRRegisters[&quot;m_mode MachineModeCSRRegisters&quot;]
                         subgraph CSRRegister[&quot;mcause CSRRegister&quot;]
-                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister__fu_write[&quot;_fu_write&quot;]
+                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister_write[&quot;write&quot;]
                         end
                         subgraph CSRRegister1[&quot;mtvec CSRRegister&quot;]
@@ -461,36 +461,36 @@
                             CSRRegister1__fu_write[&quot;_fu_write&quot;]
                         end
                         subgraph CSRRegister2[&quot;mepc CSRRegister&quot;]
+                            CSRRegister2_read[&quot;read&quot;]
                             CSRRegister2_write[&quot;write&quot;]
                             CSRRegister2__fu_write[&quot;_fu_write&quot;]
-                            CSRRegister2_read[&quot;read&quot;]
                             CSRRegister2__fu_read[&quot;_fu_read&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR[&quot;csr_cycle DoubleCounterCSR&quot;]
                         DoubleCounterCSR_increment[&quot;increment&quot;]
                         subgraph CSRRegister3[&quot;register_low CSRRegister&quot;]
+                            CSRRegister3__fu_read[&quot;_fu_read&quot;]
                             CSRRegister3_write[&quot;write&quot;]
                             CSRRegister3_read[&quot;read&quot;]
-                            CSRRegister3__fu_read[&quot;_fu_read&quot;]
                         end
                         subgraph CSRRegister4[&quot;register_high CSRRegister&quot;]
                             CSRRegister4_read[&quot;read&quot;]
-                            CSRRegister4__fu_read[&quot;_fu_read&quot;]
                             CSRRegister4_write[&quot;write&quot;]
+                            CSRRegister4__fu_read[&quot;_fu_read&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR1[&quot;csr_time DoubleCounterCSR&quot;]
                         DoubleCounterCSR1_increment[&quot;increment&quot;]
                         subgraph CSRRegister5[&quot;register_low CSRRegister&quot;]
+                            CSRRegister5__fu_read[&quot;_fu_read&quot;]
                             CSRRegister5_read[&quot;read&quot;]
                             CSRRegister5_write[&quot;write&quot;]
-                            CSRRegister5__fu_read[&quot;_fu_read&quot;]
                         end
                         subgraph CSRRegister6[&quot;register_high CSRRegister&quot;]
-                            CSRRegister6_read[&quot;read&quot;]
-                            CSRRegister6__fu_read[&quot;_fu_read&quot;]
                             CSRRegister6_write[&quot;write&quot;]
+                            CSRRegister6__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister6_read[&quot;read&quot;]
                         end
                     end
                 end
@@ -506,15 +506,15 @@
                 end
                 subgraph Scheduler[&quot;scheduler Scheduler&quot;]
                     subgraph FIFO10[&quot;alloc_rename_buf FIFO&quot;]
-                        FIFO10_write[&quot;write&quot;]
                         FIFO10_read[&quot;read&quot;]
+                        FIFO10_write[&quot;write&quot;]
                     end
                     subgraph RegAllocation[&quot;reg_alloc RegAllocation&quot;]
                         RegAllocation_RegAllocation[&quot;RegAllocation&quot;]
                     end
                     subgraph FIFO11[&quot;rename_out_buf FIFO&quot;]
-                        FIFO11_read[&quot;read&quot;]
                         FIFO11_write[&quot;write&quot;]
+                        FIFO11_read[&quot;read&quot;]
                     end
                     subgraph Renaming[&quot;renaming Renaming&quot;]
                         Renaming_Renaming[&quot;Renaming&quot;]
@@ -527,8 +527,8 @@
                         ROBAllocation_ROBAllocation[&quot;ROBAllocation&quot;]
                     end
                     subgraph FIFO13[&quot;rs_select_out_buf FIFO&quot;]
-                        FIFO13_read[&quot;read&quot;]
                         FIFO13_write[&quot;write&quot;]
+                        FIFO13_read[&quot;read&quot;]
                     end
                     subgraph RSSelection[&quot;rs_selector RSSelection&quot;]
                         RSSelection_RSSelection[&quot;RSSelection&quot;]
@@ -548,25 +548,25 @@
                     ConnectTrans11_ConnectTrans[&quot;ConnectTrans&quot;]
                 end
                 subgraph Retirement[&quot;retirement Retirement&quot;]
+                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     Retirement_Retirement[&quot;Retirement&quot;]
-                    Retirement_core_state[&quot;core_state&quot;]
                     Retirement_Retirement1[&quot;Retirement&quot;]
-                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     Retirement_Retirement2[&quot;Retirement&quot;]
-                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
                     Retirement_Retirement3[&quot;Retirement&quot;]
                     Retirement_Retirement4[&quot;Retirement&quot;]
+                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
+                    Retirement_core_state[&quot;core_state&quot;]
                     subgraph DoubleCounterCSR2[&quot;instret_csr DoubleCounterCSR&quot;]
                         DoubleCounterCSR2_increment[&quot;increment&quot;]
                         subgraph CSRRegister7[&quot;register_low CSRRegister&quot;]
                             CSRRegister7__fu_read[&quot;_fu_read&quot;]
-                            CSRRegister7_read[&quot;read&quot;]
                             CSRRegister7_write[&quot;write&quot;]
+                            CSRRegister7_read[&quot;read&quot;]
                         end
                         subgraph CSRRegister8[&quot;register_high CSRRegister&quot;]
-                            CSRRegister8__fu_read[&quot;_fu_read&quot;]
                             CSRRegister8_read[&quot;read&quot;]
                             CSRRegister8_write[&quot;write&quot;]
+                            CSRRegister8__fu_read[&quot;_fu_read&quot;]
                         end
                     end
                     subgraph HwCounter9[&quot;perf_instr_ret HwCounter&quot;]
@@ -587,16 +587,16 @@
         end
         subgraph TransactionManager[&quot;transactionManager TransactionManager&quot;]
             TransactionManager_issue_cond2_LSUDummy[&quot;issue_cond2_LSUDummy&quot;]
-            TransactionManager_Retirement_Retirement_cond0[&quot;Retirement_Retirement_cond0&quot;]
-            TransactionManager_accept_cond1_LSUDummy[&quot;accept_cond1_LSUDummy&quot;]
-            TransactionManager_LSUDummy_issue_cond0[&quot;LSUDummy_issue_cond0&quot;]
-            TransactionManager_Retirement_Retirement_cond1[&quot;Retirement_Retirement_cond1&quot;]
             TransactionManager_accept_cond0_LSUDummy[&quot;accept_cond0_LSUDummy&quot;]
+            TransactionManager_issue_cond0_LSUDummy[&quot;issue_cond0_LSUDummy&quot;]
+            TransactionManager_Retirement_Retirement_cond1[&quot;Retirement_Retirement_cond1&quot;]
+            TransactionManager_Retirement_Retirement_cond0[&quot;Retirement_Retirement_cond0&quot;]
             TransactionManager_issue_cond1_LSUDummy[&quot;issue_cond1_LSUDummy&quot;]
+            TransactionManager_accept_cond1_LSUDummy[&quot;accept_cond1_LSUDummy&quot;]
         end
     end
 Core_InitFreeRFFifo --&gt; BasicFifo2_write
-Retirement_Retirement3 --&gt; BasicFifo2_write
+Retirement_Retirement --&gt; BasicFifo2_write
 TransactionManager_Retirement_Retirement_cond1 --&gt; BasicFifo2_write
 TransactionManager_Retirement_Retirement_cond0 --&gt; BasicFifo2_write
 FIFO6_read --&gt; Core_DiscardBranchVerify
@@ -607,20 +607,20 @@
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; Serializer_Serializer1
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; BasicFifo_write
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; WishboneMaster_request
-ICache_ICache &lt;--&gt; HwCounter4__incr
-ICache_ICache3 &lt;--&gt; HwCounter3__incr
-ICache_ICache3 &lt;--&gt; HwCounter2__incr
-ICache_ICache3 &lt;--&gt; HwCounter1__incr
-ICache_ICache3 --&gt; Forwarder3_write
-ICache_ICache1 --&gt; SimpleCommonBusCacheRefiller_start_refill
-ICache_ICache1 --&gt; Forwarder2_write
-ICache_ICache2 --&gt; Forwarder2_write
-SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache2
-WishboneMasterAdapter_get_read_response --&gt; ICache_ICache2
-Serializer_Serializer --&gt; ICache_ICache2
-BasicFifo_read --&gt; ICache_ICache2
-WishboneMaster_result --&gt; ICache_ICache2
-Forwarder_read --&gt; ICache_ICache2
+ICache_ICache1 &lt;--&gt; HwCounter4__incr
+ICache_ICache2 &lt;--&gt; HwCounter3__incr
+ICache_ICache2 &lt;--&gt; HwCounter2__incr
+ICache_ICache2 &lt;--&gt; HwCounter1__incr
+ICache_ICache2 --&gt; Forwarder3_write
+ICache_ICache --&gt; SimpleCommonBusCacheRefiller_start_refill
+ICache_ICache --&gt; Forwarder2_write
+ICache_ICache3 --&gt; Forwarder2_write
+SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache3
+WishboneMasterAdapter_get_read_response --&gt; ICache_ICache3
+Serializer_Serializer --&gt; ICache_ICache3
+BasicFifo_read --&gt; ICache_ICache3
+WishboneMaster_result --&gt; ICache_ICache3
+Forwarder_read --&gt; ICache_ICache3
 Fetch_Fetch --&gt; ICache_issue_req
 Fetch_Fetch &lt;--&gt; HwCounter__incr
 Fetch_Fetch &lt;--&gt; LatencyMeasurer__start
@@ -650,7 +650,7 @@
 RegAllocation_RegAllocation --&gt; FIFO10_write
 FIFO10_read --&gt; Renaming_Renaming
 Renaming_Renaming --&gt; FRAT_rename
-Retirement_Retirement3 --&gt; FRAT_rename
+Retirement_Retirement --&gt; FRAT_rename
 TransactionManager_Retirement_Retirement_cond1 --&gt; FRAT_rename
 Renaming_Renaming --&gt; FIFO11_write
 FIFO11_read --&gt; ROBAllocation_ROBAllocation
@@ -658,18 +658,18 @@
 ROBAllocation_ROBAllocation &lt;--&gt; LatencyMeasurer1__start
 ROBAllocation_ROBAllocation --&gt; FIFO3_write
 ROBAllocation_ROBAllocation --&gt; FIFO12_write
-FIFO12_read --&gt; RSSelection_RSSelection
-RSSelection_RSSelection --&gt; Forwarder8_write
-Forwarder8_read --&gt; RSSelection_RSSelection2
+FIFO12_read --&gt; RSSelection_RSSelection1
+RSSelection_RSSelection1 --&gt; Forwarder8_write
+Forwarder8_read --&gt; RSSelection_RSSelection
 Forwarder8_read --&gt; RSSelection_RSSelection3
-Forwarder8_read --&gt; RSSelection_RSSelection1
-RSFuncBlock_select --&gt; RSSelection_RSSelection2
-RS_select --&gt; RSSelection_RSSelection2
-RSSelection_RSSelection2 --&gt; FIFO13_write
+Forwarder8_read --&gt; RSSelection_RSSelection2
+RSFuncBlock_select --&gt; RSSelection_RSSelection
+RS_select --&gt; RSSelection_RSSelection
+RSSelection_RSSelection --&gt; FIFO13_write
 RSSelection_RSSelection3 --&gt; FIFO13_write
-RSSelection_RSSelection1 --&gt; FIFO13_write
+RSSelection_RSSelection2 --&gt; FIFO13_write
 RSSelection_RSSelection3 &lt;--&gt; LSUDummy_select
-RSSelection_RSSelection1 &lt;--&gt; CSRUnit_select
+RSSelection_RSSelection2 &lt;--&gt; CSRUnit_select
 FIFO13_read --&gt; RSInsertion_RSInsertion
 RegisterFile_read1 --&gt; RSInsertion_RSInsertion
 RegisterFile_read2 --&gt; RSInsertion_RSInsertion
@@ -685,7 +685,7 @@
 Collector2_method --&gt; ConnectTrans11_ConnectTrans
 Forwarder7_read --&gt; ConnectTrans11_ConnectTrans
 ConnectTrans11_ConnectTrans --&gt; Fetch_resume
-Retirement_Retirement1 --&gt; Fetch_resume
+Retirement_Retirement4 --&gt; Fetch_resume
 Collector_method --&gt; ResultAnnouncement_ResultAnnouncement
 Forwarder4_read --&gt; ResultAnnouncement_ResultAnnouncement
 ResultAnnouncement_ResultAnnouncement --&gt; ReorderBuffer_mark_done
@@ -739,12 +739,12 @@
 PrivilegedFuncUnit_accept --&gt; ConnectTrans8_ConnectTrans
 CSRRegister2_read --&gt; ConnectTrans8_ConnectTrans
 ConnectTrans8_ConnectTrans --&gt; BasicFifo5_write
-LSUDummy_LSUDummy --&gt; Forwarder6_write
+LSUDummy_LSUDummy1 --&gt; Forwarder6_write
 TransactionManager_accept_cond0_LSUDummy --&gt; Forwarder6_write
 TransactionManager_issue_cond1_LSUDummy --&gt; Forwarder6_write
-TransactionManager_accept_cond1_LSUDummy --&gt; Forwarder6_write
 TransactionManager_issue_cond2_LSUDummy --&gt; Forwarder6_write
-TransactionManager_LSUDummy_issue_cond0 --&gt; Forwarder6_write
+TransactionManager_issue_cond0_LSUDummy --&gt; Forwarder6_write
+TransactionManager_accept_cond1_LSUDummy --&gt; Forwarder6_write
 CSRRegister__fu_read --&gt; CSRUnit_CSRUnit
 CSRUnit_CSRUnit --&gt; CSRRegister__fu_write
 CSRRegister1__fu_read --&gt; CSRUnit_CSRUnit
@@ -766,45 +766,45 @@
 LSUDummy_get_result --&gt; ConnectTrans2_ConnectTrans
 Forwarder6_read --&gt; ConnectTrans2_ConnectTrans
 CSRUnit_get_result --&gt; ConnectTrans3_ConnectTrans
-MethodTryProduct_MethodTryProduct --&gt; PrivilegedFuncUnit_precommit
-MethodTryProduct_MethodTryProduct &lt;--&gt; InterruptController_mret
-MethodTryProduct_MethodTryProduct2 --&gt; LSUDummy_precommit
+MethodTryProduct_MethodTryProduct2 --&gt; PrivilegedFuncUnit_precommit
+MethodTryProduct_MethodTryProduct2 &lt;--&gt; InterruptController_mret
+MethodTryProduct_MethodTryProduct --&gt; LSUDummy_precommit
 MethodTryProduct_MethodTryProduct1 --&gt; CSRUnit_precommit
 ConnectTrans9_ConnectTrans --&gt; Forwarder7_write
 ConnectTrans10_ConnectTrans --&gt; Forwarder7_write
 BasicFifo5_read --&gt; ConnectTrans9_ConnectTrans
 CSRUnit_fetch_resume --&gt; ConnectTrans10_ConnectTrans
-ReorderBuffer_peek --&gt; Retirement_Retirement4
-ReorderBuffer_peek --&gt; Retirement_Retirement
+ReorderBuffer_peek --&gt; Retirement_Retirement2
 ReorderBuffer_peek --&gt; Retirement_Retirement3
+ReorderBuffer_peek --&gt; Retirement_Retirement
 ReorderBuffer_peek --&gt; TransactionManager_Retirement_Retirement_cond1
 ReorderBuffer_peek --&gt; TransactionManager_Retirement_Retirement_cond0
-Retirement_Retirement4 --&gt; MethodTryProduct_method
-ExceptionCauseRegister_get --&gt; Retirement_Retirement
+Retirement_Retirement2 --&gt; MethodTryProduct_method
+ExceptionCauseRegister_get --&gt; Retirement_Retirement3
 ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_Retirement_cond1
 ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_Retirement_cond0
-Retirement_Retirement3 &lt;--&gt; ReorderBuffer_retire
+Retirement_Retirement &lt;--&gt; ReorderBuffer_retire
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; ReorderBuffer_retire
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; ReorderBuffer_retire
-Retirement_Retirement3 &lt;--&gt; LatencyMeasurer1__stop
+Retirement_Retirement &lt;--&gt; LatencyMeasurer1__stop
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; LatencyMeasurer1__stop
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; LatencyMeasurer1__stop
-FIFO3_read --&gt; Retirement_Retirement3
+FIFO3_read --&gt; Retirement_Retirement
 FIFO3_read --&gt; TransactionManager_Retirement_Retirement_cond1
 FIFO3_read --&gt; TransactionManager_Retirement_Retirement_cond0
-Retirement_Retirement3 --&gt; HwExpHistogram1__add
+Retirement_Retirement --&gt; HwExpHistogram1__add
 TransactionManager_Retirement_Retirement_cond1 --&gt; HwExpHistogram1__add
 TransactionManager_Retirement_Retirement_cond0 --&gt; HwExpHistogram1__add
-CoreInstructionCounter_decrement --&gt; Retirement_Retirement3
+CoreInstructionCounter_decrement --&gt; Retirement_Retirement
 CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_Retirement_cond1
 CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_Retirement_cond0
-RRAT_peek --&gt; Retirement_Retirement3
+RRAT_peek --&gt; Retirement_Retirement
 RRAT_peek --&gt; TransactionManager_Retirement_Retirement_cond1
-Retirement_Retirement3 --&gt; RegisterFile_free
+Retirement_Retirement --&gt; RegisterFile_free
 TransactionManager_Retirement_Retirement_cond1 --&gt; RegisterFile_free
 TransactionManager_Retirement_Retirement_cond0 --&gt; RegisterFile_free
-CSRRegister1_read --&gt; Retirement_Retirement1
-Retirement_Retirement1 &lt;--&gt; ExceptionCauseRegister_clear
+CSRRegister1_read --&gt; Retirement_Retirement4
+Retirement_Retirement4 &lt;--&gt; ExceptionCauseRegister_clear
 GenericCSRRegisters_GenericCSRRegisters &lt;--&gt; DoubleCounterCSR_increment
 CSRRegister3_read --&gt; GenericCSRRegisters_GenericCSRRegisters
 GenericCSRRegisters_GenericCSRRegisters --&gt; CSRRegister3_write
@@ -833,17 +833,24 @@
 TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMasterAdapter1_request_read
 TransactionManager_issue_cond1_LSUDummy --&gt; Serializer1_Serializer3
 TransactionManager_issue_cond1_LSUDummy --&gt; BasicFifo1_write
-TransactionManager_LSUDummy_issue_cond0 --&gt; BasicFifo1_write
+TransactionManager_issue_cond0_LSUDummy --&gt; BasicFifo1_write
 TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMaster1_request
-TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMaster1_request
-TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSUDummy_LSUDummy1
-TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy1
-TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSUDummy_LSUDummy1
+TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMaster1_request
+TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSUDummy_LSUDummy
+TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy
+TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSUDummy_LSUDummy
 TransactionManager_issue_cond1_LSUDummy --&gt; LSURequester_issue
 TransactionManager_issue_cond2_LSUDummy --&gt; LSURequester_issue
-TransactionManager_LSUDummy_issue_cond0 --&gt; LSURequester_issue
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement2
-TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; Retirement_Retirement2
+TransactionManager_issue_cond0_LSUDummy --&gt; LSURequester_issue
+TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSURequester_issue_cond2
+TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSURequester_issue_cond0
+TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMasterAdapter1_request_write
+TransactionManager_issue_cond0_LSUDummy --&gt; Serializer1_Serializer2
+TransactionManager_accept_cond1_LSUDummy &lt;--&gt; LSURequester_accept_cond1
+WishboneMasterAdapter1_get_read_response --&gt; TransactionManager_accept_cond1_LSUDummy
+Serializer1_Serializer --&gt; TransactionManager_accept_cond1_LSUDummy
+TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement1
+TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; Retirement_Retirement1
 TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister_write
 TransactionManager_Retirement_Retirement_cond0 --&gt; CSRRegister_write
 TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister2_write
@@ -851,10 +858,6 @@
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; InterruptController_entry
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; InterruptController_entry
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement_cond1
-TransactionManager_accept_cond1_LSUDummy &lt;--&gt; LSURequester_accept_cond1
-WishboneMasterAdapter1_get_read_response --&gt; TransactionManager_accept_cond1_LSUDummy
-Serializer1_Serializer2 --&gt; TransactionManager_accept_cond1_LSUDummy
-TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSURequester_issue_cond2
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; Retirement_Retirement_cond0
 TransactionManager_Retirement_Retirement_cond0 --&gt; RRAT_commit
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; DoubleCounterCSR2_increment
@@ -863,9 +866,6 @@
 CSRRegister8_read --&gt; TransactionManager_Retirement_Retirement_cond0
 TransactionManager_Retirement_Retirement_cond0 --&gt; CSRRegister8_write
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; HwCounter9__incr
-TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSURequester_issue_cond0
-TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMasterAdapter1_request_write
-TransactionManager_LSUDummy_issue_cond0 --&gt; Serializer1_Serializer
         </div>
 
            </div>
@@ -876,7 +876,7 @@
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/components/icache.html b/components/icache.html
index 03fa589fb..aa05823bc 100644
--- a/components/icache.html
+++ b/components/icache.html
@@ -131,7 +131,7 @@ <h2>Address mapping example<a class="headerlink" href="#address-mapping-example"
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.backend.html b/coreblocks.backend.html
index 94151eb8b..24991ac0e 100644
--- a/coreblocks.backend.html
+++ b/coreblocks.backend.html
@@ -165,7 +165,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.cache.html b/coreblocks.cache.html
index a35b67546..e2de09b93 100644
--- a/coreblocks.cache.html
+++ b/coreblocks.cache.html
@@ -241,7 +241,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.core_structs.html b/coreblocks.core_structs.html
index aba25cb8a..0d465d639 100644
--- a/coreblocks.core_structs.html
+++ b/coreblocks.core_structs.html
@@ -157,7 +157,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.frontend.decoder.html b/coreblocks.frontend.decoder.html
index 188a69710..99a89bada 100644
--- a/coreblocks.frontend.decoder.html
+++ b/coreblocks.frontend.decoder.html
@@ -1721,7 +1721,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.frontend.fetch.html b/coreblocks.frontend.fetch.html
index 7e36c306f..d910ad1e6 100644
--- a/coreblocks.frontend.fetch.html
+++ b/coreblocks.frontend.fetch.html
@@ -161,7 +161,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html
index 65b0d6179..5d8f76344 100644
--- a/coreblocks.frontend.html
+++ b/coreblocks.frontend.html
@@ -125,7 +125,7 @@ <h2>Subpackages<a class="headerlink" href="#subpackages" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.func_blocks.fu.html b/coreblocks.func_blocks.fu.html
index ce7f0dfb6..2b0a043fe 100644
--- a/coreblocks.func_blocks.fu.html
+++ b/coreblocks.func_blocks.fu.html
@@ -867,7 +867,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.func_blocks.fu.unsigned_multiplication.html b/coreblocks.func_blocks.fu.unsigned_multiplication.html
index 2d377b5e6..4c6b81ed3 100644
--- a/coreblocks.func_blocks.fu.unsigned_multiplication.html
+++ b/coreblocks.func_blocks.fu.unsigned_multiplication.html
@@ -238,7 +238,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.func_blocks.html b/coreblocks.func_blocks.html
index d4c1990ee..42bdee983 100644
--- a/coreblocks.func_blocks.html
+++ b/coreblocks.func_blocks.html
@@ -148,7 +148,7 @@ <h2>Subpackages<a class="headerlink" href="#subpackages" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.func_blocks.interface.html b/coreblocks.func_blocks.interface.html
index cdb218165..948a43281 100644
--- a/coreblocks.func_blocks.interface.html
+++ b/coreblocks.func_blocks.interface.html
@@ -169,7 +169,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.func_blocks.lsu.html b/coreblocks.func_blocks.lsu.html
index 53f867cc7..715ca2b02 100644
--- a/coreblocks.func_blocks.lsu.html
+++ b/coreblocks.func_blocks.lsu.html
@@ -248,7 +248,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.html b/coreblocks.html
index 3ed06075c..7dfd22868 100644
--- a/coreblocks.html
+++ b/coreblocks.html
@@ -255,7 +255,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.params.html b/coreblocks.params.html
index 7da248309..18033bef4 100644
--- a/coreblocks.params.html
+++ b/coreblocks.params.html
@@ -719,7 +719,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html
index 79516d2d8..42234c558 100644
--- a/coreblocks.peripherals.html
+++ b/coreblocks.peripherals.html
@@ -746,7 +746,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.priv.csr.html b/coreblocks.priv.csr.html
index 4d06e931e..d9c11b7c8 100644
--- a/coreblocks.priv.csr.html
+++ b/coreblocks.priv.csr.html
@@ -327,7 +327,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.priv.html b/coreblocks.priv.html
index a65b28cff..07e3b1106 100644
--- a/coreblocks.priv.html
+++ b/coreblocks.priv.html
@@ -123,7 +123,7 @@ <h2>Subpackages<a class="headerlink" href="#subpackages" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.priv.traps.html b/coreblocks.priv.traps.html
index 5bf1c440c..a169e7c37 100644
--- a/coreblocks.priv.traps.html
+++ b/coreblocks.priv.traps.html
@@ -171,7 +171,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html
index 446bb2f88..c699016e8 100644
--- a/coreblocks.scheduler.html
+++ b/coreblocks.scheduler.html
@@ -191,7 +191,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/current-graph.html b/current-graph.html
index 817549ce1..8086e9ded 100644
--- a/current-graph.html
+++ b/current-graph.html
@@ -89,24 +89,24 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
     subgraph TransactionModule[&quot;TransactionModule&quot;]
         subgraph CoreTestElaboratable[&quot;elaboratable CoreTestElaboratable&quot;]
             subgraph Core[&quot;core Core&quot;]
-                Core_DiscardBranchVerify[&quot;DiscardBranchVerify&quot;]
                 Core_InitFreeRFFifo[&quot;InitFreeRFFifo&quot;]
+                Core_DiscardBranchVerify[&quot;DiscardBranchVerify&quot;]
                 subgraph WishboneMaster[&quot;wb_master_instr WishboneMaster&quot;]
                     WishboneMaster_WishboneMaster[&quot;WishboneMaster&quot;]
                     WishboneMaster_result[&quot;result&quot;]
                     WishboneMaster_request[&quot;request&quot;]
                     subgraph Forwarder[&quot;result Forwarder&quot;]
-                        Forwarder_read[&quot;read&quot;]
                         Forwarder_write[&quot;write&quot;]
+                        Forwarder_read[&quot;read&quot;]
                     end
                 end
                 subgraph WishboneMaster1[&quot;wb_master_data WishboneMaster&quot;]
-                    WishboneMaster1_result[&quot;result&quot;]
-                    WishboneMaster1_request[&quot;request&quot;]
                     WishboneMaster1_WishboneMaster[&quot;WishboneMaster&quot;]
+                    WishboneMaster1_request[&quot;request&quot;]
+                    WishboneMaster1_result[&quot;result&quot;]
                     subgraph Forwarder1[&quot;result Forwarder&quot;]
-                        Forwarder1_write[&quot;write&quot;]
                         Forwarder1_read[&quot;read&quot;]
+                        Forwarder1_write[&quot;write&quot;]
                     end
                 end
                 subgraph WishboneMasterAdapter[&quot;bus_master_instr_adapter WishboneMasterAdapter&quot;]
@@ -132,8 +132,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         Serializer1_Serializer2[&quot;Serializer&quot;]
                         Serializer1_Serializer3[&quot;Serializer&quot;]
                         subgraph BasicFifo1[&quot;pending_requests BasicFifo&quot;]
-                            BasicFifo1_read[&quot;read&quot;]
                             BasicFifo1_write[&quot;write&quot;]
+                            BasicFifo1_read[&quot;read&quot;]
                         end
                     end
                 end
@@ -142,8 +142,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     CoreInstructionCounter_decrement[&quot;decrement&quot;]
                 end
                 subgraph FIFO[&quot;fifo_fetch FIFO&quot;]
-                    FIFO_write[&quot;write&quot;]
                     FIFO_read[&quot;read&quot;]
+                    FIFO_write[&quot;write&quot;]
                 end
                 subgraph MethodMap[&quot;core_counter_increment_discard_map MethodMap&quot;]
                     MethodMap_method[&quot;method&quot;]
@@ -160,15 +160,15 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     SimpleCommonBusCacheRefiller_accept_refill[&quot;accept_refill&quot;]
                     SimpleCommonBusCacheRefiller_start_refill[&quot;start_refill&quot;]
                     subgraph Forwarder2[&quot;address_fwd Forwarder&quot;]
-                        Forwarder2_read[&quot;read&quot;]
                         Forwarder2_write[&quot;write&quot;]
+                        Forwarder2_read[&quot;read&quot;]
                     end
                 end
                 subgraph ICache[&quot;icache ICache&quot;]
                     ICache_ICache[&quot;ICache&quot;]
+                    ICache_accept_res[&quot;accept_res&quot;]
                     ICache_ICache1[&quot;ICache&quot;]
                     ICache_ICache2[&quot;ICache&quot;]
-                    ICache_accept_res[&quot;accept_res&quot;]
                     ICache_issue_req[&quot;issue_req&quot;]
                     ICache_ICache3[&quot;ICache&quot;]
                     subgraph HwCounter[&quot;perf_loads HwCounter&quot;]
@@ -202,8 +202,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         FIFO2_write[&quot;write&quot;]
                     end
                     subgraph Forwarder3[&quot;res_fwd Forwarder&quot;]
-                        Forwarder3_read[&quot;read&quot;]
                         Forwarder3_write[&quot;write&quot;]
+                        Forwarder3_read[&quot;read&quot;]
                     end
                 end
                 subgraph FRAT[&quot;FRAT FRAT&quot;]
@@ -214,10 +214,10 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     RRAT_peek[&quot;peek&quot;]
                 end
                 subgraph RegisterFile[&quot;RF RegisterFile&quot;]
-                    RegisterFile_write[&quot;write&quot;]
-                    RegisterFile_read2[&quot;read2&quot;]
                     RegisterFile_read1[&quot;read1&quot;]
                     RegisterFile_free[&quot;free&quot;]
+                    RegisterFile_write[&quot;write&quot;]
+                    RegisterFile_read2[&quot;read2&quot;]
                 end
                 subgraph ReorderBuffer[&quot;ROB ReorderBuffer&quot;]
                     ReorderBuffer_put[&quot;put&quot;]
@@ -226,8 +226,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     ReorderBuffer_retire[&quot;retire&quot;]
                     ReorderBuffer_peek[&quot;peek&quot;]
                     subgraph LatencyMeasurer1[&quot;perf_rob_wait_time LatencyMeasurer&quot;]
-                        LatencyMeasurer1__start[&quot;_start&quot;]
                         LatencyMeasurer1__stop[&quot;_stop&quot;]
+                        LatencyMeasurer1__start[&quot;_start&quot;]
                         subgraph HwExpHistogram1[&quot;histogram HwExpHistogram&quot;]
                             HwExpHistogram1__add[&quot;_add&quot;]
                         end
@@ -238,22 +238,22 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     end
                 end
                 subgraph Fetch[&quot;fetch Fetch&quot;]
-                    Fetch_resume[&quot;resume&quot;]
                     Fetch_Fetch[&quot;Fetch&quot;]
-                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     Fetch_Fetch1[&quot;Fetch&quot;]
+                    Fetch_resume[&quot;resume&quot;]
+                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     subgraph BasicFifo3[&quot;fetch_target_queue BasicFifo&quot;]
                         BasicFifo3_read[&quot;read&quot;]
                         BasicFifo3_write[&quot;write&quot;]
                     end
                 end
                 subgraph ExceptionCauseRegister[&quot;exception_cause_register ExceptionCauseRegister&quot;]
+                    ExceptionCauseRegister_get[&quot;get&quot;]
                     ExceptionCauseRegister_report[&quot;report&quot;]
                     ExceptionCauseRegister_clear[&quot;clear&quot;]
-                    ExceptionCauseRegister_get[&quot;get&quot;]
                     subgraph BasicFifo4[&quot;fu_report_fifo BasicFifo&quot;]
-                        BasicFifo4_write[&quot;write&quot;]
                         BasicFifo4_read[&quot;read&quot;]
+                        BasicFifo4_write[&quot;write&quot;]
                     end
                     subgraph ConnectTrans[&quot;report_connector ConnectTrans&quot;]
                         ConnectTrans_ConnectTrans[&quot;ConnectTrans&quot;]
@@ -282,10 +282,10 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         MethodProduct1_method[&quot;method&quot;]
                     end
                     subgraph RSFuncBlock[&quot;rs_block_0 RSFuncBlock&quot;]
-                        RSFuncBlock_update[&quot;update&quot;]
-                        RSFuncBlock_insert[&quot;insert&quot;]
-                        RSFuncBlock_select[&quot;select&quot;]
                         RSFuncBlock_get_result[&quot;get_result&quot;]
+                        RSFuncBlock_select[&quot;select&quot;]
+                        RSFuncBlock_insert[&quot;insert&quot;]
+                        RSFuncBlock_update[&quot;update&quot;]
                         subgraph RS[&quot;rs RS&quot;]
                             RS_update[&quot;update&quot;]
                             RS_RS[&quot;RS&quot;]
@@ -298,22 +298,22 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                             RS_insert[&quot;insert&quot;]
                         end
                         subgraph AluFuncUnit[&quot;func_unit_0 AluFuncUnit&quot;]
-                            AluFuncUnit_accept[&quot;accept&quot;]
                             AluFuncUnit_issue[&quot;issue&quot;]
+                            AluFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO4[&quot;fifo FIFO&quot;]
-                                FIFO4_write[&quot;write&quot;]
                                 FIFO4_read[&quot;read&quot;]
+                                FIFO4_write[&quot;write&quot;]
                             end
                         end
                         subgraph WakeupSelect[&quot;wakeup_select_0 WakeupSelect&quot;]
                             WakeupSelect_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph ShiftFuncUnit[&quot;func_unit_1 ShiftFuncUnit&quot;]
-                            ShiftFuncUnit_accept[&quot;accept&quot;]
                             ShiftFuncUnit_issue[&quot;issue&quot;]
+                            ShiftFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO5[&quot;fifo FIFO&quot;]
-                                FIFO5_write[&quot;write&quot;]
                                 FIFO5_read[&quot;read&quot;]
+                                FIFO5_write[&quot;write&quot;]
                             end
                         end
                         subgraph WakeupSelect1[&quot;wakeup_select_1 WakeupSelect&quot;]
@@ -344,8 +344,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                             WakeupSelect2_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph ExceptionFuncUnit[&quot;func_unit_3 ExceptionFuncUnit&quot;]
-                            ExceptionFuncUnit_accept[&quot;accept&quot;]
                             ExceptionFuncUnit_issue[&quot;issue&quot;]
+                            ExceptionFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO8[&quot;fifo FIFO&quot;]
                                 FIFO8_read[&quot;read&quot;]
                                 FIFO8_write[&quot;write&quot;]
@@ -355,12 +355,12 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                             WakeupSelect3_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph PrivilegedFuncUnit[&quot;func_unit_4 PrivilegedFuncUnit&quot;]
-                            PrivilegedFuncUnit_issue[&quot;issue&quot;]
                             PrivilegedFuncUnit_accept[&quot;accept&quot;]
                             PrivilegedFuncUnit_precommit[&quot;precommit&quot;]
+                            PrivilegedFuncUnit_issue[&quot;issue&quot;]
                             subgraph BasicFifo5[&quot;fetch_resume_fifo BasicFifo&quot;]
-                                BasicFifo5_write[&quot;write&quot;]
                                 BasicFifo5_read[&quot;read&quot;]
+                                BasicFifo5_write[&quot;write&quot;]
                             end
                         end
                         subgraph WakeupSelect4[&quot;wakeup_select_4 WakeupSelect&quot;]
@@ -392,41 +392,41 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         end
                     end
                     subgraph LSUDummy[&quot;rs_block_1 LSUDummy&quot;]
-                        LSUDummy_select[&quot;select&quot;]
+                        LSUDummy_insert[&quot;insert&quot;]
+                        LSUDummy_precommit[&quot;precommit&quot;]
                         LSUDummy_get_result[&quot;get_result&quot;]
+                        LSUDummy_update[&quot;update&quot;]
                         LSUDummy_LSUDummy[&quot;LSUDummy&quot;]
                         LSUDummy_LSUDummy1[&quot;LSUDummy&quot;]
-                        LSUDummy_update[&quot;update&quot;]
-                        LSUDummy_insert[&quot;insert&quot;]
                         LSUDummy_LSUDummy2[&quot;LSUDummy&quot;]
-                        LSUDummy_precommit[&quot;precommit&quot;]
+                        LSUDummy_select[&quot;select&quot;]
                         subgraph Forwarder6[&quot;forwarder Forwarder&quot;]
                             Forwarder6_write[&quot;write&quot;]
                             Forwarder6_read[&quot;read&quot;]
                         end
                         subgraph LSURequester[&quot;requester LSURequester&quot;]
-                            LSURequester_issue_cond0[&quot;issue_cond0&quot;]
-                            LSURequester_accept_cond1[&quot;accept_cond1&quot;]
-                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                             LSURequester_accept[&quot;accept&quot;]
-                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
                             LSURequester_accept_cond0[&quot;accept_cond0&quot;]
+                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
                             LSURequester_issue[&quot;issue&quot;]
+                            LSURequester_accept_cond1[&quot;accept_cond1&quot;]
+                            LSURequester_issue_cond0[&quot;issue_cond0&quot;]
+                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                         end
                     end
                     subgraph CSRUnit[&quot;rs_block_2 CSRUnit&quot;]
-                        CSRUnit_get_result[&quot;get_result&quot;]
+                        CSRUnit_select[&quot;select&quot;]
+                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
+                        CSRUnit_update[&quot;update&quot;]
                         CSRUnit_precommit[&quot;precommit&quot;]
+                        CSRUnit_get_result[&quot;get_result&quot;]
                         CSRUnit_insert[&quot;insert&quot;]
-                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
                         CSRUnit_fetch_resume[&quot;fetch_resume&quot;]
-                        CSRUnit_select[&quot;select&quot;]
-                        CSRUnit_update[&quot;update&quot;]
                     end
                     subgraph MethodTryProduct[&quot;InstructionPrecommitKey_unifier MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct[&quot;MethodTryProduct&quot;]
-                        MethodTryProduct_MethodTryProduct1[&quot;MethodTryProduct&quot;]
                         MethodTryProduct_method[&quot;method&quot;]
+                        MethodTryProduct_MethodTryProduct1[&quot;MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct2[&quot;MethodTryProduct&quot;]
                     end
                     subgraph Collector2[&quot;FetchResumeKey_unifier Collector&quot;]
@@ -449,16 +449,16 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     ResultAnnouncement_ResultAnnouncement[&quot;ResultAnnouncement&quot;]
                 end
                 subgraph InterruptController[&quot;interrupt_controller InterruptController&quot;]
+                    InterruptController_report_interrupt[&quot;report_interrupt&quot;]
                     InterruptController_entry[&quot;entry&quot;]
                     InterruptController_mret[&quot;mret&quot;]
-                    InterruptController_report_interrupt[&quot;report_interrupt&quot;]
                 end
                 subgraph GenericCSRRegisters[&quot;csr_generic GenericCSRRegisters&quot;]
                     GenericCSRRegisters_GenericCSRRegisters[&quot;GenericCSRRegisters&quot;]
                     subgraph MachineModeCSRRegisters[&quot;m_mode MachineModeCSRRegisters&quot;]
                         subgraph CSRRegister[&quot;mcause CSRRegister&quot;]
-                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister__fu_write[&quot;_fu_write&quot;]
+                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister_write[&quot;write&quot;]
                         end
                         subgraph CSRRegister1[&quot;mtvec CSRRegister&quot;]
@@ -467,36 +467,36 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                             CSRRegister1__fu_write[&quot;_fu_write&quot;]
                         end
                         subgraph CSRRegister2[&quot;mepc CSRRegister&quot;]
+                            CSRRegister2_read[&quot;read&quot;]
                             CSRRegister2_write[&quot;write&quot;]
                             CSRRegister2__fu_write[&quot;_fu_write&quot;]
-                            CSRRegister2_read[&quot;read&quot;]
                             CSRRegister2__fu_read[&quot;_fu_read&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR[&quot;csr_cycle DoubleCounterCSR&quot;]
                         DoubleCounterCSR_increment[&quot;increment&quot;]
                         subgraph CSRRegister3[&quot;register_low CSRRegister&quot;]
+                            CSRRegister3__fu_read[&quot;_fu_read&quot;]
                             CSRRegister3_write[&quot;write&quot;]
                             CSRRegister3_read[&quot;read&quot;]
-                            CSRRegister3__fu_read[&quot;_fu_read&quot;]
                         end
                         subgraph CSRRegister4[&quot;register_high CSRRegister&quot;]
                             CSRRegister4_read[&quot;read&quot;]
-                            CSRRegister4__fu_read[&quot;_fu_read&quot;]
                             CSRRegister4_write[&quot;write&quot;]
+                            CSRRegister4__fu_read[&quot;_fu_read&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR1[&quot;csr_time DoubleCounterCSR&quot;]
                         DoubleCounterCSR1_increment[&quot;increment&quot;]
                         subgraph CSRRegister5[&quot;register_low CSRRegister&quot;]
+                            CSRRegister5__fu_read[&quot;_fu_read&quot;]
                             CSRRegister5_read[&quot;read&quot;]
                             CSRRegister5_write[&quot;write&quot;]
-                            CSRRegister5__fu_read[&quot;_fu_read&quot;]
                         end
                         subgraph CSRRegister6[&quot;register_high CSRRegister&quot;]
-                            CSRRegister6_read[&quot;read&quot;]
-                            CSRRegister6__fu_read[&quot;_fu_read&quot;]
                             CSRRegister6_write[&quot;write&quot;]
+                            CSRRegister6__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister6_read[&quot;read&quot;]
                         end
                     end
                 end
@@ -512,15 +512,15 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                 end
                 subgraph Scheduler[&quot;scheduler Scheduler&quot;]
                     subgraph FIFO10[&quot;alloc_rename_buf FIFO&quot;]
-                        FIFO10_write[&quot;write&quot;]
                         FIFO10_read[&quot;read&quot;]
+                        FIFO10_write[&quot;write&quot;]
                     end
                     subgraph RegAllocation[&quot;reg_alloc RegAllocation&quot;]
                         RegAllocation_RegAllocation[&quot;RegAllocation&quot;]
                     end
                     subgraph FIFO11[&quot;rename_out_buf FIFO&quot;]
-                        FIFO11_read[&quot;read&quot;]
                         FIFO11_write[&quot;write&quot;]
+                        FIFO11_read[&quot;read&quot;]
                     end
                     subgraph Renaming[&quot;renaming Renaming&quot;]
                         Renaming_Renaming[&quot;Renaming&quot;]
@@ -533,8 +533,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         ROBAllocation_ROBAllocation[&quot;ROBAllocation&quot;]
                     end
                     subgraph FIFO13[&quot;rs_select_out_buf FIFO&quot;]
-                        FIFO13_read[&quot;read&quot;]
                         FIFO13_write[&quot;write&quot;]
+                        FIFO13_read[&quot;read&quot;]
                     end
                     subgraph RSSelection[&quot;rs_selector RSSelection&quot;]
                         RSSelection_RSSelection[&quot;RSSelection&quot;]
@@ -554,25 +554,25 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     ConnectTrans11_ConnectTrans[&quot;ConnectTrans&quot;]
                 end
                 subgraph Retirement[&quot;retirement Retirement&quot;]
+                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     Retirement_Retirement[&quot;Retirement&quot;]
-                    Retirement_core_state[&quot;core_state&quot;]
                     Retirement_Retirement1[&quot;Retirement&quot;]
-                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     Retirement_Retirement2[&quot;Retirement&quot;]
-                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
                     Retirement_Retirement3[&quot;Retirement&quot;]
                     Retirement_Retirement4[&quot;Retirement&quot;]
+                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
+                    Retirement_core_state[&quot;core_state&quot;]
                     subgraph DoubleCounterCSR2[&quot;instret_csr DoubleCounterCSR&quot;]
                         DoubleCounterCSR2_increment[&quot;increment&quot;]
                         subgraph CSRRegister7[&quot;register_low CSRRegister&quot;]
                             CSRRegister7__fu_read[&quot;_fu_read&quot;]
-                            CSRRegister7_read[&quot;read&quot;]
                             CSRRegister7_write[&quot;write&quot;]
+                            CSRRegister7_read[&quot;read&quot;]
                         end
                         subgraph CSRRegister8[&quot;register_high CSRRegister&quot;]
-                            CSRRegister8__fu_read[&quot;_fu_read&quot;]
                             CSRRegister8_read[&quot;read&quot;]
                             CSRRegister8_write[&quot;write&quot;]
+                            CSRRegister8__fu_read[&quot;_fu_read&quot;]
                         end
                     end
                     subgraph HwCounter9[&quot;perf_instr_ret HwCounter&quot;]
@@ -593,16 +593,16 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
         end
         subgraph TransactionManager[&quot;transactionManager TransactionManager&quot;]
             TransactionManager_issue_cond2_LSUDummy[&quot;issue_cond2_LSUDummy&quot;]
-            TransactionManager_Retirement_Retirement_cond0[&quot;Retirement_Retirement_cond0&quot;]
-            TransactionManager_accept_cond1_LSUDummy[&quot;accept_cond1_LSUDummy&quot;]
-            TransactionManager_LSUDummy_issue_cond0[&quot;LSUDummy_issue_cond0&quot;]
-            TransactionManager_Retirement_Retirement_cond1[&quot;Retirement_Retirement_cond1&quot;]
             TransactionManager_accept_cond0_LSUDummy[&quot;accept_cond0_LSUDummy&quot;]
+            TransactionManager_issue_cond0_LSUDummy[&quot;issue_cond0_LSUDummy&quot;]
+            TransactionManager_Retirement_Retirement_cond1[&quot;Retirement_Retirement_cond1&quot;]
+            TransactionManager_Retirement_Retirement_cond0[&quot;Retirement_Retirement_cond0&quot;]
             TransactionManager_issue_cond1_LSUDummy[&quot;issue_cond1_LSUDummy&quot;]
+            TransactionManager_accept_cond1_LSUDummy[&quot;accept_cond1_LSUDummy&quot;]
         end
     end
 Core_InitFreeRFFifo --&gt; BasicFifo2_write
-Retirement_Retirement3 --&gt; BasicFifo2_write
+Retirement_Retirement --&gt; BasicFifo2_write
 TransactionManager_Retirement_Retirement_cond1 --&gt; BasicFifo2_write
 TransactionManager_Retirement_Retirement_cond0 --&gt; BasicFifo2_write
 FIFO6_read --&gt; Core_DiscardBranchVerify
@@ -613,20 +613,20 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; Serializer_Serializer1
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; BasicFifo_write
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; WishboneMaster_request
-ICache_ICache &lt;--&gt; HwCounter4__incr
-ICache_ICache3 &lt;--&gt; HwCounter3__incr
-ICache_ICache3 &lt;--&gt; HwCounter2__incr
-ICache_ICache3 &lt;--&gt; HwCounter1__incr
-ICache_ICache3 --&gt; Forwarder3_write
-ICache_ICache1 --&gt; SimpleCommonBusCacheRefiller_start_refill
-ICache_ICache1 --&gt; Forwarder2_write
-ICache_ICache2 --&gt; Forwarder2_write
-SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache2
-WishboneMasterAdapter_get_read_response --&gt; ICache_ICache2
-Serializer_Serializer --&gt; ICache_ICache2
-BasicFifo_read --&gt; ICache_ICache2
-WishboneMaster_result --&gt; ICache_ICache2
-Forwarder_read --&gt; ICache_ICache2
+ICache_ICache1 &lt;--&gt; HwCounter4__incr
+ICache_ICache2 &lt;--&gt; HwCounter3__incr
+ICache_ICache2 &lt;--&gt; HwCounter2__incr
+ICache_ICache2 &lt;--&gt; HwCounter1__incr
+ICache_ICache2 --&gt; Forwarder3_write
+ICache_ICache --&gt; SimpleCommonBusCacheRefiller_start_refill
+ICache_ICache --&gt; Forwarder2_write
+ICache_ICache3 --&gt; Forwarder2_write
+SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache3
+WishboneMasterAdapter_get_read_response --&gt; ICache_ICache3
+Serializer_Serializer --&gt; ICache_ICache3
+BasicFifo_read --&gt; ICache_ICache3
+WishboneMaster_result --&gt; ICache_ICache3
+Forwarder_read --&gt; ICache_ICache3
 Fetch_Fetch --&gt; ICache_issue_req
 Fetch_Fetch &lt;--&gt; HwCounter__incr
 Fetch_Fetch &lt;--&gt; LatencyMeasurer__start
@@ -656,7 +656,7 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 RegAllocation_RegAllocation --&gt; FIFO10_write
 FIFO10_read --&gt; Renaming_Renaming
 Renaming_Renaming --&gt; FRAT_rename
-Retirement_Retirement3 --&gt; FRAT_rename
+Retirement_Retirement --&gt; FRAT_rename
 TransactionManager_Retirement_Retirement_cond1 --&gt; FRAT_rename
 Renaming_Renaming --&gt; FIFO11_write
 FIFO11_read --&gt; ROBAllocation_ROBAllocation
@@ -664,18 +664,18 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 ROBAllocation_ROBAllocation &lt;--&gt; LatencyMeasurer1__start
 ROBAllocation_ROBAllocation --&gt; FIFO3_write
 ROBAllocation_ROBAllocation --&gt; FIFO12_write
-FIFO12_read --&gt; RSSelection_RSSelection
-RSSelection_RSSelection --&gt; Forwarder8_write
-Forwarder8_read --&gt; RSSelection_RSSelection2
+FIFO12_read --&gt; RSSelection_RSSelection1
+RSSelection_RSSelection1 --&gt; Forwarder8_write
+Forwarder8_read --&gt; RSSelection_RSSelection
 Forwarder8_read --&gt; RSSelection_RSSelection3
-Forwarder8_read --&gt; RSSelection_RSSelection1
-RSFuncBlock_select --&gt; RSSelection_RSSelection2
-RS_select --&gt; RSSelection_RSSelection2
-RSSelection_RSSelection2 --&gt; FIFO13_write
+Forwarder8_read --&gt; RSSelection_RSSelection2
+RSFuncBlock_select --&gt; RSSelection_RSSelection
+RS_select --&gt; RSSelection_RSSelection
+RSSelection_RSSelection --&gt; FIFO13_write
 RSSelection_RSSelection3 --&gt; FIFO13_write
-RSSelection_RSSelection1 --&gt; FIFO13_write
+RSSelection_RSSelection2 --&gt; FIFO13_write
 RSSelection_RSSelection3 &lt;--&gt; LSUDummy_select
-RSSelection_RSSelection1 &lt;--&gt; CSRUnit_select
+RSSelection_RSSelection2 &lt;--&gt; CSRUnit_select
 FIFO13_read --&gt; RSInsertion_RSInsertion
 RegisterFile_read1 --&gt; RSInsertion_RSInsertion
 RegisterFile_read2 --&gt; RSInsertion_RSInsertion
@@ -691,7 +691,7 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 Collector2_method --&gt; ConnectTrans11_ConnectTrans
 Forwarder7_read --&gt; ConnectTrans11_ConnectTrans
 ConnectTrans11_ConnectTrans --&gt; Fetch_resume
-Retirement_Retirement1 --&gt; Fetch_resume
+Retirement_Retirement4 --&gt; Fetch_resume
 Collector_method --&gt; ResultAnnouncement_ResultAnnouncement
 Forwarder4_read --&gt; ResultAnnouncement_ResultAnnouncement
 ResultAnnouncement_ResultAnnouncement --&gt; ReorderBuffer_mark_done
@@ -745,12 +745,12 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 PrivilegedFuncUnit_accept --&gt; ConnectTrans8_ConnectTrans
 CSRRegister2_read --&gt; ConnectTrans8_ConnectTrans
 ConnectTrans8_ConnectTrans --&gt; BasicFifo5_write
-LSUDummy_LSUDummy --&gt; Forwarder6_write
+LSUDummy_LSUDummy1 --&gt; Forwarder6_write
 TransactionManager_accept_cond0_LSUDummy --&gt; Forwarder6_write
 TransactionManager_issue_cond1_LSUDummy --&gt; Forwarder6_write
-TransactionManager_accept_cond1_LSUDummy --&gt; Forwarder6_write
 TransactionManager_issue_cond2_LSUDummy --&gt; Forwarder6_write
-TransactionManager_LSUDummy_issue_cond0 --&gt; Forwarder6_write
+TransactionManager_issue_cond0_LSUDummy --&gt; Forwarder6_write
+TransactionManager_accept_cond1_LSUDummy --&gt; Forwarder6_write
 CSRRegister__fu_read --&gt; CSRUnit_CSRUnit
 CSRUnit_CSRUnit --&gt; CSRRegister__fu_write
 CSRRegister1__fu_read --&gt; CSRUnit_CSRUnit
@@ -772,45 +772,45 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 LSUDummy_get_result --&gt; ConnectTrans2_ConnectTrans
 Forwarder6_read --&gt; ConnectTrans2_ConnectTrans
 CSRUnit_get_result --&gt; ConnectTrans3_ConnectTrans
-MethodTryProduct_MethodTryProduct --&gt; PrivilegedFuncUnit_precommit
-MethodTryProduct_MethodTryProduct &lt;--&gt; InterruptController_mret
-MethodTryProduct_MethodTryProduct2 --&gt; LSUDummy_precommit
+MethodTryProduct_MethodTryProduct2 --&gt; PrivilegedFuncUnit_precommit
+MethodTryProduct_MethodTryProduct2 &lt;--&gt; InterruptController_mret
+MethodTryProduct_MethodTryProduct --&gt; LSUDummy_precommit
 MethodTryProduct_MethodTryProduct1 --&gt; CSRUnit_precommit
 ConnectTrans9_ConnectTrans --&gt; Forwarder7_write
 ConnectTrans10_ConnectTrans --&gt; Forwarder7_write
 BasicFifo5_read --&gt; ConnectTrans9_ConnectTrans
 CSRUnit_fetch_resume --&gt; ConnectTrans10_ConnectTrans
-ReorderBuffer_peek --&gt; Retirement_Retirement4
-ReorderBuffer_peek --&gt; Retirement_Retirement
+ReorderBuffer_peek --&gt; Retirement_Retirement2
 ReorderBuffer_peek --&gt; Retirement_Retirement3
+ReorderBuffer_peek --&gt; Retirement_Retirement
 ReorderBuffer_peek --&gt; TransactionManager_Retirement_Retirement_cond1
 ReorderBuffer_peek --&gt; TransactionManager_Retirement_Retirement_cond0
-Retirement_Retirement4 --&gt; MethodTryProduct_method
-ExceptionCauseRegister_get --&gt; Retirement_Retirement
+Retirement_Retirement2 --&gt; MethodTryProduct_method
+ExceptionCauseRegister_get --&gt; Retirement_Retirement3
 ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_Retirement_cond1
 ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_Retirement_cond0
-Retirement_Retirement3 &lt;--&gt; ReorderBuffer_retire
+Retirement_Retirement &lt;--&gt; ReorderBuffer_retire
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; ReorderBuffer_retire
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; ReorderBuffer_retire
-Retirement_Retirement3 &lt;--&gt; LatencyMeasurer1__stop
+Retirement_Retirement &lt;--&gt; LatencyMeasurer1__stop
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; LatencyMeasurer1__stop
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; LatencyMeasurer1__stop
-FIFO3_read --&gt; Retirement_Retirement3
+FIFO3_read --&gt; Retirement_Retirement
 FIFO3_read --&gt; TransactionManager_Retirement_Retirement_cond1
 FIFO3_read --&gt; TransactionManager_Retirement_Retirement_cond0
-Retirement_Retirement3 --&gt; HwExpHistogram1__add
+Retirement_Retirement --&gt; HwExpHistogram1__add
 TransactionManager_Retirement_Retirement_cond1 --&gt; HwExpHistogram1__add
 TransactionManager_Retirement_Retirement_cond0 --&gt; HwExpHistogram1__add
-CoreInstructionCounter_decrement --&gt; Retirement_Retirement3
+CoreInstructionCounter_decrement --&gt; Retirement_Retirement
 CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_Retirement_cond1
 CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_Retirement_cond0
-RRAT_peek --&gt; Retirement_Retirement3
+RRAT_peek --&gt; Retirement_Retirement
 RRAT_peek --&gt; TransactionManager_Retirement_Retirement_cond1
-Retirement_Retirement3 --&gt; RegisterFile_free
+Retirement_Retirement --&gt; RegisterFile_free
 TransactionManager_Retirement_Retirement_cond1 --&gt; RegisterFile_free
 TransactionManager_Retirement_Retirement_cond0 --&gt; RegisterFile_free
-CSRRegister1_read --&gt; Retirement_Retirement1
-Retirement_Retirement1 &lt;--&gt; ExceptionCauseRegister_clear
+CSRRegister1_read --&gt; Retirement_Retirement4
+Retirement_Retirement4 &lt;--&gt; ExceptionCauseRegister_clear
 GenericCSRRegisters_GenericCSRRegisters &lt;--&gt; DoubleCounterCSR_increment
 CSRRegister3_read --&gt; GenericCSRRegisters_GenericCSRRegisters
 GenericCSRRegisters_GenericCSRRegisters --&gt; CSRRegister3_write
@@ -839,17 +839,24 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMasterAdapter1_request_read
 TransactionManager_issue_cond1_LSUDummy --&gt; Serializer1_Serializer3
 TransactionManager_issue_cond1_LSUDummy --&gt; BasicFifo1_write
-TransactionManager_LSUDummy_issue_cond0 --&gt; BasicFifo1_write
+TransactionManager_issue_cond0_LSUDummy --&gt; BasicFifo1_write
 TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMaster1_request
-TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMaster1_request
-TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSUDummy_LSUDummy1
-TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy1
-TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSUDummy_LSUDummy1
+TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMaster1_request
+TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSUDummy_LSUDummy
+TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy
+TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSUDummy_LSUDummy
 TransactionManager_issue_cond1_LSUDummy --&gt; LSURequester_issue
 TransactionManager_issue_cond2_LSUDummy --&gt; LSURequester_issue
-TransactionManager_LSUDummy_issue_cond0 --&gt; LSURequester_issue
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement2
-TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; Retirement_Retirement2
+TransactionManager_issue_cond0_LSUDummy --&gt; LSURequester_issue
+TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSURequester_issue_cond2
+TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSURequester_issue_cond0
+TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMasterAdapter1_request_write
+TransactionManager_issue_cond0_LSUDummy --&gt; Serializer1_Serializer2
+TransactionManager_accept_cond1_LSUDummy &lt;--&gt; LSURequester_accept_cond1
+WishboneMasterAdapter1_get_read_response --&gt; TransactionManager_accept_cond1_LSUDummy
+Serializer1_Serializer --&gt; TransactionManager_accept_cond1_LSUDummy
+TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement1
+TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; Retirement_Retirement1
 TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister_write
 TransactionManager_Retirement_Retirement_cond0 --&gt; CSRRegister_write
 TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister2_write
@@ -857,10 +864,6 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; InterruptController_entry
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; InterruptController_entry
 TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement_cond1
-TransactionManager_accept_cond1_LSUDummy &lt;--&gt; LSURequester_accept_cond1
-WishboneMasterAdapter1_get_read_response --&gt; TransactionManager_accept_cond1_LSUDummy
-Serializer1_Serializer2 --&gt; TransactionManager_accept_cond1_LSUDummy
-TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSURequester_issue_cond2
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; Retirement_Retirement_cond0
 TransactionManager_Retirement_Retirement_cond0 --&gt; RRAT_commit
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; DoubleCounterCSR2_increment
@@ -869,9 +872,6 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 CSRRegister8_read --&gt; TransactionManager_Retirement_Retirement_cond0
 TransactionManager_Retirement_Retirement_cond0 --&gt; CSRRegister8_write
 TransactionManager_Retirement_Retirement_cond0 &lt;--&gt; HwCounter9__incr
-TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSURequester_issue_cond0
-TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMasterAdapter1_request_write
-TransactionManager_LSUDummy_issue_cond0 --&gt; Serializer1_Serializer
         </div></div>
 </div>
 </div>
@@ -888,7 +888,7 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/development-environment.html b/development-environment.html
index 9a0f58734..8e3376640 100644
--- a/development-environment.html
+++ b/development-environment.html
@@ -209,7 +209,7 @@ <h3>tprof.py<a class="headerlink" href="#tprof-py" title="Permalink to this head
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/genindex.html b/genindex.html
index 499a975c7..cf70764ac 100644
--- a/genindex.html
+++ b/genindex.html
@@ -3737,7 +3737,7 @@ <h2 id="Z">Z</h2>
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/home.html b/home.html
index 82d0d0b4a..bc1a271aa 100644
--- a/home.html
+++ b/home.html
@@ -129,7 +129,7 @@ <h2>Documentation<a class="headerlink" href="#documentation" title="Permalink to
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/index.html b/index.html
index 9284b5274..8e082afa3 100644
--- a/index.html
+++ b/index.html
@@ -229,7 +229,7 @@ <h1>Coreblocks<a class="headerlink" href="#coreblocks" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/miscellany/exceptions-summary.html b/miscellany/exceptions-summary.html
index 20e76037e..294ed7514 100644
--- a/miscellany/exceptions-summary.html
+++ b/miscellany/exceptions-summary.html
@@ -271,7 +271,7 @@ <h2>Summary<a class="headerlink" href="#summary" title="Permalink to this headin
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/modules-coreblocks.html b/modules-coreblocks.html
index c884c409f..af6549138 100644
--- a/modules-coreblocks.html
+++ b/modules-coreblocks.html
@@ -168,7 +168,7 @@ <h1>coreblocks<a class="headerlink" href="#coreblocks" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/modules-transactron.html b/modules-transactron.html
index 4577eff58..945bd5f58 100644
--- a/modules-transactron.html
+++ b/modules-transactron.html
@@ -161,7 +161,7 @@ <h1>transactron<a class="headerlink" href="#transactron" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/problem-checklist.html b/problem-checklist.html
index 9e7486d28..e559cb007 100644
--- a/problem-checklist.html
+++ b/problem-checklist.html
@@ -105,7 +105,7 @@ <h1>Problem checklist<a class="headerlink" href="#problem-checklist" title="Perm
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/py-modindex.html b/py-modindex.html
index eacb84315..aab3a16cc 100644
--- a/py-modindex.html
+++ b/py-modindex.html
@@ -668,7 +668,7 @@ <h1>Python Module Index</h1>
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/scheduler/overview.html b/scheduler/overview.html
index 6142305e4..b47f236a3 100644
--- a/scheduler/overview.html
+++ b/scheduler/overview.html
@@ -146,7 +146,7 @@ <h2>More detailed description of each block<a class="headerlink" href="#more-det
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/search.html b/search.html
index d5e8abb99..65537fbde 100644
--- a/search.html
+++ b/search.html
@@ -101,7 +101,7 @@
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/shared-structs/implementation/rs-impl.html b/shared-structs/implementation/rs-impl.html
index dba7f425a..8639d2aa0 100644
--- a/shared-structs/implementation/rs-impl.html
+++ b/shared-structs/implementation/rs-impl.html
@@ -252,7 +252,7 @@ <h3>Read and clean row<a class="headerlink" href="#read-and-clean-row" title="Pe
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/shared-structs/rs.html b/shared-structs/rs.html
index 0806582c1..b40345c60 100644
--- a/shared-structs/rs.html
+++ b/shared-structs/rs.html
@@ -222,7 +222,7 @@ <h2>External interface signals<a class="headerlink" href="#external-interface-si
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/synthesis/synthesis.html b/synthesis/synthesis.html
index 65003bd5d..3c40a5737 100644
--- a/synthesis/synthesis.html
+++ b/synthesis/synthesis.html
@@ -266,7 +266,7 @@ <h3>Regression tests manual execution<a class="headerlink" href="#regression-tes
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactions.html b/transactions.html
index 50c7f12bc..a5acdbdbf 100644
--- a/transactions.html
+++ b/transactions.html
@@ -409,7 +409,7 @@ <h3>Transaction and method nesting<a class="headerlink" href="#transaction-and-m
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactron.core.html b/transactron.core.html
index 5d59ab655..6ff9a876b 100644
--- a/transactron.core.html
+++ b/transactron.core.html
@@ -860,7 +860,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactron.html b/transactron.html
index 8dc26143d..14185b6b0 100644
--- a/transactron.html
+++ b/transactron.html
@@ -751,7 +751,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactron.lib.html b/transactron.lib.html
index 978e25638..6b5c83a5f 100644
--- a/transactron.lib.html
+++ b/transactron.lib.html
@@ -1916,7 +1916,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactron.testing.html b/transactron.testing.html
index 1eb9eb292..8f3ae0abc 100644
--- a/transactron.testing.html
+++ b/transactron.testing.html
@@ -408,7 +408,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactron.utils.amaranth_ext.html b/transactron.utils.amaranth_ext.html
index 24fe7d4b6..cefa23a3d 100644
--- a/transactron.utils.amaranth_ext.html
+++ b/transactron.utils.amaranth_ext.html
@@ -293,7 +293,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>
 
diff --git a/transactron.utils.html b/transactron.utils.html
index 23e8d8adc..8f815cc18 100644
--- a/transactron.utils.html
+++ b/transactron.utils.html
@@ -792,7 +792,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 21:57 2024-03-21.
+      <span class="lastupdated">Last updated on 23:12 2024-03-21.
       </span></p>
   </div>