From b7e3e9073ad297f34bab7043d74757c7a1c98ca7 Mon Sep 17 00:00:00 2001 From: tilk Date: Fri, 1 Dec 2023 21:38:44 +0000 Subject: [PATCH] Update dockerfiles (#515) --- .doctrees/api.doctree | Bin 20945 -> 20945 bytes .doctrees/auto_graph.doctree | Bin 24898 -> 24910 bytes .doctrees/current-graph.doctree | Bin 26119 -> 26131 bytes .doctrees/environment.pickle | Bin 331602 -> 331602 bytes _sources/auto_graph.rst.txt | 150 ++++++++++---------- api.html | 2 +- assumptions.html | 2 +- auto_graph.html | 152 ++++++++++----------- components/icache.html | 2 +- coreblocks.frontend.html | 2 +- coreblocks.fu.html | 2 +- coreblocks.fu.unsigned_multiplication.html | 2 +- coreblocks.html | 2 +- coreblocks.params.html | 2 +- coreblocks.peripherals.html | 2 +- coreblocks.scheduler.html | 2 +- coreblocks.stages.html | 2 +- coreblocks.structs_common.html | 2 +- coreblocks.utils.html | 2 +- current-graph.html | 152 ++++++++++----------- development-environment.html | 2 +- genindex.html | 2 +- home.html | 2 +- index.html | 2 +- miscellany/exceptions-summary.html | 2 +- modules-coreblocks.html | 2 +- modules-transactron.html | 2 +- problem-checklist.html | 2 +- py-modindex.html | 2 +- scheduler/overview.html | 2 +- search.html | 2 +- shared-structs/implementation/rs-impl.html | 2 +- shared-structs/rs.html | 2 +- synthesis/synthesis.html | 2 +- transactions.html | 2 +- transactron.html | 2 +- transactron.lib.html | 2 +- transactron.utils.html | 2 +- 38 files changed, 258 insertions(+), 258 deletions(-) diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree index a3609d6a8eee759f04940bdbabf19fdc4de7c5fc..1966dec20cc805628049b448c7257ff5e6736ef0 100644 GIT binary patch delta 452 zcmY*WJx&5a6b?o$KvZ0TMjI0oHDT%4RT8;}i6O)8gPkxtvzeb&D`G!dI1?^FV_{*! z1-t@{g`Kq*uyj$8wR`#U{k`{QlfrCLcz$h}+jiB_70D45D3F{{S4m8SdGTtFBW|dS zKw!~aOy=I-+bjo+LyxdvDBQj>9sl5@xP+`;!!(3zt9O^6D}o3@MSz>n*8WO#Y2N)~ ze>+F`jD{XZN38CUdVn&74pOixb3AJUu#nDy(1F@#Eyqyq!JF NzhydJbvkahYhSuEw2%M* delta 451 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z0rb~_7y%5_fk6TossqCWFhU1ji_GJOAEhIs1xvgRBnV)<4onb0k`5#bAVmjK1z^yD z$pXmKfh++`WA+z+pl7;3W-%827khF9kgo%?1u$0!<_Tb-4ipNYNC%b(pjZc%3!p>? zR^$m}rH;HQfVXvEwE)T(z<$fBtP{YyIH0{Bt~E(_qQ z4qOvJl@8n#z%3p4RseT&;I07f>%ap6R9kTbWCyFZJZR!igjpcO;-z0g3y@{ZNMnD9 z3JaFVV!={MEZCbEEW|IM`EP--#gZ;8SaO8L-~C~8jNtjFf7vX$vt$QHnq!n5tzzZ> E0N~+pEdT%j diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt index 7e5aba826..08c277e79 100644 --- a/_sources/auto_graph.rst.txt +++ b/_sources/auto_graph.rst.txt @@ -6,35 +6,35 @@ subgraph Core["core Core"] Core_InitFreeRFFifo["InitFreeRFFifo"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] - WishboneMaster_result["result"] WishboneMaster_WishboneMaster["WishboneMaster"] WishboneMaster_request["request"] + WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] Forwarder_write["write"] Forwarder_read["read"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] + WishboneMaster1_request["request"] WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] - WishboneMaster1_request["request"] subgraph Forwarder1["result Forwarder"] Forwarder1_write["write"] Forwarder1_read["read"] end end subgraph FIFO["fifo_fetch FIFO"] - FIFO_read["read"] FIFO_write["write"] + FIFO_read["read"] end subgraph BasicFifo["free_rf_fifo BasicFifo"] - BasicFifo_write["write"] BasicFifo_read["read"] + BasicFifo_write["write"] end subgraph SimpleWBCacheRefiller["icache_refiller SimpleWBCacheRefiller"] - SimpleWBCacheRefiller_SimpleWBCacheRefiller["SimpleWBCacheRefiller"] SimpleWBCacheRefiller_accept_refill["accept_refill"] SimpleWBCacheRefiller_start_refill["start_refill"] + SimpleWBCacheRefiller_SimpleWBCacheRefiller["SimpleWBCacheRefiller"] subgraph Forwarder2["address_fwd Forwarder"] Forwarder2_read["read"] Forwarder2_write["write"] @@ -42,17 +42,17 @@ end subgraph ICache["icache ICache"] ICache_ICache["ICache"] + ICache_issue_req["issue_req"] ICache_ICache1["ICache"] - ICache_accept_res["accept_res"] ICache_ICache2["ICache"] - ICache_issue_req["issue_req"] + ICache_accept_res["accept_res"] subgraph FIFO1["req_fifo FIFO"] FIFO1_write["write"] FIFO1_read["read"] end subgraph Forwarder3["res_fwd Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end subgraph Fetch["fetch Fetch"] @@ -72,16 +72,16 @@ end subgraph RegisterFile["RF RegisterFile"] RegisterFile_free["free"] - RegisterFile_read2["read2"] - RegisterFile_write["write"] RegisterFile_read1["read1"] + RegisterFile_write["write"] + RegisterFile_read2["read2"] end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_retire["retire"] + ReorderBuffer_put["put"] ReorderBuffer_mark_done["mark_done"] ReorderBuffer_peek["peek"] ReorderBuffer_get_indices["get_indices"] - ReorderBuffer_put["put"] + ReorderBuffer_retire["retire"] end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_get["get"] @@ -107,26 +107,26 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_select["select"] + RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] + RSFuncBlock_select["select"] RSFuncBlock_insert["insert"] - RSFuncBlock_update["update"] subgraph RS["rs RS"] + RS_select["select"] + RS_insert["insert"] RS_RS["RS"] - RS_update["update"] RS_RS1["RS"] + RS_update["update"] RS_RS2["RS"] - RS_take["take"] - RS_insert["insert"] - RS_select["select"] RS_RS3["RS"] + RS_take["take"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_issue["issue"] AluFuncUnit_accept["accept"] subgraph FIFO2["fifo FIFO"] - FIFO2_read["read"] FIFO2_write["write"] + FIFO2_read["read"] end end subgraph WakeupSelect["wakeup_select_0 WakeupSelect"] @@ -148,12 +148,12 @@ JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] subgraph FIFO4["fifo_res FIFO"] - FIFO4_write["write"] FIFO4_read["read"] + FIFO4_write["write"] end subgraph FIFO5["fifo_branch FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect2["wakeup_select_2 WakeupSelect"] @@ -163,8 +163,8 @@ ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] subgraph FIFO6["fifo FIFO"] - FIFO6_write["write"] FIFO6_read["read"] + FIFO6_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] @@ -173,8 +173,8 @@ subgraph Collector1["collector Collector"] Collector1_method["method"] subgraph Forwarder5["forwarder Forwarder"] - Forwarder5_read["read"] Forwarder5_write["write"] + Forwarder5_read["read"] end subgraph ManyToOneConnectTrans1["connect ManyToOneConnectTrans"] subgraph ConnectTrans2["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -197,17 +197,17 @@ LSUDummy_update["update"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_get_result["get_result"] - LSUDummy_precommit["precommit"] LSUDummy_select["select"] LSUDummy_LSUDummy1["LSUDummy"] + LSUDummy_precommit["precommit"] LSUDummy_LSUDummy2["LSUDummy"] subgraph Forwarder6["forwarder Forwarder"] Forwarder6_write["write"] Forwarder6_read["read"] end subgraph LSURequesterWB["requester LSURequesterWB"] - LSURequesterWB_issue["issue"] LSURequesterWB_accept["accept"] + LSURequesterWB_issue["issue"] end end end @@ -223,8 +223,8 @@ CSRRegister_read["read"] end subgraph CSRRegister1["register_high CSRRegister"] - CSRRegister1_write["write"] CSRRegister1_read["read"] + CSRRegister1_write["write"] end end subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] @@ -258,30 +258,30 @@ RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO9["rename_out_buf FIFO"] - FIFO9_write["write"] FIFO9_read["read"] + FIFO9_write["write"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO10["reg_alloc_out_buf FIFO"] - FIFO10_write["write"] FIFO10_read["read"] + FIFO10_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO11["rs_select_out_buf FIFO"] - FIFO11_read["read"] FIFO11_write["write"] + FIFO11_read["read"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] RSSelection_RSSelection1["RSSelection"] RSSelection_RSSelection2["RSSelection"] subgraph Forwarder7["forwarder Forwarder"] - Forwarder7_read["read"] Forwarder7_write["write"] + Forwarder7_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -298,12 +298,12 @@ subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] - CSRRegister5_read["read"] CSRRegister5_write["write"] + CSRRegister5_read["read"] end subgraph CSRRegister6["register_high CSRRegister"] - CSRRegister6_read["read"] CSRRegister6_write["write"] + CSRRegister6_read["read"] end end subgraph Forwarder8["frat_fix Forwarder"] @@ -325,26 +325,26 @@ end end Core_InitFreeRFFifo --> BasicFifo_write - Retirement_Retirement --> BasicFifo_write + Retirement_Retirement1 --> BasicFifo_write WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write Forwarder2_read --> SimpleWBCacheRefiller_SimpleWBCacheRefiller SimpleWBCacheRefiller_SimpleWBCacheRefiller --> WishboneMaster_request - ICache_ICache2 --> Forwarder3_write + ICache_ICache1 --> Forwarder3_write ICache_ICache --> SimpleWBCacheRefiller_start_refill ICache_ICache --> Forwarder2_write - ICache_ICache1 --> Forwarder2_write - SimpleWBCacheRefiller_accept_refill --> ICache_ICache1 - WishboneMaster_result --> ICache_ICache1 - Forwarder_read --> ICache_ICache1 - Fetch_Fetch --> ICache_issue_req - Fetch_Fetch --> FIFO1_write - Fetch_Fetch --> BasicFifo1_write - BasicFifo1_read --> Fetch_Fetch1 - ICache_accept_res --> Fetch_Fetch1 - FIFO1_read --> Fetch_Fetch1 - Forwarder3_read --> Fetch_Fetch1 - Fetch_Fetch1 --> FIFO_write + ICache_ICache2 --> Forwarder2_write + SimpleWBCacheRefiller_accept_refill --> ICache_ICache2 + WishboneMaster_result --> ICache_ICache2 + Forwarder_read --> ICache_ICache2 + Fetch_Fetch1 --> ICache_issue_req + Fetch_Fetch1 --> FIFO1_write + Fetch_Fetch1 --> BasicFifo1_write + BasicFifo1_read --> Fetch_Fetch + ICache_accept_res --> Fetch_Fetch + FIFO1_read --> Fetch_Fetch + Forwarder3_read --> Fetch_Fetch + Fetch_Fetch --> FIFO_write AdapterTrans_AdapterTrans_write --> FIFO_write FIFO_read --> Decode_Decode Decode_Decode --> FIFO7_write @@ -353,18 +353,18 @@ RegAllocation_RegAllocation --> FIFO8_write FIFO8_read --> Renaming_Renaming Renaming_Renaming --> FRAT_rename - Retirement_Retirement1 --> FRAT_rename + Retirement_Retirement --> FRAT_rename Renaming_Renaming --> FIFO9_write FIFO9_read --> ROBAllocation_ROBAllocation ROBAllocation_ROBAllocation --> ReorderBuffer_put ROBAllocation_ROBAllocation --> FIFO10_write - FIFO10_read --> RSSelection_RSSelection1 - RSSelection_RSSelection1 --> Forwarder7_write - Forwarder7_read --> RSSelection_RSSelection + FIFO10_read --> RSSelection_RSSelection + RSSelection_RSSelection --> Forwarder7_write + Forwarder7_read --> RSSelection_RSSelection1 Forwarder7_read --> RSSelection_RSSelection2 - RSFuncBlock_select --> RSSelection_RSSelection - RS_select --> RSSelection_RSSelection - RSSelection_RSSelection --> FIFO11_write + RSFuncBlock_select --> RSSelection_RSSelection1 + RS_select --> RSSelection_RSSelection1 + RSSelection_RSSelection1 --> FIFO11_write RSSelection_RSSelection2 --> FIFO11_write RSSelection_RSSelection2 <--> LSUDummy_select FIFO11_read --> RSInsertion_RSInsertion @@ -385,17 +385,17 @@ ResultAnnouncement_ResultAnnouncement --> RSFuncBlock_update ResultAnnouncement_ResultAnnouncement --> RS_update ResultAnnouncement_ResultAnnouncement --> LSUDummy_update - RS_RS2 --> WakeupSelect_WakeupSelect + RS_RS3 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect RS_take --> WakeupSelect3_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO2_write - RS_RS1 --> WakeupSelect1_WakeupSelect + RS_RS2 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO3_write - RS_RS --> WakeupSelect2_WakeupSelect + RS_RS1 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect --> ExceptionCauseRegister_report WakeupSelect3_WakeupSelect --> ExceptionCauseRegister_report @@ -405,7 +405,7 @@ ReorderBuffer_get_indices --> ConnectTrans1_ConnectTrans WakeupSelect2_WakeupSelect --> FIFO4_write WakeupSelect2_WakeupSelect --> FIFO5_write - RS_RS3 --> WakeupSelect3_WakeupSelect + RS_RS --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO6_write ConnectTrans2_ConnectTrans --> Forwarder5_write @@ -420,14 +420,14 @@ FIFO4_read --> ConnectTrans4_ConnectTrans ExceptionFuncUnit_accept --> ConnectTrans5_ConnectTrans FIFO6_read --> ConnectTrans5_ConnectTrans - LSUDummy_LSUDummy --> LSURequesterWB_issue - LSUDummy_LSUDummy --> WishboneMaster1_request + LSUDummy_LSUDummy2 --> LSURequesterWB_issue + LSUDummy_LSUDummy2 --> WishboneMaster1_request + LSUDummy_LSUDummy2 --> Forwarder6_write LSUDummy_LSUDummy --> Forwarder6_write LSUDummy_LSUDummy1 --> Forwarder6_write - LSUDummy_LSUDummy2 --> Forwarder6_write - LSURequesterWB_accept --> LSUDummy_LSUDummy2 - WishboneMaster1_result --> LSUDummy_LSUDummy2 - Forwarder1_read --> LSUDummy_LSUDummy2 + LSURequesterWB_accept --> LSUDummy_LSUDummy1 + WishboneMaster1_result --> LSUDummy_LSUDummy1 + Forwarder1_read --> LSUDummy_LSUDummy1 ConnectTrans_ConnectTrans --> Forwarder4_write ConnectTrans1_ConnectTrans --> Forwarder4_write RSFuncBlock_get_result --> ConnectTrans_ConnectTrans @@ -437,18 +437,18 @@ Forwarder6_read --> ConnectTrans1_ConnectTrans ReorderBuffer_peek --> Retirement_Retirement2 Retirement_Retirement2 --> LSUDummy_precommit - ReorderBuffer_retire --> Retirement_Retirement - ExceptionCauseRegister_get --> Retirement_Retirement - Retirement_Retirement --> CSRRegister4_write - Retirement_Retirement --> RRAT_commit - Retirement_Retirement <--> DoubleCounterCSR2_increment - CSRRegister5_read --> Retirement_Retirement - Retirement_Retirement --> CSRRegister5_write - CSRRegister6_read --> Retirement_Retirement - Retirement_Retirement --> CSRRegister6_write - Retirement_Retirement --> Forwarder8_write - Retirement_Retirement --> RegisterFile_free - Forwarder8_read --> Retirement_Retirement1 + ReorderBuffer_retire --> Retirement_Retirement1 + ExceptionCauseRegister_get --> Retirement_Retirement1 + Retirement_Retirement1 --> CSRRegister4_write + Retirement_Retirement1 --> RRAT_commit + Retirement_Retirement1 <--> DoubleCounterCSR2_increment + CSRRegister5_read --> Retirement_Retirement1 + Retirement_Retirement1 --> CSRRegister5_write + CSRRegister6_read --> Retirement_Retirement1 + Retirement_Retirement1 --> CSRRegister6_write + Retirement_Retirement1 --> Forwarder8_write + Retirement_Retirement1 --> RegisterFile_free + Forwarder8_read --> Retirement_Retirement GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister_write diff --git a/api.html b/api.html index dce4b5a62..7fe52bbad 100644 --- a/api.html +++ b/api.html @@ -240,7 +240,7 @@

transactron

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 09:58 2023-11-28. + Last updated on 21:38 2023-12-01.

diff --git a/assumptions.html b/assumptions.html index 561f9e647..283bb7f21 100644 --- a/assumptions.html +++ b/assumptions.html @@ -104,7 +104,7 @@

List of assumptions made during development

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 09:58 2023-11-28. + Last updated on 21:38 2023-12-01.

diff --git a/auto_graph.html b/auto_graph.html index 90b34bfba..2bd685c83 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -85,35 +85,35 @@ subgraph Core["core Core"] Core_InitFreeRFFifo["InitFreeRFFifo"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] - WishboneMaster_result["result"] WishboneMaster_WishboneMaster["WishboneMaster"] WishboneMaster_request["request"] + WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] Forwarder_write["write"] Forwarder_read["read"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] + WishboneMaster1_request["request"] WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] - WishboneMaster1_request["request"] subgraph Forwarder1["result Forwarder"] Forwarder1_write["write"] Forwarder1_read["read"] end end subgraph FIFO["fifo_fetch FIFO"] - FIFO_read["read"] FIFO_write["write"] + FIFO_read["read"] end subgraph BasicFifo["free_rf_fifo BasicFifo"] - BasicFifo_write["write"] BasicFifo_read["read"] + BasicFifo_write["write"] end subgraph SimpleWBCacheRefiller["icache_refiller SimpleWBCacheRefiller"] - SimpleWBCacheRefiller_SimpleWBCacheRefiller["SimpleWBCacheRefiller"] SimpleWBCacheRefiller_accept_refill["accept_refill"] SimpleWBCacheRefiller_start_refill["start_refill"] + SimpleWBCacheRefiller_SimpleWBCacheRefiller["SimpleWBCacheRefiller"] subgraph Forwarder2["address_fwd Forwarder"] Forwarder2_read["read"] Forwarder2_write["write"] @@ -121,17 +121,17 @@ end subgraph ICache["icache ICache"] ICache_ICache["ICache"] + ICache_issue_req["issue_req"] ICache_ICache1["ICache"] - ICache_accept_res["accept_res"] ICache_ICache2["ICache"] - ICache_issue_req["issue_req"] + ICache_accept_res["accept_res"] subgraph FIFO1["req_fifo FIFO"] FIFO1_write["write"] FIFO1_read["read"] end subgraph Forwarder3["res_fwd Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end subgraph Fetch["fetch Fetch"] @@ -151,16 +151,16 @@ end subgraph RegisterFile["RF RegisterFile"] RegisterFile_free["free"] - RegisterFile_read2["read2"] - RegisterFile_write["write"] RegisterFile_read1["read1"] + RegisterFile_write["write"] + RegisterFile_read2["read2"] end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_retire["retire"] + ReorderBuffer_put["put"] ReorderBuffer_mark_done["mark_done"] ReorderBuffer_peek["peek"] ReorderBuffer_get_indices["get_indices"] - ReorderBuffer_put["put"] + ReorderBuffer_retire["retire"] end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_get["get"] @@ -186,26 +186,26 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_select["select"] + RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] + RSFuncBlock_select["select"] RSFuncBlock_insert["insert"] - RSFuncBlock_update["update"] subgraph RS["rs RS"] + RS_select["select"] + RS_insert["insert"] RS_RS["RS"] - RS_update["update"] RS_RS1["RS"] + RS_update["update"] RS_RS2["RS"] - RS_take["take"] - RS_insert["insert"] - RS_select["select"] RS_RS3["RS"] + RS_take["take"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_issue["issue"] AluFuncUnit_accept["accept"] subgraph FIFO2["fifo FIFO"] - FIFO2_read["read"] FIFO2_write["write"] + FIFO2_read["read"] end end subgraph WakeupSelect["wakeup_select_0 WakeupSelect"] @@ -227,12 +227,12 @@ JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] subgraph FIFO4["fifo_res FIFO"] - FIFO4_write["write"] FIFO4_read["read"] + FIFO4_write["write"] end subgraph FIFO5["fifo_branch FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect2["wakeup_select_2 WakeupSelect"] @@ -242,8 +242,8 @@ ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] subgraph FIFO6["fifo FIFO"] - FIFO6_write["write"] FIFO6_read["read"] + FIFO6_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] @@ -252,8 +252,8 @@ subgraph Collector1["collector Collector"] Collector1_method["method"] subgraph Forwarder5["forwarder Forwarder"] - Forwarder5_read["read"] Forwarder5_write["write"] + Forwarder5_read["read"] end subgraph ManyToOneConnectTrans1["connect ManyToOneConnectTrans"] subgraph ConnectTrans2["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -276,17 +276,17 @@ LSUDummy_update["update"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_get_result["get_result"] - LSUDummy_precommit["precommit"] LSUDummy_select["select"] LSUDummy_LSUDummy1["LSUDummy"] + LSUDummy_precommit["precommit"] LSUDummy_LSUDummy2["LSUDummy"] subgraph Forwarder6["forwarder Forwarder"] Forwarder6_write["write"] Forwarder6_read["read"] end subgraph LSURequesterWB["requester LSURequesterWB"] - LSURequesterWB_issue["issue"] LSURequesterWB_accept["accept"] + LSURequesterWB_issue["issue"] end end end @@ -302,8 +302,8 @@ CSRRegister_read["read"] end subgraph CSRRegister1["register_high CSRRegister"] - CSRRegister1_write["write"] CSRRegister1_read["read"] + CSRRegister1_write["write"] end end subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] @@ -337,30 +337,30 @@ RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO9["rename_out_buf FIFO"] - FIFO9_write["write"] FIFO9_read["read"] + FIFO9_write["write"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO10["reg_alloc_out_buf FIFO"] - FIFO10_write["write"] FIFO10_read["read"] + FIFO10_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO11["rs_select_out_buf FIFO"] - FIFO11_read["read"] FIFO11_write["write"] + FIFO11_read["read"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] RSSelection_RSSelection1["RSSelection"] RSSelection_RSSelection2["RSSelection"] subgraph Forwarder7["forwarder Forwarder"] - Forwarder7_read["read"] Forwarder7_write["write"] + Forwarder7_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -377,12 +377,12 @@ subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] - CSRRegister5_read["read"] CSRRegister5_write["write"] + CSRRegister5_read["read"] end subgraph CSRRegister6["register_high CSRRegister"] - CSRRegister6_read["read"] CSRRegister6_write["write"] + CSRRegister6_read["read"] end end subgraph Forwarder8["frat_fix Forwarder"] @@ -404,26 +404,26 @@ end end Core_InitFreeRFFifo --> BasicFifo_write -Retirement_Retirement --> BasicFifo_write +Retirement_Retirement1 --> BasicFifo_write WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write Forwarder2_read --> SimpleWBCacheRefiller_SimpleWBCacheRefiller SimpleWBCacheRefiller_SimpleWBCacheRefiller --> WishboneMaster_request -ICache_ICache2 --> Forwarder3_write +ICache_ICache1 --> Forwarder3_write ICache_ICache --> SimpleWBCacheRefiller_start_refill ICache_ICache --> Forwarder2_write -ICache_ICache1 --> Forwarder2_write -SimpleWBCacheRefiller_accept_refill --> ICache_ICache1 -WishboneMaster_result --> ICache_ICache1 -Forwarder_read --> ICache_ICache1 -Fetch_Fetch --> ICache_issue_req -Fetch_Fetch --> FIFO1_write -Fetch_Fetch --> BasicFifo1_write -BasicFifo1_read --> Fetch_Fetch1 -ICache_accept_res --> Fetch_Fetch1 -FIFO1_read --> Fetch_Fetch1 -Forwarder3_read --> Fetch_Fetch1 -Fetch_Fetch1 --> FIFO_write +ICache_ICache2 --> Forwarder2_write +SimpleWBCacheRefiller_accept_refill --> ICache_ICache2 +WishboneMaster_result --> ICache_ICache2 +Forwarder_read --> ICache_ICache2 +Fetch_Fetch1 --> ICache_issue_req +Fetch_Fetch1 --> FIFO1_write +Fetch_Fetch1 --> BasicFifo1_write +BasicFifo1_read --> Fetch_Fetch +ICache_accept_res --> Fetch_Fetch +FIFO1_read --> Fetch_Fetch +Forwarder3_read --> Fetch_Fetch +Fetch_Fetch --> FIFO_write AdapterTrans_AdapterTrans_write --> FIFO_write FIFO_read --> Decode_Decode Decode_Decode --> FIFO7_write @@ -432,18 +432,18 @@ RegAllocation_RegAllocation --> FIFO8_write FIFO8_read --> Renaming_Renaming Renaming_Renaming --> FRAT_rename -Retirement_Retirement1 --> FRAT_rename +Retirement_Retirement --> FRAT_rename Renaming_Renaming --> FIFO9_write FIFO9_read --> ROBAllocation_ROBAllocation ROBAllocation_ROBAllocation --> ReorderBuffer_put ROBAllocation_ROBAllocation --> FIFO10_write -FIFO10_read --> RSSelection_RSSelection1 -RSSelection_RSSelection1 --> Forwarder7_write -Forwarder7_read --> RSSelection_RSSelection +FIFO10_read --> RSSelection_RSSelection +RSSelection_RSSelection --> Forwarder7_write +Forwarder7_read --> RSSelection_RSSelection1 Forwarder7_read --> RSSelection_RSSelection2 -RSFuncBlock_select --> RSSelection_RSSelection -RS_select --> RSSelection_RSSelection -RSSelection_RSSelection --> FIFO11_write +RSFuncBlock_select --> RSSelection_RSSelection1 +RS_select --> RSSelection_RSSelection1 +RSSelection_RSSelection1 --> FIFO11_write RSSelection_RSSelection2 --> FIFO11_write RSSelection_RSSelection2 <--> LSUDummy_select FIFO11_read --> RSInsertion_RSInsertion @@ -464,17 +464,17 @@ ResultAnnouncement_ResultAnnouncement --> RSFuncBlock_update ResultAnnouncement_ResultAnnouncement --> RS_update ResultAnnouncement_ResultAnnouncement --> LSUDummy_update -RS_RS2 --> WakeupSelect_WakeupSelect +RS_RS3 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect RS_take --> WakeupSelect3_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO2_write -RS_RS1 --> WakeupSelect1_WakeupSelect +RS_RS2 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO3_write -RS_RS --> WakeupSelect2_WakeupSelect +RS_RS1 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect --> ExceptionCauseRegister_report WakeupSelect3_WakeupSelect --> ExceptionCauseRegister_report @@ -484,7 +484,7 @@ ReorderBuffer_get_indices --> ConnectTrans1_ConnectTrans WakeupSelect2_WakeupSelect --> FIFO4_write WakeupSelect2_WakeupSelect --> FIFO5_write -RS_RS3 --> WakeupSelect3_WakeupSelect +RS_RS --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO6_write ConnectTrans2_ConnectTrans --> Forwarder5_write @@ -499,14 +499,14 @@ FIFO4_read --> ConnectTrans4_ConnectTrans ExceptionFuncUnit_accept --> ConnectTrans5_ConnectTrans FIFO6_read --> ConnectTrans5_ConnectTrans -LSUDummy_LSUDummy --> LSURequesterWB_issue -LSUDummy_LSUDummy --> WishboneMaster1_request +LSUDummy_LSUDummy2 --> LSURequesterWB_issue +LSUDummy_LSUDummy2 --> WishboneMaster1_request +LSUDummy_LSUDummy2 --> Forwarder6_write LSUDummy_LSUDummy --> Forwarder6_write LSUDummy_LSUDummy1 --> Forwarder6_write -LSUDummy_LSUDummy2 --> Forwarder6_write -LSURequesterWB_accept --> LSUDummy_LSUDummy2 -WishboneMaster1_result --> LSUDummy_LSUDummy2 -Forwarder1_read --> LSUDummy_LSUDummy2 +LSURequesterWB_accept --> LSUDummy_LSUDummy1 +WishboneMaster1_result --> LSUDummy_LSUDummy1 +Forwarder1_read --> LSUDummy_LSUDummy1 ConnectTrans_ConnectTrans --> Forwarder4_write ConnectTrans1_ConnectTrans --> Forwarder4_write RSFuncBlock_get_result --> ConnectTrans_ConnectTrans @@ -516,18 +516,18 @@ Forwarder6_read --> ConnectTrans1_ConnectTrans ReorderBuffer_peek --> Retirement_Retirement2 Retirement_Retirement2 --> LSUDummy_precommit -ReorderBuffer_retire --> Retirement_Retirement -ExceptionCauseRegister_get --> Retirement_Retirement -Retirement_Retirement --> CSRRegister4_write -Retirement_Retirement --> RRAT_commit -Retirement_Retirement <--> DoubleCounterCSR2_increment -CSRRegister5_read --> Retirement_Retirement -Retirement_Retirement --> CSRRegister5_write -CSRRegister6_read --> Retirement_Retirement -Retirement_Retirement --> CSRRegister6_write -Retirement_Retirement --> Forwarder8_write -Retirement_Retirement --> RegisterFile_free -Forwarder8_read --> Retirement_Retirement1 +ReorderBuffer_retire --> Retirement_Retirement1 +ExceptionCauseRegister_get --> Retirement_Retirement1 +Retirement_Retirement1 --> CSRRegister4_write +Retirement_Retirement1 --> RRAT_commit +Retirement_Retirement1 <--> DoubleCounterCSR2_increment +CSRRegister5_read --> Retirement_Retirement1 +Retirement_Retirement1 --> CSRRegister5_write +CSRRegister6_read --> Retirement_Retirement1 +Retirement_Retirement1 --> CSRRegister6_write +Retirement_Retirement1 --> Forwarder8_write +Retirement_Retirement1 --> RegisterFile_free +Forwarder8_read --> Retirement_Retirement GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister_write @@ -548,7 +548,7 @@

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diff --git a/components/icache.html b/components/icache.html index 357d300d6..997570074 100644 --- a/components/icache.html +++ b/components/icache.html @@ -131,7 +131,7 @@

Address mapping example

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Submodules

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Submodules

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Submodules

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Submodules

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Submodules

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Submodules

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Submodules

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Submodules

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Full transaction-method graph

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build_docs.sh

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Z

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Documentation

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Coreblocks

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Summary

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coreblocks

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transactron

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Problem checklist

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Python Module Index

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More detailed description of each block

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Read and clean row

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External interface signals

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Benchmarks

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Transaction and method nesting

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Submodules

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Submodules

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