From b30c8d7c98dc26b1f98075692554d204adc19a84 Mon Sep 17 00:00:00 2001 From: tilk Date: Thu, 2 Nov 2023 08:22:12 +0000 Subject: [PATCH] Script to generate signature from test ELFs (#466) --- .doctrees/Current_graph.doctree | Bin 24015 -> 24016 bytes .doctrees/api.doctree | Bin 34264 -> 34264 bytes .doctrees/auto_graph.doctree | Bin 23248 -> 23249 bytes .doctrees/coreblocks.utils.doctree | Bin 166086 -> 171714 bytes .doctrees/environment.pickle | Bin 316589 -> 316802 bytes Assumptions.html | 2 +- Current_graph.html | 70 ++++++++++----------- Development_environment.html | 2 +- Home.html | 2 +- Problem-checklist.html | 2 +- Transactions.html | 2 +- _sources/auto_graph.rst.txt | 68 ++++++++++---------- api.html | 2 +- auto_graph.html | 70 ++++++++++----------- components/icache.html | 2 +- coreblocks.frontend.html | 2 +- coreblocks.fu.html | 2 +- coreblocks.fu.unsigned_multiplication.html | 2 +- coreblocks.html | 2 +- coreblocks.params.html | 2 +- coreblocks.peripherals.html | 2 +- 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znD;ihuPQTO-YFDt2JN+h`0zeWdf{WpX%uhfL5dk>L0j~?d8yxVq037FlQvz_B1KtsUa~$xl0KCTm7dU|aqRxjLa!HVU z%mG&f;8PCxOaQKPz?TB>6$gAP0N-)I4GN&2V7A}nfFA|mCknt&?iT_1m6QBV0qmE7 z{@{Rn0&t%LY&{GL6;o(5E&|}n0Ui{%Bk@X&^`%azJAN zXu<*E0uaFg%>*Ed17ZXqmIGP}Ks*N|2|zNYN>TVW0@9X~bf5tC8$=yBpo;)><$&%2 z(1Qbd3P3Lo=qmvIIN$*aU_WP+&H)(|P|6^KIb^6H8O8x41Yjfwj23{0Ibf^+WO2ZF z0hqu6lLTNg2iOH*YL9xQwD_fDHn$kpngfz-A73Rsgngz%~JRp~rA$ zzS}8;{jSswPEsuZyE))x0ocm{2L!;u0j~9-R!vP<3 znT-#+G{py9`QU>tV(>w4ed2?z9q>V8VtgzZ%b)+{ubT7XH0~QyIdf*YEw6z6sMbTc Xi?E>5?gi=Zl4_-wList of assumptions made during development

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diff --git a/Current_graph.html b/Current_graph.html index 433a5d5ce..799a4d97a 100644 --- a/Current_graph.html +++ b/Current_graph.html @@ -93,20 +93,20 @@

Full transaction-method graph

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diff --git a/Development_environment.html b/Development_environment.html index 77a5ea2be..accd60330 100644 --- a/Development_environment.html +++ b/Development_environment.html @@ -178,7 +178,7 @@

build_docs.sh

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diff --git a/Home.html b/Home.html index 144b079e0..ad8e0fbb0 100644 --- a/Home.html +++ b/Home.html @@ -129,7 +129,7 @@

Documentation

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diff --git a/Problem-checklist.html b/Problem-checklist.html index fb9535d00..3b938dd0a 100644 --- a/Problem-checklist.html +++ b/Problem-checklist.html @@ -105,7 +105,7 @@

Problem checklist

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/Transactions.html b/Transactions.html index 2dbd883c9..4a227c148 100644 --- a/Transactions.html +++ b/Transactions.html @@ -409,7 +409,7 @@

Transaction and method nesting

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt index 5e59ac682..5fb22aab3 100644 --- a/_sources/auto_graph.rst.txt +++ b/_sources/auto_graph.rst.txt @@ -10,20 +10,20 @@ WishboneMaster_request["request"] end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_result["result"] WishboneMaster1_request["request"] + WishboneMaster1_result["result"] end subgraph FIFO["fifo_fetch FIFO"] - FIFO_read["read"] FIFO_write["write"] + FIFO_read["read"] end subgraph BasicFifo["free_rf_fifo BasicFifo"] BasicFifo_write["write"] BasicFifo_read["read"] end subgraph SimpleWBCacheRefiller["icache_refiller SimpleWBCacheRefiller"] - SimpleWBCacheRefiller_accept_refill["accept_refill"] SimpleWBCacheRefiller_SimpleWBCacheRefiller["SimpleWBCacheRefiller"] + SimpleWBCacheRefiller_accept_refill["accept_refill"] SimpleWBCacheRefiller_start_refill["start_refill"] end subgraph ICache["icache ICache"] @@ -42,12 +42,12 @@ end end subgraph Fetch["fetch Fetch"] + Fetch_verify_branch["verify_branch"] Fetch_Fetch["Fetch"] Fetch_Fetch1["Fetch"] - Fetch_verify_branch["verify_branch"] subgraph BasicFifo1["fetch_target_queue BasicFifo"] - BasicFifo1_write["write"] BasicFifo1_read["read"] + BasicFifo1_write["write"] end end subgraph FRAT["FRAT FRAT"] @@ -59,15 +59,15 @@ subgraph RegisterFile["RF RegisterFile"] RegisterFile_write["write"] RegisterFile_read1["read1"] - RegisterFile_free["free"] RegisterFile_read2["read2"] + RegisterFile_free["free"] end subgraph ReorderBuffer["ROB ReorderBuffer"] + ReorderBuffer_retire["retire"] ReorderBuffer_put["put"] - ReorderBuffer_get_indices["get_indices"] ReorderBuffer_mark_done["mark_done"] ReorderBuffer_peek["peek"] - ReorderBuffer_retire["retire"] + ReorderBuffer_get_indices["get_indices"] end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_report["report"] @@ -93,23 +93,23 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_select["select"] - RSFuncBlock_insert["insert"] RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] + RSFuncBlock_insert["insert"] + RSFuncBlock_select["select"] subgraph RS["rs RS"] + RS_select["select"] RS_RS["RS"] + RS_take["take"] + RS_insert["insert"] RS_update["update"] RS_RS1["RS"] - RS_select["select"] RS_RS2["RS"] - RS_insert["insert"] RS_RS3["RS"] - RS_take["take"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] - AluFuncUnit_issue["issue"] AluFuncUnit_accept["accept"] + AluFuncUnit_issue["issue"] subgraph FIFO2["fifo FIFO"] FIFO2_read["read"] FIFO2_write["write"] @@ -130,24 +130,24 @@ WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_branch_result["branch_result"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_branch_result["branch_result"] JumpBranchFuncUnit_issue["issue"] subgraph FIFO4["fifo_res FIFO"] - FIFO4_read["read"] FIFO4_write["write"] + FIFO4_read["read"] end subgraph FIFO5["fifo_branch FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect2["wakeup_select_2 WakeupSelect"] WakeupSelect2_WakeupSelect["WakeupSelect"] end subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"] - ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] + ExceptionFuncUnit_accept["accept"] subgraph FIFO6["fifo FIFO"] FIFO6_write["write"] FIFO6_read["read"] @@ -179,11 +179,11 @@ end end subgraph LSUDummy["rs_block_1 LSUDummy"] - LSUDummy_precommit["precommit"] - LSUDummy_update["update"] LSUDummy_insert["insert"] + LSUDummy_update["update"] LSUDummy_select["select"] LSUDummy_get_result["get_result"] + LSUDummy_precommit["precommit"] subgraph LSUDummyInternals["internal LSUDummyInternals"] LSUDummyInternals_LSUDummyInternals["LSUDummyInternals"] LSUDummyInternals_LSUDummyInternals1["LSUDummyInternals"] @@ -199,8 +199,8 @@ subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister["register_low CSRRegister"] - CSRRegister_write["write"] CSRRegister_read["read"] + CSRRegister_write["write"] end subgraph CSRRegister1["register_high CSRRegister"] CSRRegister1_read["read"] @@ -231,37 +231,37 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO8["alloc_rename_buf FIFO"] - FIFO8_write["write"] FIFO8_read["read"] + FIFO8_write["write"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO9["rename_out_buf FIFO"] - FIFO9_read["read"] FIFO9_write["write"] + FIFO9_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO10["reg_alloc_out_buf FIFO"] - FIFO10_write["write"] FIFO10_read["read"] + FIFO10_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO11["rs_select_out_buf FIFO"] - FIFO11_read["read"] FIFO11_write["write"] + FIFO11_read["read"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] RSSelection_RSSelection1["RSSelection"] RSSelection_RSSelection2["RSSelection"] subgraph Forwarder3["forwarder Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -277,12 +277,12 @@ subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] - CSRRegister5_write["write"] CSRRegister5_read["read"] + CSRRegister5_write["write"] end subgraph CSRRegister6["register_high CSRRegister"] - CSRRegister6_write["write"] CSRRegister6_read["read"] + CSRRegister6_write["write"] end end end @@ -303,9 +303,9 @@ Retirement_Retirement --> BasicFifo_write SimpleWBCacheRefiller_SimpleWBCacheRefiller --> WishboneMaster_request ICache_ICache2 --> Forwarder_write - ICache_ICache1 --> SimpleWBCacheRefiller_start_refill - SimpleWBCacheRefiller_accept_refill --> ICache_ICache - WishboneMaster_result --> ICache_ICache + ICache_ICache --> SimpleWBCacheRefiller_start_refill + SimpleWBCacheRefiller_accept_refill --> ICache_ICache1 + WishboneMaster_result --> ICache_ICache1 Fetch_Fetch --> ICache_issue_req Fetch_Fetch --> FIFO1_write Fetch_Fetch --> BasicFifo1_write @@ -360,10 +360,10 @@ RS_take --> WakeupSelect3_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO2_write - RS_RS1 --> WakeupSelect1_WakeupSelect + RS_RS2 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO3_write - RS_RS2 --> WakeupSelect2_WakeupSelect + RS_RS3 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect --> ExceptionCauseRegister_report WakeupSelect3_WakeupSelect --> ExceptionCauseRegister_report @@ -375,7 +375,7 @@ ReorderBuffer_get_indices --> LSUDummyInternals_LSUDummyInternals WakeupSelect2_WakeupSelect --> FIFO4_write WakeupSelect2_WakeupSelect --> FIFO5_write - RS_RS3 --> WakeupSelect3_WakeupSelect + RS_RS1 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO6_write ConnectTrans2_ConnectTrans --> Forwarder2_write diff --git a/api.html b/api.html index b3344cfa6..ce015243a 100644 --- a/api.html +++ b/api.html @@ -235,7 +235,7 @@

transactron

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/auto_graph.html b/auto_graph.html index 1812189c8..7b90a0a9e 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -89,20 +89,20 @@ WishboneMaster_request["request"] end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_result["result"] WishboneMaster1_request["request"] + WishboneMaster1_result["result"] end subgraph FIFO["fifo_fetch FIFO"] - FIFO_read["read"] FIFO_write["write"] + FIFO_read["read"] end subgraph BasicFifo["free_rf_fifo BasicFifo"] BasicFifo_write["write"] BasicFifo_read["read"] end subgraph SimpleWBCacheRefiller["icache_refiller SimpleWBCacheRefiller"] - SimpleWBCacheRefiller_accept_refill["accept_refill"] SimpleWBCacheRefiller_SimpleWBCacheRefiller["SimpleWBCacheRefiller"] + SimpleWBCacheRefiller_accept_refill["accept_refill"] SimpleWBCacheRefiller_start_refill["start_refill"] end subgraph ICache["icache ICache"] @@ -121,12 +121,12 @@ end end subgraph Fetch["fetch Fetch"] + Fetch_verify_branch["verify_branch"] Fetch_Fetch["Fetch"] Fetch_Fetch1["Fetch"] - Fetch_verify_branch["verify_branch"] subgraph BasicFifo1["fetch_target_queue BasicFifo"] - BasicFifo1_write["write"] BasicFifo1_read["read"] + BasicFifo1_write["write"] end end subgraph FRAT["FRAT FRAT"] @@ -138,15 +138,15 @@ subgraph RegisterFile["RF RegisterFile"] RegisterFile_write["write"] RegisterFile_read1["read1"] - RegisterFile_free["free"] RegisterFile_read2["read2"] + RegisterFile_free["free"] end subgraph ReorderBuffer["ROB ReorderBuffer"] + ReorderBuffer_retire["retire"] ReorderBuffer_put["put"] - ReorderBuffer_get_indices["get_indices"] ReorderBuffer_mark_done["mark_done"] ReorderBuffer_peek["peek"] - ReorderBuffer_retire["retire"] + ReorderBuffer_get_indices["get_indices"] end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_report["report"] @@ -172,23 +172,23 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_select["select"] - RSFuncBlock_insert["insert"] RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] + RSFuncBlock_insert["insert"] + RSFuncBlock_select["select"] subgraph RS["rs RS"] + RS_select["select"] RS_RS["RS"] + RS_take["take"] + RS_insert["insert"] RS_update["update"] RS_RS1["RS"] - RS_select["select"] RS_RS2["RS"] - RS_insert["insert"] RS_RS3["RS"] - RS_take["take"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] - AluFuncUnit_issue["issue"] AluFuncUnit_accept["accept"] + AluFuncUnit_issue["issue"] subgraph FIFO2["fifo FIFO"] FIFO2_read["read"] FIFO2_write["write"] @@ -209,24 +209,24 @@ WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_branch_result["branch_result"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_branch_result["branch_result"] JumpBranchFuncUnit_issue["issue"] subgraph FIFO4["fifo_res FIFO"] - FIFO4_read["read"] FIFO4_write["write"] + FIFO4_read["read"] end subgraph FIFO5["fifo_branch FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect2["wakeup_select_2 WakeupSelect"] WakeupSelect2_WakeupSelect["WakeupSelect"] end subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"] - ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] + ExceptionFuncUnit_accept["accept"] subgraph FIFO6["fifo FIFO"] FIFO6_write["write"] FIFO6_read["read"] @@ -258,11 +258,11 @@ end end subgraph LSUDummy["rs_block_1 LSUDummy"] - LSUDummy_precommit["precommit"] - LSUDummy_update["update"] LSUDummy_insert["insert"] + LSUDummy_update["update"] LSUDummy_select["select"] LSUDummy_get_result["get_result"] + LSUDummy_precommit["precommit"] subgraph LSUDummyInternals["internal LSUDummyInternals"] LSUDummyInternals_LSUDummyInternals["LSUDummyInternals"] LSUDummyInternals_LSUDummyInternals1["LSUDummyInternals"] @@ -278,8 +278,8 @@ subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister["register_low CSRRegister"] - CSRRegister_write["write"] CSRRegister_read["read"] + CSRRegister_write["write"] end subgraph CSRRegister1["register_high CSRRegister"] CSRRegister1_read["read"] @@ -310,37 +310,37 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO8["alloc_rename_buf FIFO"] - FIFO8_write["write"] FIFO8_read["read"] + FIFO8_write["write"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO9["rename_out_buf FIFO"] - FIFO9_read["read"] FIFO9_write["write"] + FIFO9_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO10["reg_alloc_out_buf FIFO"] - FIFO10_write["write"] FIFO10_read["read"] + FIFO10_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO11["rs_select_out_buf FIFO"] - FIFO11_read["read"] FIFO11_write["write"] + FIFO11_read["read"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] RSSelection_RSSelection1["RSSelection"] RSSelection_RSSelection2["RSSelection"] subgraph Forwarder3["forwarder Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -356,12 +356,12 @@ subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] - CSRRegister5_write["write"] CSRRegister5_read["read"] + CSRRegister5_write["write"] end subgraph CSRRegister6["register_high CSRRegister"] - CSRRegister6_write["write"] CSRRegister6_read["read"] + CSRRegister6_write["write"] end end end @@ -382,9 +382,9 @@ Retirement_Retirement --> BasicFifo_write SimpleWBCacheRefiller_SimpleWBCacheRefiller --> WishboneMaster_request ICache_ICache2 --> Forwarder_write -ICache_ICache1 --> SimpleWBCacheRefiller_start_refill -SimpleWBCacheRefiller_accept_refill --> ICache_ICache -WishboneMaster_result --> ICache_ICache +ICache_ICache --> SimpleWBCacheRefiller_start_refill +SimpleWBCacheRefiller_accept_refill --> ICache_ICache1 +WishboneMaster_result --> ICache_ICache1 Fetch_Fetch --> ICache_issue_req Fetch_Fetch --> FIFO1_write Fetch_Fetch --> BasicFifo1_write @@ -439,10 +439,10 @@ RS_take --> WakeupSelect3_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO2_write -RS_RS1 --> WakeupSelect1_WakeupSelect +RS_RS2 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO3_write -RS_RS2 --> WakeupSelect2_WakeupSelect +RS_RS3 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect --> ExceptionCauseRegister_report WakeupSelect3_WakeupSelect --> ExceptionCauseRegister_report @@ -454,7 +454,7 @@ ReorderBuffer_get_indices --> LSUDummyInternals_LSUDummyInternals WakeupSelect2_WakeupSelect --> FIFO4_write WakeupSelect2_WakeupSelect --> FIFO5_write -RS_RS3 --> WakeupSelect3_WakeupSelect +RS_RS1 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO6_write ConnectTrans2_ConnectTrans --> Forwarder2_write @@ -509,7 +509,7 @@

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/components/icache.html b/components/icache.html index aab6da125..53965da31 100644 --- a/components/icache.html +++ b/components/icache.html @@ -131,7 +131,7 @@

Address mapping example

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diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html index c77f3c870..964c8f985 100644 --- a/coreblocks.frontend.html +++ b/coreblocks.frontend.html @@ -399,7 +399,7 @@

Submodules

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diff --git a/coreblocks.fu.html b/coreblocks.fu.html index c8354697e..cd7caea72 100644 --- a/coreblocks.fu.html +++ b/coreblocks.fu.html @@ -817,7 +817,7 @@

Submodules

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diff --git a/coreblocks.fu.unsigned_multiplication.html b/coreblocks.fu.unsigned_multiplication.html index 1bb64619c..0b679e87c 100644 --- a/coreblocks.fu.unsigned_multiplication.html +++ b/coreblocks.fu.unsigned_multiplication.html @@ -237,7 +237,7 @@

Submodules

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diff --git a/coreblocks.html b/coreblocks.html index e5cb6f56b..6e694a1ba 100644 --- a/coreblocks.html +++ b/coreblocks.html @@ -218,7 +218,7 @@

Submodules

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diff --git a/coreblocks.params.html b/coreblocks.params.html index f608f9983..ad550cc4f 100644 --- a/coreblocks.params.html +++ b/coreblocks.params.html @@ -2404,7 +2404,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html index 177202bf3..dd4d9e560 100644 --- a/coreblocks.peripherals.html +++ b/coreblocks.peripherals.html @@ -348,7 +348,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html index 39ccbdbe6..184e35b19 100644 --- a/coreblocks.scheduler.html +++ b/coreblocks.scheduler.html @@ -191,7 +191,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/coreblocks.stages.html b/coreblocks.stages.html index 05eeee516..2d421a583 100644 --- a/coreblocks.stages.html +++ b/coreblocks.stages.html @@ -266,7 +266,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/coreblocks.structs_common.html b/coreblocks.structs_common.html index de66b71ef..d49840e7d 100644 --- a/coreblocks.structs_common.html +++ b/coreblocks.structs_common.html @@ -454,7 +454,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2023. - Last updated on 23:11 2023-10-29. + Last updated on 08:22 2023-11-02.

diff --git a/coreblocks.utils.html b/coreblocks.utils.html index 513da5625..53afbfee3 100644 --- a/coreblocks.utils.html +++ b/coreblocks.utils.html @@ -326,6 +326,28 @@

Submodules +
+coreblocks.utils.utils.align_down_to_power_of_two(num: int, power: int) int
+

Rounds down a number to the given power of two.

+
+
Parameters
+
+
numint

The number to align.

+
+
powerint

The power of two to align to.

+
+
+
+
Returns
+
+
int

The aligned number.

+
+
+
+
+
+
coreblocks.utils.utils.align_to_power_of_two(num: int, power: int) int
@@ -456,7 +478,7 @@

Submodules

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diff --git a/genindex.html b/genindex.html index f705bb220..2875524f3 100644 --- a/genindex.html +++ b/genindex.html @@ -462,6 +462,8 @@

A