diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree index bc17e2318..c50b2102f 100644 Binary files a/.doctrees/api.doctree and b/.doctrees/api.doctree differ diff --git a/.doctrees/auto_graph.doctree b/.doctrees/auto_graph.doctree index 391a370ae..c55c78172 100644 Binary files a/.doctrees/auto_graph.doctree and b/.doctrees/auto_graph.doctree differ diff --git a/.doctrees/current-graph.doctree b/.doctrees/current-graph.doctree index 72aecad3d..cfae7ca2a 100644 Binary files a/.doctrees/current-graph.doctree and b/.doctrees/current-graph.doctree differ diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle index f7b1bda12..9699a3c85 100644 Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt index d9ed6efdf..040651a96 100644 --- a/_sources/auto_graph.rst.txt +++ b/_sources/auto_graph.rst.txt @@ -6,29 +6,29 @@ subgraph Core["core Core"] Core_InitFreeRFFifo["InitFreeRFFifo"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] - WishboneMaster_request["request"] WishboneMaster_WishboneMaster["WishboneMaster"] WishboneMaster_result["result"] + WishboneMaster_request["request"] subgraph Forwarder["result Forwarder"] Forwarder_read["read"] Forwarder_write["write"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] WishboneMaster1_request["request"] + WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] - Forwarder1_write["write"] Forwarder1_read["read"] + Forwarder1_write["write"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] WishboneMasterAdapter_get_read_response["get_read_response"] WishboneMasterAdapter_request_read["request_read"] subgraph Serializer["bus_serializer Serializer"] - Serializer_serialize_out0["serialize_out0"] Serializer_serialize_in0["serialize_in0"] + Serializer_serialize_out0["serialize_out0"] subgraph BasicFifo["pending_requests BasicFifo"] BasicFifo_read["read"] BasicFifo_write["write"] @@ -36,15 +36,15 @@ end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] - WishboneMasterAdapter1_get_read_response["get_read_response"] WishboneMasterAdapter1_get_write_response["get_write_response"] - WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_request_read["request_read"] + WishboneMasterAdapter1_get_read_response["get_read_response"] + WishboneMasterAdapter1_request_write["request_write"] subgraph Serializer1["bus_serializer Serializer"] - Serializer1_serialize_out0["serialize_out0"] - Serializer1_serialize_in1["serialize_in1"] Serializer1_serialize_out1["serialize_out1"] + Serializer1_serialize_out0["serialize_out0"] Serializer1_serialize_in0["serialize_in0"] + Serializer1_serialize_in1["serialize_in1"] subgraph BasicFifo1["pending_requests BasicFifo"] BasicFifo1_write["write"] BasicFifo1_read["read"] @@ -52,14 +52,14 @@ end end subgraph CoreFrontend["frontend CoreFrontend"] - CoreFrontend_target_pred_resp["target_pred_resp"] CoreFrontend_DiscardBranchVerify["DiscardBranchVerify"] CoreFrontend_target_pred_req["target_pred_req"] + CoreFrontend_target_pred_resp["target_pred_resp"] CoreFrontend_stall["stall"] subgraph BasicFifo2["instr_buffer BasicFifo"] + BasicFifo2_clear["clear"] BasicFifo2_read["read"] BasicFifo2_write["write"] - BasicFifo2_clear["clear"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] @@ -67,17 +67,17 @@ SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] SimpleCommonBusCacheRefiller_start_refill["start_refill"] subgraph Forwarder2["resp_fwd Forwarder"] - Forwarder2_write["write"] Forwarder2_read["read"] + Forwarder2_write["write"] end end subgraph ICache["icache ICache"] - ICache_ICache["ICache"] - ICache_issue_req["issue_req"] - ICache_accept_res["accept_res"] ICache_MemRead["MemRead"] - ICache_ICache1["ICache"] + ICache_issue_req["issue_req"] ICache_flush["flush"] + ICache_ICache["ICache"] + ICache_ICache1["ICache"] + ICache_accept_res["accept_res"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] end @@ -94,8 +94,8 @@ HwCounter4__incr["_incr"] end subgraph FIFOLatencyMeasurer["req_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer__start["_start"] FIFOLatencyMeasurer__stop["_stop"] + FIFOLatencyMeasurer__start["_start"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -106,29 +106,29 @@ end subgraph ArgumentsToResultsZipper["req_zipper ArgumentsToResultsZipper"] ArgumentsToResultsZipper_write_args["write_args"] - ArgumentsToResultsZipper_read["read"] ArgumentsToResultsZipper_write_results["write_results"] ArgumentsToResultsZipper_peek_arg["peek_arg"] + ArgumentsToResultsZipper_read["read"] subgraph BasicFifo3["fifo BasicFifo"] BasicFifo3_peek["peek"] BasicFifo3_write["write"] BasicFifo3_read["read"] end subgraph Forwarder3["forwarder Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end end subgraph FetchUnit["fetch FetchUnit"] FetchUnit_Fetch_Stage0["Fetch_Stage0"] - FetchUnit_Fetch_Stage2["Fetch_Stage2"] + FetchUnit_resume_from_exception["resume_from_exception"] + FetchUnit_Fetch_Stage1["Fetch_Stage1"] FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] - FetchUnit_resume_from_unsafe["resume_from_unsafe"] FetchUnit_stall_exception["stall_exception"] FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] - FetchUnit_resume_from_exception["resume_from_exception"] - FetchUnit_Fetch_Stage1["Fetch_Stage1"] + FetchUnit_resume_from_unsafe["resume_from_unsafe"] + FetchUnit_Fetch_Stage2["Fetch_Stage2"] subgraph TaggedCounter["perf_fetch_utilization TaggedCounter"] TaggedCounter__incr["_incr"] end @@ -136,9 +136,9 @@ HwCounter5__incr["_incr"] end subgraph Serializer["serializer Serializer"] + Serializer_read["read"] Serializer_clean["clean"] Serializer_write["write"] - Serializer_read["read"] end subgraph ConnectTrans["serializer_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -152,8 +152,8 @@ Semaphore_acquire["acquire"] end subgraph Pipe["s1_s2_pipe Pipe"] - Pipe_read["read"] Pipe_write["write"] + Pipe_read["read"] end subgraph Predecoder["predecoder_0 Predecoder"] Predecoder_predecode["predecode"] @@ -172,9 +172,9 @@ end end subgraph Pipe1["decode_pipe Pipe"] + Pipe1_clean["clean"] Pipe1_read["read"] Pipe1_write["write"] - Pipe1_clean["clean"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] @@ -196,19 +196,19 @@ end subgraph RegisterFile["RF RegisterFile"] RegisterFile_perf["perf"] + RegisterFile_read2["read2"] RegisterFile_write["write"] RegisterFile_free["free"] RegisterFile_read1["read1"] - RegisterFile_read2["read2"] subgraph TaggedLatencyMeasurer["perf_rf_valid_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer__stop["_stop"] TaggedLatencyMeasurer__start["_start"] + TaggedLatencyMeasurer__stop["_stop"] subgraph HwExpHistogram1["histogram HwExpHistogram"] HwExpHistogram1__add["_add"] end subgraph AsyncMemoryBank["slots AsyncMemoryBank"] - AsyncMemoryBank_read0["read0"] AsyncMemoryBank_write0["write0"] + AsyncMemoryBank_read0["read0"] end end subgraph HwExpHistogram2["perf_num_valid HwExpHistogram"] @@ -216,21 +216,21 @@ end end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_perf["perf"] - ReorderBuffer_peek["peek"] - ReorderBuffer_get_indices["get_indices"] ReorderBuffer_mark_done["mark_done"] - ReorderBuffer_put["put"] + ReorderBuffer_get_indices["get_indices"] ReorderBuffer_retire["retire"] + ReorderBuffer_peek["peek"] + ReorderBuffer_perf["perf"] + ReorderBuffer_put["put"] subgraph FIFOLatencyMeasurer1["perf_rob_wait_time FIFOLatencyMeasurer"] - FIFOLatencyMeasurer1__stop["_stop"] FIFOLatencyMeasurer1__start["_start"] + FIFOLatencyMeasurer1__stop["_stop"] subgraph HwExpHistogram3["histogram HwExpHistogram"] HwExpHistogram3__add["_add"] end subgraph FIFO1["fifo FIFO"] - FIFO1_read["read"] FIFO1_write["write"] + FIFO1_read["read"] end end subgraph HwExpHistogram4["perf_rob_size HwExpHistogram"] @@ -239,8 +239,8 @@ end subgraph ExceptionInformationRegister["exception_information_register ExceptionInformationRegister"] ExceptionInformationRegister_report["report"] - ExceptionInformationRegister_clear["clear"] ExceptionInformationRegister_get["get"] + ExceptionInformationRegister_clear["clear"] subgraph BasicFifo6["fu_report_fifo BasicFifo"] BasicFifo6_read["read"] BasicFifo6_write["write"] @@ -275,24 +275,24 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_select["select"] - RSFuncBlock_update["update"] RSFuncBlock_insert["insert"] + RSFuncBlock_select["select"] RSFuncBlock_get_result["get_result"] + RSFuncBlock_update["update"] subgraph RS["rs RS"] + RS_perf["perf"] RS_RS["RS"] - RS_update["update"] - RS_take["take"] RS_RS1["RS"] RS_RS2["RS"] RS_RS3["RS"] - RS_insert["insert"] - RS_RS4["RS"] - RS_perf["perf"] RS_select["select"] + RS_RS4["RS"] + RS_insert["insert"] + RS_take["take"] + RS_update["update"] subgraph TaggedLatencyMeasurer1["perf_rs_wait_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer1__stop["_stop"] TaggedLatencyMeasurer1__start["_start"] + TaggedLatencyMeasurer1__stop["_stop"] subgraph HwExpHistogram5["histogram HwExpHistogram"] HwExpHistogram5__add["_add"] end @@ -320,11 +320,11 @@ WakeupSelect_WakeupSelect["WakeupSelect"] end subgraph ShiftFuncUnit["func_unit_1 ShiftFuncUnit"] - ShiftFuncUnit_issue["issue"] ShiftFuncUnit_accept["accept"] + ShiftFuncUnit_issue["issue"] subgraph FIFO3["fifo FIFO"] - FIFO3_read["read"] FIFO3_write["write"] + FIFO3_read["read"] end end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] @@ -358,24 +358,24 @@ ExceptionFuncUnit_issue["issue"] ExceptionFuncUnit_accept["accept"] subgraph FIFO5["fifo FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] - PrivilegedFuncUnit_issue["issue"] - PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] + PrivilegedFuncUnit_issue["issue"] + PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] PrivilegedFuncUnit_accept["accept"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] subgraph BasicFifo8["fetch_resume_fifo BasicFifo"] - BasicFifo8_read["read"] BasicFifo8_write["write"] + BasicFifo8_read["read"] end subgraph TaggedCounter6["perf_instr TaggedCounter"] TaggedCounter6__incr["_incr"] @@ -387,8 +387,8 @@ subgraph Collector1["collector Collector"] Collector1_method["method"] subgraph Forwarder5["forwarder Forwarder"] - Forwarder5_read["read"] Forwarder5_write["write"] + Forwarder5_read["read"] end subgraph ManyToOneConnectTrans1["connect ManyToOneConnectTrans"] subgraph ConnectTrans6["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -410,18 +410,18 @@ end end subgraph RSFuncBlock1["rs_block_1 RSFuncBlock"] - RSFuncBlock1_get_result["get_result"] RSFuncBlock1_insert["insert"] + RSFuncBlock1_get_result["get_result"] RSFuncBlock1_select["select"] RSFuncBlock1_update["update"] subgraph RS1["rs RS"] - RS1_update["update"] RS1_RS["RS"] RS1_perf["perf"] - RS1_insert["insert"] + RS1_RS1["RS"] RS1_take["take"] + RS1_insert["insert"] RS1_select["select"] - RS1_RS1["RS"] + RS1_update["update"] subgraph TaggedLatencyMeasurer2["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer2__stop["_stop"] TaggedLatencyMeasurer2__start["_start"] @@ -429,8 +429,8 @@ HwExpHistogram7__add["_add"] end subgraph AsyncMemoryBank2["slots AsyncMemoryBank"] - AsyncMemoryBank2_write0["write0"] AsyncMemoryBank2_read0["read0"] + AsyncMemoryBank2_write0["write0"] end end subgraph HwExpHistogram8["perf_num_full HwExpHistogram"] @@ -438,12 +438,12 @@ end end subgraph MulUnit["func_unit_0 MulUnit"] - MulUnit_issue["issue"] - MulUnit_accept["accept"] MulUnit_MulUnit["MulUnit"] + MulUnit_accept["accept"] + MulUnit_issue["issue"] subgraph FIFO6["result_fifo FIFO"] - FIFO6_read["read"] FIFO6_write["write"] + FIFO6_read["read"] end subgraph FIFO7["params_fifo FIFO"] FIFO7_read["read"] @@ -468,8 +468,8 @@ DivUnit_issue["issue"] DivUnit_accept["accept"] subgraph BasicFifo9["result_fifo BasicFifo"] - BasicFifo9_read["read"] BasicFifo9_write["write"] + BasicFifo9_read["read"] end subgraph FIFO8["params_fifo FIFO"] FIFO8_write["write"] @@ -500,17 +500,17 @@ end end subgraph RSFuncBlock2["rs_block_2 RSFuncBlock"] - RSFuncBlock2_select["select"] RSFuncBlock2_get_result["get_result"] RSFuncBlock2_insert["insert"] + RSFuncBlock2_select["select"] RSFuncBlock2_update["update"] subgraph FifoRS["rs FifoRS"] + FifoRS_perf["perf"] FifoRS_insert["insert"] + FifoRS_take["take"] + FifoRS_update["update"] FifoRS_FifoRS["FifoRS"] FifoRS_select["select"] - FifoRS_update["update"] - FifoRS_take["take"] - FifoRS_perf["perf"] subgraph TaggedLatencyMeasurer3["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer3__start["_start"] TaggedLatencyMeasurer3__stop["_stop"] @@ -518,8 +518,8 @@ HwExpHistogram9__add["_add"] end subgraph AsyncMemoryBank3["slots AsyncMemoryBank"] - AsyncMemoryBank3_write0["write0"] AsyncMemoryBank3_read0["read0"] + AsyncMemoryBank3_write0["write0"] end end subgraph HwExpHistogram10["perf_num_full HwExpHistogram"] @@ -527,21 +527,21 @@ end end subgraph LSUDummy["func_unit_0 LSUDummy"] + LSUDummy_accept["accept"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_LSUDummy1["LSUDummy"] - LSUDummy_accept["accept"] LSUDummy_issue["issue"] - LSUDummy_accept_cond1["accept_cond1"] - LSUDummy_accept_cond0["accept_cond0"] LSUDummy_LSUDummy2["LSUDummy"] + LSUDummy_accept_cond0["accept_cond0"] + LSUDummy_accept_cond1["accept_cond1"] LSUDummy_LSUDummy3["LSUDummy"] subgraph LSURequester["requester LSURequester"] LSURequester_issue_cond2["issue_cond2"] - LSURequester_issue["issue"] - LSURequester_issue_cond0["issue_cond0"] - LSURequester_accept["accept"] LSURequester_issue_cond1["issue_cond1"] LSURequester_accept_cond0["accept_cond0"] + LSURequester_issue_cond0["issue_cond0"] + LSURequester_accept["accept"] + LSURequester_issue["issue"] LSURequester_accept_cond1["accept_cond1"] subgraph BasicFifo10["args_fifo BasicFifo"] BasicFifo10_read["read"] @@ -553,8 +553,8 @@ Forwarder7_write["write"] end subgraph FIFO9["results_noop FIFO"] - FIFO9_read["read"] FIFO9_write["write"] + FIFO9_read["read"] end subgraph FIFO10["issued FIFO"] FIFO10_write["write"] @@ -571,8 +571,8 @@ subgraph Collector3["collector Collector"] Collector3_method["method"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end subgraph ManyToOneConnectTrans3["connect ManyToOneConnectTrans"] subgraph ConnectTrans13["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -582,12 +582,12 @@ end end subgraph CSRUnit["rs_block_3 CSRUnit"] - CSRUnit_get_result["get_result"] - CSRUnit_select["select"] - CSRUnit_CSRUnit["CSRUnit"] CSRUnit_update["update"] - CSRUnit_insert["insert"] CSRUnit_fetch_resume["fetch_resume"] + CSRUnit_CSRUnit["CSRUnit"] + CSRUnit_get_result["get_result"] + CSRUnit_insert["insert"] + CSRUnit_select["select"] end end subgraph ResultAnnouncement["announcement ResultAnnouncement"] @@ -621,8 +621,8 @@ end end subgraph CSRRegister4["mscratch CSRRegister"] - CSRRegister4__internal_fu_write["_internal_fu_write"] CSRRegister4__internal_fu_read["_internal_fu_read"] + CSRRegister4__internal_fu_write["_internal_fu_write"] subgraph MethodMap8["fu_write_map MethodMap"] MethodMap8_method["method"] end @@ -640,8 +640,8 @@ end end subgraph AliasedCSR["mstatus AliasedCSR"] - AliasedCSR__fu_write["_fu_write"] AliasedCSR__fu_read["_fu_read"] + AliasedCSR__fu_write["_fu_write"] end subgraph AliasedCSR1["mstatush AliasedCSR"] AliasedCSR1__fu_read["_fu_read"] @@ -649,8 +649,9 @@ end subgraph CSRRegister6["mcause CSRRegister"] CSRRegister6__internal_fu_write["_internal_fu_write"] - CSRRegister6__internal_fu_read["_internal_fu_read"] CSRRegister6_write["write"] + CSRRegister6__internal_fu_read["_internal_fu_read"] + CSRRegister6_read["read"] subgraph MethodMap12["fu_write_map MethodMap"] MethodMap12_method["method"] end @@ -661,10 +662,15 @@ MethodMap13_method["method"] end end - subgraph CSRRegister7["mtvec CSRRegister"] + subgraph AliasedCSR2["mtvec AliasedCSR"] + AliasedCSR2__fu_read["_fu_read"] + AliasedCSR2__fu_write["_fu_write"] + end + subgraph CSRRegister7["mepc CSRRegister"] CSRRegister7_read["read"] - CSRRegister7__internal_fu_write["_internal_fu_write"] CSRRegister7__internal_fu_read["_internal_fu_read"] + CSRRegister7__internal_fu_write["_internal_fu_write"] + CSRRegister7_write["write"] subgraph MethodMap14["fu_write_map MethodMap"] MethodMap14_method["method"] end @@ -675,10 +681,9 @@ MethodMap15_method["method"] end end - subgraph CSRRegister8["mepc CSRRegister"] + subgraph CSRRegister8["mtval CSRRegister"] CSRRegister8__internal_fu_write["_internal_fu_write"] CSRRegister8_write["write"] - CSRRegister8_read["read"] CSRRegister8__internal_fu_read["_internal_fu_read"] subgraph MethodMap16["fu_write_map MethodMap"] MethodMap16_method["method"] @@ -690,8 +695,7 @@ MethodMap17_method["method"] end end - subgraph CSRRegister9["mtval CSRRegister"] - CSRRegister9_write["write"] + subgraph CSRRegister9["misa CSRRegister"] CSRRegister9__internal_fu_write["_internal_fu_write"] CSRRegister9__internal_fu_read["_internal_fu_read"] subgraph MethodMap18["fu_write_map MethodMap"] @@ -704,28 +708,30 @@ MethodMap19_method["method"] end end - subgraph CSRRegister10["misa CSRRegister"] - CSRRegister10__internal_fu_read["_internal_fu_read"] - CSRRegister10__internal_fu_write["_internal_fu_write"] - subgraph MethodMap20["fu_write_map MethodMap"] - MethodMap20_method["method"] - end - subgraph MethodFilter10["fu_write_filter MethodFilter"] - MethodFilter10_method["method"] - end - subgraph MethodMap21["fu_read_map MethodMap"] - MethodMap21_method["method"] - end + subgraph CSRRegister10["priv_mode CSRRegister"] + CSRRegister10_read["read"] + CSRRegister10_write["write"] end - subgraph CSRRegister11["priv_mode CSRRegister"] + subgraph CSRRegister11["mstatus_mie CSRRegister"] CSRRegister11_write["write"] + CSRRegister11__internal_fu_read["_internal_fu_read"] CSRRegister11_read["read"] + CSRRegister11__internal_fu_write["_internal_fu_write"] + subgraph MethodMap22["fu_write_map MethodMap"] + MethodMap22_method["method"] + end + subgraph MethodFilter11["fu_write_filter MethodFilter"] + MethodFilter11_method["method"] + end + subgraph MethodMap23["fu_read_map MethodMap"] + MethodMap23_method["method"] + end end - subgraph CSRRegister12["mstatus_mie CSRRegister"] - CSRRegister12_write["write"] + subgraph CSRRegister12["mstatus_mpie CSRRegister"] CSRRegister12_read["read"] - CSRRegister12__internal_fu_write["_internal_fu_write"] + CSRRegister12_write["write"] CSRRegister12__internal_fu_read["_internal_fu_read"] + CSRRegister12__internal_fu_write["_internal_fu_write"] subgraph MethodMap24["fu_write_map MethodMap"] MethodMap24_method["method"] end @@ -736,11 +742,11 @@ MethodMap25_method["method"] end end - subgraph CSRRegister13["mstatus_mpie CSRRegister"] - CSRRegister13_write["write"] - CSRRegister13__internal_fu_write["_internal_fu_write"] - CSRRegister13_read["read"] + subgraph CSRRegister13["mstatus_mpp CSRRegister"] CSRRegister13__internal_fu_read["_internal_fu_read"] + CSRRegister13_read["read"] + CSRRegister13__internal_fu_write["_internal_fu_write"] + CSRRegister13_write["write"] subgraph MethodMap26["fu_write_map MethodMap"] MethodMap26_method["method"] end @@ -751,10 +757,9 @@ MethodMap27_method["method"] end end - subgraph CSRRegister14["mstatus_mpp CSRRegister"] - CSRRegister14_write["write"] + subgraph CSRRegister14["mstatus_mprv CSRRegister"] CSRRegister14__internal_fu_read["_internal_fu_read"] - CSRRegister14_read["read"] + CSRRegister14_write["write"] CSRRegister14__internal_fu_write["_internal_fu_write"] subgraph MethodMap28["fu_write_map MethodMap"] MethodMap28_method["method"] @@ -766,10 +771,10 @@ MethodMap29_method["method"] end end - subgraph CSRRegister15["mstatus_mprv CSRRegister"] - CSRRegister15_write["write"] + subgraph CSRRegister15["mstatus_tw CSRRegister"] CSRRegister15__internal_fu_write["_internal_fu_write"] CSRRegister15__internal_fu_read["_internal_fu_read"] + CSRRegister15_read["read"] subgraph MethodMap30["fu_write_map MethodMap"] MethodMap30_method["method"] end @@ -780,7 +785,7 @@ MethodMap31_method["method"] end end - subgraph CSRRegister16["mstatus_tw CSRRegister"] + subgraph CSRRegister16["mtvec_base CSRRegister"] CSRRegister16__internal_fu_write["_internal_fu_write"] CSRRegister16__internal_fu_read["_internal_fu_read"] CSRRegister16_read["read"] @@ -794,37 +799,43 @@ MethodMap33_method["method"] end end - end - subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] - DoubleCounterCSR_increment["increment"] - subgraph CSRRegister17["register_low CSRRegister"] - CSRRegister17_read["read"] + subgraph CSRRegister17["mtvec_mode CSRRegister"] CSRRegister17__internal_fu_read["_internal_fu_read"] - CSRRegister17_write["write"] + CSRRegister17__internal_fu_write["_internal_fu_write"] + CSRRegister17_read["read"] + subgraph MethodMap34["fu_write_map MethodMap"] + MethodMap34_method["method"] + end + subgraph MethodFilter17["fu_write_filter MethodFilter"] + MethodFilter17_method["method"] + end subgraph MethodMap35["fu_read_map MethodMap"] MethodMap35_method["method"] end end - subgraph CSRRegister18["register_high CSRRegister"] - CSRRegister18_read["read"] + end + subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] + DoubleCounterCSR_increment["increment"] + subgraph CSRRegister18["register_low CSRRegister"] CSRRegister18_write["write"] + CSRRegister18_read["read"] CSRRegister18__internal_fu_read["_internal_fu_read"] subgraph MethodMap37["fu_read_map MethodMap"] MethodMap37_method["method"] end end - end - subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] - DoubleCounterCSR1_increment["increment"] - subgraph CSRRegister19["register_low CSRRegister"] - CSRRegister19__internal_fu_read["_internal_fu_read"] - CSRRegister19_write["write"] + subgraph CSRRegister19["register_high CSRRegister"] CSRRegister19_read["read"] + CSRRegister19_write["write"] + CSRRegister19__internal_fu_read["_internal_fu_read"] subgraph MethodMap39["fu_read_map MethodMap"] MethodMap39_method["method"] end end - subgraph CSRRegister20["register_high CSRRegister"] + end + subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] + DoubleCounterCSR1_increment["increment"] + subgraph CSRRegister20["register_low CSRRegister"] CSRRegister20_read["read"] CSRRegister20__internal_fu_read["_internal_fu_read"] CSRRegister20_write["write"] @@ -832,33 +843,25 @@ MethodMap41_method["method"] end end + subgraph CSRRegister21["register_high CSRRegister"] + CSRRegister21_write["write"] + CSRRegister21_read["read"] + CSRRegister21__internal_fu_read["_internal_fu_read"] + subgraph MethodMap43["fu_read_map MethodMap"] + MethodMap43_method["method"] + end + end end end subgraph InternalInterruptController["interrupt_controller InternalInterruptController"] - InternalInterruptController_entry["entry"] - InternalInterruptController_mret["mret"] InternalInterruptController_InternalInterruptController["InternalInterruptController"] - InternalInterruptController_interrupt_cause["interrupt_cause"] + InternalInterruptController_mret["mret"] InternalInterruptController_InternalInterruptController1["InternalInterruptController"] InternalInterruptController_InternalInterruptController2["InternalInterruptController"] - subgraph CSRRegister21["mie CSRRegister"] - CSRRegister21__internal_fu_read["_internal_fu_read"] - CSRRegister21__internal_fu_write["_internal_fu_write"] - CSRRegister21_read["read"] - subgraph MethodMap42["fu_write_map MethodMap"] - MethodMap42_method["method"] - end - subgraph MethodFilter21["fu_write_filter MethodFilter"] - MethodFilter21_method["method"] - end - subgraph MethodMap43["fu_read_map MethodMap"] - MethodMap43_method["method"] - end - end - subgraph CSRRegister22["mip CSRRegister"] - CSRRegister22_read_comb["read_comb"] + InternalInterruptController_entry["entry"] + InternalInterruptController_interrupt_cause["interrupt_cause"] + subgraph CSRRegister22["mie CSRRegister"] CSRRegister22__internal_fu_read["_internal_fu_read"] - CSRRegister22_write["write"] CSRRegister22_read["read"] CSRRegister22__internal_fu_write["_internal_fu_write"] subgraph MethodMap44["fu_write_map MethodMap"] @@ -871,6 +874,22 @@ MethodMap45_method["method"] end end + subgraph CSRRegister23["mip CSRRegister"] + CSRRegister23_read["read"] + CSRRegister23__internal_fu_write["_internal_fu_write"] + CSRRegister23__internal_fu_read["_internal_fu_read"] + CSRRegister23_read_comb["read_comb"] + CSRRegister23_write["write"] + subgraph MethodMap46["fu_write_map MethodMap"] + MethodMap46_method["method"] + end + subgraph MethodFilter23["fu_write_filter MethodFilter"] + MethodFilter23_method["method"] + end + subgraph MethodMap47["fu_read_map MethodMap"] + MethodMap47_method["method"] + end + end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] CoreInstructionCounter_decrement["decrement"] @@ -881,29 +900,29 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO12["alloc_rename_buf FIFO"] - FIFO12_read["read"] FIFO12_write["write"] + FIFO12_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph Connect["rename_out_buf Connect"] - Connect_read["read"] Connect_write["write"] + Connect_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO13["reg_alloc_out_buf FIFO"] - FIFO13_read["read"] FIFO13_write["write"] + FIFO13_read["read"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO14["rs_select_out_buf FIFO"] - FIFO14_write["write"] FIFO14_read["read"] + FIFO14_write["write"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] @@ -936,86 +955,86 @@ ConnectTrans16_ConnectTrans["ConnectTrans"] end subgraph Retirement["retirement Retirement"] - Retirement_Retirement_cond0["Retirement_cond0"] + Retirement_core_state["core_state"] Retirement_Retirement["Retirement"] + Retirement_precommit["precommit"] Retirement_Retirement1["Retirement"] - Retirement_Retirement_cond1["Retirement_cond1"] - Retirement_core_state["core_state"] Retirement_Retirement2["Retirement"] - Retirement_precommit["precommit"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement3["Retirement"] + Retirement_Retirement_cond0["Retirement_cond0"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] - subgraph CSRRegister23["register_low CSRRegister"] - CSRRegister23__internal_fu_read["_internal_fu_read"] - CSRRegister23_write["write"] - CSRRegister23_read["read"] - subgraph MethodMap47["fu_read_map MethodMap"] - MethodMap47_method["method"] - end - end - subgraph CSRRegister24["register_high CSRRegister"] + subgraph CSRRegister24["register_low CSRRegister"] CSRRegister24_read["read"] - CSRRegister24__internal_fu_read["_internal_fu_read"] CSRRegister24_write["write"] + CSRRegister24__internal_fu_read["_internal_fu_read"] subgraph MethodMap49["fu_read_map MethodMap"] MethodMap49_method["method"] end end + subgraph CSRRegister25["register_high CSRRegister"] + CSRRegister25_read["read"] + CSRRegister25_write["write"] + CSRRegister25__internal_fu_read["_internal_fu_read"] + subgraph MethodMap51["fu_read_map MethodMap"] + MethodMap51_method["method"] + end + end end subgraph HwCounter9["perf_instr_ret HwCounter"] HwCounter9__incr["_incr"] end subgraph FIFOLatencyMeasurer2["perf_trap_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer2__stop["_stop"] FIFOLatencyMeasurer2__start["_start"] + FIFOLatencyMeasurer2__stop["_stop"] subgraph HwExpHistogram11["histogram HwExpHistogram"] HwExpHistogram11__add["_add"] end subgraph FIFO15["fifo FIFO"] - FIFO15_read["read"] FIFO15_write["write"] + FIFO15_read["read"] end end end end end subgraph TransactionManager["transaction_manager TransactionManager"] - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit["PrivilegedFuncUnit_cond1_PrivilegedFuncUnit"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] - TransactionManager_Renaming_ROBAllocation["Renaming_ROBAllocation"] - TransactionManager_accept_cond1_ConnectTrans["accept_cond1_ConnectTrans"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_ROBAllocation_Renaming["ROBAllocation_Renaming"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_PrivilegedFuncUnit_cond0"] + TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit["PrivilegedFuncUnit_cond2_PrivilegedFuncUnit"] TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0["Fetch_Stage2_Fetch_Stage2_cond0"] TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1["Fetch_Stage2_Fetch_Stage2_cond1"] - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit["PrivilegedFuncUnit_cond0_PrivilegedFuncUnit"] - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit["PrivilegedFuncUnit_cond2_PrivilegedFuncUnit"] - TransactionManager_Retirement_cond0_Retirement["Retirement_cond0_Retirement"] - TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_PrivilegedFuncUnit_cond1"] + TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"] TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"] - TransactionManager_accept_cond0_ConnectTrans_accept_cond0["accept_cond0_ConnectTrans_accept_cond0"] - TransactionManager_accept_cond1_accept_cond0_ConnectTrans["accept_cond1_accept_cond0_ConnectTrans"] - TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit["PrivilegedFuncUnit_cond3_PrivilegedFuncUnit"] + TransactionManager_accept_cond0_accept_cond0_ConnectTrans["accept_cond0_accept_cond0_ConnectTrans"] + TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] + TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] + TransactionManager_accept_cond0_accept_cond1_ConnectTrans["accept_cond0_accept_cond1_ConnectTrans"] + TransactionManager_accept_cond1_ConnectTrans["accept_cond1_ConnectTrans"] end end Core_InitFreeRFFifo --> BasicFifo5_write - Retirement_Retirement1 --> BasicFifo5_write + Retirement_Retirement3 --> BasicFifo5_write TransactionManager_Retirement_cond1_Retirement --> BasicFifo5_write - TransactionManager_Retirement_cond0_Retirement --> BasicFifo5_write + TransactionManager_Retirement_Retirement_cond0 --> BasicFifo5_write WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write FIFO4_read --> CoreFrontend_DiscardBranchVerify - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMasterAdapter_request_read - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Serializer_serialize_in0 - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> BasicFifo_write - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMaster_request - WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller - Serializer_serialize_out0 --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller - BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller - WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller - Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Forwarder2_write - ICache_ICache1 <--> HwCounter4__incr + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_serialize_in0 + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request + WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 + Serializer_serialize_out0 --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 + BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 + WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 + Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Forwarder2_write + ICache_ICache <--> HwCounter4__incr ArgumentsToResultsZipper_peek_arg --> ICache_MemRead BasicFifo3_peek --> ICache_MemRead ICache_MemRead <--> HwCounter1__incr @@ -1023,9 +1042,9 @@ ICache_MemRead --> Forwarder3_write ICache_MemRead <--> HwCounter2__incr ICache_MemRead --> SimpleCommonBusCacheRefiller_start_refill - SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache - Forwarder2_read --> ICache_ICache - ICache_ICache <--> HwCounter3__incr + SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache1 + Forwarder2_read --> ICache_ICache1 + ICache_ICache1 <--> HwCounter3__incr FetchUnit_Fetch_Stage0 <--> Semaphore_acquire FetchUnit_Fetch_Stage0 --> ICache_issue_req FetchUnit_Fetch_Stage0 <--> HwCounter__incr @@ -1051,61 +1070,61 @@ RegisterFile_perf --> HwExpHistogram2__add ReorderBuffer_perf --> HwExpHistogram4__add GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment - CSRRegister17_read --> GenericCSRRegisters_GenericCSRRegisters - GenericCSRRegisters_GenericCSRRegisters --> CSRRegister17_write CSRRegister18_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister18_write - GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR1_increment CSRRegister19_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister19_write + GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR1_increment CSRRegister20_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister20_write - CSRRegister12_read --> InternalInterruptController_InternalInterruptController - CSRRegister12_read --> InternalInterruptController_InternalInterruptController1 - CSRRegister11_read --> InternalInterruptController_InternalInterruptController + CSRRegister21_read --> GenericCSRRegisters_GenericCSRRegisters + GenericCSRRegisters_GenericCSRRegisters --> CSRRegister21_write CSRRegister11_read --> InternalInterruptController_InternalInterruptController1 - CSRRegister11_read --> WakeupSelect3_WakeupSelect - CSRRegister11_read --> CSRUnit_CSRUnit - CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit - CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit - CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit - CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit - CSRRegister21_read --> InternalInterruptController_InternalInterruptController - CSRRegister22_read --> InternalInterruptController_InternalInterruptController - CSRRegister22_read_comb --> InternalInterruptController_InternalInterruptController2 - InternalInterruptController_InternalInterruptController2 --> CSRRegister22_write - InternalInterruptController_InternalInterruptController1 --> CSRRegister12_write - InternalInterruptController_InternalInterruptController1 --> CSRRegister13_write - InternalInterruptController_InternalInterruptController1 --> CSRRegister14_write - InternalInterruptController_InternalInterruptController1 --> CSRRegister11_write - CSRRegister13_read --> InternalInterruptController_InternalInterruptController1 - CSRRegister14_read --> InternalInterruptController_InternalInterruptController1 - InternalInterruptController_InternalInterruptController1 --> CSRRegister15_write + CSRRegister11_read --> InternalInterruptController_InternalInterruptController + CSRRegister10_read --> InternalInterruptController_InternalInterruptController1 + CSRRegister10_read --> InternalInterruptController_InternalInterruptController + CSRRegister10_read --> WakeupSelect3_WakeupSelect + CSRRegister10_read --> CSRUnit_CSRUnit + CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 + CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 + CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit + CSRRegister22_read --> InternalInterruptController_InternalInterruptController1 + CSRRegister23_read --> InternalInterruptController_InternalInterruptController1 + CSRRegister23_read_comb --> InternalInterruptController_InternalInterruptController2 + InternalInterruptController_InternalInterruptController2 --> CSRRegister23_write + InternalInterruptController_InternalInterruptController --> CSRRegister11_write + InternalInterruptController_InternalInterruptController --> CSRRegister12_write + InternalInterruptController_InternalInterruptController --> CSRRegister13_write + InternalInterruptController_InternalInterruptController --> CSRRegister10_write + CSRRegister12_read --> InternalInterruptController_InternalInterruptController + CSRRegister13_read --> InternalInterruptController_InternalInterruptController + InternalInterruptController_InternalInterruptController --> CSRRegister14_write MethodProduct1_method --> RegAllocation_RegAllocation Pipe1_read --> RegAllocation_RegAllocation RegAllocation_RegAllocation <--> CoreInstructionCounter_increment BasicFifo5_read --> RegAllocation_RegAllocation RegAllocation_RegAllocation --> FIFO12_write - FIFO13_read --> RSSelection_RSSelection - FIFO13_read --> RSSelection_RSSelection3 FIFO13_read --> RSSelection_RSSelection1 + FIFO13_read --> RSSelection_RSSelection3 FIFO13_read --> RSSelection_RSSelection2 - RSFuncBlock_select --> RSSelection_RSSelection - RS_select --> RSSelection_RSSelection - RSSelection_RSSelection --> FIFO14_write - RSSelection_RSSelection3 --> FIFO14_write + FIFO13_read --> RSSelection_RSSelection + RSFuncBlock_select --> RSSelection_RSSelection1 + RS_select --> RSSelection_RSSelection1 RSSelection_RSSelection1 --> FIFO14_write + RSSelection_RSSelection3 --> FIFO14_write RSSelection_RSSelection2 --> FIFO14_write + RSSelection_RSSelection --> FIFO14_write RSFuncBlock1_select --> RSSelection_RSSelection3 RS1_select --> RSSelection_RSSelection3 - RSFuncBlock2_select --> RSSelection_RSSelection1 - FifoRS_select --> RSSelection_RSSelection1 - RSSelection_RSSelection2 <--> CSRUnit_select + RSFuncBlock2_select --> RSSelection_RSSelection2 + FifoRS_select --> RSSelection_RSSelection2 + RSSelection_RSSelection <--> CSRUnit_select FIFO14_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion Retirement_core_state --> RSInsertion_RSInsertion - Retirement_core_state --> LSUDummy_LSUDummy + Retirement_core_state --> LSUDummy_LSUDummy3 RSInsertion_RSInsertion --> RSFuncBlock_insert RSInsertion_RSInsertion --> RS_insert RSInsertion_RSInsertion --> TaggedLatencyMeasurer1__start @@ -1149,7 +1168,7 @@ ResultAnnouncement_ResultAnnouncement --> FifoRS_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update RS_perf --> HwExpHistogram6__add - RS_RS2 --> WakeupSelect_WakeupSelect + RS_RS4 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -1181,17 +1200,17 @@ WakeupSelect2_WakeupSelect <--> CoreFrontend_target_pred_req WakeupSelect2_WakeupSelect --> BasicFifo7_write WakeupSelect2_WakeupSelect --> TaggedCounter5__incr - RS_RS3 --> WakeupSelect3_WakeupSelect + RS_RS2 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> BasicFifo6_write ConnectTrans8_ConnectTrans --> BasicFifo6_write ConnectTrans10_ConnectTrans --> BasicFifo6_write ConnectTrans5_ConnectTrans --> BasicFifo6_write - TransactionManager_accept_cond0_ConnectTrans_accept_cond0 --> BasicFifo6_write + TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> BasicFifo6_write + TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> BasicFifo6_write TransactionManager_accept_cond1_ConnectTrans --> BasicFifo6_write - TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> BasicFifo6_write WakeupSelect3_WakeupSelect --> FIFO5_write - RS_RS4 --> WakeupSelect4_WakeupSelect + RS_RS3 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans6_ConnectTrans --> Forwarder5_write ConnectTrans7_ConnectTrans --> Forwarder5_write @@ -1211,14 +1230,14 @@ ExceptionFuncUnit_accept --> ConnectTrans9_ConnectTrans FIFO5_read --> ConnectTrans9_ConnectTrans PrivilegedFuncUnit_accept --> ConnectTrans10_ConnectTrans - CSRRegister8_read --> ConnectTrans10_ConnectTrans + CSRRegister7_read --> ConnectTrans10_ConnectTrans ConnectTrans10_ConnectTrans --> BasicFifo8_write RS1_perf --> HwExpHistogram8__add SequentialUnsignedMul_accept --> MulUnit_MulUnit FIFO7_read --> MulUnit_MulUnit MulUnit_MulUnit --> FIFO6_write RecursiveWithSingleDSPMul_RecursiveWithSingleDSPMul <--> DSPMulUnit_compute - RS1_RS --> WakeupSelect5_WakeupSelect + RS1_RS1 --> WakeupSelect5_WakeupSelect RS1_take --> WakeupSelect5_WakeupSelect RS1_take --> WakeupSelect6_WakeupSelect WakeupSelect5_WakeupSelect --> TaggedLatencyMeasurer2__stop @@ -1233,7 +1252,7 @@ LongDivider_accept --> DivUnit_DivUnit FIFO8_read --> DivUnit_DivUnit DivUnit_DivUnit --> BasicFifo9_write - RS1_RS1 --> WakeupSelect6_WakeupSelect + RS1_RS --> WakeupSelect6_WakeupSelect WakeupSelect6_WakeupSelect --> DivUnit_issue WakeupSelect6_WakeupSelect --> FIFO8_write WakeupSelect6_WakeupSelect --> LongDivider_issue @@ -1245,35 +1264,35 @@ BasicFifo9_read --> ConnectTrans12_ConnectTrans FifoRS_perf --> HwExpHistogram10__add Forwarder7_read --> LSUDummy_LSUDummy1 - Forwarder7_read --> TransactionManager_LSUDummy_issue_cond2 - Forwarder7_read --> TransactionManager_LSUDummy_issue_cond0 - Forwarder7_read --> TransactionManager_LSUDummy_issue_cond1 + Forwarder7_read --> TransactionManager_issue_cond1_LSUDummy + Forwarder7_read --> TransactionManager_issue_cond0_LSUDummy + Forwarder7_read --> TransactionManager_issue_cond2_LSUDummy LSUDummy_LSUDummy1 --> FIFO9_write WakeupSelect7_WakeupSelect --> FIFO9_write - TransactionManager_LSUDummy_issue_cond2 --> FIFO9_write - TransactionManager_LSUDummy_issue_cond0 --> FIFO9_write - TransactionManager_LSUDummy_issue_cond1 --> FIFO9_write + TransactionManager_issue_cond1_LSUDummy --> FIFO9_write + TransactionManager_issue_cond0_LSUDummy --> FIFO9_write + TransactionManager_issue_cond2_LSUDummy --> FIFO9_write LSUDummy_LSUDummy1 --> FIFO11_write WakeupSelect7_WakeupSelect --> FIFO11_write - TransactionManager_LSUDummy_issue_cond2 --> FIFO11_write - TransactionManager_LSUDummy_issue_cond0 --> FIFO11_write - TransactionManager_LSUDummy_issue_cond1 --> FIFO11_write + TransactionManager_issue_cond1_LSUDummy --> FIFO11_write + TransactionManager_issue_cond0_LSUDummy --> FIFO11_write + TransactionManager_issue_cond2_LSUDummy --> FIFO11_write LSUDummy_LSUDummy2 --> Retirement_precommit CSRUnit_CSRUnit --> Retirement_precommit - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit --> Retirement_precommit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> Retirement_precommit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> Retirement_precommit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 --> Retirement_precommit TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit --> Retirement_precommit - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit --> Retirement_precommit - TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit --> Retirement_precommit ReorderBuffer_peek --> LSUDummy_LSUDummy2 ReorderBuffer_peek --> CSRUnit_CSRUnit - ReorderBuffer_peek --> Retirement_Retirement - ReorderBuffer_peek --> Retirement_Retirement1 - ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit - ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement + ReorderBuffer_peek --> Retirement_Retirement2 + ReorderBuffer_peek --> Retirement_Retirement3 + ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 + ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit - ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit - ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit - ReorderBuffer_peek --> TransactionManager_Retirement_cond0_Retirement + ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement + ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 FifoRS_FifoRS --> WakeupSelect7_WakeupSelect FifoRS_take --> WakeupSelect7_WakeupSelect WakeupSelect7_WakeupSelect --> TaggedLatencyMeasurer3__stop @@ -1297,6 +1316,8 @@ MethodMap11_method --> CSRUnit_CSRUnit CSRRegister5__internal_fu_read --> CSRUnit_CSRUnit AliasedCSR__fu_read --> CSRUnit_CSRUnit + MethodMap23_method --> CSRUnit_CSRUnit + CSRRegister11__internal_fu_read --> CSRUnit_CSRUnit MethodMap25_method --> CSRUnit_CSRUnit CSRRegister12__internal_fu_read --> CSRUnit_CSRUnit MethodMap27_method --> CSRUnit_CSRUnit @@ -1305,9 +1326,10 @@ CSRRegister14__internal_fu_read --> CSRUnit_CSRUnit MethodMap31_method --> CSRUnit_CSRUnit CSRRegister15__internal_fu_read --> CSRUnit_CSRUnit - MethodMap33_method --> CSRUnit_CSRUnit - CSRRegister16__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR__fu_write + CSRUnit_CSRUnit --> MethodFilter11_method + CSRUnit_CSRUnit --> MethodMap22_method + CSRUnit_CSRUnit --> CSRRegister11__internal_fu_write CSRUnit_CSRUnit --> MethodFilter12_method CSRUnit_CSRUnit --> MethodMap24_method CSRUnit_CSRUnit --> CSRRegister12__internal_fu_write @@ -1320,9 +1342,6 @@ CSRUnit_CSRUnit --> MethodFilter15_method CSRUnit_CSRUnit --> MethodMap30_method CSRUnit_CSRUnit --> CSRRegister15__internal_fu_write - CSRUnit_CSRUnit --> MethodFilter16_method - CSRUnit_CSRUnit --> MethodMap32_method - CSRUnit_CSRUnit --> CSRRegister16__internal_fu_write AliasedCSR1__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR1__fu_write MethodMap13_method --> CSRUnit_CSRUnit @@ -1330,6 +1349,18 @@ CSRUnit_CSRUnit --> MethodFilter6_method CSRUnit_CSRUnit --> MethodMap12_method CSRUnit_CSRUnit --> CSRRegister6__internal_fu_write + AliasedCSR2__fu_read --> CSRUnit_CSRUnit + MethodMap33_method --> CSRUnit_CSRUnit + CSRRegister16__internal_fu_read --> CSRUnit_CSRUnit + MethodMap35_method --> CSRUnit_CSRUnit + CSRRegister17__internal_fu_read --> CSRUnit_CSRUnit + CSRUnit_CSRUnit --> AliasedCSR2__fu_write + CSRUnit_CSRUnit --> MethodFilter16_method + CSRUnit_CSRUnit --> MethodMap32_method + CSRUnit_CSRUnit --> CSRRegister16__internal_fu_write + CSRUnit_CSRUnit --> MethodFilter17_method + CSRUnit_CSRUnit --> MethodMap34_method + CSRUnit_CSRUnit --> CSRRegister17__internal_fu_write MethodMap15_method --> CSRUnit_CSRUnit CSRRegister7__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter7_method @@ -1345,13 +1376,6 @@ CSRUnit_CSRUnit --> MethodFilter9_method CSRUnit_CSRUnit --> MethodMap18_method CSRUnit_CSRUnit --> CSRRegister9__internal_fu_write - MethodMap21_method --> CSRUnit_CSRUnit - CSRRegister10__internal_fu_read --> CSRUnit_CSRUnit - CSRUnit_CSRUnit --> MethodFilter10_method - CSRUnit_CSRUnit --> MethodMap20_method - CSRUnit_CSRUnit --> CSRRegister10__internal_fu_write - MethodMap35_method --> CSRUnit_CSRUnit - CSRRegister17__internal_fu_read --> CSRUnit_CSRUnit MethodMap37_method --> CSRUnit_CSRUnit CSRRegister18__internal_fu_read --> CSRUnit_CSRUnit MethodMap39_method --> CSRUnit_CSRUnit @@ -1360,9 +1384,6 @@ CSRRegister20__internal_fu_read --> CSRUnit_CSRUnit MethodMap43_method --> CSRUnit_CSRUnit CSRRegister21__internal_fu_read --> CSRUnit_CSRUnit - CSRUnit_CSRUnit --> MethodFilter21_method - CSRUnit_CSRUnit --> MethodMap42_method - CSRUnit_CSRUnit --> CSRRegister21__internal_fu_write MethodMap45_method --> CSRUnit_CSRUnit CSRRegister22__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter22_method @@ -1370,8 +1391,13 @@ CSRUnit_CSRUnit --> CSRRegister22__internal_fu_write MethodMap47_method --> CSRUnit_CSRUnit CSRRegister23__internal_fu_read --> CSRUnit_CSRUnit + CSRUnit_CSRUnit --> MethodFilter23_method + CSRUnit_CSRUnit --> MethodMap46_method + CSRUnit_CSRUnit --> CSRRegister23__internal_fu_write MethodMap49_method --> CSRUnit_CSRUnit CSRRegister24__internal_fu_read --> CSRUnit_CSRUnit + MethodMap51_method --> CSRUnit_CSRUnit + CSRRegister25__internal_fu_read --> CSRUnit_CSRUnit ConnectTrans2_ConnectTrans --> Forwarder4_write ConnectTrans3_ConnectTrans --> Forwarder4_write ConnectTrans4_ConnectTrans --> Forwarder4_write @@ -1386,129 +1412,107 @@ Collector3_method --> ConnectTrans4_ConnectTrans Forwarder8_read --> ConnectTrans4_ConnectTrans CSRUnit_get_result --> ConnectTrans5_ConnectTrans - ExceptionInformationRegister_get --> Retirement_Retirement + ExceptionInformationRegister_get --> Retirement_Retirement2 ExceptionInformationRegister_get --> TransactionManager_Retirement_cond1_Retirement - ExceptionInformationRegister_get --> TransactionManager_Retirement_cond0_Retirement - Retirement_Retirement1 <--> ReorderBuffer_retire + ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond0 + Retirement_Retirement3 <--> ReorderBuffer_retire TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire - TransactionManager_Retirement_cond0_Retirement <--> ReorderBuffer_retire - Retirement_Retirement1 <--> FIFOLatencyMeasurer1__stop + TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire + Retirement_Retirement3 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer1__stop - TransactionManager_Retirement_cond0_Retirement <--> FIFOLatencyMeasurer1__stop - FIFO1_read --> Retirement_Retirement1 + TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1__stop + FIFO1_read --> Retirement_Retirement3 FIFO1_read --> TransactionManager_Retirement_cond1_Retirement - FIFO1_read --> TransactionManager_Retirement_cond0_Retirement - Retirement_Retirement1 --> HwExpHistogram3__add + FIFO1_read --> TransactionManager_Retirement_Retirement_cond0 + Retirement_Retirement3 --> HwExpHistogram3__add TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram3__add - TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram3__add - CoreInstructionCounter_decrement --> Retirement_Retirement1 + TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram3__add + CoreInstructionCounter_decrement --> Retirement_Retirement3 CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement - CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond0_Retirement - RRAT_peek --> Retirement_Retirement1 + CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 + RRAT_peek --> Retirement_Retirement3 RRAT_peek --> TransactionManager_Retirement_cond1_Retirement - Retirement_Retirement1 --> RegisterFile_free + Retirement_Retirement3 --> RegisterFile_free TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free - TransactionManager_Retirement_cond0_Retirement --> RegisterFile_free - Retirement_Retirement1 --> TaggedLatencyMeasurer__stop + TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free + Retirement_Retirement3 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_cond1_Retirement --> TaggedLatencyMeasurer__stop - TransactionManager_Retirement_cond0_Retirement --> TaggedLatencyMeasurer__stop - AsyncMemoryBank_read0 --> Retirement_Retirement1 + TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer__stop + AsyncMemoryBank_read0 --> Retirement_Retirement3 AsyncMemoryBank_read0 --> TransactionManager_Retirement_cond1_Retirement - AsyncMemoryBank_read0 --> TransactionManager_Retirement_cond0_Retirement - Retirement_Retirement1 --> HwExpHistogram1__add + AsyncMemoryBank_read0 --> TransactionManager_Retirement_Retirement_cond0 + Retirement_Retirement3 --> HwExpHistogram1__add TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add - TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram1__add - Retirement_Retirement1 --> FRAT_rename + TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add + Retirement_Retirement3 --> FRAT_rename + TransactionManager_ROBAllocation_Renaming --> FRAT_rename TransactionManager_Retirement_cond1_Retirement --> FRAT_rename - TransactionManager_Renaming_ROBAllocation --> FRAT_rename - Retirement_Retirement3 <--> FIFOLatencyMeasurer2__stop - FIFO15_read --> Retirement_Retirement3 - Retirement_Retirement3 --> HwExpHistogram11__add - CSRRegister7_read --> Retirement_Retirement3 - Retirement_Retirement3 --> FetchUnit_resume_from_exception - Retirement_Retirement3 <--> ExceptionInformationRegister_clear - TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy3 - TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy3 - TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy3 - TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond2 --> BasicFifo10_write - TransactionManager_LSUDummy_issue_cond0 --> BasicFifo10_write - TransactionManager_LSUDummy_issue_cond1 --> BasicFifo10_write - TransactionManager_LSUDummy_issue_cond2 --> FIFO10_write - TransactionManager_LSUDummy_issue_cond0 --> FIFO10_write - TransactionManager_LSUDummy_issue_cond1 --> FIFO10_write - TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> ICache_flush - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit + Retirement_Retirement1 <--> FIFOLatencyMeasurer2__stop + FIFO15_read --> Retirement_Retirement1 + Retirement_Retirement1 --> HwExpHistogram11__add + CSRRegister16_read --> Retirement_Retirement1 + CSRRegister17_read --> Retirement_Retirement1 + CSRRegister6_read --> Retirement_Retirement1 + Retirement_Retirement1 --> FetchUnit_resume_from_exception + Retirement_Retirement1 <--> ExceptionInformationRegister_clear + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit - TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit --> TaggedCounter6__incr + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> TaggedCounter6__incr + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> TaggedCounter6__incr + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 --> TaggedCounter6__incr TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit --> TaggedCounter6__incr - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit --> TaggedCounter6__incr - TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit --> TaggedCounter6__incr - CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit - CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit - CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit - CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit - TransactionManager_accept_cond0_ConnectTrans_accept_cond0 <--> LSUDummy_accept_cond0 - TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 - LSURequester_accept --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - LSURequester_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - BasicFifo10_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - BasicFifo10_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - FIFO10_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - FIFO10_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_accept_cond0_ConnectTrans_accept_cond0 <--> ConnectTrans13_ConnectTrans + CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 + CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 + CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 + TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 + TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read + TransactionManager_issue_cond1_LSUDummy --> Serializer1_serialize_in0 + TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write + TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write + TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request + TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request + TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy + TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy + TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy + TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond1_LSUDummy --> BasicFifo10_write + TransactionManager_issue_cond0_LSUDummy --> BasicFifo10_write + TransactionManager_issue_cond2_LSUDummy --> BasicFifo10_write + TransactionManager_issue_cond1_LSUDummy --> FIFO10_write + TransactionManager_issue_cond0_LSUDummy --> FIFO10_write + TransactionManager_issue_cond2_LSUDummy --> FIFO10_write + TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond0 + TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 + LSURequester_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + LSURequester_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + BasicFifo10_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + BasicFifo10_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + FIFO10_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + FIFO10_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSURequester_accept_cond1 + WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + Serializer1_serialize_out0 --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + Forwarder1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + Forwarder1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> ConnectTrans13_ConnectTrans + TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> ConnectTrans13_ConnectTrans TransactionManager_accept_cond1_ConnectTrans <--> ConnectTrans13_ConnectTrans - TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> ConnectTrans13_ConnectTrans - TransactionManager_accept_cond0_ConnectTrans_accept_cond0 --> Forwarder8_write + TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> Forwarder8_write + TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> Forwarder8_write TransactionManager_accept_cond1_ConnectTrans --> Forwarder8_write - TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> Forwarder8_write - LSUDummy_accept --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 + LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans LSUDummy_accept --> TransactionManager_accept_cond1_ConnectTrans - LSUDummy_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_accept_cond0_ConnectTrans_accept_cond0 <--> LSURequester_accept_cond0 - WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - Serializer1_serialize_out1 --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - BasicFifo1_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - BasicFifo1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - WishboneMaster1_result --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - WishboneMaster1_result --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - Forwarder1_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 - Forwarder1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 - TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement2 - TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement2 - TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer2__start - TransactionManager_Retirement_cond0_Retirement <--> FIFOLatencyMeasurer2__start - TransactionManager_Retirement_cond1_Retirement --> FIFO15_write - TransactionManager_Retirement_cond0_Retirement --> FIFO15_write - InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond1_Retirement - InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond0_Retirement - TransactionManager_Retirement_cond1_Retirement --> CSRRegister6_write - TransactionManager_Retirement_cond0_Retirement --> CSRRegister6_write - TransactionManager_Retirement_cond1_Retirement --> CSRRegister8_write - TransactionManager_Retirement_cond0_Retirement --> CSRRegister8_write - TransactionManager_Retirement_cond1_Retirement --> CSRRegister9_write - TransactionManager_Retirement_cond0_Retirement --> CSRRegister9_write - TransactionManager_Retirement_cond1_Retirement <--> InternalInterruptController_entry - TransactionManager_Retirement_cond0_Retirement <--> InternalInterruptController_entry - TransactionManager_Renaming_ROBAllocation <--> Renaming_Renaming - FIFO12_read --> TransactionManager_Renaming_ROBAllocation - TransactionManager_Renaming_ROBAllocation --> Connect_write - TransactionManager_Renaming_ROBAllocation <--> ROBAllocation_ROBAllocation - Connect_read --> TransactionManager_Renaming_ROBAllocation - TransactionManager_Renaming_ROBAllocation --> ReorderBuffer_put - TransactionManager_Renaming_ROBAllocation <--> FIFOLatencyMeasurer1__start - TransactionManager_Renaming_ROBAllocation --> FIFO1_write - TransactionManager_Renaming_ROBAllocation --> FIFO13_write - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> InternalInterruptController_mret TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> Semaphore_release @@ -1529,29 +1533,53 @@ TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> HwCounter5__incr TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter__incr TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Serializer_write + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> ICache_flush + TransactionManager_ROBAllocation_Renaming <--> ROBAllocation_ROBAllocation + Connect_read --> TransactionManager_ROBAllocation_Renaming + TransactionManager_ROBAllocation_Renaming --> ReorderBuffer_put + TransactionManager_ROBAllocation_Renaming <--> FIFOLatencyMeasurer1__start + TransactionManager_ROBAllocation_Renaming --> FIFO1_write + TransactionManager_ROBAllocation_Renaming --> FIFO13_write + TransactionManager_ROBAllocation_Renaming <--> Renaming_Renaming + FIFO12_read --> TransactionManager_ROBAllocation_Renaming + TransactionManager_ROBAllocation_Renaming --> Connect_write + TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 + TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write + TransactionManager_issue_cond0_LSUDummy --> Serializer1_serialize_in1 + TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSURequester_accept_cond0 + WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + Serializer1_serialize_out1 --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> InternalInterruptController_mret + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 + TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 + TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 + TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 + TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement + TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer2__start + TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer2__start + TransactionManager_Retirement_cond1_Retirement --> FIFO15_write + TransactionManager_Retirement_Retirement_cond0 --> FIFO15_write + InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond1_Retirement + InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond0 + TransactionManager_Retirement_cond1_Retirement --> CSRRegister6_write + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister6_write + TransactionManager_Retirement_cond1_Retirement --> CSRRegister7_write + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister7_write + TransactionManager_Retirement_cond1_Retirement --> CSRRegister8_write + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write + TransactionManager_Retirement_cond1_Retirement <--> InternalInterruptController_entry + TransactionManager_Retirement_Retirement_cond0 <--> InternalInterruptController_entry TransactionManager_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond1 FIFO9_read --> TransactionManager_accept_cond1_ConnectTrans FIFO11_read --> TransactionManager_accept_cond1_ConnectTrans - TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 - TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement_cond0 - TransactionManager_Retirement_cond0_Retirement --> RRAT_commit - TransactionManager_Retirement_cond0_Retirement <--> DoubleCounterCSR2_increment - CSRRegister23_read --> TransactionManager_Retirement_cond0_Retirement - TransactionManager_Retirement_cond0_Retirement --> CSRRegister23_write - CSRRegister24_read --> TransactionManager_Retirement_cond0_Retirement - TransactionManager_Retirement_cond0_Retirement --> CSRRegister24_write - TransactionManager_Retirement_cond0_Retirement <--> HwCounter9__incr - TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 - TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 - TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write - TransactionManager_LSUDummy_issue_cond0 --> Serializer1_serialize_in1 - TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request - TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request - TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSURequester_accept_cond1 - WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - Serializer1_serialize_out0 --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 - TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read - TransactionManager_LSUDummy_issue_cond1 --> Serializer1_serialize_in0 + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 + TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit + TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment + CSRRegister24_read --> TransactionManager_Retirement_Retirement_cond0 + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister24_write + CSRRegister25_read --> TransactionManager_Retirement_Retirement_cond0 + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister25_write + TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr diff --git a/api.html b/api.html index 9f9eeb998..bcdb2e1db 100644 --- a/api.html +++ b/api.html @@ -192,7 +192,7 @@

coreblocks

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/assumptions.html b/assumptions.html index 131269d44..71d339384 100644 --- a/assumptions.html +++ b/assumptions.html @@ -103,7 +103,7 @@

List of assumptions made during development

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/auto_graph.html b/auto_graph.html index 4a7315f3c..c768bfb36 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -84,29 +84,29 @@ subgraph Core["core Core"] Core_InitFreeRFFifo["InitFreeRFFifo"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] - WishboneMaster_request["request"] WishboneMaster_WishboneMaster["WishboneMaster"] WishboneMaster_result["result"] + WishboneMaster_request["request"] subgraph Forwarder["result Forwarder"] Forwarder_read["read"] Forwarder_write["write"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] WishboneMaster1_request["request"] + WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] - Forwarder1_write["write"] Forwarder1_read["read"] + Forwarder1_write["write"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] WishboneMasterAdapter_get_read_response["get_read_response"] WishboneMasterAdapter_request_read["request_read"] subgraph Serializer["bus_serializer Serializer"] - Serializer_serialize_out0["serialize_out0"] Serializer_serialize_in0["serialize_in0"] + Serializer_serialize_out0["serialize_out0"] subgraph BasicFifo["pending_requests BasicFifo"] BasicFifo_read["read"] BasicFifo_write["write"] @@ -114,15 +114,15 @@ end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] - WishboneMasterAdapter1_get_read_response["get_read_response"] WishboneMasterAdapter1_get_write_response["get_write_response"] - WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_request_read["request_read"] + WishboneMasterAdapter1_get_read_response["get_read_response"] + WishboneMasterAdapter1_request_write["request_write"] subgraph Serializer1["bus_serializer Serializer"] - Serializer1_serialize_out0["serialize_out0"] - Serializer1_serialize_in1["serialize_in1"] Serializer1_serialize_out1["serialize_out1"] + Serializer1_serialize_out0["serialize_out0"] Serializer1_serialize_in0["serialize_in0"] + Serializer1_serialize_in1["serialize_in1"] subgraph BasicFifo1["pending_requests BasicFifo"] BasicFifo1_write["write"] BasicFifo1_read["read"] @@ -130,14 +130,14 @@ end end subgraph CoreFrontend["frontend CoreFrontend"] - CoreFrontend_target_pred_resp["target_pred_resp"] CoreFrontend_DiscardBranchVerify["DiscardBranchVerify"] CoreFrontend_target_pred_req["target_pred_req"] + CoreFrontend_target_pred_resp["target_pred_resp"] CoreFrontend_stall["stall"] subgraph BasicFifo2["instr_buffer BasicFifo"] + BasicFifo2_clear["clear"] BasicFifo2_read["read"] BasicFifo2_write["write"] - BasicFifo2_clear["clear"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] @@ -145,17 +145,17 @@ SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] SimpleCommonBusCacheRefiller_start_refill["start_refill"] subgraph Forwarder2["resp_fwd Forwarder"] - Forwarder2_write["write"] Forwarder2_read["read"] + Forwarder2_write["write"] end end subgraph ICache["icache ICache"] - ICache_ICache["ICache"] - ICache_issue_req["issue_req"] - ICache_accept_res["accept_res"] ICache_MemRead["MemRead"] - ICache_ICache1["ICache"] + ICache_issue_req["issue_req"] ICache_flush["flush"] + ICache_ICache["ICache"] + ICache_ICache1["ICache"] + ICache_accept_res["accept_res"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] end @@ -172,8 +172,8 @@ HwCounter4__incr["_incr"] end subgraph FIFOLatencyMeasurer["req_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer__start["_start"] FIFOLatencyMeasurer__stop["_stop"] + FIFOLatencyMeasurer__start["_start"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -184,29 +184,29 @@ end subgraph ArgumentsToResultsZipper["req_zipper ArgumentsToResultsZipper"] ArgumentsToResultsZipper_write_args["write_args"] - ArgumentsToResultsZipper_read["read"] ArgumentsToResultsZipper_write_results["write_results"] ArgumentsToResultsZipper_peek_arg["peek_arg"] + ArgumentsToResultsZipper_read["read"] subgraph BasicFifo3["fifo BasicFifo"] BasicFifo3_peek["peek"] BasicFifo3_write["write"] BasicFifo3_read["read"] end subgraph Forwarder3["forwarder Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end end subgraph FetchUnit["fetch FetchUnit"] FetchUnit_Fetch_Stage0["Fetch_Stage0"] - FetchUnit_Fetch_Stage2["Fetch_Stage2"] + FetchUnit_resume_from_exception["resume_from_exception"] + FetchUnit_Fetch_Stage1["Fetch_Stage1"] FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] - FetchUnit_resume_from_unsafe["resume_from_unsafe"] FetchUnit_stall_exception["stall_exception"] FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] - FetchUnit_resume_from_exception["resume_from_exception"] - FetchUnit_Fetch_Stage1["Fetch_Stage1"] + FetchUnit_resume_from_unsafe["resume_from_unsafe"] + FetchUnit_Fetch_Stage2["Fetch_Stage2"] subgraph TaggedCounter["perf_fetch_utilization TaggedCounter"] TaggedCounter__incr["_incr"] end @@ -214,9 +214,9 @@ HwCounter5__incr["_incr"] end subgraph Serializer["serializer Serializer"] + Serializer_read["read"] Serializer_clean["clean"] Serializer_write["write"] - Serializer_read["read"] end subgraph ConnectTrans["serializer_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -230,8 +230,8 @@ Semaphore_acquire["acquire"] end subgraph Pipe["s1_s2_pipe Pipe"] - Pipe_read["read"] Pipe_write["write"] + Pipe_read["read"] end subgraph Predecoder["predecoder_0 Predecoder"] Predecoder_predecode["predecode"] @@ -250,9 +250,9 @@ end end subgraph Pipe1["decode_pipe Pipe"] + Pipe1_clean["clean"] Pipe1_read["read"] Pipe1_write["write"] - Pipe1_clean["clean"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] @@ -274,19 +274,19 @@ end subgraph RegisterFile["RF RegisterFile"] RegisterFile_perf["perf"] + RegisterFile_read2["read2"] RegisterFile_write["write"] RegisterFile_free["free"] RegisterFile_read1["read1"] - RegisterFile_read2["read2"] subgraph TaggedLatencyMeasurer["perf_rf_valid_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer__stop["_stop"] TaggedLatencyMeasurer__start["_start"] + TaggedLatencyMeasurer__stop["_stop"] subgraph HwExpHistogram1["histogram HwExpHistogram"] HwExpHistogram1__add["_add"] end subgraph AsyncMemoryBank["slots AsyncMemoryBank"] - AsyncMemoryBank_read0["read0"] AsyncMemoryBank_write0["write0"] + AsyncMemoryBank_read0["read0"] end end subgraph HwExpHistogram2["perf_num_valid HwExpHistogram"] @@ -294,21 +294,21 @@ end end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_perf["perf"] - ReorderBuffer_peek["peek"] - ReorderBuffer_get_indices["get_indices"] ReorderBuffer_mark_done["mark_done"] - ReorderBuffer_put["put"] + ReorderBuffer_get_indices["get_indices"] ReorderBuffer_retire["retire"] + ReorderBuffer_peek["peek"] + ReorderBuffer_perf["perf"] + ReorderBuffer_put["put"] subgraph FIFOLatencyMeasurer1["perf_rob_wait_time FIFOLatencyMeasurer"] - FIFOLatencyMeasurer1__stop["_stop"] FIFOLatencyMeasurer1__start["_start"] + FIFOLatencyMeasurer1__stop["_stop"] subgraph HwExpHistogram3["histogram HwExpHistogram"] HwExpHistogram3__add["_add"] end subgraph FIFO1["fifo FIFO"] - FIFO1_read["read"] FIFO1_write["write"] + FIFO1_read["read"] end end subgraph HwExpHistogram4["perf_rob_size HwExpHistogram"] @@ -317,8 +317,8 @@ end subgraph ExceptionInformationRegister["exception_information_register ExceptionInformationRegister"] ExceptionInformationRegister_report["report"] - ExceptionInformationRegister_clear["clear"] ExceptionInformationRegister_get["get"] + ExceptionInformationRegister_clear["clear"] subgraph BasicFifo6["fu_report_fifo BasicFifo"] BasicFifo6_read["read"] BasicFifo6_write["write"] @@ -353,24 +353,24 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_select["select"] - RSFuncBlock_update["update"] RSFuncBlock_insert["insert"] + RSFuncBlock_select["select"] RSFuncBlock_get_result["get_result"] + RSFuncBlock_update["update"] subgraph RS["rs RS"] + RS_perf["perf"] RS_RS["RS"] - RS_update["update"] - RS_take["take"] RS_RS1["RS"] RS_RS2["RS"] RS_RS3["RS"] - RS_insert["insert"] - RS_RS4["RS"] - RS_perf["perf"] RS_select["select"] + RS_RS4["RS"] + RS_insert["insert"] + RS_take["take"] + RS_update["update"] subgraph TaggedLatencyMeasurer1["perf_rs_wait_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer1__stop["_stop"] TaggedLatencyMeasurer1__start["_start"] + TaggedLatencyMeasurer1__stop["_stop"] subgraph HwExpHistogram5["histogram HwExpHistogram"] HwExpHistogram5__add["_add"] end @@ -398,11 +398,11 @@ WakeupSelect_WakeupSelect["WakeupSelect"] end subgraph ShiftFuncUnit["func_unit_1 ShiftFuncUnit"] - ShiftFuncUnit_issue["issue"] ShiftFuncUnit_accept["accept"] + ShiftFuncUnit_issue["issue"] subgraph FIFO3["fifo FIFO"] - FIFO3_read["read"] FIFO3_write["write"] + FIFO3_read["read"] end end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] @@ -436,24 +436,24 @@ ExceptionFuncUnit_issue["issue"] ExceptionFuncUnit_accept["accept"] subgraph FIFO5["fifo FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] - PrivilegedFuncUnit_issue["issue"] - PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] + PrivilegedFuncUnit_issue["issue"] + PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] PrivilegedFuncUnit_accept["accept"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] subgraph BasicFifo8["fetch_resume_fifo BasicFifo"] - BasicFifo8_read["read"] BasicFifo8_write["write"] + BasicFifo8_read["read"] end subgraph TaggedCounter6["perf_instr TaggedCounter"] TaggedCounter6__incr["_incr"] @@ -465,8 +465,8 @@ subgraph Collector1["collector Collector"] Collector1_method["method"] subgraph Forwarder5["forwarder Forwarder"] - Forwarder5_read["read"] Forwarder5_write["write"] + Forwarder5_read["read"] end subgraph ManyToOneConnectTrans1["connect ManyToOneConnectTrans"] subgraph ConnectTrans6["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -488,18 +488,18 @@ end end subgraph RSFuncBlock1["rs_block_1 RSFuncBlock"] - RSFuncBlock1_get_result["get_result"] RSFuncBlock1_insert["insert"] + RSFuncBlock1_get_result["get_result"] RSFuncBlock1_select["select"] RSFuncBlock1_update["update"] subgraph RS1["rs RS"] - RS1_update["update"] RS1_RS["RS"] RS1_perf["perf"] - RS1_insert["insert"] + RS1_RS1["RS"] RS1_take["take"] + RS1_insert["insert"] RS1_select["select"] - RS1_RS1["RS"] + RS1_update["update"] subgraph TaggedLatencyMeasurer2["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer2__stop["_stop"] TaggedLatencyMeasurer2__start["_start"] @@ -507,8 +507,8 @@ HwExpHistogram7__add["_add"] end subgraph AsyncMemoryBank2["slots AsyncMemoryBank"] - AsyncMemoryBank2_write0["write0"] AsyncMemoryBank2_read0["read0"] + AsyncMemoryBank2_write0["write0"] end end subgraph HwExpHistogram8["perf_num_full HwExpHistogram"] @@ -516,12 +516,12 @@ end end subgraph MulUnit["func_unit_0 MulUnit"] - MulUnit_issue["issue"] - MulUnit_accept["accept"] MulUnit_MulUnit["MulUnit"] + MulUnit_accept["accept"] + MulUnit_issue["issue"] subgraph FIFO6["result_fifo FIFO"] - FIFO6_read["read"] FIFO6_write["write"] + FIFO6_read["read"] end subgraph FIFO7["params_fifo FIFO"] FIFO7_read["read"] @@ -546,8 +546,8 @@ DivUnit_issue["issue"] DivUnit_accept["accept"] subgraph BasicFifo9["result_fifo BasicFifo"] - BasicFifo9_read["read"] BasicFifo9_write["write"] + BasicFifo9_read["read"] end subgraph FIFO8["params_fifo FIFO"] FIFO8_write["write"] @@ -578,17 +578,17 @@ end end subgraph RSFuncBlock2["rs_block_2 RSFuncBlock"] - RSFuncBlock2_select["select"] RSFuncBlock2_get_result["get_result"] RSFuncBlock2_insert["insert"] + RSFuncBlock2_select["select"] RSFuncBlock2_update["update"] subgraph FifoRS["rs FifoRS"] + FifoRS_perf["perf"] FifoRS_insert["insert"] + FifoRS_take["take"] + FifoRS_update["update"] FifoRS_FifoRS["FifoRS"] FifoRS_select["select"] - FifoRS_update["update"] - FifoRS_take["take"] - FifoRS_perf["perf"] subgraph TaggedLatencyMeasurer3["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer3__start["_start"] TaggedLatencyMeasurer3__stop["_stop"] @@ -596,8 +596,8 @@ HwExpHistogram9__add["_add"] end subgraph AsyncMemoryBank3["slots AsyncMemoryBank"] - AsyncMemoryBank3_write0["write0"] AsyncMemoryBank3_read0["read0"] + AsyncMemoryBank3_write0["write0"] end end subgraph HwExpHistogram10["perf_num_full HwExpHistogram"] @@ -605,21 +605,21 @@ end end subgraph LSUDummy["func_unit_0 LSUDummy"] + LSUDummy_accept["accept"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_LSUDummy1["LSUDummy"] - LSUDummy_accept["accept"] LSUDummy_issue["issue"] - LSUDummy_accept_cond1["accept_cond1"] - LSUDummy_accept_cond0["accept_cond0"] LSUDummy_LSUDummy2["LSUDummy"] + LSUDummy_accept_cond0["accept_cond0"] + LSUDummy_accept_cond1["accept_cond1"] LSUDummy_LSUDummy3["LSUDummy"] subgraph LSURequester["requester LSURequester"] LSURequester_issue_cond2["issue_cond2"] - LSURequester_issue["issue"] - LSURequester_issue_cond0["issue_cond0"] - LSURequester_accept["accept"] LSURequester_issue_cond1["issue_cond1"] LSURequester_accept_cond0["accept_cond0"] + LSURequester_issue_cond0["issue_cond0"] + LSURequester_accept["accept"] + LSURequester_issue["issue"] LSURequester_accept_cond1["accept_cond1"] subgraph BasicFifo10["args_fifo BasicFifo"] BasicFifo10_read["read"] @@ -631,8 +631,8 @@ Forwarder7_write["write"] end subgraph FIFO9["results_noop FIFO"] - FIFO9_read["read"] FIFO9_write["write"] + FIFO9_read["read"] end subgraph FIFO10["issued FIFO"] FIFO10_write["write"] @@ -649,8 +649,8 @@ subgraph Collector3["collector Collector"] Collector3_method["method"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end subgraph ManyToOneConnectTrans3["connect ManyToOneConnectTrans"] subgraph ConnectTrans13["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -660,12 +660,12 @@ end end subgraph CSRUnit["rs_block_3 CSRUnit"] - CSRUnit_get_result["get_result"] - CSRUnit_select["select"] - CSRUnit_CSRUnit["CSRUnit"] CSRUnit_update["update"] - CSRUnit_insert["insert"] CSRUnit_fetch_resume["fetch_resume"] + CSRUnit_CSRUnit["CSRUnit"] + CSRUnit_get_result["get_result"] + CSRUnit_insert["insert"] + CSRUnit_select["select"] end end subgraph ResultAnnouncement["announcement ResultAnnouncement"] @@ -699,8 +699,8 @@ end end subgraph CSRRegister4["mscratch CSRRegister"] - CSRRegister4__internal_fu_write["_internal_fu_write"] CSRRegister4__internal_fu_read["_internal_fu_read"] + CSRRegister4__internal_fu_write["_internal_fu_write"] subgraph MethodMap8["fu_write_map MethodMap"] MethodMap8_method["method"] end @@ -718,8 +718,8 @@ end end subgraph AliasedCSR["mstatus AliasedCSR"] - AliasedCSR__fu_write["_fu_write"] AliasedCSR__fu_read["_fu_read"] + AliasedCSR__fu_write["_fu_write"] end subgraph AliasedCSR1["mstatush AliasedCSR"] AliasedCSR1__fu_read["_fu_read"] @@ -727,8 +727,9 @@ end subgraph CSRRegister6["mcause CSRRegister"] CSRRegister6__internal_fu_write["_internal_fu_write"] - CSRRegister6__internal_fu_read["_internal_fu_read"] CSRRegister6_write["write"] + CSRRegister6__internal_fu_read["_internal_fu_read"] + CSRRegister6_read["read"] subgraph MethodMap12["fu_write_map MethodMap"] MethodMap12_method["method"] end @@ -739,10 +740,15 @@ MethodMap13_method["method"] end end - subgraph CSRRegister7["mtvec CSRRegister"] + subgraph AliasedCSR2["mtvec AliasedCSR"] + AliasedCSR2__fu_read["_fu_read"] + AliasedCSR2__fu_write["_fu_write"] + end + subgraph CSRRegister7["mepc CSRRegister"] CSRRegister7_read["read"] - CSRRegister7__internal_fu_write["_internal_fu_write"] CSRRegister7__internal_fu_read["_internal_fu_read"] + CSRRegister7__internal_fu_write["_internal_fu_write"] + CSRRegister7_write["write"] subgraph MethodMap14["fu_write_map MethodMap"] MethodMap14_method["method"] end @@ -753,10 +759,9 @@ MethodMap15_method["method"] end end - subgraph CSRRegister8["mepc CSRRegister"] + subgraph CSRRegister8["mtval CSRRegister"] CSRRegister8__internal_fu_write["_internal_fu_write"] CSRRegister8_write["write"] - CSRRegister8_read["read"] CSRRegister8__internal_fu_read["_internal_fu_read"] subgraph MethodMap16["fu_write_map MethodMap"] MethodMap16_method["method"] @@ -768,8 +773,7 @@ MethodMap17_method["method"] end end - subgraph CSRRegister9["mtval CSRRegister"] - CSRRegister9_write["write"] + subgraph CSRRegister9["misa CSRRegister"] CSRRegister9__internal_fu_write["_internal_fu_write"] CSRRegister9__internal_fu_read["_internal_fu_read"] subgraph MethodMap18["fu_write_map MethodMap"] @@ -782,28 +786,30 @@ MethodMap19_method["method"] end end - subgraph CSRRegister10["misa CSRRegister"] - CSRRegister10__internal_fu_read["_internal_fu_read"] - CSRRegister10__internal_fu_write["_internal_fu_write"] - subgraph MethodMap20["fu_write_map MethodMap"] - MethodMap20_method["method"] - end - subgraph MethodFilter10["fu_write_filter MethodFilter"] - MethodFilter10_method["method"] - end - subgraph MethodMap21["fu_read_map MethodMap"] - MethodMap21_method["method"] - end + subgraph CSRRegister10["priv_mode CSRRegister"] + CSRRegister10_read["read"] + CSRRegister10_write["write"] end - subgraph CSRRegister11["priv_mode CSRRegister"] + subgraph CSRRegister11["mstatus_mie CSRRegister"] CSRRegister11_write["write"] + CSRRegister11__internal_fu_read["_internal_fu_read"] CSRRegister11_read["read"] + CSRRegister11__internal_fu_write["_internal_fu_write"] + subgraph MethodMap22["fu_write_map MethodMap"] + MethodMap22_method["method"] + end + subgraph MethodFilter11["fu_write_filter MethodFilter"] + MethodFilter11_method["method"] + end + subgraph MethodMap23["fu_read_map MethodMap"] + MethodMap23_method["method"] + end end - subgraph CSRRegister12["mstatus_mie CSRRegister"] - CSRRegister12_write["write"] + subgraph CSRRegister12["mstatus_mpie CSRRegister"] CSRRegister12_read["read"] - CSRRegister12__internal_fu_write["_internal_fu_write"] + CSRRegister12_write["write"] CSRRegister12__internal_fu_read["_internal_fu_read"] + CSRRegister12__internal_fu_write["_internal_fu_write"] subgraph MethodMap24["fu_write_map MethodMap"] MethodMap24_method["method"] end @@ -814,11 +820,11 @@ MethodMap25_method["method"] end end - subgraph CSRRegister13["mstatus_mpie CSRRegister"] - CSRRegister13_write["write"] - CSRRegister13__internal_fu_write["_internal_fu_write"] - CSRRegister13_read["read"] + subgraph CSRRegister13["mstatus_mpp CSRRegister"] CSRRegister13__internal_fu_read["_internal_fu_read"] + CSRRegister13_read["read"] + CSRRegister13__internal_fu_write["_internal_fu_write"] + CSRRegister13_write["write"] subgraph MethodMap26["fu_write_map MethodMap"] MethodMap26_method["method"] end @@ -829,10 +835,9 @@ MethodMap27_method["method"] end end - subgraph CSRRegister14["mstatus_mpp CSRRegister"] - CSRRegister14_write["write"] + subgraph CSRRegister14["mstatus_mprv CSRRegister"] CSRRegister14__internal_fu_read["_internal_fu_read"] - CSRRegister14_read["read"] + CSRRegister14_write["write"] CSRRegister14__internal_fu_write["_internal_fu_write"] subgraph MethodMap28["fu_write_map MethodMap"] MethodMap28_method["method"] @@ -844,10 +849,10 @@ MethodMap29_method["method"] end end - subgraph CSRRegister15["mstatus_mprv CSRRegister"] - CSRRegister15_write["write"] + subgraph CSRRegister15["mstatus_tw CSRRegister"] CSRRegister15__internal_fu_write["_internal_fu_write"] CSRRegister15__internal_fu_read["_internal_fu_read"] + CSRRegister15_read["read"] subgraph MethodMap30["fu_write_map MethodMap"] MethodMap30_method["method"] end @@ -858,7 +863,7 @@ MethodMap31_method["method"] end end - subgraph CSRRegister16["mstatus_tw CSRRegister"] + subgraph CSRRegister16["mtvec_base CSRRegister"] CSRRegister16__internal_fu_write["_internal_fu_write"] CSRRegister16__internal_fu_read["_internal_fu_read"] CSRRegister16_read["read"] @@ -872,37 +877,43 @@ MethodMap33_method["method"] end end - end - subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] - DoubleCounterCSR_increment["increment"] - subgraph CSRRegister17["register_low CSRRegister"] - CSRRegister17_read["read"] + subgraph CSRRegister17["mtvec_mode CSRRegister"] CSRRegister17__internal_fu_read["_internal_fu_read"] - CSRRegister17_write["write"] + CSRRegister17__internal_fu_write["_internal_fu_write"] + CSRRegister17_read["read"] + subgraph MethodMap34["fu_write_map MethodMap"] + MethodMap34_method["method"] + end + subgraph MethodFilter17["fu_write_filter MethodFilter"] + MethodFilter17_method["method"] + end subgraph MethodMap35["fu_read_map MethodMap"] MethodMap35_method["method"] end end - subgraph CSRRegister18["register_high CSRRegister"] - CSRRegister18_read["read"] + end + subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] + DoubleCounterCSR_increment["increment"] + subgraph CSRRegister18["register_low CSRRegister"] CSRRegister18_write["write"] + CSRRegister18_read["read"] CSRRegister18__internal_fu_read["_internal_fu_read"] subgraph MethodMap37["fu_read_map MethodMap"] MethodMap37_method["method"] end end - end - subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] - DoubleCounterCSR1_increment["increment"] - subgraph CSRRegister19["register_low CSRRegister"] - CSRRegister19__internal_fu_read["_internal_fu_read"] - CSRRegister19_write["write"] + subgraph CSRRegister19["register_high CSRRegister"] CSRRegister19_read["read"] + CSRRegister19_write["write"] + CSRRegister19__internal_fu_read["_internal_fu_read"] subgraph MethodMap39["fu_read_map MethodMap"] MethodMap39_method["method"] end end - subgraph CSRRegister20["register_high CSRRegister"] + end + subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] + DoubleCounterCSR1_increment["increment"] + subgraph CSRRegister20["register_low CSRRegister"] CSRRegister20_read["read"] CSRRegister20__internal_fu_read["_internal_fu_read"] CSRRegister20_write["write"] @@ -910,33 +921,25 @@ MethodMap41_method["method"] end end + subgraph CSRRegister21["register_high CSRRegister"] + CSRRegister21_write["write"] + CSRRegister21_read["read"] + CSRRegister21__internal_fu_read["_internal_fu_read"] + subgraph MethodMap43["fu_read_map MethodMap"] + MethodMap43_method["method"] + end + end end end subgraph InternalInterruptController["interrupt_controller InternalInterruptController"] - InternalInterruptController_entry["entry"] - InternalInterruptController_mret["mret"] InternalInterruptController_InternalInterruptController["InternalInterruptController"] - InternalInterruptController_interrupt_cause["interrupt_cause"] + InternalInterruptController_mret["mret"] InternalInterruptController_InternalInterruptController1["InternalInterruptController"] InternalInterruptController_InternalInterruptController2["InternalInterruptController"] - subgraph CSRRegister21["mie CSRRegister"] - CSRRegister21__internal_fu_read["_internal_fu_read"] - CSRRegister21__internal_fu_write["_internal_fu_write"] - CSRRegister21_read["read"] - subgraph MethodMap42["fu_write_map MethodMap"] - MethodMap42_method["method"] - end - subgraph MethodFilter21["fu_write_filter MethodFilter"] - MethodFilter21_method["method"] - end - subgraph MethodMap43["fu_read_map MethodMap"] - MethodMap43_method["method"] - end - end - subgraph CSRRegister22["mip CSRRegister"] - CSRRegister22_read_comb["read_comb"] + InternalInterruptController_entry["entry"] + InternalInterruptController_interrupt_cause["interrupt_cause"] + subgraph CSRRegister22["mie CSRRegister"] CSRRegister22__internal_fu_read["_internal_fu_read"] - CSRRegister22_write["write"] CSRRegister22_read["read"] CSRRegister22__internal_fu_write["_internal_fu_write"] subgraph MethodMap44["fu_write_map MethodMap"] @@ -949,6 +952,22 @@ MethodMap45_method["method"] end end + subgraph CSRRegister23["mip CSRRegister"] + CSRRegister23_read["read"] + CSRRegister23__internal_fu_write["_internal_fu_write"] + CSRRegister23__internal_fu_read["_internal_fu_read"] + CSRRegister23_read_comb["read_comb"] + CSRRegister23_write["write"] + subgraph MethodMap46["fu_write_map MethodMap"] + MethodMap46_method["method"] + end + subgraph MethodFilter23["fu_write_filter MethodFilter"] + MethodFilter23_method["method"] + end + subgraph MethodMap47["fu_read_map MethodMap"] + MethodMap47_method["method"] + end + end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] CoreInstructionCounter_decrement["decrement"] @@ -959,29 +978,29 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO12["alloc_rename_buf FIFO"] - FIFO12_read["read"] FIFO12_write["write"] + FIFO12_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph Connect["rename_out_buf Connect"] - Connect_read["read"] Connect_write["write"] + Connect_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO13["reg_alloc_out_buf FIFO"] - FIFO13_read["read"] FIFO13_write["write"] + FIFO13_read["read"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO14["rs_select_out_buf FIFO"] - FIFO14_write["write"] FIFO14_read["read"] + FIFO14_write["write"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] @@ -1014,86 +1033,86 @@ ConnectTrans16_ConnectTrans["ConnectTrans"] end subgraph Retirement["retirement Retirement"] - Retirement_Retirement_cond0["Retirement_cond0"] + Retirement_core_state["core_state"] Retirement_Retirement["Retirement"] + Retirement_precommit["precommit"] Retirement_Retirement1["Retirement"] - Retirement_Retirement_cond1["Retirement_cond1"] - Retirement_core_state["core_state"] Retirement_Retirement2["Retirement"] - Retirement_precommit["precommit"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement3["Retirement"] + Retirement_Retirement_cond0["Retirement_cond0"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] - subgraph CSRRegister23["register_low CSRRegister"] - CSRRegister23__internal_fu_read["_internal_fu_read"] - CSRRegister23_write["write"] - CSRRegister23_read["read"] - subgraph MethodMap47["fu_read_map MethodMap"] - MethodMap47_method["method"] - end - end - subgraph CSRRegister24["register_high CSRRegister"] + subgraph CSRRegister24["register_low CSRRegister"] CSRRegister24_read["read"] - CSRRegister24__internal_fu_read["_internal_fu_read"] CSRRegister24_write["write"] + CSRRegister24__internal_fu_read["_internal_fu_read"] subgraph MethodMap49["fu_read_map MethodMap"] MethodMap49_method["method"] end end + subgraph CSRRegister25["register_high CSRRegister"] + CSRRegister25_read["read"] + CSRRegister25_write["write"] + CSRRegister25__internal_fu_read["_internal_fu_read"] + subgraph MethodMap51["fu_read_map MethodMap"] + MethodMap51_method["method"] + end + end end subgraph HwCounter9["perf_instr_ret HwCounter"] HwCounter9__incr["_incr"] end subgraph FIFOLatencyMeasurer2["perf_trap_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer2__stop["_stop"] FIFOLatencyMeasurer2__start["_start"] + FIFOLatencyMeasurer2__stop["_stop"] subgraph HwExpHistogram11["histogram HwExpHistogram"] HwExpHistogram11__add["_add"] end subgraph FIFO15["fifo FIFO"] - FIFO15_read["read"] FIFO15_write["write"] + FIFO15_read["read"] end end end end end subgraph TransactionManager["transaction_manager TransactionManager"] - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit["PrivilegedFuncUnit_cond1_PrivilegedFuncUnit"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] - TransactionManager_Renaming_ROBAllocation["Renaming_ROBAllocation"] - TransactionManager_accept_cond1_ConnectTrans["accept_cond1_ConnectTrans"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_ROBAllocation_Renaming["ROBAllocation_Renaming"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_PrivilegedFuncUnit_cond0"] + TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit["PrivilegedFuncUnit_cond2_PrivilegedFuncUnit"] TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0["Fetch_Stage2_Fetch_Stage2_cond0"] TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1["Fetch_Stage2_Fetch_Stage2_cond1"] - TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit["PrivilegedFuncUnit_cond0_PrivilegedFuncUnit"] - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit["PrivilegedFuncUnit_cond2_PrivilegedFuncUnit"] - TransactionManager_Retirement_cond0_Retirement["Retirement_cond0_Retirement"] - TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_PrivilegedFuncUnit_cond1"] + TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"] TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"] - TransactionManager_accept_cond0_ConnectTrans_accept_cond0["accept_cond0_ConnectTrans_accept_cond0"] - TransactionManager_accept_cond1_accept_cond0_ConnectTrans["accept_cond1_accept_cond0_ConnectTrans"] - TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit["PrivilegedFuncUnit_cond3_PrivilegedFuncUnit"] + TransactionManager_accept_cond0_accept_cond0_ConnectTrans["accept_cond0_accept_cond0_ConnectTrans"] + TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] + TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] + TransactionManager_accept_cond0_accept_cond1_ConnectTrans["accept_cond0_accept_cond1_ConnectTrans"] + TransactionManager_accept_cond1_ConnectTrans["accept_cond1_ConnectTrans"] end end Core_InitFreeRFFifo --> BasicFifo5_write -Retirement_Retirement1 --> BasicFifo5_write +Retirement_Retirement3 --> BasicFifo5_write TransactionManager_Retirement_cond1_Retirement --> BasicFifo5_write -TransactionManager_Retirement_cond0_Retirement --> BasicFifo5_write +TransactionManager_Retirement_Retirement_cond0 --> BasicFifo5_write WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write FIFO4_read --> CoreFrontend_DiscardBranchVerify -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMasterAdapter_request_read -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Serializer_serialize_in0 -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> BasicFifo_write -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMaster_request -WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller -Serializer_serialize_out0 --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller -BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller -WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller -Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Forwarder2_write -ICache_ICache1 <--> HwCounter4__incr +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_serialize_in0 +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request +WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 +Serializer_serialize_out0 --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 +BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 +WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 +Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Forwarder2_write +ICache_ICache <--> HwCounter4__incr ArgumentsToResultsZipper_peek_arg --> ICache_MemRead BasicFifo3_peek --> ICache_MemRead ICache_MemRead <--> HwCounter1__incr @@ -1101,9 +1120,9 @@ ICache_MemRead --> Forwarder3_write ICache_MemRead <--> HwCounter2__incr ICache_MemRead --> SimpleCommonBusCacheRefiller_start_refill -SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache -Forwarder2_read --> ICache_ICache -ICache_ICache <--> HwCounter3__incr +SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache1 +Forwarder2_read --> ICache_ICache1 +ICache_ICache1 <--> HwCounter3__incr FetchUnit_Fetch_Stage0 <--> Semaphore_acquire FetchUnit_Fetch_Stage0 --> ICache_issue_req FetchUnit_Fetch_Stage0 <--> HwCounter__incr @@ -1129,61 +1148,61 @@ RegisterFile_perf --> HwExpHistogram2__add ReorderBuffer_perf --> HwExpHistogram4__add GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment -CSRRegister17_read --> GenericCSRRegisters_GenericCSRRegisters -GenericCSRRegisters_GenericCSRRegisters --> CSRRegister17_write CSRRegister18_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister18_write -GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR1_increment CSRRegister19_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister19_write +GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR1_increment CSRRegister20_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister20_write -CSRRegister12_read --> InternalInterruptController_InternalInterruptController -CSRRegister12_read --> InternalInterruptController_InternalInterruptController1 -CSRRegister11_read --> InternalInterruptController_InternalInterruptController +CSRRegister21_read --> GenericCSRRegisters_GenericCSRRegisters +GenericCSRRegisters_GenericCSRRegisters --> CSRRegister21_write CSRRegister11_read --> InternalInterruptController_InternalInterruptController1 -CSRRegister11_read --> WakeupSelect3_WakeupSelect -CSRRegister11_read --> CSRUnit_CSRUnit -CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit -CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit -CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit -CSRRegister11_read --> TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit -CSRRegister21_read --> InternalInterruptController_InternalInterruptController -CSRRegister22_read --> InternalInterruptController_InternalInterruptController -CSRRegister22_read_comb --> InternalInterruptController_InternalInterruptController2 -InternalInterruptController_InternalInterruptController2 --> CSRRegister22_write -InternalInterruptController_InternalInterruptController1 --> CSRRegister12_write -InternalInterruptController_InternalInterruptController1 --> CSRRegister13_write -InternalInterruptController_InternalInterruptController1 --> CSRRegister14_write -InternalInterruptController_InternalInterruptController1 --> CSRRegister11_write -CSRRegister13_read --> InternalInterruptController_InternalInterruptController1 -CSRRegister14_read --> InternalInterruptController_InternalInterruptController1 -InternalInterruptController_InternalInterruptController1 --> CSRRegister15_write +CSRRegister11_read --> InternalInterruptController_InternalInterruptController +CSRRegister10_read --> InternalInterruptController_InternalInterruptController1 +CSRRegister10_read --> InternalInterruptController_InternalInterruptController +CSRRegister10_read --> WakeupSelect3_WakeupSelect +CSRRegister10_read --> CSRUnit_CSRUnit +CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 +CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 +CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit +CSRRegister22_read --> InternalInterruptController_InternalInterruptController1 +CSRRegister23_read --> InternalInterruptController_InternalInterruptController1 +CSRRegister23_read_comb --> InternalInterruptController_InternalInterruptController2 +InternalInterruptController_InternalInterruptController2 --> CSRRegister23_write +InternalInterruptController_InternalInterruptController --> CSRRegister11_write +InternalInterruptController_InternalInterruptController --> CSRRegister12_write +InternalInterruptController_InternalInterruptController --> CSRRegister13_write +InternalInterruptController_InternalInterruptController --> CSRRegister10_write +CSRRegister12_read --> InternalInterruptController_InternalInterruptController +CSRRegister13_read --> InternalInterruptController_InternalInterruptController +InternalInterruptController_InternalInterruptController --> CSRRegister14_write MethodProduct1_method --> RegAllocation_RegAllocation Pipe1_read --> RegAllocation_RegAllocation RegAllocation_RegAllocation <--> CoreInstructionCounter_increment BasicFifo5_read --> RegAllocation_RegAllocation RegAllocation_RegAllocation --> FIFO12_write -FIFO13_read --> RSSelection_RSSelection -FIFO13_read --> RSSelection_RSSelection3 FIFO13_read --> RSSelection_RSSelection1 +FIFO13_read --> RSSelection_RSSelection3 FIFO13_read --> RSSelection_RSSelection2 -RSFuncBlock_select --> RSSelection_RSSelection -RS_select --> RSSelection_RSSelection -RSSelection_RSSelection --> FIFO14_write -RSSelection_RSSelection3 --> FIFO14_write +FIFO13_read --> RSSelection_RSSelection +RSFuncBlock_select --> RSSelection_RSSelection1 +RS_select --> RSSelection_RSSelection1 RSSelection_RSSelection1 --> FIFO14_write +RSSelection_RSSelection3 --> FIFO14_write RSSelection_RSSelection2 --> FIFO14_write +RSSelection_RSSelection --> FIFO14_write RSFuncBlock1_select --> RSSelection_RSSelection3 RS1_select --> RSSelection_RSSelection3 -RSFuncBlock2_select --> RSSelection_RSSelection1 -FifoRS_select --> RSSelection_RSSelection1 -RSSelection_RSSelection2 <--> CSRUnit_select +RSFuncBlock2_select --> RSSelection_RSSelection2 +FifoRS_select --> RSSelection_RSSelection2 +RSSelection_RSSelection <--> CSRUnit_select FIFO14_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion Retirement_core_state --> RSInsertion_RSInsertion -Retirement_core_state --> LSUDummy_LSUDummy +Retirement_core_state --> LSUDummy_LSUDummy3 RSInsertion_RSInsertion --> RSFuncBlock_insert RSInsertion_RSInsertion --> RS_insert RSInsertion_RSInsertion --> TaggedLatencyMeasurer1__start @@ -1227,7 +1246,7 @@ ResultAnnouncement_ResultAnnouncement --> FifoRS_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update RS_perf --> HwExpHistogram6__add -RS_RS2 --> WakeupSelect_WakeupSelect +RS_RS4 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -1259,17 +1278,17 @@ WakeupSelect2_WakeupSelect <--> CoreFrontend_target_pred_req WakeupSelect2_WakeupSelect --> BasicFifo7_write WakeupSelect2_WakeupSelect --> TaggedCounter5__incr -RS_RS3 --> WakeupSelect3_WakeupSelect +RS_RS2 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> BasicFifo6_write ConnectTrans8_ConnectTrans --> BasicFifo6_write ConnectTrans10_ConnectTrans --> BasicFifo6_write ConnectTrans5_ConnectTrans --> BasicFifo6_write -TransactionManager_accept_cond0_ConnectTrans_accept_cond0 --> BasicFifo6_write +TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> BasicFifo6_write +TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> BasicFifo6_write TransactionManager_accept_cond1_ConnectTrans --> BasicFifo6_write -TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> BasicFifo6_write WakeupSelect3_WakeupSelect --> FIFO5_write -RS_RS4 --> WakeupSelect4_WakeupSelect +RS_RS3 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans6_ConnectTrans --> Forwarder5_write ConnectTrans7_ConnectTrans --> Forwarder5_write @@ -1289,14 +1308,14 @@ ExceptionFuncUnit_accept --> ConnectTrans9_ConnectTrans FIFO5_read --> ConnectTrans9_ConnectTrans PrivilegedFuncUnit_accept --> ConnectTrans10_ConnectTrans -CSRRegister8_read --> ConnectTrans10_ConnectTrans +CSRRegister7_read --> ConnectTrans10_ConnectTrans ConnectTrans10_ConnectTrans --> BasicFifo8_write RS1_perf --> HwExpHistogram8__add SequentialUnsignedMul_accept --> MulUnit_MulUnit FIFO7_read --> MulUnit_MulUnit MulUnit_MulUnit --> FIFO6_write RecursiveWithSingleDSPMul_RecursiveWithSingleDSPMul <--> DSPMulUnit_compute -RS1_RS --> WakeupSelect5_WakeupSelect +RS1_RS1 --> WakeupSelect5_WakeupSelect RS1_take --> WakeupSelect5_WakeupSelect RS1_take --> WakeupSelect6_WakeupSelect WakeupSelect5_WakeupSelect --> TaggedLatencyMeasurer2__stop @@ -1311,7 +1330,7 @@ LongDivider_accept --> DivUnit_DivUnit FIFO8_read --> DivUnit_DivUnit DivUnit_DivUnit --> BasicFifo9_write -RS1_RS1 --> WakeupSelect6_WakeupSelect +RS1_RS --> WakeupSelect6_WakeupSelect WakeupSelect6_WakeupSelect --> DivUnit_issue WakeupSelect6_WakeupSelect --> FIFO8_write WakeupSelect6_WakeupSelect --> LongDivider_issue @@ -1323,35 +1342,35 @@ BasicFifo9_read --> ConnectTrans12_ConnectTrans FifoRS_perf --> HwExpHistogram10__add Forwarder7_read --> LSUDummy_LSUDummy1 -Forwarder7_read --> TransactionManager_LSUDummy_issue_cond2 -Forwarder7_read --> TransactionManager_LSUDummy_issue_cond0 -Forwarder7_read --> TransactionManager_LSUDummy_issue_cond1 +Forwarder7_read --> TransactionManager_issue_cond1_LSUDummy +Forwarder7_read --> TransactionManager_issue_cond0_LSUDummy +Forwarder7_read --> TransactionManager_issue_cond2_LSUDummy LSUDummy_LSUDummy1 --> FIFO9_write WakeupSelect7_WakeupSelect --> FIFO9_write -TransactionManager_LSUDummy_issue_cond2 --> FIFO9_write -TransactionManager_LSUDummy_issue_cond0 --> FIFO9_write -TransactionManager_LSUDummy_issue_cond1 --> FIFO9_write +TransactionManager_issue_cond1_LSUDummy --> FIFO9_write +TransactionManager_issue_cond0_LSUDummy --> FIFO9_write +TransactionManager_issue_cond2_LSUDummy --> FIFO9_write LSUDummy_LSUDummy1 --> FIFO11_write WakeupSelect7_WakeupSelect --> FIFO11_write -TransactionManager_LSUDummy_issue_cond2 --> FIFO11_write -TransactionManager_LSUDummy_issue_cond0 --> FIFO11_write -TransactionManager_LSUDummy_issue_cond1 --> FIFO11_write +TransactionManager_issue_cond1_LSUDummy --> FIFO11_write +TransactionManager_issue_cond0_LSUDummy --> FIFO11_write +TransactionManager_issue_cond2_LSUDummy --> FIFO11_write LSUDummy_LSUDummy2 --> Retirement_precommit CSRUnit_CSRUnit --> Retirement_precommit -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit --> Retirement_precommit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> Retirement_precommit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> Retirement_precommit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 --> Retirement_precommit TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit --> Retirement_precommit -TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit --> Retirement_precommit -TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit --> Retirement_precommit ReorderBuffer_peek --> LSUDummy_LSUDummy2 ReorderBuffer_peek --> CSRUnit_CSRUnit -ReorderBuffer_peek --> Retirement_Retirement -ReorderBuffer_peek --> Retirement_Retirement1 -ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit -ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement +ReorderBuffer_peek --> Retirement_Retirement2 +ReorderBuffer_peek --> Retirement_Retirement3 +ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 +ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit -ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit -ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit -ReorderBuffer_peek --> TransactionManager_Retirement_cond0_Retirement +ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement +ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 FifoRS_FifoRS --> WakeupSelect7_WakeupSelect FifoRS_take --> WakeupSelect7_WakeupSelect WakeupSelect7_WakeupSelect --> TaggedLatencyMeasurer3__stop @@ -1375,6 +1394,8 @@ MethodMap11_method --> CSRUnit_CSRUnit CSRRegister5__internal_fu_read --> CSRUnit_CSRUnit AliasedCSR__fu_read --> CSRUnit_CSRUnit +MethodMap23_method --> CSRUnit_CSRUnit +CSRRegister11__internal_fu_read --> CSRUnit_CSRUnit MethodMap25_method --> CSRUnit_CSRUnit CSRRegister12__internal_fu_read --> CSRUnit_CSRUnit MethodMap27_method --> CSRUnit_CSRUnit @@ -1383,9 +1404,10 @@ CSRRegister14__internal_fu_read --> CSRUnit_CSRUnit MethodMap31_method --> CSRUnit_CSRUnit CSRRegister15__internal_fu_read --> CSRUnit_CSRUnit -MethodMap33_method --> CSRUnit_CSRUnit -CSRRegister16__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR__fu_write +CSRUnit_CSRUnit --> MethodFilter11_method +CSRUnit_CSRUnit --> MethodMap22_method +CSRUnit_CSRUnit --> CSRRegister11__internal_fu_write CSRUnit_CSRUnit --> MethodFilter12_method CSRUnit_CSRUnit --> MethodMap24_method CSRUnit_CSRUnit --> CSRRegister12__internal_fu_write @@ -1398,9 +1420,6 @@ CSRUnit_CSRUnit --> MethodFilter15_method CSRUnit_CSRUnit --> MethodMap30_method CSRUnit_CSRUnit --> CSRRegister15__internal_fu_write -CSRUnit_CSRUnit --> MethodFilter16_method -CSRUnit_CSRUnit --> MethodMap32_method -CSRUnit_CSRUnit --> CSRRegister16__internal_fu_write AliasedCSR1__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> AliasedCSR1__fu_write MethodMap13_method --> CSRUnit_CSRUnit @@ -1408,6 +1427,18 @@ CSRUnit_CSRUnit --> MethodFilter6_method CSRUnit_CSRUnit --> MethodMap12_method CSRUnit_CSRUnit --> CSRRegister6__internal_fu_write +AliasedCSR2__fu_read --> CSRUnit_CSRUnit +MethodMap33_method --> CSRUnit_CSRUnit +CSRRegister16__internal_fu_read --> CSRUnit_CSRUnit +MethodMap35_method --> CSRUnit_CSRUnit +CSRRegister17__internal_fu_read --> CSRUnit_CSRUnit +CSRUnit_CSRUnit --> AliasedCSR2__fu_write +CSRUnit_CSRUnit --> MethodFilter16_method +CSRUnit_CSRUnit --> MethodMap32_method +CSRUnit_CSRUnit --> CSRRegister16__internal_fu_write +CSRUnit_CSRUnit --> MethodFilter17_method +CSRUnit_CSRUnit --> MethodMap34_method +CSRUnit_CSRUnit --> CSRRegister17__internal_fu_write MethodMap15_method --> CSRUnit_CSRUnit CSRRegister7__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter7_method @@ -1423,13 +1454,6 @@ CSRUnit_CSRUnit --> MethodFilter9_method CSRUnit_CSRUnit --> MethodMap18_method CSRUnit_CSRUnit --> CSRRegister9__internal_fu_write -MethodMap21_method --> CSRUnit_CSRUnit -CSRRegister10__internal_fu_read --> CSRUnit_CSRUnit -CSRUnit_CSRUnit --> MethodFilter10_method -CSRUnit_CSRUnit --> MethodMap20_method -CSRUnit_CSRUnit --> CSRRegister10__internal_fu_write -MethodMap35_method --> CSRUnit_CSRUnit -CSRRegister17__internal_fu_read --> CSRUnit_CSRUnit MethodMap37_method --> CSRUnit_CSRUnit CSRRegister18__internal_fu_read --> CSRUnit_CSRUnit MethodMap39_method --> CSRUnit_CSRUnit @@ -1438,9 +1462,6 @@ CSRRegister20__internal_fu_read --> CSRUnit_CSRUnit MethodMap43_method --> CSRUnit_CSRUnit CSRRegister21__internal_fu_read --> CSRUnit_CSRUnit -CSRUnit_CSRUnit --> MethodFilter21_method -CSRUnit_CSRUnit --> MethodMap42_method -CSRUnit_CSRUnit --> CSRRegister21__internal_fu_write MethodMap45_method --> CSRUnit_CSRUnit CSRRegister22__internal_fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> MethodFilter22_method @@ -1448,8 +1469,13 @@ CSRUnit_CSRUnit --> CSRRegister22__internal_fu_write MethodMap47_method --> CSRUnit_CSRUnit CSRRegister23__internal_fu_read --> CSRUnit_CSRUnit +CSRUnit_CSRUnit --> MethodFilter23_method +CSRUnit_CSRUnit --> MethodMap46_method +CSRUnit_CSRUnit --> CSRRegister23__internal_fu_write MethodMap49_method --> CSRUnit_CSRUnit CSRRegister24__internal_fu_read --> CSRUnit_CSRUnit +MethodMap51_method --> CSRUnit_CSRUnit +CSRRegister25__internal_fu_read --> CSRUnit_CSRUnit ConnectTrans2_ConnectTrans --> Forwarder4_write ConnectTrans3_ConnectTrans --> Forwarder4_write ConnectTrans4_ConnectTrans --> Forwarder4_write @@ -1464,129 +1490,107 @@ Collector3_method --> ConnectTrans4_ConnectTrans Forwarder8_read --> ConnectTrans4_ConnectTrans CSRUnit_get_result --> ConnectTrans5_ConnectTrans -ExceptionInformationRegister_get --> Retirement_Retirement +ExceptionInformationRegister_get --> Retirement_Retirement2 ExceptionInformationRegister_get --> TransactionManager_Retirement_cond1_Retirement -ExceptionInformationRegister_get --> TransactionManager_Retirement_cond0_Retirement -Retirement_Retirement1 <--> ReorderBuffer_retire +ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond0 +Retirement_Retirement3 <--> ReorderBuffer_retire TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire -TransactionManager_Retirement_cond0_Retirement <--> ReorderBuffer_retire -Retirement_Retirement1 <--> FIFOLatencyMeasurer1__stop +TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire +Retirement_Retirement3 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer1__stop -TransactionManager_Retirement_cond0_Retirement <--> FIFOLatencyMeasurer1__stop -FIFO1_read --> Retirement_Retirement1 +TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1__stop +FIFO1_read --> Retirement_Retirement3 FIFO1_read --> TransactionManager_Retirement_cond1_Retirement -FIFO1_read --> TransactionManager_Retirement_cond0_Retirement -Retirement_Retirement1 --> HwExpHistogram3__add +FIFO1_read --> TransactionManager_Retirement_Retirement_cond0 +Retirement_Retirement3 --> HwExpHistogram3__add TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram3__add -TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram3__add -CoreInstructionCounter_decrement --> Retirement_Retirement1 +TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram3__add +CoreInstructionCounter_decrement --> Retirement_Retirement3 CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement -CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond0_Retirement -RRAT_peek --> Retirement_Retirement1 +CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 +RRAT_peek --> Retirement_Retirement3 RRAT_peek --> TransactionManager_Retirement_cond1_Retirement -Retirement_Retirement1 --> RegisterFile_free +Retirement_Retirement3 --> RegisterFile_free TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free -TransactionManager_Retirement_cond0_Retirement --> RegisterFile_free -Retirement_Retirement1 --> TaggedLatencyMeasurer__stop +TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free +Retirement_Retirement3 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_cond1_Retirement --> TaggedLatencyMeasurer__stop -TransactionManager_Retirement_cond0_Retirement --> TaggedLatencyMeasurer__stop -AsyncMemoryBank_read0 --> Retirement_Retirement1 +TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer__stop +AsyncMemoryBank_read0 --> Retirement_Retirement3 AsyncMemoryBank_read0 --> TransactionManager_Retirement_cond1_Retirement -AsyncMemoryBank_read0 --> TransactionManager_Retirement_cond0_Retirement -Retirement_Retirement1 --> HwExpHistogram1__add +AsyncMemoryBank_read0 --> TransactionManager_Retirement_Retirement_cond0 +Retirement_Retirement3 --> HwExpHistogram1__add TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add -TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram1__add -Retirement_Retirement1 --> FRAT_rename +TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add +Retirement_Retirement3 --> FRAT_rename +TransactionManager_ROBAllocation_Renaming --> FRAT_rename TransactionManager_Retirement_cond1_Retirement --> FRAT_rename -TransactionManager_Renaming_ROBAllocation --> FRAT_rename -Retirement_Retirement3 <--> FIFOLatencyMeasurer2__stop -FIFO15_read --> Retirement_Retirement3 -Retirement_Retirement3 --> HwExpHistogram11__add -CSRRegister7_read --> Retirement_Retirement3 -Retirement_Retirement3 --> FetchUnit_resume_from_exception -Retirement_Retirement3 <--> ExceptionInformationRegister_clear -TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy3 -TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy3 -TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy3 -TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond2 --> BasicFifo10_write -TransactionManager_LSUDummy_issue_cond0 --> BasicFifo10_write -TransactionManager_LSUDummy_issue_cond1 --> BasicFifo10_write -TransactionManager_LSUDummy_issue_cond2 --> FIFO10_write -TransactionManager_LSUDummy_issue_cond0 --> FIFO10_write -TransactionManager_LSUDummy_issue_cond1 --> FIFO10_write -TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> ICache_flush -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit +Retirement_Retirement1 <--> FIFOLatencyMeasurer2__stop +FIFO15_read --> Retirement_Retirement1 +Retirement_Retirement1 --> HwExpHistogram11__add +CSRRegister16_read --> Retirement_Retirement1 +CSRRegister17_read --> Retirement_Retirement1 +CSRRegister6_read --> Retirement_Retirement1 +Retirement_Retirement1 --> FetchUnit_resume_from_exception +Retirement_Retirement1 <--> ExceptionInformationRegister_clear +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit -TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit -TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit --> TaggedCounter6__incr +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> TaggedCounter6__incr +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> TaggedCounter6__incr +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 --> TaggedCounter6__incr TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit --> TaggedCounter6__incr -TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit --> TaggedCounter6__incr -TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit --> TaggedCounter6__incr -CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit -CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit -CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit -CSRRegister16_read --> TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit -TransactionManager_accept_cond0_ConnectTrans_accept_cond0 <--> LSUDummy_accept_cond0 -TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 -LSURequester_accept --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -LSURequester_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -BasicFifo10_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -BasicFifo10_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -FIFO10_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -FIFO10_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_accept_cond0_ConnectTrans_accept_cond0 <--> ConnectTrans13_ConnectTrans +CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 +CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 +CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 +TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 +TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read +TransactionManager_issue_cond1_LSUDummy --> Serializer1_serialize_in0 +TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write +TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write +TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request +TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request +TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy +TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy +TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy +TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond1_LSUDummy --> BasicFifo10_write +TransactionManager_issue_cond0_LSUDummy --> BasicFifo10_write +TransactionManager_issue_cond2_LSUDummy --> BasicFifo10_write +TransactionManager_issue_cond1_LSUDummy --> FIFO10_write +TransactionManager_issue_cond0_LSUDummy --> FIFO10_write +TransactionManager_issue_cond2_LSUDummy --> FIFO10_write +TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond0 +TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 +LSURequester_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +LSURequester_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +BasicFifo10_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +BasicFifo10_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +FIFO10_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +FIFO10_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSURequester_accept_cond1 +WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +Serializer1_serialize_out0 --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +Forwarder1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +Forwarder1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> ConnectTrans13_ConnectTrans +TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> ConnectTrans13_ConnectTrans TransactionManager_accept_cond1_ConnectTrans <--> ConnectTrans13_ConnectTrans -TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> ConnectTrans13_ConnectTrans -TransactionManager_accept_cond0_ConnectTrans_accept_cond0 --> Forwarder8_write +TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> Forwarder8_write +TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> Forwarder8_write TransactionManager_accept_cond1_ConnectTrans --> Forwarder8_write -TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> Forwarder8_write -LSUDummy_accept --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 +LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans LSUDummy_accept --> TransactionManager_accept_cond1_ConnectTrans -LSUDummy_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_accept_cond0_ConnectTrans_accept_cond0 <--> LSURequester_accept_cond0 -WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -Serializer1_serialize_out1 --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -BasicFifo1_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -BasicFifo1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -WishboneMaster1_result --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -WishboneMaster1_result --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -Forwarder1_read --> TransactionManager_accept_cond0_ConnectTrans_accept_cond0 -Forwarder1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 -TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement2 -TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement2 -TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer2__start -TransactionManager_Retirement_cond0_Retirement <--> FIFOLatencyMeasurer2__start -TransactionManager_Retirement_cond1_Retirement --> FIFO15_write -TransactionManager_Retirement_cond0_Retirement --> FIFO15_write -InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond1_Retirement -InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond0_Retirement -TransactionManager_Retirement_cond1_Retirement --> CSRRegister6_write -TransactionManager_Retirement_cond0_Retirement --> CSRRegister6_write -TransactionManager_Retirement_cond1_Retirement --> CSRRegister8_write -TransactionManager_Retirement_cond0_Retirement --> CSRRegister8_write -TransactionManager_Retirement_cond1_Retirement --> CSRRegister9_write -TransactionManager_Retirement_cond0_Retirement --> CSRRegister9_write -TransactionManager_Retirement_cond1_Retirement <--> InternalInterruptController_entry -TransactionManager_Retirement_cond0_Retirement <--> InternalInterruptController_entry -TransactionManager_Renaming_ROBAllocation <--> Renaming_Renaming -FIFO12_read --> TransactionManager_Renaming_ROBAllocation -TransactionManager_Renaming_ROBAllocation --> Connect_write -TransactionManager_Renaming_ROBAllocation <--> ROBAllocation_ROBAllocation -Connect_read --> TransactionManager_Renaming_ROBAllocation -TransactionManager_Renaming_ROBAllocation --> ReorderBuffer_put -TransactionManager_Renaming_ROBAllocation <--> FIFOLatencyMeasurer1__start -TransactionManager_Renaming_ROBAllocation --> FIFO1_write -TransactionManager_Renaming_ROBAllocation --> FIFO13_write -TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 -TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 -TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> InternalInterruptController_mret TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2 TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> Semaphore_release @@ -1607,32 +1611,56 @@ TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> HwCounter5__incr TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter__incr TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Serializer_write +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> ICache_flush +TransactionManager_ROBAllocation_Renaming <--> ROBAllocation_ROBAllocation +Connect_read --> TransactionManager_ROBAllocation_Renaming +TransactionManager_ROBAllocation_Renaming --> ReorderBuffer_put +TransactionManager_ROBAllocation_Renaming <--> FIFOLatencyMeasurer1__start +TransactionManager_ROBAllocation_Renaming --> FIFO1_write +TransactionManager_ROBAllocation_Renaming --> FIFO13_write +TransactionManager_ROBAllocation_Renaming <--> Renaming_Renaming +FIFO12_read --> TransactionManager_ROBAllocation_Renaming +TransactionManager_ROBAllocation_Renaming --> Connect_write +TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 +TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write +TransactionManager_issue_cond0_LSUDummy --> Serializer1_serialize_in1 +TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSURequester_accept_cond0 +WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +Serializer1_serialize_out1 --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 <--> InternalInterruptController_mret +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 +TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 +TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 +TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 +TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement +TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer2__start +TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer2__start +TransactionManager_Retirement_cond1_Retirement --> FIFO15_write +TransactionManager_Retirement_Retirement_cond0 --> FIFO15_write +InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond1_Retirement +InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond0 +TransactionManager_Retirement_cond1_Retirement --> CSRRegister6_write +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister6_write +TransactionManager_Retirement_cond1_Retirement --> CSRRegister7_write +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister7_write +TransactionManager_Retirement_cond1_Retirement --> CSRRegister8_write +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write +TransactionManager_Retirement_cond1_Retirement <--> InternalInterruptController_entry +TransactionManager_Retirement_Retirement_cond0 <--> InternalInterruptController_entry TransactionManager_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond1 FIFO9_read --> TransactionManager_accept_cond1_ConnectTrans FIFO11_read --> TransactionManager_accept_cond1_ConnectTrans -TransactionManager_PrivilegedFuncUnit_cond3_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 -TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement_cond0 -TransactionManager_Retirement_cond0_Retirement --> RRAT_commit -TransactionManager_Retirement_cond0_Retirement <--> DoubleCounterCSR2_increment -CSRRegister23_read --> TransactionManager_Retirement_cond0_Retirement -TransactionManager_Retirement_cond0_Retirement --> CSRRegister23_write -CSRRegister24_read --> TransactionManager_Retirement_cond0_Retirement -TransactionManager_Retirement_cond0_Retirement --> CSRRegister24_write -TransactionManager_Retirement_cond0_Retirement <--> HwCounter9__incr -TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 -TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 -TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write -TransactionManager_LSUDummy_issue_cond0 --> Serializer1_serialize_in1 -TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request -TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request -TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSURequester_accept_cond1 -WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -Serializer1_serialize_out0 --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 -TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read -TransactionManager_LSUDummy_issue_cond1 --> Serializer1_serialize_in0 +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 +TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit +TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment +CSRRegister24_read --> TransactionManager_Retirement_Retirement_cond0 +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister24_write +CSRRegister25_read --> TransactionManager_Retirement_Retirement_cond0 +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister25_write +TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr @@ -1643,7 +1671,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/components/icache.html b/components/icache.html index 12cdb7029..980dadc7a 100644 --- a/components/icache.html +++ b/components/icache.html @@ -130,7 +130,7 @@

Address mapping example

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.arch.html b/coreblocks.arch.html index 6c705611d..67f54df59 100644 --- a/coreblocks.arch.html +++ b/coreblocks.arch.html @@ -3922,7 +3922,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.backend.html b/coreblocks.backend.html index c765cda1c..417ac392b 100644 --- a/coreblocks.backend.html +++ b/coreblocks.backend.html @@ -164,7 +164,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.cache.html b/coreblocks.cache.html index 7b57acd45..c8396b59f 100644 --- a/coreblocks.cache.html +++ b/coreblocks.cache.html @@ -240,7 +240,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.core_structs.html b/coreblocks.core_structs.html index 2c4a4de34..73c3008aa 100644 --- a/coreblocks.core_structs.html +++ b/coreblocks.core_structs.html @@ -156,7 +156,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.frontend.decoder.html b/coreblocks.frontend.decoder.html index b3227f395..8203ee148 100644 --- a/coreblocks.frontend.decoder.html +++ b/coreblocks.frontend.decoder.html @@ -312,7 +312,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.frontend.fetch.html b/coreblocks.frontend.fetch.html index 16beffd53..8da12c38f 100644 --- a/coreblocks.frontend.fetch.html +++ b/coreblocks.frontend.fetch.html @@ -209,7 +209,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html index 1348fa00e..6789f6b2a 100644 --- a/coreblocks.frontend.html +++ b/coreblocks.frontend.html @@ -186,7 +186,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.func_blocks.fu.fpu.html b/coreblocks.func_blocks.fu.fpu.html index 5a97433c2..a6567dcf0 100644 --- a/coreblocks.func_blocks.fu.fpu.html +++ b/coreblocks.func_blocks.fu.fpu.html @@ -302,7 +302,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.func_blocks.fu.html b/coreblocks.func_blocks.fu.html index cf9335208..334ee2e60 100644 --- a/coreblocks.func_blocks.fu.html +++ b/coreblocks.func_blocks.fu.html @@ -893,7 +893,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.func_blocks.fu.lsu.html b/coreblocks.func_blocks.fu.lsu.html index 361fc09c5..71bc53e59 100644 --- a/coreblocks.func_blocks.fu.lsu.html +++ b/coreblocks.func_blocks.fu.lsu.html @@ -289,7 +289,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.func_blocks.fu.unsigned_multiplication.html b/coreblocks.func_blocks.fu.unsigned_multiplication.html index 722ee3243..54cafb054 100644 --- a/coreblocks.func_blocks.fu.unsigned_multiplication.html +++ b/coreblocks.func_blocks.fu.unsigned_multiplication.html @@ -259,7 +259,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.func_blocks.html b/coreblocks.func_blocks.html index 22e5805b6..b7e45094e 100644 --- a/coreblocks.func_blocks.html +++ b/coreblocks.func_blocks.html @@ -157,7 +157,7 @@

Subpackages

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.func_blocks.interface.html b/coreblocks.func_blocks.interface.html index 2fa1bbf56..c7b556d86 100644 --- a/coreblocks.func_blocks.interface.html +++ b/coreblocks.func_blocks.interface.html @@ -163,7 +163,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.html b/coreblocks.html index 9d3aecd10..462c1840e 100644 --- a/coreblocks.html +++ b/coreblocks.html @@ -272,7 +272,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.params.html b/coreblocks.params.html index ed1deecf5..e52f9aed2 100644 --- a/coreblocks.params.html +++ b/coreblocks.params.html @@ -831,7 +831,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html index 261f1a9f5..c47dbe224 100644 --- a/coreblocks.peripherals.html +++ b/coreblocks.peripherals.html @@ -745,7 +745,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.priv.csr.html b/coreblocks.priv.csr.html index 2b8371162..a0ac86d19 100644 --- a/coreblocks.priv.csr.html +++ b/coreblocks.priv.csr.html @@ -305,7 +305,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.priv.html b/coreblocks.priv.html index 9b8afe97f..3a6ab4f40 100644 --- a/coreblocks.priv.html +++ b/coreblocks.priv.html @@ -123,7 +123,7 @@

Subpackages

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.priv.traps.html b/coreblocks.priv.traps.html index 1568a5295..26b01f801 100644 --- a/coreblocks.priv.traps.html +++ b/coreblocks.priv.traps.html @@ -204,7 +204,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html index 98ec77617..0b81614fd 100644 --- a/coreblocks.scheduler.html +++ b/coreblocks.scheduler.html @@ -188,7 +188,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/current-graph.html b/current-graph.html index 2d61a0b42..d0cc248bb 100644 --- a/current-graph.html +++ b/current-graph.html @@ -90,29 +90,29 @@

Full transaction-method graph

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/development-environment.html b/development-environment.html index 346545a01..e347e1d3a 100644 --- a/development-environment.html +++ b/development-environment.html @@ -208,7 +208,7 @@

tprof.py

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/genindex.html b/genindex.html index 59909b863..ffc482c5d 100644 --- a/genindex.html +++ b/genindex.html @@ -3418,7 +3418,7 @@

Z

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/home.html b/home.html index 0e2abeb9c..d9d74d8eb 100644 --- a/home.html +++ b/home.html @@ -128,7 +128,7 @@

Documentation

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/index.html b/index.html index 983f9d6cb..6c7c3fd3c 100644 --- a/index.html +++ b/index.html @@ -202,7 +202,7 @@

Coreblocks

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/miscellany/exceptions-summary.html b/miscellany/exceptions-summary.html index 1fdf5b67d..645bf972d 100644 --- a/miscellany/exceptions-summary.html +++ b/miscellany/exceptions-summary.html @@ -270,7 +270,7 @@

Summary

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/modules-coreblocks.html b/modules-coreblocks.html index 469746326..e2d51efd6 100644 --- a/modules-coreblocks.html +++ b/modules-coreblocks.html @@ -178,7 +178,7 @@

coreblocks

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/problem-checklist.html b/problem-checklist.html index 787a7d213..301fef3ec 100644 --- a/problem-checklist.html +++ b/problem-checklist.html @@ -104,7 +104,7 @@

Problem checklist

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/py-modindex.html b/py-modindex.html index 562947ae9..688a4814d 100644 --- a/py-modindex.html +++ b/py-modindex.html @@ -492,7 +492,7 @@

Python Module Index

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/scheduler/overview.html b/scheduler/overview.html index eca7f3963..df287c7c7 100644 --- a/scheduler/overview.html +++ b/scheduler/overview.html @@ -145,7 +145,7 @@

More detailed description of each block

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/search.html b/search.html index 5151c90a7..e8c2aac61 100644 --- a/search.html +++ b/search.html @@ -100,7 +100,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/shared-structs/implementation/rs-impl.html b/shared-structs/implementation/rs-impl.html index c734c1c75..b23329a6d 100644 --- a/shared-structs/implementation/rs-impl.html +++ b/shared-structs/implementation/rs-impl.html @@ -251,7 +251,7 @@

Read and clean row

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/shared-structs/rs.html b/shared-structs/rs.html index 9d336b674..1076570be 100644 --- a/shared-structs/rs.html +++ b/shared-structs/rs.html @@ -221,7 +221,7 @@

External interface signals

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.

diff --git a/synthesis/synthesis.html b/synthesis/synthesis.html index 2d9b18ef0..af3ae6832 100644 --- a/synthesis/synthesis.html +++ b/synthesis/synthesis.html @@ -265,7 +265,7 @@

Regression tests manual execution

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 15:14 2024-11-25. + Last updated on 13:51 2024-11-26.