diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree index bc67edd99..6f24a444c 100644 Binary files a/.doctrees/api.doctree and b/.doctrees/api.doctree differ diff --git a/.doctrees/auto_graph.doctree b/.doctrees/auto_graph.doctree index 238dffa2b..cc0932c8b 100644 Binary files a/.doctrees/auto_graph.doctree and b/.doctrees/auto_graph.doctree differ diff --git a/.doctrees/current-graph.doctree b/.doctrees/current-graph.doctree index acc70ebf5..7dca785fe 100644 Binary files a/.doctrees/current-graph.doctree and b/.doctrees/current-graph.doctree differ diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle index d61ad87ea..827091611 100644 Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt index 6e03e683f..127e11444 100644 --- a/_sources/auto_graph.rst.txt +++ b/_sources/auto_graph.rst.txt @@ -11,54 +11,54 @@ WishboneMaster_request["request"] WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] - Forwarder_read["read"] Forwarder_write["write"] + Forwarder_read["read"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_request["request"] WishboneMaster1_result["result"] + WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] - Forwarder1_write["write"] Forwarder1_read["read"] + Forwarder1_write["write"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] - WishboneMasterAdapter_get_read_response["get_read_response"] WishboneMasterAdapter_request_read["request_read"] + WishboneMasterAdapter_get_read_response["get_read_response"] subgraph Serializer["bus_serializer Serializer"] Serializer_Serializer["Serializer"] Serializer_Serializer1["Serializer"] subgraph BasicFifo["pending_requests BasicFifo"] - BasicFifo_read["read"] BasicFifo_write["write"] + BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] - WishboneMasterAdapter1_request_read["request_read"] - WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_write_response["get_write_response"] + WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_read_response["get_read_response"] + WishboneMasterAdapter1_request_read["request_read"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] Serializer1_Serializer2["Serializer"] Serializer1_Serializer3["Serializer"] subgraph BasicFifo1["pending_requests BasicFifo"] - BasicFifo1_read["read"] BasicFifo1_write["write"] + BasicFifo1_read["read"] end end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] - CoreInstructionCounter_decrement["decrement"] CoreInstructionCounter_increment["increment"] + CoreInstructionCounter_decrement["decrement"] end subgraph FIFO["fifo_fetch FIFO"] - FIFO_write["write"] FIFO_read["read"] + FIFO_write["write"] end subgraph MethodMap["core_counter_increment_discard_map MethodMap"] MethodMap_method["method"] @@ -72,8 +72,8 @@ end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_start_refill["start_refill"] SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] + SimpleCommonBusCacheRefiller_start_refill["start_refill"] subgraph Forwarder2["address_fwd Forwarder"] Forwarder2_read["read"] Forwarder2_write["write"] @@ -83,8 +83,8 @@ ICache_accept_res["accept_res"] ICache_ICache["ICache"] ICache_ICache1["ICache"] - ICache_ICache2["ICache"] ICache_issue_req["issue_req"] + ICache_ICache2["ICache"] ICache_ICache3["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] @@ -102,8 +102,8 @@ HwCounter4__incr["_incr"] end subgraph LatencyMeasurer["req_latency LatencyMeasurer"] - LatencyMeasurer__stop["_stop"] LatencyMeasurer__start["_start"] + LatencyMeasurer__stop["_stop"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -125,21 +125,21 @@ FRAT_rename["rename"] end subgraph RRAT["RRAT RRAT"] - RRAT_peek["peek"] RRAT_commit["commit"] + RRAT_peek["peek"] end subgraph RegisterFile["RF RegisterFile"] + RegisterFile_free["free"] RegisterFile_read2["read2"] RegisterFile_read1["read1"] RegisterFile_write["write"] - RegisterFile_free["free"] end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_put["put"] - ReorderBuffer_retire["retire"] - ReorderBuffer_mark_done["mark_done"] ReorderBuffer_get_indices["get_indices"] + ReorderBuffer_retire["retire"] ReorderBuffer_peek["peek"] + ReorderBuffer_put["put"] + ReorderBuffer_mark_done["mark_done"] subgraph LatencyMeasurer1["perf_rob_wait_time LatencyMeasurer"] LatencyMeasurer1__start["_start"] LatencyMeasurer1__stop["_stop"] @@ -154,9 +154,9 @@ end subgraph Fetch["fetch Fetch"] Fetch_Fetch["Fetch"] + Fetch_resume["resume"] Fetch_Fetch1["Fetch"] Fetch_stall_exception["stall_exception"] - Fetch_resume["resume"] subgraph BasicFifo3["fetch_target_queue BasicFifo"] BasicFifo3_read["read"] BasicFifo3_write["write"] @@ -164,8 +164,8 @@ end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_clear["clear"] - ExceptionCauseRegister_get["get"] ExceptionCauseRegister_report["report"] + ExceptionCauseRegister_get["get"] subgraph BasicFifo4["fu_report_fifo BasicFifo"] BasicFifo4_write["write"] BasicFifo4_read["read"] @@ -178,8 +178,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_write["write"] Forwarder4_read["read"] + Forwarder4_write["write"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans1["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -197,20 +197,20 @@ MethodProduct1_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_insert["insert"] + RSFuncBlock_select["select"] RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] - RSFuncBlock_select["select"] + RSFuncBlock_insert["insert"] subgraph RS["rs RS"] - RS_update["update"] - RS_select["select"] RS_RS["RS"] - RS_RS1["RS"] RS_take["take"] + RS_RS1["RS"] + RS_insert["insert"] RS_RS2["RS"] RS_RS3["RS"] RS_RS4["RS"] - RS_insert["insert"] + RS_update["update"] + RS_select["select"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_accept["accept"] @@ -227,19 +227,19 @@ ShiftFuncUnit_issue["issue"] ShiftFuncUnit_accept["accept"] subgraph FIFO5["fifo FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_issue["issue"] subgraph FIFO6["fifo_branch_resolved FIFO"] - FIFO6_read["read"] FIFO6_write["write"] + FIFO6_read["read"] end subgraph HwCounter5["perf_jumps HwCounter"] HwCounter5__incr["_incr"] @@ -259,11 +259,11 @@ WakeupSelect2_WakeupSelect["WakeupSelect"] end subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"] - ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] + ExceptionFuncUnit_accept["accept"] subgraph FIFO8["fifo FIFO"] - FIFO8_read["read"] FIFO8_write["write"] + FIFO8_read["read"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] @@ -271,8 +271,8 @@ end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] PrivilegedFuncUnit_accept["accept"] - PrivilegedFuncUnit_precommit["precommit"] PrivilegedFuncUnit_issue["issue"] + PrivilegedFuncUnit_precommit["precommit"] subgraph BasicFifo5["fetch_resume_fifo BasicFifo"] BasicFifo5_write["write"] BasicFifo5_read["read"] @@ -307,36 +307,36 @@ end end subgraph LSUDummy["rs_block_1 LSUDummy"] - LSUDummy_get_result["get_result"] - LSUDummy_LSUDummy["LSUDummy"] - LSUDummy_LSUDummy1["LSUDummy"] - LSUDummy_insert["insert"] LSUDummy_select["select"] - LSUDummy_LSUDummy2["LSUDummy"] LSUDummy_update["update"] + LSUDummy_LSUDummy["LSUDummy"] LSUDummy_precommit["precommit"] + LSUDummy_LSUDummy1["LSUDummy"] + LSUDummy_get_result["get_result"] + LSUDummy_LSUDummy2["LSUDummy"] + LSUDummy_insert["insert"] subgraph Forwarder6["forwarder Forwarder"] - Forwarder6_write["write"] Forwarder6_read["read"] + Forwarder6_write["write"] end subgraph LSURequester["requester LSURequester"] - LSURequester_issue_cond2["issue_cond2"] - LSURequester_accept_cond0["accept_cond0"] - LSURequester_issue_cond1["issue_cond1"] LSURequester_issue_cond0["issue_cond0"] LSURequester_accept["accept"] - LSURequester_accept_cond1["accept_cond1"] LSURequester_issue["issue"] + LSURequester_issue_cond1["issue_cond1"] + LSURequester_accept_cond0["accept_cond0"] + LSURequester_accept_cond1["accept_cond1"] + LSURequester_issue_cond2["issue_cond2"] end end subgraph CSRUnit["rs_block_2 CSRUnit"] - CSRUnit_get_result["get_result"] - CSRUnit_CSRUnit["CSRUnit"] CSRUnit_insert["insert"] - CSRUnit_select["select"] CSRUnit_fetch_resume["fetch_resume"] CSRUnit_update["update"] + CSRUnit_select["select"] + CSRUnit_CSRUnit["CSRUnit"] CSRUnit_precommit["precommit"] + CSRUnit_get_result["get_result"] end subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"] MethodTryProduct_MethodTryProduct["MethodTryProduct"] @@ -347,8 +347,8 @@ subgraph Collector2["FetchResumeKey_unifier Collector"] Collector2_method["method"] subgraph Forwarder7["forwarder Forwarder"] - Forwarder7_write["write"] Forwarder7_read["read"] + Forwarder7_write["write"] end subgraph ManyToOneConnectTrans2["connect ManyToOneConnectTrans"] subgraph ConnectTrans9["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -364,36 +364,36 @@ ResultAnnouncement_ResultAnnouncement["ResultAnnouncement"] end subgraph InterruptController["interrupt_controller InterruptController"] - InterruptController_report_interrupt["report_interrupt"] InterruptController_mret["mret"] + InterruptController_report_interrupt["report_interrupt"] InterruptController_entry["entry"] end subgraph GenericCSRRegisters["csr_generic GenericCSRRegisters"] GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"] subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"] subgraph CSRRegister["mcause CSRRegister"] - CSRRegister__fu_write["_fu_write"] CSRRegister__fu_read["_fu_read"] CSRRegister_write["write"] + CSRRegister__fu_write["_fu_write"] end subgraph CSRRegister1["mtvec CSRRegister"] - CSRRegister1__fu_write["_fu_write"] CSRRegister1_read["read"] CSRRegister1__fu_read["_fu_read"] + CSRRegister1__fu_write["_fu_write"] end subgraph CSRRegister2["mepc CSRRegister"] - CSRRegister2_read["read"] - CSRRegister2__fu_read["_fu_read"] CSRRegister2_write["write"] CSRRegister2__fu_write["_fu_write"] + CSRRegister2_read["read"] + CSRRegister2__fu_read["_fu_read"] end end subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister3["register_low CSRRegister"] + CSRRegister3__fu_read["_fu_read"] CSRRegister3_read["read"] CSRRegister3_write["write"] - CSRRegister3__fu_read["_fu_read"] end subgraph CSRRegister4["register_high CSRRegister"] CSRRegister4__fu_read["_fu_read"] @@ -409,15 +409,15 @@ CSRRegister5__fu_read["_fu_read"] end subgraph CSRRegister6["register_high CSRRegister"] + CSRRegister6__fu_read["_fu_read"] CSRRegister6_write["write"] CSRRegister6_read["read"] - CSRRegister6__fu_read["_fu_read"] end end end subgraph FIFO9["fifo_decode FIFO"] - FIFO9_write["write"] FIFO9_read["read"] + FIFO9_write["write"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] @@ -427,22 +427,22 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO10["alloc_rename_buf FIFO"] - FIFO10_read["read"] FIFO10_write["write"] + FIFO10_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO11["rename_out_buf FIFO"] - FIFO11_read["read"] FIFO11_write["write"] + FIFO11_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO12["reg_alloc_out_buf FIFO"] - FIFO12_write["write"] FIFO12_read["read"] + FIFO12_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] @@ -457,8 +457,8 @@ RSSelection_RSSelection2["RSSelection"] RSSelection_RSSelection3["RSSelection"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_write["write"] Forwarder8_read["read"] + Forwarder8_write["write"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -470,24 +470,24 @@ end subgraph Retirement["retirement Retirement"] Retirement_Retirement["Retirement"] - Retirement_Retirement_cond1["Retirement_cond1"] - Retirement_Retirement_cond0["Retirement_cond0"] Retirement_Retirement1["Retirement"] Retirement_Retirement2["Retirement"] Retirement_Retirement3["Retirement"] - Retirement_core_state["core_state"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement4["Retirement"] + Retirement_core_state["core_state"] + Retirement_Retirement_cond0["Retirement_cond0"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister7["register_low CSRRegister"] + CSRRegister7_read["read"] CSRRegister7_write["write"] CSRRegister7__fu_read["_fu_read"] - CSRRegister7_read["read"] end subgraph CSRRegister8["register_high CSRRegister"] - CSRRegister8_read["read"] CSRRegister8__fu_read["_fu_read"] CSRRegister8_write["write"] + CSRRegister8_read["read"] end end subgraph HwCounter9["perf_instr_ret HwCounter"] @@ -508,40 +508,40 @@ end subgraph TransactionManager["transactionManager TransactionManager"] TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"] - TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] - TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] + TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] + TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"] TransactionManager_LSUDummy_accept_cond0["LSUDummy_accept_cond0"] end end Core_InitFreeRFFifo --> BasicFifo2_write Retirement_Retirement --> BasicFifo2_write - TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write TransactionManager_Retirement_Retirement_cond0 --> BasicFifo2_write + TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write FIFO6_read --> Core_DiscardBranchVerify WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write Forwarder2_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1 + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request - ICache_ICache3 <--> HwCounter4__incr - ICache_ICache2 <--> HwCounter3__incr - ICache_ICache2 <--> HwCounter2__incr - ICache_ICache2 <--> HwCounter1__incr - ICache_ICache2 --> Forwarder3_write - ICache_ICache1 --> SimpleCommonBusCacheRefiller_start_refill - ICache_ICache1 --> Forwarder2_write - ICache_ICache --> Forwarder2_write - SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache - WishboneMasterAdapter_get_read_response --> ICache_ICache - Serializer_Serializer --> ICache_ICache - BasicFifo_read --> ICache_ICache - WishboneMaster_result --> ICache_ICache - Forwarder_read --> ICache_ICache + ICache_ICache <--> HwCounter4__incr + ICache_ICache1 <--> HwCounter3__incr + ICache_ICache1 <--> HwCounter2__incr + ICache_ICache1 <--> HwCounter1__incr + ICache_ICache1 --> Forwarder3_write + ICache_ICache2 --> SimpleCommonBusCacheRefiller_start_refill + ICache_ICache2 --> Forwarder2_write + ICache_ICache3 --> Forwarder2_write + SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache3 + WishboneMasterAdapter_get_read_response --> ICache_ICache3 + Serializer_Serializer1 --> ICache_ICache3 + BasicFifo_read --> ICache_ICache3 + WishboneMaster_result --> ICache_ICache3 + Forwarder_read --> ICache_ICache3 Fetch_Fetch1 --> ICache_issue_req Fetch_Fetch1 <--> HwCounter__incr Fetch_Fetch1 <--> LatencyMeasurer__start @@ -579,18 +579,18 @@ ROBAllocation_ROBAllocation <--> LatencyMeasurer1__start ROBAllocation_ROBAllocation --> FIFO3_write ROBAllocation_ROBAllocation --> FIFO12_write - FIFO12_read --> RSSelection_RSSelection3 - RSSelection_RSSelection3 --> Forwarder8_write - Forwarder8_read --> RSSelection_RSSelection - Forwarder8_read --> RSSelection_RSSelection1 + FIFO12_read --> RSSelection_RSSelection + RSSelection_RSSelection --> Forwarder8_write Forwarder8_read --> RSSelection_RSSelection2 - RSFuncBlock_select --> RSSelection_RSSelection - RS_select --> RSSelection_RSSelection - RSSelection_RSSelection --> FIFO13_write - RSSelection_RSSelection1 --> FIFO13_write + Forwarder8_read --> RSSelection_RSSelection3 + Forwarder8_read --> RSSelection_RSSelection1 + RSFuncBlock_select --> RSSelection_RSSelection2 + RS_select --> RSSelection_RSSelection2 RSSelection_RSSelection2 --> FIFO13_write - RSSelection_RSSelection1 <--> LSUDummy_select - RSSelection_RSSelection2 <--> CSRUnit_select + RSSelection_RSSelection3 --> FIFO13_write + RSSelection_RSSelection1 --> FIFO13_write + RSSelection_RSSelection3 <--> LSUDummy_select + RSSelection_RSSelection1 <--> CSRUnit_select FIFO13_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion @@ -606,7 +606,7 @@ Collector2_method --> ConnectTrans11_ConnectTrans Forwarder7_read --> ConnectTrans11_ConnectTrans ConnectTrans11_ConnectTrans --> Fetch_resume - Retirement_Retirement3 --> Fetch_resume + Retirement_Retirement4 --> Fetch_resume Collector_method --> ResultAnnouncement_ResultAnnouncement Forwarder4_read --> ResultAnnouncement_ResultAnnouncement ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done @@ -624,10 +624,10 @@ RS_take --> WakeupSelect4_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO4_write - RS_RS4 --> WakeupSelect1_WakeupSelect + RS_RS3 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO5_write - RS_RS2 --> WakeupSelect2_WakeupSelect + RS_RS4 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> HwCounter5__incr WakeupSelect2_WakeupSelect <--> HwCounter6__incr @@ -639,7 +639,7 @@ ConnectTrans3_ConnectTrans --> BasicFifo4_write WakeupSelect2_WakeupSelect --> FIFO7_write WakeupSelect2_WakeupSelect --> FIFO6_write - RS_RS3 --> WakeupSelect3_WakeupSelect + RS_RS2 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO8_write RS_RS1 --> WakeupSelect4_WakeupSelect @@ -661,11 +661,11 @@ CSRRegister2_read --> ConnectTrans8_ConnectTrans ConnectTrans8_ConnectTrans --> BasicFifo5_write LSUDummy_LSUDummy1 --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write + TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write + TransactionManager_issue_cond1_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_accept_cond1 --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond2 --> Forwarder6_write + TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write - TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write CSRRegister__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> CSRRegister__fu_write CSRRegister1__fu_read --> CSRUnit_CSRUnit @@ -695,37 +695,37 @@ ConnectTrans10_ConnectTrans --> Forwarder7_write BasicFifo5_read --> ConnectTrans9_ConnectTrans CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans - ReorderBuffer_peek --> Retirement_Retirement4 ReorderBuffer_peek --> Retirement_Retirement1 + ReorderBuffer_peek --> Retirement_Retirement2 ReorderBuffer_peek --> Retirement_Retirement - ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 - Retirement_Retirement4 --> MethodTryProduct_method - ExceptionCauseRegister_get --> Retirement_Retirement1 - ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 + ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 + Retirement_Retirement1 --> MethodTryProduct_method + ExceptionCauseRegister_get --> Retirement_Retirement2 ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0 + ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement <--> ReorderBuffer_retire - TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire + TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire Retirement_Retirement <--> LatencyMeasurer1__stop - TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond0 <--> LatencyMeasurer1__stop + TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop FIFO3_read --> Retirement_Retirement - FIFO3_read --> TransactionManager_Retirement_Retirement_cond1 FIFO3_read --> TransactionManager_Retirement_Retirement_cond0 + FIFO3_read --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement --> HwExpHistogram1__add - TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add + TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add CoreInstructionCounter_decrement --> Retirement_Retirement - CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 + CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 RRAT_peek --> Retirement_Retirement RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement --> RegisterFile_free - TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free - CSRRegister1_read --> Retirement_Retirement3 - Retirement_Retirement3 <--> ExceptionCauseRegister_clear + TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free + CSRRegister1_read --> Retirement_Retirement4 + Retirement_Retirement4 <--> ExceptionCauseRegister_clear GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write @@ -737,21 +737,24 @@ CSRRegister6_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister6_write AdapterTrans1_AdapterTrans_report_interrupt <--> InterruptController_report_interrupt - TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy - TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue - TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 - TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read - TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer - TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write + TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 + TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write + TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer3 TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request + TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request - TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy2 - TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy2 + TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request + TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy2 + TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy2 + TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy2 + TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 + TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read + TransactionManager_issue_cond1_LSUDummy --> Serializer1_Serializer1 + TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy + TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1 LSURequester_accept --> TransactionManager_LSUDummy_accept_cond0 TransactionManager_LSUDummy_accept_cond1 <--> LSURequester_accept_cond1 @@ -763,19 +766,15 @@ WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0 Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1 Forwarder1_read --> TransactionManager_LSUDummy_accept_cond0 - TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 - TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement2 - TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2 - TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write + TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement3 + TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement3 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write - TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write + TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister2_write - TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry + TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write TransactionManager_Retirement_Retirement_cond0 <--> InterruptController_entry - TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 - TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 - WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 - Serializer1_Serializer1 --> TransactionManager_LSUDummy_accept_cond0 + TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment @@ -784,6 +783,7 @@ CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr - TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 - TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write - TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer3 + TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 + WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 + Serializer1_Serializer --> TransactionManager_LSUDummy_accept_cond0 + TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 diff --git a/api.html b/api.html index 02e172adc..ccb32c156 100644 --- a/api.html +++ b/api.html @@ -259,7 +259,7 @@
© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/assumptions.html b/assumptions.html index 6b09ae243..4e3b04c85 100644 --- a/assumptions.html +++ b/assumptions.html @@ -104,7 +104,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/auto_graph.html b/auto_graph.html index b6fd7b590..c65b122b3 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -90,54 +90,54 @@ WishboneMaster_request["request"] WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] - Forwarder_read["read"] Forwarder_write["write"] + Forwarder_read["read"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_request["request"] WishboneMaster1_result["result"] + WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] - Forwarder1_write["write"] Forwarder1_read["read"] + Forwarder1_write["write"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] - WishboneMasterAdapter_get_read_response["get_read_response"] WishboneMasterAdapter_request_read["request_read"] + WishboneMasterAdapter_get_read_response["get_read_response"] subgraph Serializer["bus_serializer Serializer"] Serializer_Serializer["Serializer"] Serializer_Serializer1["Serializer"] subgraph BasicFifo["pending_requests BasicFifo"] - BasicFifo_read["read"] BasicFifo_write["write"] + BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] - WishboneMasterAdapter1_request_read["request_read"] - WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_write_response["get_write_response"] + WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_read_response["get_read_response"] + WishboneMasterAdapter1_request_read["request_read"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] Serializer1_Serializer2["Serializer"] Serializer1_Serializer3["Serializer"] subgraph BasicFifo1["pending_requests BasicFifo"] - BasicFifo1_read["read"] BasicFifo1_write["write"] + BasicFifo1_read["read"] end end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] - CoreInstructionCounter_decrement["decrement"] CoreInstructionCounter_increment["increment"] + CoreInstructionCounter_decrement["decrement"] end subgraph FIFO["fifo_fetch FIFO"] - FIFO_write["write"] FIFO_read["read"] + FIFO_write["write"] end subgraph MethodMap["core_counter_increment_discard_map MethodMap"] MethodMap_method["method"] @@ -151,8 +151,8 @@ end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_start_refill["start_refill"] SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] + SimpleCommonBusCacheRefiller_start_refill["start_refill"] subgraph Forwarder2["address_fwd Forwarder"] Forwarder2_read["read"] Forwarder2_write["write"] @@ -162,8 +162,8 @@ ICache_accept_res["accept_res"] ICache_ICache["ICache"] ICache_ICache1["ICache"] - ICache_ICache2["ICache"] ICache_issue_req["issue_req"] + ICache_ICache2["ICache"] ICache_ICache3["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] @@ -181,8 +181,8 @@ HwCounter4__incr["_incr"] end subgraph LatencyMeasurer["req_latency LatencyMeasurer"] - LatencyMeasurer__stop["_stop"] LatencyMeasurer__start["_start"] + LatencyMeasurer__stop["_stop"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -204,21 +204,21 @@ FRAT_rename["rename"] end subgraph RRAT["RRAT RRAT"] - RRAT_peek["peek"] RRAT_commit["commit"] + RRAT_peek["peek"] end subgraph RegisterFile["RF RegisterFile"] + RegisterFile_free["free"] RegisterFile_read2["read2"] RegisterFile_read1["read1"] RegisterFile_write["write"] - RegisterFile_free["free"] end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_put["put"] - ReorderBuffer_retire["retire"] - ReorderBuffer_mark_done["mark_done"] ReorderBuffer_get_indices["get_indices"] + ReorderBuffer_retire["retire"] ReorderBuffer_peek["peek"] + ReorderBuffer_put["put"] + ReorderBuffer_mark_done["mark_done"] subgraph LatencyMeasurer1["perf_rob_wait_time LatencyMeasurer"] LatencyMeasurer1__start["_start"] LatencyMeasurer1__stop["_stop"] @@ -233,9 +233,9 @@ end subgraph Fetch["fetch Fetch"] Fetch_Fetch["Fetch"] + Fetch_resume["resume"] Fetch_Fetch1["Fetch"] Fetch_stall_exception["stall_exception"] - Fetch_resume["resume"] subgraph BasicFifo3["fetch_target_queue BasicFifo"] BasicFifo3_read["read"] BasicFifo3_write["write"] @@ -243,8 +243,8 @@ end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_clear["clear"] - ExceptionCauseRegister_get["get"] ExceptionCauseRegister_report["report"] + ExceptionCauseRegister_get["get"] subgraph BasicFifo4["fu_report_fifo BasicFifo"] BasicFifo4_write["write"] BasicFifo4_read["read"] @@ -257,8 +257,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_write["write"] Forwarder4_read["read"] + Forwarder4_write["write"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans1["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -276,20 +276,20 @@ MethodProduct1_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_insert["insert"] + RSFuncBlock_select["select"] RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] - RSFuncBlock_select["select"] + RSFuncBlock_insert["insert"] subgraph RS["rs RS"] - RS_update["update"] - RS_select["select"] RS_RS["RS"] - RS_RS1["RS"] RS_take["take"] + RS_RS1["RS"] + RS_insert["insert"] RS_RS2["RS"] RS_RS3["RS"] RS_RS4["RS"] - RS_insert["insert"] + RS_update["update"] + RS_select["select"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_accept["accept"] @@ -306,19 +306,19 @@ ShiftFuncUnit_issue["issue"] ShiftFuncUnit_accept["accept"] subgraph FIFO5["fifo FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_issue["issue"] subgraph FIFO6["fifo_branch_resolved FIFO"] - FIFO6_read["read"] FIFO6_write["write"] + FIFO6_read["read"] end subgraph HwCounter5["perf_jumps HwCounter"] HwCounter5__incr["_incr"] @@ -338,11 +338,11 @@ WakeupSelect2_WakeupSelect["WakeupSelect"] end subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"] - ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] + ExceptionFuncUnit_accept["accept"] subgraph FIFO8["fifo FIFO"] - FIFO8_read["read"] FIFO8_write["write"] + FIFO8_read["read"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] @@ -350,8 +350,8 @@ end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] PrivilegedFuncUnit_accept["accept"] - PrivilegedFuncUnit_precommit["precommit"] PrivilegedFuncUnit_issue["issue"] + PrivilegedFuncUnit_precommit["precommit"] subgraph BasicFifo5["fetch_resume_fifo BasicFifo"] BasicFifo5_write["write"] BasicFifo5_read["read"] @@ -386,36 +386,36 @@ end end subgraph LSUDummy["rs_block_1 LSUDummy"] - LSUDummy_get_result["get_result"] - LSUDummy_LSUDummy["LSUDummy"] - LSUDummy_LSUDummy1["LSUDummy"] - LSUDummy_insert["insert"] LSUDummy_select["select"] - LSUDummy_LSUDummy2["LSUDummy"] LSUDummy_update["update"] + LSUDummy_LSUDummy["LSUDummy"] LSUDummy_precommit["precommit"] + LSUDummy_LSUDummy1["LSUDummy"] + LSUDummy_get_result["get_result"] + LSUDummy_LSUDummy2["LSUDummy"] + LSUDummy_insert["insert"] subgraph Forwarder6["forwarder Forwarder"] - Forwarder6_write["write"] Forwarder6_read["read"] + Forwarder6_write["write"] end subgraph LSURequester["requester LSURequester"] - LSURequester_issue_cond2["issue_cond2"] - LSURequester_accept_cond0["accept_cond0"] - LSURequester_issue_cond1["issue_cond1"] LSURequester_issue_cond0["issue_cond0"] LSURequester_accept["accept"] - LSURequester_accept_cond1["accept_cond1"] LSURequester_issue["issue"] + LSURequester_issue_cond1["issue_cond1"] + LSURequester_accept_cond0["accept_cond0"] + LSURequester_accept_cond1["accept_cond1"] + LSURequester_issue_cond2["issue_cond2"] end end subgraph CSRUnit["rs_block_2 CSRUnit"] - CSRUnit_get_result["get_result"] - CSRUnit_CSRUnit["CSRUnit"] CSRUnit_insert["insert"] - CSRUnit_select["select"] CSRUnit_fetch_resume["fetch_resume"] CSRUnit_update["update"] + CSRUnit_select["select"] + CSRUnit_CSRUnit["CSRUnit"] CSRUnit_precommit["precommit"] + CSRUnit_get_result["get_result"] end subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"] MethodTryProduct_MethodTryProduct["MethodTryProduct"] @@ -426,8 +426,8 @@ subgraph Collector2["FetchResumeKey_unifier Collector"] Collector2_method["method"] subgraph Forwarder7["forwarder Forwarder"] - Forwarder7_write["write"] Forwarder7_read["read"] + Forwarder7_write["write"] end subgraph ManyToOneConnectTrans2["connect ManyToOneConnectTrans"] subgraph ConnectTrans9["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -443,36 +443,36 @@ ResultAnnouncement_ResultAnnouncement["ResultAnnouncement"] end subgraph InterruptController["interrupt_controller InterruptController"] - InterruptController_report_interrupt["report_interrupt"] InterruptController_mret["mret"] + InterruptController_report_interrupt["report_interrupt"] InterruptController_entry["entry"] end subgraph GenericCSRRegisters["csr_generic GenericCSRRegisters"] GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"] subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"] subgraph CSRRegister["mcause CSRRegister"] - CSRRegister__fu_write["_fu_write"] CSRRegister__fu_read["_fu_read"] CSRRegister_write["write"] + CSRRegister__fu_write["_fu_write"] end subgraph CSRRegister1["mtvec CSRRegister"] - CSRRegister1__fu_write["_fu_write"] CSRRegister1_read["read"] CSRRegister1__fu_read["_fu_read"] + CSRRegister1__fu_write["_fu_write"] end subgraph CSRRegister2["mepc CSRRegister"] - CSRRegister2_read["read"] - CSRRegister2__fu_read["_fu_read"] CSRRegister2_write["write"] CSRRegister2__fu_write["_fu_write"] + CSRRegister2_read["read"] + CSRRegister2__fu_read["_fu_read"] end end subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister3["register_low CSRRegister"] + CSRRegister3__fu_read["_fu_read"] CSRRegister3_read["read"] CSRRegister3_write["write"] - CSRRegister3__fu_read["_fu_read"] end subgraph CSRRegister4["register_high CSRRegister"] CSRRegister4__fu_read["_fu_read"] @@ -488,15 +488,15 @@ CSRRegister5__fu_read["_fu_read"] end subgraph CSRRegister6["register_high CSRRegister"] + CSRRegister6__fu_read["_fu_read"] CSRRegister6_write["write"] CSRRegister6_read["read"] - CSRRegister6__fu_read["_fu_read"] end end end subgraph FIFO9["fifo_decode FIFO"] - FIFO9_write["write"] FIFO9_read["read"] + FIFO9_write["write"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] @@ -506,22 +506,22 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO10["alloc_rename_buf FIFO"] - FIFO10_read["read"] FIFO10_write["write"] + FIFO10_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph FIFO11["rename_out_buf FIFO"] - FIFO11_read["read"] FIFO11_write["write"] + FIFO11_read["read"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO12["reg_alloc_out_buf FIFO"] - FIFO12_write["write"] FIFO12_read["read"] + FIFO12_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] @@ -536,8 +536,8 @@ RSSelection_RSSelection2["RSSelection"] RSSelection_RSSelection3["RSSelection"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_write["write"] Forwarder8_read["read"] + Forwarder8_write["write"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -549,24 +549,24 @@ end subgraph Retirement["retirement Retirement"] Retirement_Retirement["Retirement"] - Retirement_Retirement_cond1["Retirement_cond1"] - Retirement_Retirement_cond0["Retirement_cond0"] Retirement_Retirement1["Retirement"] Retirement_Retirement2["Retirement"] Retirement_Retirement3["Retirement"] - Retirement_core_state["core_state"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement4["Retirement"] + Retirement_core_state["core_state"] + Retirement_Retirement_cond0["Retirement_cond0"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister7["register_low CSRRegister"] + CSRRegister7_read["read"] CSRRegister7_write["write"] CSRRegister7__fu_read["_fu_read"] - CSRRegister7_read["read"] end subgraph CSRRegister8["register_high CSRRegister"] - CSRRegister8_read["read"] CSRRegister8__fu_read["_fu_read"] CSRRegister8_write["write"] + CSRRegister8_read["read"] end end subgraph HwCounter9["perf_instr_ret HwCounter"] @@ -587,40 +587,40 @@ end subgraph TransactionManager["transactionManager TransactionManager"] TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"] - TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] - TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] + TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] + TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"] TransactionManager_LSUDummy_accept_cond0["LSUDummy_accept_cond0"] end end Core_InitFreeRFFifo --> BasicFifo2_write Retirement_Retirement --> BasicFifo2_write -TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write TransactionManager_Retirement_Retirement_cond0 --> BasicFifo2_write +TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write FIFO6_read --> Core_DiscardBranchVerify WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write Forwarder2_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1 +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request -ICache_ICache3 <--> HwCounter4__incr -ICache_ICache2 <--> HwCounter3__incr -ICache_ICache2 <--> HwCounter2__incr -ICache_ICache2 <--> HwCounter1__incr -ICache_ICache2 --> Forwarder3_write -ICache_ICache1 --> SimpleCommonBusCacheRefiller_start_refill -ICache_ICache1 --> Forwarder2_write -ICache_ICache --> Forwarder2_write -SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache -WishboneMasterAdapter_get_read_response --> ICache_ICache -Serializer_Serializer --> ICache_ICache -BasicFifo_read --> ICache_ICache -WishboneMaster_result --> ICache_ICache -Forwarder_read --> ICache_ICache +ICache_ICache <--> HwCounter4__incr +ICache_ICache1 <--> HwCounter3__incr +ICache_ICache1 <--> HwCounter2__incr +ICache_ICache1 <--> HwCounter1__incr +ICache_ICache1 --> Forwarder3_write +ICache_ICache2 --> SimpleCommonBusCacheRefiller_start_refill +ICache_ICache2 --> Forwarder2_write +ICache_ICache3 --> Forwarder2_write +SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache3 +WishboneMasterAdapter_get_read_response --> ICache_ICache3 +Serializer_Serializer1 --> ICache_ICache3 +BasicFifo_read --> ICache_ICache3 +WishboneMaster_result --> ICache_ICache3 +Forwarder_read --> ICache_ICache3 Fetch_Fetch1 --> ICache_issue_req Fetch_Fetch1 <--> HwCounter__incr Fetch_Fetch1 <--> LatencyMeasurer__start @@ -658,18 +658,18 @@ ROBAllocation_ROBAllocation <--> LatencyMeasurer1__start ROBAllocation_ROBAllocation --> FIFO3_write ROBAllocation_ROBAllocation --> FIFO12_write -FIFO12_read --> RSSelection_RSSelection3 -RSSelection_RSSelection3 --> Forwarder8_write -Forwarder8_read --> RSSelection_RSSelection -Forwarder8_read --> RSSelection_RSSelection1 +FIFO12_read --> RSSelection_RSSelection +RSSelection_RSSelection --> Forwarder8_write Forwarder8_read --> RSSelection_RSSelection2 -RSFuncBlock_select --> RSSelection_RSSelection -RS_select --> RSSelection_RSSelection -RSSelection_RSSelection --> FIFO13_write -RSSelection_RSSelection1 --> FIFO13_write +Forwarder8_read --> RSSelection_RSSelection3 +Forwarder8_read --> RSSelection_RSSelection1 +RSFuncBlock_select --> RSSelection_RSSelection2 +RS_select --> RSSelection_RSSelection2 RSSelection_RSSelection2 --> FIFO13_write -RSSelection_RSSelection1 <--> LSUDummy_select -RSSelection_RSSelection2 <--> CSRUnit_select +RSSelection_RSSelection3 --> FIFO13_write +RSSelection_RSSelection1 --> FIFO13_write +RSSelection_RSSelection3 <--> LSUDummy_select +RSSelection_RSSelection1 <--> CSRUnit_select FIFO13_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion @@ -685,7 +685,7 @@ Collector2_method --> ConnectTrans11_ConnectTrans Forwarder7_read --> ConnectTrans11_ConnectTrans ConnectTrans11_ConnectTrans --> Fetch_resume -Retirement_Retirement3 --> Fetch_resume +Retirement_Retirement4 --> Fetch_resume Collector_method --> ResultAnnouncement_ResultAnnouncement Forwarder4_read --> ResultAnnouncement_ResultAnnouncement ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done @@ -703,10 +703,10 @@ RS_take --> WakeupSelect4_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO4_write -RS_RS4 --> WakeupSelect1_WakeupSelect +RS_RS3 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO5_write -RS_RS2 --> WakeupSelect2_WakeupSelect +RS_RS4 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> HwCounter5__incr WakeupSelect2_WakeupSelect <--> HwCounter6__incr @@ -718,7 +718,7 @@ ConnectTrans3_ConnectTrans --> BasicFifo4_write WakeupSelect2_WakeupSelect --> FIFO7_write WakeupSelect2_WakeupSelect --> FIFO6_write -RS_RS3 --> WakeupSelect3_WakeupSelect +RS_RS2 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO8_write RS_RS1 --> WakeupSelect4_WakeupSelect @@ -740,11 +740,11 @@ CSRRegister2_read --> ConnectTrans8_ConnectTrans ConnectTrans8_ConnectTrans --> BasicFifo5_write LSUDummy_LSUDummy1 --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write +TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write +TransactionManager_issue_cond1_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_accept_cond1 --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond2 --> Forwarder6_write +TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write -TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write CSRRegister__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> CSRRegister__fu_write CSRRegister1__fu_read --> CSRUnit_CSRUnit @@ -774,37 +774,37 @@ ConnectTrans10_ConnectTrans --> Forwarder7_write BasicFifo5_read --> ConnectTrans9_ConnectTrans CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans -ReorderBuffer_peek --> Retirement_Retirement4 ReorderBuffer_peek --> Retirement_Retirement1 +ReorderBuffer_peek --> Retirement_Retirement2 ReorderBuffer_peek --> Retirement_Retirement -ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 -Retirement_Retirement4 --> MethodTryProduct_method -ExceptionCauseRegister_get --> Retirement_Retirement1 -ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 +ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 +Retirement_Retirement1 --> MethodTryProduct_method +ExceptionCauseRegister_get --> Retirement_Retirement2 ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0 +ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement <--> ReorderBuffer_retire -TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire +TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire Retirement_Retirement <--> LatencyMeasurer1__stop -TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond0 <--> LatencyMeasurer1__stop +TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop FIFO3_read --> Retirement_Retirement -FIFO3_read --> TransactionManager_Retirement_Retirement_cond1 FIFO3_read --> TransactionManager_Retirement_Retirement_cond0 +FIFO3_read --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement --> HwExpHistogram1__add -TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add +TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add CoreInstructionCounter_decrement --> Retirement_Retirement -CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 +CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 RRAT_peek --> Retirement_Retirement RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 Retirement_Retirement --> RegisterFile_free -TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free -CSRRegister1_read --> Retirement_Retirement3 -Retirement_Retirement3 <--> ExceptionCauseRegister_clear +TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free +CSRRegister1_read --> Retirement_Retirement4 +Retirement_Retirement4 <--> ExceptionCauseRegister_clear GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write @@ -816,21 +816,24 @@ CSRRegister6_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister6_write AdapterTrans1_AdapterTrans_report_interrupt <--> InterruptController_report_interrupt -TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy -TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue -TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 -TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read -TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer -TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write +TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 +TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write +TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer3 TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request +TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request -TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy2 -TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy2 +TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request +TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy2 +TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy2 +TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy2 +TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 +TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read +TransactionManager_issue_cond1_LSUDummy --> Serializer1_Serializer1 +TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy +TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1 LSURequester_accept --> TransactionManager_LSUDummy_accept_cond0 TransactionManager_LSUDummy_accept_cond1 <--> LSURequester_accept_cond1 @@ -842,19 +845,15 @@ WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0 Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1 Forwarder1_read --> TransactionManager_LSUDummy_accept_cond0 -TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 -TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement2 -TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2 -TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write +TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement3 +TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement3 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write -TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write +TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister2_write -TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry +TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write TransactionManager_Retirement_Retirement_cond0 <--> InterruptController_entry -TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 -TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 -WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 -Serializer1_Serializer1 --> TransactionManager_LSUDummy_accept_cond0 +TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment @@ -863,9 +862,10 @@ CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr -TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 -TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write -TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer3 +TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 +WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 +Serializer1_Serializer --> TransactionManager_LSUDummy_accept_cond0 +TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 @@ -876,7 +876,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.backend.html b/coreblocks.backend.html index 8ca620e2a..ecba4cd88 100644 --- a/coreblocks.backend.html +++ b/coreblocks.backend.html @@ -165,7 +165,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.cache.html b/coreblocks.cache.html index 5e0ad8827..b3793fb5d 100644 --- a/coreblocks.cache.html +++ b/coreblocks.cache.html @@ -241,7 +241,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.core_structs.html b/coreblocks.core_structs.html index 5faee2cdd..710eb99bb 100644 --- a/coreblocks.core_structs.html +++ b/coreblocks.core_structs.html @@ -157,7 +157,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.frontend.decoder.html b/coreblocks.frontend.decoder.html index 3635b343a..6e0987e5e 100644 --- a/coreblocks.frontend.decoder.html +++ b/coreblocks.frontend.decoder.html @@ -1721,7 +1721,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.frontend.fetch.html b/coreblocks.frontend.fetch.html index 3bd653edc..95fa7bdf6 100644 --- a/coreblocks.frontend.fetch.html +++ b/coreblocks.frontend.fetch.html @@ -161,7 +161,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html index 63eb31300..a45c914ba 100644 --- a/coreblocks.frontend.html +++ b/coreblocks.frontend.html @@ -125,7 +125,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.func_blocks.fu.html b/coreblocks.func_blocks.fu.html index dbec25617..b2f73727a 100644 --- a/coreblocks.func_blocks.fu.html +++ b/coreblocks.func_blocks.fu.html @@ -867,7 +867,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.func_blocks.fu.unsigned_multiplication.html b/coreblocks.func_blocks.fu.unsigned_multiplication.html index 2a566cce9..f93d7f344 100644 --- a/coreblocks.func_blocks.fu.unsigned_multiplication.html +++ b/coreblocks.func_blocks.fu.unsigned_multiplication.html @@ -238,7 +238,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.func_blocks.html b/coreblocks.func_blocks.html index 5f1f0f611..4fe1a5c1d 100644 --- a/coreblocks.func_blocks.html +++ b/coreblocks.func_blocks.html @@ -148,7 +148,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.func_blocks.interface.html b/coreblocks.func_blocks.interface.html index 4191a28ce..7459ff505 100644 --- a/coreblocks.func_blocks.interface.html +++ b/coreblocks.func_blocks.interface.html @@ -169,7 +169,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.func_blocks.lsu.html b/coreblocks.func_blocks.lsu.html index 223142a7a..b9e97ed3a 100644 --- a/coreblocks.func_blocks.lsu.html +++ b/coreblocks.func_blocks.lsu.html @@ -248,7 +248,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.html b/coreblocks.html index 2d7ee919c..6ea3d1bec 100644 --- a/coreblocks.html +++ b/coreblocks.html @@ -255,7 +255,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.params.html b/coreblocks.params.html index 364719de0..e7af1d529 100644 --- a/coreblocks.params.html +++ b/coreblocks.params.html @@ -754,7 +754,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html index 745fe25e8..5f9a00acb 100644 --- a/coreblocks.peripherals.html +++ b/coreblocks.peripherals.html @@ -746,7 +746,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.priv.csr.html b/coreblocks.priv.csr.html index 13b086ef7..7dfcb35bf 100644 --- a/coreblocks.priv.csr.html +++ b/coreblocks.priv.csr.html @@ -327,7 +327,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.priv.html b/coreblocks.priv.html index 63b60be71..f1ebe390e 100644 --- a/coreblocks.priv.html +++ b/coreblocks.priv.html @@ -123,7 +123,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.priv.traps.html b/coreblocks.priv.traps.html index 391b14c5e..76ae024a1 100644 --- a/coreblocks.priv.traps.html +++ b/coreblocks.priv.traps.html @@ -171,7 +171,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html index c229e558b..819fe01da 100644 --- a/coreblocks.scheduler.html +++ b/coreblocks.scheduler.html @@ -191,7 +191,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/current-graph.html b/current-graph.html index 2dc845472..11fa33b9b 100644 --- a/current-graph.html +++ b/current-graph.html @@ -96,54 +96,54 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/development-environment.html b/development-environment.html index 34d604de8..5073c35e2 100644 --- a/development-environment.html +++ b/development-environment.html @@ -209,7 +209,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/genindex.html b/genindex.html index 1fc6bba36..374831e64 100644 --- a/genindex.html +++ b/genindex.html @@ -3751,7 +3751,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/index.html b/index.html index fb8c9b257..d020842f1 100644 --- a/index.html +++ b/index.html @@ -229,7 +229,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
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diff --git a/modules-coreblocks.html b/modules-coreblocks.html index e614cecf3..343206027 100644 --- a/modules-coreblocks.html +++ b/modules-coreblocks.html @@ -168,7 +168,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/modules-transactron.html b/modules-transactron.html index bdd546981..4adc70de9 100644 --- a/modules-transactron.html +++ b/modules-transactron.html @@ -161,7 +161,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
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diff --git a/py-modindex.html b/py-modindex.html index 51b555dfe..dabe8d01f 100644 --- a/py-modindex.html +++ b/py-modindex.html @@ -668,7 +668,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
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diff --git a/transactions.html b/transactions.html index 653ee86ab..2f69d4409 100644 --- a/transactions.html +++ b/transactions.html @@ -409,7 +409,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/transactron.core.html b/transactron.core.html index 24dae903a..ad829161c 100644 --- a/transactron.core.html +++ b/transactron.core.html @@ -860,7 +860,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/transactron.html b/transactron.html index c0ecda661..7f6031be7 100644 --- a/transactron.html +++ b/transactron.html @@ -751,7 +751,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
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diff --git a/transactron.testing.html b/transactron.testing.html index 76b571da6..7515cfe14 100644 --- a/transactron.testing.html +++ b/transactron.testing.html @@ -408,7 +408,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/transactron.utils.amaranth_ext.html b/transactron.utils.amaranth_ext.html index e0484f261..009d6f8e9 100644 --- a/transactron.utils.amaranth_ext.html +++ b/transactron.utils.amaranth_ext.html @@ -293,7 +293,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.
diff --git a/transactron.utils.html b/transactron.utils.html index 2145fbe80..a30526c21 100644 --- a/transactron.utils.html +++ b/transactron.utils.html @@ -792,7 +792,7 @@© Copyright Kuźnia Rdzeni, 2024. - Last updated on 21:22 2024-03-24. + Last updated on 22:06 2024-03-24.