diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree index e5b34fc71..600caed30 100644 Binary files a/.doctrees/api.doctree and b/.doctrees/api.doctree differ diff --git a/.doctrees/auto_graph.doctree b/.doctrees/auto_graph.doctree index 6b73d21c2..6a7540cdf 100644 Binary files a/.doctrees/auto_graph.doctree and b/.doctrees/auto_graph.doctree differ diff --git a/.doctrees/current-graph.doctree b/.doctrees/current-graph.doctree index 8731629f6..82717418f 100644 Binary files a/.doctrees/current-graph.doctree and b/.doctrees/current-graph.doctree differ diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle index b70cfa432..5ec1beeed 100644 Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt index d74f0281e..8914fae17 100644 --- a/_sources/auto_graph.rst.txt +++ b/_sources/auto_graph.rst.txt @@ -8,17 +8,17 @@ Core_DiscardBranchVerify["DiscardBranchVerify"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] WishboneMaster_WishboneMaster["WishboneMaster"] - WishboneMaster_result["result"] WishboneMaster_request["request"] + WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] - Forwarder_write["write"] Forwarder_read["read"] + Forwarder_write["write"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] WishboneMaster1_request["request"] + WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] Forwarder1_read["read"] Forwarder1_write["write"] @@ -31,16 +31,16 @@ Serializer_Serializer["Serializer"] Serializer_Serializer1["Serializer"] subgraph BasicFifo["pending_requests BasicFifo"] - BasicFifo_read["read"] BasicFifo_write["write"] + BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] + WishboneMasterAdapter1_request_read["request_read"] + WishboneMasterAdapter1_get_read_response["get_read_response"] WishboneMasterAdapter1_get_write_response["get_write_response"] WishboneMasterAdapter1_request_write["request_write"] - WishboneMasterAdapter1_get_read_response["get_read_response"] - WishboneMasterAdapter1_request_read["request_read"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] @@ -67,24 +67,24 @@ MethodProduct_method["method"] end subgraph BasicFifo2["free_rf_fifo BasicFifo"] - BasicFifo2_write["write"] BasicFifo2_read["read"] + BasicFifo2_write["write"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_start_refill["start_refill"] + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] subgraph Forwarder2["address_fwd Forwarder"] - Forwarder2_write["write"] Forwarder2_read["read"] + Forwarder2_write["write"] end end subgraph ICache["icache ICache"] + ICache_accept_res["accept_res"] ICache_ICache["ICache"] - ICache_issue_req["issue_req"] ICache_ICache1["ICache"] + ICache_issue_req["issue_req"] ICache_ICache2["ICache"] - ICache_accept_res["accept_res"] ICache_ICache3["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] @@ -102,8 +102,8 @@ HwCounter4__incr["_incr"] end subgraph LatencyMeasurer["req_latency LatencyMeasurer"] - LatencyMeasurer__start["_start"] LatencyMeasurer__stop["_stop"] + LatencyMeasurer__start["_start"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -117,8 +117,8 @@ FIFO2_read["read"] end subgraph Forwarder3["res_fwd Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end subgraph FRAT["FRAT FRAT"] @@ -131,15 +131,15 @@ subgraph RegisterFile["RF RegisterFile"] RegisterFile_read2["read2"] RegisterFile_write["write"] - RegisterFile_free["free"] RegisterFile_read1["read1"] + RegisterFile_free["free"] end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_mark_done["mark_done"] - ReorderBuffer_retire["retire"] ReorderBuffer_peek["peek"] + ReorderBuffer_retire["retire"] ReorderBuffer_get_indices["get_indices"] ReorderBuffer_put["put"] + ReorderBuffer_mark_done["mark_done"] subgraph LatencyMeasurer1["perf_rob_wait_time LatencyMeasurer"] LatencyMeasurer1__stop["_stop"] LatencyMeasurer1__start["_start"] @@ -154,9 +154,9 @@ end subgraph Fetch["fetch Fetch"] Fetch_Fetch["Fetch"] + Fetch_resume["resume"] Fetch_stall_exception["stall_exception"] Fetch_Fetch1["Fetch"] - Fetch_resume["resume"] subgraph BasicFifo3["fetch_target_queue BasicFifo"] BasicFifo3_read["read"] BasicFifo3_write["write"] @@ -167,8 +167,8 @@ ExceptionCauseRegister_get["get"] ExceptionCauseRegister_clear["clear"] subgraph BasicFifo4["fu_report_fifo BasicFifo"] - BasicFifo4_write["write"] BasicFifo4_read["read"] + BasicFifo4_write["write"] end subgraph ConnectTrans["report_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -178,8 +178,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_write["write"] Forwarder4_read["read"] + Forwarder4_write["write"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans1["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -197,27 +197,27 @@ MethodProduct1_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_insert["insert"] - RSFuncBlock_get_result["get_result"] RSFuncBlock_select["select"] RSFuncBlock_update["update"] + RSFuncBlock_insert["insert"] + RSFuncBlock_get_result["get_result"] subgraph RS["rs RS"] + RS_take["take"] RS_RS["RS"] RS_RS1["RS"] + RS_select["select"] RS_RS2["RS"] RS_RS3["RS"] - RS_update["update"] - RS_insert["insert"] - RS_take["take"] - RS_select["select"] RS_RS4["RS"] + RS_insert["insert"] + RS_update["update"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_accept["accept"] AluFuncUnit_issue["issue"] subgraph FIFO4["fifo FIFO"] - FIFO4_read["read"] FIFO4_write["write"] + FIFO4_read["read"] end end subgraph WakeupSelect["wakeup_select_0 WakeupSelect"] @@ -262,17 +262,17 @@ ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] subgraph FIFO8["fifo FIFO"] - FIFO8_write["write"] FIFO8_read["read"] + FIFO8_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] + PrivilegedFuncUnit_issue["issue"] PrivilegedFuncUnit_precommit["precommit"] PrivilegedFuncUnit_accept["accept"] - PrivilegedFuncUnit_issue["issue"] subgraph BasicFifo5["fetch_resume_fifo BasicFifo"] BasicFifo5_read["read"] BasicFifo5_write["write"] @@ -308,34 +308,34 @@ end subgraph LSUDummy["rs_block_1 LSUDummy"] LSUDummy_LSUDummy["LSUDummy"] - LSUDummy_update["update"] LSUDummy_precommit["precommit"] LSUDummy_get_result["get_result"] - LSUDummy_select["select"] LSUDummy_LSUDummy1["LSUDummy"] LSUDummy_LSUDummy2["LSUDummy"] + LSUDummy_select["select"] LSUDummy_insert["insert"] + LSUDummy_update["update"] subgraph Forwarder6["forwarder Forwarder"] Forwarder6_write["write"] Forwarder6_read["read"] end subgraph LSURequester["requester LSURequester"] + LSURequester_accept["accept"] LSURequester_accept_cond0["accept_cond0"] + LSURequester_issue_cond1["issue_cond1"] LSURequester_issue["issue"] + LSURequester_issue_cond0["issue_cond0"] LSURequester_accept_cond1["accept_cond1"] - LSURequester_accept["accept"] - LSURequester_issue_cond1["issue_cond1"] LSURequester_issue_cond2["issue_cond2"] - LSURequester_issue_cond0["issue_cond0"] end end subgraph CSRUnit["rs_block_2 CSRUnit"] - CSRUnit_CSRUnit["CSRUnit"] - CSRUnit_insert["insert"] + CSRUnit_precommit["precommit"] CSRUnit_get_result["get_result"] CSRUnit_fetch_resume["fetch_resume"] + CSRUnit_insert["insert"] + CSRUnit_CSRUnit["CSRUnit"] CSRUnit_select["select"] - CSRUnit_precommit["precommit"] CSRUnit_update["update"] end subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"] @@ -372,28 +372,28 @@ GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"] subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"] subgraph CSRRegister["mcause CSRRegister"] - CSRRegister__fu_write["_fu_write"] - CSRRegister_write["write"] CSRRegister__fu_read["_fu_read"] + CSRRegister_write["write"] + CSRRegister__fu_write["_fu_write"] end subgraph CSRRegister1["mtvec CSRRegister"] - CSRRegister1__fu_read["_fu_read"] - CSRRegister1_read["read"] CSRRegister1__fu_write["_fu_write"] + CSRRegister1_read["read"] + CSRRegister1__fu_read["_fu_read"] end subgraph CSRRegister2["mepc CSRRegister"] CSRRegister2_read["read"] - CSRRegister2_write["write"] CSRRegister2__fu_write["_fu_write"] + CSRRegister2_write["write"] CSRRegister2__fu_read["_fu_read"] end end subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister3["register_low CSRRegister"] - CSRRegister3__fu_read["_fu_read"] - CSRRegister3_write["write"] CSRRegister3_read["read"] + CSRRegister3_write["write"] + CSRRegister3__fu_read["_fu_read"] end subgraph CSRRegister4["register_high CSRRegister"] CSRRegister4_read["read"] @@ -404,14 +404,14 @@ subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] DoubleCounterCSR1_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] + CSRRegister5_write["write"] CSRRegister5_read["read"] CSRRegister5__fu_read["_fu_read"] - CSRRegister5_write["write"] end subgraph CSRRegister6["register_high CSRRegister"] + CSRRegister6_write["write"] CSRRegister6__fu_read["_fu_read"] CSRRegister6_read["read"] - CSRRegister6_write["write"] end end end @@ -448,8 +448,8 @@ ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO13["rs_select_out_buf FIFO"] - FIFO13_write["write"] FIFO13_read["read"] + FIFO13_write["write"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] @@ -457,8 +457,8 @@ RSSelection_RSSelection2["RSSelection"] RSSelection_RSSelection3["RSSelection"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -470,13 +470,13 @@ end subgraph Retirement["retirement Retirement"] Retirement_Retirement["Retirement"] + Retirement_core_state["core_state"] Retirement_Retirement1["Retirement"] - Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement2["Retirement"] - Retirement_core_state["core_state"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement3["Retirement"] - Retirement_Retirement_cond0["Retirement_cond0"] Retirement_Retirement4["Retirement"] + Retirement_Retirement_cond0["Retirement_cond0"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister7["register_low CSRRegister"] @@ -507,19 +507,19 @@ end end subgraph TransactionManager["transactionManager TransactionManager"] - TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"] - TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"] - TransactionManager_accept_cond0_LSUDummy["accept_cond0_LSUDummy"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] + TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] + TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] + TransactionManager_LSUDummy_accept_cond0["LSUDummy_accept_cond0"] TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] - TransactionManager_Retirement_cond0_Retirement["Retirement_cond0_Retirement"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] + TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"] end end Core_InitFreeRFFifo --> BasicFifo2_write - Retirement_Retirement4 --> BasicFifo2_write - TransactionManager_Retirement_cond1_Retirement --> BasicFifo2_write - TransactionManager_Retirement_cond0_Retirement --> BasicFifo2_write + Retirement_Retirement3 --> BasicFifo2_write + TransactionManager_Retirement_Retirement_cond0 --> BasicFifo2_write + TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write FIFO6_read --> Core_DiscardBranchVerify WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write @@ -528,20 +528,20 @@ SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request - ICache_ICache <--> HwCounter4__incr - ICache_ICache1 <--> HwCounter3__incr - ICache_ICache1 <--> HwCounter2__incr - ICache_ICache1 <--> HwCounter1__incr - ICache_ICache1 --> Forwarder3_write - ICache_ICache2 --> SimpleCommonBusCacheRefiller_start_refill - ICache_ICache2 --> Forwarder2_write + ICache_ICache2 <--> HwCounter4__incr + ICache_ICache <--> HwCounter3__incr + ICache_ICache <--> HwCounter2__incr + ICache_ICache <--> HwCounter1__incr + ICache_ICache --> Forwarder3_write + ICache_ICache3 --> SimpleCommonBusCacheRefiller_start_refill ICache_ICache3 --> Forwarder2_write - SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache3 - WishboneMasterAdapter_get_read_response --> ICache_ICache3 - Serializer_Serializer --> ICache_ICache3 - BasicFifo_read --> ICache_ICache3 - WishboneMaster_result --> ICache_ICache3 - Forwarder_read --> ICache_ICache3 + ICache_ICache1 --> Forwarder2_write + SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache1 + WishboneMasterAdapter_get_read_response --> ICache_ICache1 + Serializer_Serializer --> ICache_ICache1 + BasicFifo_read --> ICache_ICache1 + WishboneMaster_result --> ICache_ICache1 + Forwarder_read --> ICache_ICache1 Fetch_Fetch1 --> ICache_issue_req Fetch_Fetch1 <--> HwCounter__incr Fetch_Fetch1 <--> LatencyMeasurer__start @@ -571,8 +571,8 @@ RegAllocation_RegAllocation --> FIFO10_write FIFO10_read --> Renaming_Renaming Renaming_Renaming --> FRAT_rename - Retirement_Retirement4 --> FRAT_rename - TransactionManager_Retirement_cond1_Retirement --> FRAT_rename + Retirement_Retirement3 --> FRAT_rename + TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename Renaming_Renaming --> FIFO11_write FIFO11_read --> ROBAllocation_ROBAllocation ROBAllocation_ROBAllocation --> ReorderBuffer_put @@ -581,16 +581,16 @@ ROBAllocation_ROBAllocation --> FIFO12_write FIFO12_read --> RSSelection_RSSelection2 RSSelection_RSSelection2 --> Forwarder8_write - Forwarder8_read --> RSSelection_RSSelection Forwarder8_read --> RSSelection_RSSelection3 Forwarder8_read --> RSSelection_RSSelection1 - RSFuncBlock_select --> RSSelection_RSSelection - RS_select --> RSSelection_RSSelection - RSSelection_RSSelection --> FIFO13_write + Forwarder8_read --> RSSelection_RSSelection + RSFuncBlock_select --> RSSelection_RSSelection3 + RS_select --> RSSelection_RSSelection3 RSSelection_RSSelection3 --> FIFO13_write RSSelection_RSSelection1 --> FIFO13_write - RSSelection_RSSelection3 <--> LSUDummy_select - RSSelection_RSSelection1 <--> CSRUnit_select + RSSelection_RSSelection --> FIFO13_write + RSSelection_RSSelection1 <--> LSUDummy_select + RSSelection_RSSelection <--> CSRUnit_select FIFO13_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion @@ -606,7 +606,7 @@ Collector2_method --> ConnectTrans11_ConnectTrans Forwarder7_read --> ConnectTrans11_ConnectTrans ConnectTrans11_ConnectTrans --> Fetch_resume - Retirement_Retirement1 --> Fetch_resume + Retirement_Retirement --> Fetch_resume Collector_method --> ResultAnnouncement_ResultAnnouncement Forwarder4_read --> ResultAnnouncement_ResultAnnouncement ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done @@ -616,7 +616,7 @@ ResultAnnouncement_ResultAnnouncement --> RS_update ResultAnnouncement_ResultAnnouncement --> LSUDummy_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update - RS_RS4 --> WakeupSelect_WakeupSelect + RS_RS --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -624,10 +624,10 @@ RS_take --> WakeupSelect4_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO4_write - RS_RS3 --> WakeupSelect1_WakeupSelect + RS_RS2 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO5_write - RS_RS1 --> WakeupSelect2_WakeupSelect + RS_RS3 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> HwCounter5__incr WakeupSelect2_WakeupSelect <--> HwCounter6__incr @@ -639,10 +639,10 @@ ConnectTrans3_ConnectTrans --> BasicFifo4_write WakeupSelect2_WakeupSelect --> FIFO7_write WakeupSelect2_WakeupSelect --> FIFO6_write - RS_RS --> WakeupSelect3_WakeupSelect + RS_RS4 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO8_write - RS_RS2 --> WakeupSelect4_WakeupSelect + RS_RS1 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans4_ConnectTrans --> Forwarder5_write ConnectTrans5_ConnectTrans --> Forwarder5_write @@ -661,11 +661,11 @@ CSRRegister2_read --> ConnectTrans8_ConnectTrans ConnectTrans8_ConnectTrans --> BasicFifo5_write LSUDummy_LSUDummy --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond2 --> Forwarder6_write - TransactionManager_accept_cond0_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write + TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write + TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write + TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_accept_cond1 --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond0 --> Forwarder6_write CSRRegister__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> CSRRegister__fu_write CSRRegister1__fu_read --> CSRUnit_CSRUnit @@ -695,37 +695,37 @@ ConnectTrans10_ConnectTrans --> Forwarder7_write BasicFifo5_read --> ConnectTrans9_ConnectTrans CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans - ReorderBuffer_peek --> Retirement_Retirement3 - ReorderBuffer_peek --> Retirement_Retirement + ReorderBuffer_peek --> Retirement_Retirement2 ReorderBuffer_peek --> Retirement_Retirement4 - ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement - ReorderBuffer_peek --> TransactionManager_Retirement_cond0_Retirement - Retirement_Retirement3 --> MethodTryProduct_method - ExceptionCauseRegister_get --> Retirement_Retirement - ExceptionCauseRegister_get --> TransactionManager_Retirement_cond1_Retirement - ExceptionCauseRegister_get --> TransactionManager_Retirement_cond0_Retirement - Retirement_Retirement4 <--> ReorderBuffer_retire - TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire - TransactionManager_Retirement_cond0_Retirement <--> ReorderBuffer_retire - Retirement_Retirement4 <--> LatencyMeasurer1__stop - TransactionManager_Retirement_cond1_Retirement <--> LatencyMeasurer1__stop - TransactionManager_Retirement_cond0_Retirement <--> LatencyMeasurer1__stop - FIFO3_read --> Retirement_Retirement4 - FIFO3_read --> TransactionManager_Retirement_cond1_Retirement - FIFO3_read --> TransactionManager_Retirement_cond0_Retirement - Retirement_Retirement4 --> HwExpHistogram1__add - TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add - TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram1__add - CoreInstructionCounter_decrement --> Retirement_Retirement4 - CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement - CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond0_Retirement - RRAT_peek --> Retirement_Retirement4 - RRAT_peek --> TransactionManager_Retirement_cond1_Retirement - Retirement_Retirement4 --> RegisterFile_free - TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free - TransactionManager_Retirement_cond0_Retirement --> RegisterFile_free - CSRRegister1_read --> Retirement_Retirement1 - Retirement_Retirement1 <--> ExceptionCauseRegister_clear + ReorderBuffer_peek --> Retirement_Retirement3 + ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 + ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 + Retirement_Retirement2 --> MethodTryProduct_method + ExceptionCauseRegister_get --> Retirement_Retirement4 + ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0 + ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 + Retirement_Retirement3 <--> ReorderBuffer_retire + TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire + TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire + Retirement_Retirement3 <--> LatencyMeasurer1__stop + TransactionManager_Retirement_Retirement_cond0 <--> LatencyMeasurer1__stop + TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop + FIFO3_read --> Retirement_Retirement3 + FIFO3_read --> TransactionManager_Retirement_Retirement_cond0 + FIFO3_read --> TransactionManager_Retirement_Retirement_cond1 + Retirement_Retirement3 --> HwExpHistogram1__add + TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add + TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add + CoreInstructionCounter_decrement --> Retirement_Retirement3 + CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 + CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 + RRAT_peek --> Retirement_Retirement3 + RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 + Retirement_Retirement3 --> RegisterFile_free + TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free + TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free + CSRRegister1_read --> Retirement_Retirement + Retirement_Retirement <--> ExceptionCauseRegister_clear GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write @@ -737,53 +737,53 @@ CSRRegister6_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister6_write AdapterTrans1_AdapterTrans_report_interrupt <--> InterruptController_report_interrupt - TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy2 + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement1 + TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement1 + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write + TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister2_write + TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write + TransactionManager_Retirement_Retirement_cond0 <--> InterruptController_entry + TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 + TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit + TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment + CSRRegister7_read --> TransactionManager_Retirement_Retirement_cond0 + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister7_write + CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0 + TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write + TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr + TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy2 - TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy2 - TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue + TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy2 + TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy2 TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 - TransactionManager_accept_cond0_LSUDummy <--> LSURequester_accept_cond0 - WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_LSUDummy - Serializer1_Serializer --> TransactionManager_accept_cond0_LSUDummy - BasicFifo1_read --> TransactionManager_accept_cond0_LSUDummy - BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond1 - WishboneMaster1_result --> TransactionManager_accept_cond0_LSUDummy - WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond1 - Forwarder1_read --> TransactionManager_accept_cond0_LSUDummy - Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1 - TransactionManager_accept_cond0_LSUDummy <--> LSUDummy_LSUDummy1 - TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy1 - LSURequester_accept --> TransactionManager_accept_cond0_LSUDummy - LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1 - TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 - TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement2 - TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement2 - TransactionManager_Retirement_cond1_Retirement --> CSRRegister_write - TransactionManager_Retirement_cond0_Retirement --> CSRRegister_write - TransactionManager_Retirement_cond1_Retirement --> CSRRegister2_write - TransactionManager_Retirement_cond0_Retirement --> CSRRegister2_write - TransactionManager_Retirement_cond1_Retirement <--> InterruptController_entry - TransactionManager_Retirement_cond0_Retirement <--> InterruptController_entry + TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read - TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer2 + TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write + TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request - TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request + TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request + TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 + TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy1 + TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy1 + LSURequester_accept --> TransactionManager_LSUDummy_accept_cond0 + LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1 + TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 + WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 + Serializer1_Serializer3 --> TransactionManager_LSUDummy_accept_cond0 + BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond0 + BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond1 + WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0 + WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond1 + Forwarder1_read --> TransactionManager_LSUDummy_accept_cond0 + Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1 + TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 + TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write + TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer1 TransactionManager_LSUDummy_accept_cond1 <--> LSURequester_accept_cond1 WishboneMasterAdapter1_get_read_response --> TransactionManager_LSUDummy_accept_cond1 - Serializer1_Serializer3 --> TransactionManager_LSUDummy_accept_cond1 - TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement_cond0 - TransactionManager_Retirement_cond0_Retirement --> RRAT_commit - TransactionManager_Retirement_cond0_Retirement <--> DoubleCounterCSR2_increment - CSRRegister7_read --> TransactionManager_Retirement_cond0_Retirement - TransactionManager_Retirement_cond0_Retirement --> CSRRegister7_write - CSRRegister8_read --> TransactionManager_Retirement_cond0_Retirement - TransactionManager_Retirement_cond0_Retirement --> CSRRegister8_write - TransactionManager_Retirement_cond0_Retirement <--> HwCounter9__incr - TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 - TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write - TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer1 + Serializer1_Serializer2 --> TransactionManager_LSUDummy_accept_cond1 diff --git a/api.html b/api.html index e38b5192d..5a9044c0d 100644 --- a/api.html +++ b/api.html @@ -282,7 +282,7 @@

transactron

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 09:21 2024-03-14. + Last updated on 09:48 2024-03-14.

diff --git a/assumptions.html b/assumptions.html index 934d8f494..192151a3b 100644 --- a/assumptions.html +++ b/assumptions.html @@ -104,7 +104,7 @@

List of assumptions made during development

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 09:21 2024-03-14. + Last updated on 09:48 2024-03-14.

diff --git a/auto_graph.html b/auto_graph.html index 67ed89e33..d56101d58 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -87,17 +87,17 @@ Core_DiscardBranchVerify["DiscardBranchVerify"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] WishboneMaster_WishboneMaster["WishboneMaster"] - WishboneMaster_result["result"] WishboneMaster_request["request"] + WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] - Forwarder_write["write"] Forwarder_read["read"] + Forwarder_write["write"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] WishboneMaster1_request["request"] + WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] Forwarder1_read["read"] Forwarder1_write["write"] @@ -110,16 +110,16 @@ Serializer_Serializer["Serializer"] Serializer_Serializer1["Serializer"] subgraph BasicFifo["pending_requests BasicFifo"] - BasicFifo_read["read"] BasicFifo_write["write"] + BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] + WishboneMasterAdapter1_request_read["request_read"] + WishboneMasterAdapter1_get_read_response["get_read_response"] WishboneMasterAdapter1_get_write_response["get_write_response"] WishboneMasterAdapter1_request_write["request_write"] - WishboneMasterAdapter1_get_read_response["get_read_response"] - WishboneMasterAdapter1_request_read["request_read"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] @@ -146,24 +146,24 @@ MethodProduct_method["method"] end subgraph BasicFifo2["free_rf_fifo BasicFifo"] - BasicFifo2_write["write"] BasicFifo2_read["read"] + BasicFifo2_write["write"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_start_refill["start_refill"] + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] subgraph Forwarder2["address_fwd Forwarder"] - Forwarder2_write["write"] Forwarder2_read["read"] + Forwarder2_write["write"] end end subgraph ICache["icache ICache"] + ICache_accept_res["accept_res"] ICache_ICache["ICache"] - ICache_issue_req["issue_req"] ICache_ICache1["ICache"] + ICache_issue_req["issue_req"] ICache_ICache2["ICache"] - ICache_accept_res["accept_res"] ICache_ICache3["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] @@ -181,8 +181,8 @@ HwCounter4__incr["_incr"] end subgraph LatencyMeasurer["req_latency LatencyMeasurer"] - LatencyMeasurer__start["_start"] LatencyMeasurer__stop["_stop"] + LatencyMeasurer__start["_start"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -196,8 +196,8 @@ FIFO2_read["read"] end subgraph Forwarder3["res_fwd Forwarder"] - Forwarder3_read["read"] Forwarder3_write["write"] + Forwarder3_read["read"] end end subgraph FRAT["FRAT FRAT"] @@ -210,15 +210,15 @@ subgraph RegisterFile["RF RegisterFile"] RegisterFile_read2["read2"] RegisterFile_write["write"] - RegisterFile_free["free"] RegisterFile_read1["read1"] + RegisterFile_free["free"] end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_mark_done["mark_done"] - ReorderBuffer_retire["retire"] ReorderBuffer_peek["peek"] + ReorderBuffer_retire["retire"] ReorderBuffer_get_indices["get_indices"] ReorderBuffer_put["put"] + ReorderBuffer_mark_done["mark_done"] subgraph LatencyMeasurer1["perf_rob_wait_time LatencyMeasurer"] LatencyMeasurer1__stop["_stop"] LatencyMeasurer1__start["_start"] @@ -233,9 +233,9 @@ end subgraph Fetch["fetch Fetch"] Fetch_Fetch["Fetch"] + Fetch_resume["resume"] Fetch_stall_exception["stall_exception"] Fetch_Fetch1["Fetch"] - Fetch_resume["resume"] subgraph BasicFifo3["fetch_target_queue BasicFifo"] BasicFifo3_read["read"] BasicFifo3_write["write"] @@ -246,8 +246,8 @@ ExceptionCauseRegister_get["get"] ExceptionCauseRegister_clear["clear"] subgraph BasicFifo4["fu_report_fifo BasicFifo"] - BasicFifo4_write["write"] BasicFifo4_read["read"] + BasicFifo4_write["write"] end subgraph ConnectTrans["report_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -257,8 +257,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_write["write"] Forwarder4_read["read"] + Forwarder4_write["write"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans1["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -276,27 +276,27 @@ MethodProduct1_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_insert["insert"] - RSFuncBlock_get_result["get_result"] RSFuncBlock_select["select"] RSFuncBlock_update["update"] + RSFuncBlock_insert["insert"] + RSFuncBlock_get_result["get_result"] subgraph RS["rs RS"] + RS_take["take"] RS_RS["RS"] RS_RS1["RS"] + RS_select["select"] RS_RS2["RS"] RS_RS3["RS"] - RS_update["update"] - RS_insert["insert"] - RS_take["take"] - RS_select["select"] RS_RS4["RS"] + RS_insert["insert"] + RS_update["update"] end subgraph AluFuncUnit["func_unit_0 AluFuncUnit"] AluFuncUnit_accept["accept"] AluFuncUnit_issue["issue"] subgraph FIFO4["fifo FIFO"] - FIFO4_read["read"] FIFO4_write["write"] + FIFO4_read["read"] end end subgraph WakeupSelect["wakeup_select_0 WakeupSelect"] @@ -341,17 +341,17 @@ ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] subgraph FIFO8["fifo FIFO"] - FIFO8_write["write"] FIFO8_read["read"] + FIFO8_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] + PrivilegedFuncUnit_issue["issue"] PrivilegedFuncUnit_precommit["precommit"] PrivilegedFuncUnit_accept["accept"] - PrivilegedFuncUnit_issue["issue"] subgraph BasicFifo5["fetch_resume_fifo BasicFifo"] BasicFifo5_read["read"] BasicFifo5_write["write"] @@ -387,34 +387,34 @@ end subgraph LSUDummy["rs_block_1 LSUDummy"] LSUDummy_LSUDummy["LSUDummy"] - LSUDummy_update["update"] LSUDummy_precommit["precommit"] LSUDummy_get_result["get_result"] - LSUDummy_select["select"] LSUDummy_LSUDummy1["LSUDummy"] LSUDummy_LSUDummy2["LSUDummy"] + LSUDummy_select["select"] LSUDummy_insert["insert"] + LSUDummy_update["update"] subgraph Forwarder6["forwarder Forwarder"] Forwarder6_write["write"] Forwarder6_read["read"] end subgraph LSURequester["requester LSURequester"] + LSURequester_accept["accept"] LSURequester_accept_cond0["accept_cond0"] + LSURequester_issue_cond1["issue_cond1"] LSURequester_issue["issue"] + LSURequester_issue_cond0["issue_cond0"] LSURequester_accept_cond1["accept_cond1"] - LSURequester_accept["accept"] - LSURequester_issue_cond1["issue_cond1"] LSURequester_issue_cond2["issue_cond2"] - LSURequester_issue_cond0["issue_cond0"] end end subgraph CSRUnit["rs_block_2 CSRUnit"] - CSRUnit_CSRUnit["CSRUnit"] - CSRUnit_insert["insert"] + CSRUnit_precommit["precommit"] CSRUnit_get_result["get_result"] CSRUnit_fetch_resume["fetch_resume"] + CSRUnit_insert["insert"] + CSRUnit_CSRUnit["CSRUnit"] CSRUnit_select["select"] - CSRUnit_precommit["precommit"] CSRUnit_update["update"] end subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"] @@ -451,28 +451,28 @@ GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"] subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"] subgraph CSRRegister["mcause CSRRegister"] - CSRRegister__fu_write["_fu_write"] - CSRRegister_write["write"] CSRRegister__fu_read["_fu_read"] + CSRRegister_write["write"] + CSRRegister__fu_write["_fu_write"] end subgraph CSRRegister1["mtvec CSRRegister"] - CSRRegister1__fu_read["_fu_read"] - CSRRegister1_read["read"] CSRRegister1__fu_write["_fu_write"] + CSRRegister1_read["read"] + CSRRegister1__fu_read["_fu_read"] end subgraph CSRRegister2["mepc CSRRegister"] CSRRegister2_read["read"] - CSRRegister2_write["write"] CSRRegister2__fu_write["_fu_write"] + CSRRegister2_write["write"] CSRRegister2__fu_read["_fu_read"] end end subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister3["register_low CSRRegister"] - CSRRegister3__fu_read["_fu_read"] - CSRRegister3_write["write"] CSRRegister3_read["read"] + CSRRegister3_write["write"] + CSRRegister3__fu_read["_fu_read"] end subgraph CSRRegister4["register_high CSRRegister"] CSRRegister4_read["read"] @@ -483,14 +483,14 @@ subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] DoubleCounterCSR1_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] + CSRRegister5_write["write"] CSRRegister5_read["read"] CSRRegister5__fu_read["_fu_read"] - CSRRegister5_write["write"] end subgraph CSRRegister6["register_high CSRRegister"] + CSRRegister6_write["write"] CSRRegister6__fu_read["_fu_read"] CSRRegister6_read["read"] - CSRRegister6_write["write"] end end end @@ -527,8 +527,8 @@ ROBAllocation_ROBAllocation["ROBAllocation"] end subgraph FIFO13["rs_select_out_buf FIFO"] - FIFO13_write["write"] FIFO13_read["read"] + FIFO13_write["write"] end subgraph RSSelection["rs_selector RSSelection"] RSSelection_RSSelection["RSSelection"] @@ -536,8 +536,8 @@ RSSelection_RSSelection2["RSSelection"] RSSelection_RSSelection3["RSSelection"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -549,13 +549,13 @@ end subgraph Retirement["retirement Retirement"] Retirement_Retirement["Retirement"] + Retirement_core_state["core_state"] Retirement_Retirement1["Retirement"] - Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement2["Retirement"] - Retirement_core_state["core_state"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement3["Retirement"] - Retirement_Retirement_cond0["Retirement_cond0"] Retirement_Retirement4["Retirement"] + Retirement_Retirement_cond0["Retirement_cond0"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister7["register_low CSRRegister"] @@ -586,19 +586,19 @@ end end subgraph TransactionManager["transactionManager TransactionManager"] - TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"] - TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"] - TransactionManager_accept_cond0_LSUDummy["accept_cond0_LSUDummy"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] + TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] + TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] + TransactionManager_LSUDummy_accept_cond0["LSUDummy_accept_cond0"] TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] - TransactionManager_Retirement_cond0_Retirement["Retirement_cond0_Retirement"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] + TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"] end end Core_InitFreeRFFifo --> BasicFifo2_write -Retirement_Retirement4 --> BasicFifo2_write -TransactionManager_Retirement_cond1_Retirement --> BasicFifo2_write -TransactionManager_Retirement_cond0_Retirement --> BasicFifo2_write +Retirement_Retirement3 --> BasicFifo2_write +TransactionManager_Retirement_Retirement_cond0 --> BasicFifo2_write +TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write FIFO6_read --> Core_DiscardBranchVerify WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write @@ -607,20 +607,20 @@ SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request -ICache_ICache <--> HwCounter4__incr -ICache_ICache1 <--> HwCounter3__incr -ICache_ICache1 <--> HwCounter2__incr -ICache_ICache1 <--> HwCounter1__incr -ICache_ICache1 --> Forwarder3_write -ICache_ICache2 --> SimpleCommonBusCacheRefiller_start_refill -ICache_ICache2 --> Forwarder2_write +ICache_ICache2 <--> HwCounter4__incr +ICache_ICache <--> HwCounter3__incr +ICache_ICache <--> HwCounter2__incr +ICache_ICache <--> HwCounter1__incr +ICache_ICache --> Forwarder3_write +ICache_ICache3 --> SimpleCommonBusCacheRefiller_start_refill ICache_ICache3 --> Forwarder2_write -SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache3 -WishboneMasterAdapter_get_read_response --> ICache_ICache3 -Serializer_Serializer --> ICache_ICache3 -BasicFifo_read --> ICache_ICache3 -WishboneMaster_result --> ICache_ICache3 -Forwarder_read --> ICache_ICache3 +ICache_ICache1 --> Forwarder2_write +SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache1 +WishboneMasterAdapter_get_read_response --> ICache_ICache1 +Serializer_Serializer --> ICache_ICache1 +BasicFifo_read --> ICache_ICache1 +WishboneMaster_result --> ICache_ICache1 +Forwarder_read --> ICache_ICache1 Fetch_Fetch1 --> ICache_issue_req Fetch_Fetch1 <--> HwCounter__incr Fetch_Fetch1 <--> LatencyMeasurer__start @@ -650,8 +650,8 @@ RegAllocation_RegAllocation --> FIFO10_write FIFO10_read --> Renaming_Renaming Renaming_Renaming --> FRAT_rename -Retirement_Retirement4 --> FRAT_rename -TransactionManager_Retirement_cond1_Retirement --> FRAT_rename +Retirement_Retirement3 --> FRAT_rename +TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename Renaming_Renaming --> FIFO11_write FIFO11_read --> ROBAllocation_ROBAllocation ROBAllocation_ROBAllocation --> ReorderBuffer_put @@ -660,16 +660,16 @@ ROBAllocation_ROBAllocation --> FIFO12_write FIFO12_read --> RSSelection_RSSelection2 RSSelection_RSSelection2 --> Forwarder8_write -Forwarder8_read --> RSSelection_RSSelection Forwarder8_read --> RSSelection_RSSelection3 Forwarder8_read --> RSSelection_RSSelection1 -RSFuncBlock_select --> RSSelection_RSSelection -RS_select --> RSSelection_RSSelection -RSSelection_RSSelection --> FIFO13_write +Forwarder8_read --> RSSelection_RSSelection +RSFuncBlock_select --> RSSelection_RSSelection3 +RS_select --> RSSelection_RSSelection3 RSSelection_RSSelection3 --> FIFO13_write RSSelection_RSSelection1 --> FIFO13_write -RSSelection_RSSelection3 <--> LSUDummy_select -RSSelection_RSSelection1 <--> CSRUnit_select +RSSelection_RSSelection --> FIFO13_write +RSSelection_RSSelection1 <--> LSUDummy_select +RSSelection_RSSelection <--> CSRUnit_select FIFO13_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion @@ -685,7 +685,7 @@ Collector2_method --> ConnectTrans11_ConnectTrans Forwarder7_read --> ConnectTrans11_ConnectTrans ConnectTrans11_ConnectTrans --> Fetch_resume -Retirement_Retirement1 --> Fetch_resume +Retirement_Retirement --> Fetch_resume Collector_method --> ResultAnnouncement_ResultAnnouncement Forwarder4_read --> ResultAnnouncement_ResultAnnouncement ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done @@ -695,7 +695,7 @@ ResultAnnouncement_ResultAnnouncement --> RS_update ResultAnnouncement_ResultAnnouncement --> LSUDummy_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update -RS_RS4 --> WakeupSelect_WakeupSelect +RS_RS --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -703,10 +703,10 @@ RS_take --> WakeupSelect4_WakeupSelect WakeupSelect_WakeupSelect --> AluFuncUnit_issue WakeupSelect_WakeupSelect --> FIFO4_write -RS_RS3 --> WakeupSelect1_WakeupSelect +RS_RS2 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO5_write -RS_RS1 --> WakeupSelect2_WakeupSelect +RS_RS3 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> HwCounter5__incr WakeupSelect2_WakeupSelect <--> HwCounter6__incr @@ -718,10 +718,10 @@ ConnectTrans3_ConnectTrans --> BasicFifo4_write WakeupSelect2_WakeupSelect --> FIFO7_write WakeupSelect2_WakeupSelect --> FIFO6_write -RS_RS --> WakeupSelect3_WakeupSelect +RS_RS4 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO8_write -RS_RS2 --> WakeupSelect4_WakeupSelect +RS_RS1 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans4_ConnectTrans --> Forwarder5_write ConnectTrans5_ConnectTrans --> Forwarder5_write @@ -740,11 +740,11 @@ CSRRegister2_read --> ConnectTrans8_ConnectTrans ConnectTrans8_ConnectTrans --> BasicFifo5_write LSUDummy_LSUDummy --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond2 --> Forwarder6_write -TransactionManager_accept_cond0_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write +TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write +TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write +TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write TransactionManager_LSUDummy_accept_cond1 --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond0 --> Forwarder6_write CSRRegister__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> CSRRegister__fu_write CSRRegister1__fu_read --> CSRUnit_CSRUnit @@ -774,37 +774,37 @@ ConnectTrans10_ConnectTrans --> Forwarder7_write BasicFifo5_read --> ConnectTrans9_ConnectTrans CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans -ReorderBuffer_peek --> Retirement_Retirement3 -ReorderBuffer_peek --> Retirement_Retirement +ReorderBuffer_peek --> Retirement_Retirement2 ReorderBuffer_peek --> Retirement_Retirement4 -ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement -ReorderBuffer_peek --> TransactionManager_Retirement_cond0_Retirement -Retirement_Retirement3 --> MethodTryProduct_method -ExceptionCauseRegister_get --> Retirement_Retirement -ExceptionCauseRegister_get --> TransactionManager_Retirement_cond1_Retirement -ExceptionCauseRegister_get --> TransactionManager_Retirement_cond0_Retirement -Retirement_Retirement4 <--> ReorderBuffer_retire -TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire -TransactionManager_Retirement_cond0_Retirement <--> ReorderBuffer_retire -Retirement_Retirement4 <--> LatencyMeasurer1__stop -TransactionManager_Retirement_cond1_Retirement <--> LatencyMeasurer1__stop -TransactionManager_Retirement_cond0_Retirement <--> LatencyMeasurer1__stop -FIFO3_read --> Retirement_Retirement4 -FIFO3_read --> TransactionManager_Retirement_cond1_Retirement -FIFO3_read --> TransactionManager_Retirement_cond0_Retirement -Retirement_Retirement4 --> HwExpHistogram1__add -TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add -TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram1__add -CoreInstructionCounter_decrement --> Retirement_Retirement4 -CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement -CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond0_Retirement -RRAT_peek --> Retirement_Retirement4 -RRAT_peek --> TransactionManager_Retirement_cond1_Retirement -Retirement_Retirement4 --> RegisterFile_free -TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free -TransactionManager_Retirement_cond0_Retirement --> RegisterFile_free -CSRRegister1_read --> Retirement_Retirement1 -Retirement_Retirement1 <--> ExceptionCauseRegister_clear +ReorderBuffer_peek --> Retirement_Retirement3 +ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 +ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 +Retirement_Retirement2 --> MethodTryProduct_method +ExceptionCauseRegister_get --> Retirement_Retirement4 +ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0 +ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 +Retirement_Retirement3 <--> ReorderBuffer_retire +TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire +TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire +Retirement_Retirement3 <--> LatencyMeasurer1__stop +TransactionManager_Retirement_Retirement_cond0 <--> LatencyMeasurer1__stop +TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop +FIFO3_read --> Retirement_Retirement3 +FIFO3_read --> TransactionManager_Retirement_Retirement_cond0 +FIFO3_read --> TransactionManager_Retirement_Retirement_cond1 +Retirement_Retirement3 --> HwExpHistogram1__add +TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add +TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add +CoreInstructionCounter_decrement --> Retirement_Retirement3 +CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 +CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 +RRAT_peek --> Retirement_Retirement3 +RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 +Retirement_Retirement3 --> RegisterFile_free +TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free +TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free +CSRRegister1_read --> Retirement_Retirement +Retirement_Retirement <--> ExceptionCauseRegister_clear GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write @@ -816,56 +816,56 @@ CSRRegister6_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister6_write AdapterTrans1_AdapterTrans_report_interrupt <--> InterruptController_report_interrupt -TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy2 +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement1 +TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement1 +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write +TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister2_write +TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write +TransactionManager_Retirement_Retirement_cond0 <--> InterruptController_entry +TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 +TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit +TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment +CSRRegister7_read --> TransactionManager_Retirement_Retirement_cond0 +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister7_write +CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0 +TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write +TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr +TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy2 -TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy2 -TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue +TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy2 +TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy2 TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 -TransactionManager_accept_cond0_LSUDummy <--> LSURequester_accept_cond0 -WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_LSUDummy -Serializer1_Serializer --> TransactionManager_accept_cond0_LSUDummy -BasicFifo1_read --> TransactionManager_accept_cond0_LSUDummy -BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond1 -WishboneMaster1_result --> TransactionManager_accept_cond0_LSUDummy -WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond1 -Forwarder1_read --> TransactionManager_accept_cond0_LSUDummy -Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1 -TransactionManager_accept_cond0_LSUDummy <--> LSUDummy_LSUDummy1 -TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy1 -LSURequester_accept --> TransactionManager_accept_cond0_LSUDummy -LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1 -TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 -TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement2 -TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement2 -TransactionManager_Retirement_cond1_Retirement --> CSRRegister_write -TransactionManager_Retirement_cond0_Retirement --> CSRRegister_write -TransactionManager_Retirement_cond1_Retirement --> CSRRegister2_write -TransactionManager_Retirement_cond0_Retirement --> CSRRegister2_write -TransactionManager_Retirement_cond1_Retirement <--> InterruptController_entry -TransactionManager_Retirement_cond0_Retirement <--> InterruptController_entry +TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read -TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer2 +TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write +TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request -TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request +TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request +TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 +TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy1 +TransactionManager_LSUDummy_accept_cond1 <--> LSUDummy_LSUDummy1 +LSURequester_accept --> TransactionManager_LSUDummy_accept_cond0 +LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1 +TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 +WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 +Serializer1_Serializer3 --> TransactionManager_LSUDummy_accept_cond0 +BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond0 +BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond1 +WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0 +WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond1 +Forwarder1_read --> TransactionManager_LSUDummy_accept_cond0 +Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1 +TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 +TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write +TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer1 TransactionManager_LSUDummy_accept_cond1 <--> LSURequester_accept_cond1 WishboneMasterAdapter1_get_read_response --> TransactionManager_LSUDummy_accept_cond1 -Serializer1_Serializer3 --> TransactionManager_LSUDummy_accept_cond1 -TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement_cond0 -TransactionManager_Retirement_cond0_Retirement --> RRAT_commit -TransactionManager_Retirement_cond0_Retirement <--> DoubleCounterCSR2_increment -CSRRegister7_read --> TransactionManager_Retirement_cond0_Retirement -TransactionManager_Retirement_cond0_Retirement --> CSRRegister7_write -CSRRegister8_read --> TransactionManager_Retirement_cond0_Retirement -TransactionManager_Retirement_cond0_Retirement --> CSRRegister8_write -TransactionManager_Retirement_cond0_Retirement <--> HwCounter9__incr -TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 -TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write -TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer1 +Serializer1_Serializer2 --> TransactionManager_LSUDummy_accept_cond1 @@ -876,7 +876,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 09:21 2024-03-14. + Last updated on 09:48 2024-03-14.

diff --git a/components/icache.html b/components/icache.html index c6ba4ad55..d96ab1855 100644 --- a/components/icache.html +++ b/components/icache.html @@ -131,7 +131,7 @@

Address mapping example

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diff --git a/coreblocks.cache.html b/coreblocks.cache.html index b818efb48..e32069d2e 100644 --- a/coreblocks.cache.html +++ b/coreblocks.cache.html @@ -241,7 +241,7 @@

Submodules

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diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html index a93e1a3e1..0ab4adb11 100644 --- a/coreblocks.frontend.html +++ b/coreblocks.frontend.html @@ -368,7 +368,7 @@

Submodules

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diff --git a/coreblocks.fu.html b/coreblocks.fu.html index da98066af..027d74613 100644 --- a/coreblocks.fu.html +++ b/coreblocks.fu.html @@ -965,7 +965,7 @@

Submodules

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diff --git a/coreblocks.fu.unsigned_multiplication.html b/coreblocks.fu.unsigned_multiplication.html index c46c9b6e0..16135769b 100644 --- a/coreblocks.fu.unsigned_multiplication.html +++ b/coreblocks.fu.unsigned_multiplication.html @@ -237,7 +237,7 @@

Submodules

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diff --git a/coreblocks.html b/coreblocks.html index 1237650ed..520f75a13 100644 --- a/coreblocks.html +++ b/coreblocks.html @@ -234,7 +234,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 09:21 2024-03-14. + Last updated on 09:48 2024-03-14.

diff --git a/coreblocks.lsu.html b/coreblocks.lsu.html index 36d113c3c..382ea054d 100644 --- a/coreblocks.lsu.html +++ b/coreblocks.lsu.html @@ -247,7 +247,7 @@

Submodules

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diff --git a/coreblocks.params.html b/coreblocks.params.html index a9ff75406..01a6ba421 100644 --- a/coreblocks.params.html +++ b/coreblocks.params.html @@ -2690,7 +2690,7 @@

Submodules

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diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html index 6acdc123f..0b8e695b8 100644 --- a/coreblocks.peripherals.html +++ b/coreblocks.peripherals.html @@ -744,7 +744,7 @@

Submodules

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diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html index a71fac530..417cf13cd 100644 --- a/coreblocks.scheduler.html +++ b/coreblocks.scheduler.html @@ -191,7 +191,7 @@

Submodules

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diff --git a/coreblocks.stages.html b/coreblocks.stages.html index 4327f1258..3197814d1 100644 --- a/coreblocks.stages.html +++ b/coreblocks.stages.html @@ -263,7 +263,7 @@

Submodules

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diff --git a/coreblocks.structs_common.html b/coreblocks.structs_common.html index 318ceeb70..25f7aafad 100644 --- a/coreblocks.structs_common.html +++ b/coreblocks.structs_common.html @@ -522,7 +522,7 @@

Submodules

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diff --git a/coreblocks.utils.html b/coreblocks.utils.html index 0059cb8e0..5a2ad80b1 100644 --- a/coreblocks.utils.html +++ b/coreblocks.utils.html @@ -149,7 +149,7 @@

Submodules

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diff --git a/current-graph.html b/current-graph.html index 32f5207c1..c049f9790 100644 --- a/current-graph.html +++ b/current-graph.html @@ -93,17 +93,17 @@

Full transaction-method graph

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diff --git a/development-environment.html b/development-environment.html index 5a1c4b96e..365e586d5 100644 --- a/development-environment.html +++ b/development-environment.html @@ -209,7 +209,7 @@

tprof.py

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diff --git a/genindex.html b/genindex.html index d1befd06c..023c4567f 100644 --- a/genindex.html +++ b/genindex.html @@ -3921,7 +3921,7 @@

Z

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diff --git a/home.html b/home.html index 471726678..2ffa82334 100644 --- a/home.html +++ b/home.html @@ -129,7 +129,7 @@

Documentation

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diff --git a/index.html b/index.html index 16998b3e6..15149899b 100644 --- a/index.html +++ b/index.html @@ -229,7 +229,7 @@

Coreblocks

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diff --git a/miscellany/exceptions-summary.html b/miscellany/exceptions-summary.html index bc2c63032..420bfa01d 100644 --- a/miscellany/exceptions-summary.html +++ b/miscellany/exceptions-summary.html @@ -271,7 +271,7 @@

Summary

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diff --git a/modules-coreblocks.html b/modules-coreblocks.html index 8e160ae5f..faaedd992 100644 --- a/modules-coreblocks.html +++ b/modules-coreblocks.html @@ -203,7 +203,7 @@

coreblocks

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diff --git a/modules-transactron.html b/modules-transactron.html index 2dc13be74..1ef7d9e23 100644 --- a/modules-transactron.html +++ b/modules-transactron.html @@ -149,7 +149,7 @@

transactron

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diff --git a/problem-checklist.html b/problem-checklist.html index 31c8cbde4..3a1d8631b 100644 --- a/problem-checklist.html +++ b/problem-checklist.html @@ -105,7 +105,7 @@

Problem checklist

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diff --git a/py-modindex.html b/py-modindex.html index 78cb0576a..e0ad3cc6e 100644 --- a/py-modindex.html +++ b/py-modindex.html @@ -618,7 +618,7 @@

Python Module Index

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diff --git a/scheduler/overview.html b/scheduler/overview.html index 9d10d5b0a..48429d785 100644 --- a/scheduler/overview.html +++ b/scheduler/overview.html @@ -146,7 +146,7 @@

More detailed description of each block

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diff --git a/search.html b/search.html index 1fb50efa2..4a7055c1e 100644 --- a/search.html +++ b/search.html @@ -101,7 +101,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 09:21 2024-03-14. + Last updated on 09:48 2024-03-14.

diff --git a/shared-structs/implementation/rs-impl.html b/shared-structs/implementation/rs-impl.html index ea8bbc9ed..71695ebba 100644 --- a/shared-structs/implementation/rs-impl.html +++ b/shared-structs/implementation/rs-impl.html @@ -252,7 +252,7 @@

Read and clean row

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External interface signals

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Regression tests manual execution

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diff --git a/transactions.html b/transactions.html index 5713da55f..191734064 100644 --- a/transactions.html +++ b/transactions.html @@ -409,7 +409,7 @@

Transaction and method nesting

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diff --git a/transactron.html b/transactron.html index b5115876e..6cabac317 100644 --- a/transactron.html +++ b/transactron.html @@ -1791,7 +1791,7 @@

Submodules

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Submodules

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diff --git a/transactron.testing.html b/transactron.testing.html index 4920ae592..363f8ef0c 100644 --- a/transactron.testing.html +++ b/transactron.testing.html @@ -399,7 +399,7 @@

Submodules

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diff --git a/transactron.utils.amaranth_ext.html b/transactron.utils.amaranth_ext.html index ada0a00ca..cbd087571 100644 --- a/transactron.utils.amaranth_ext.html +++ b/transactron.utils.amaranth_ext.html @@ -293,7 +293,7 @@

Submodules

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Submodules

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