From 8a4f0bf04ef0d6cbfe4d5dbcdd2ff62f82bdef2b Mon Sep 17 00:00:00 2001 From: Marek Materzok Date: Tue, 26 Nov 2024 10:03:57 +0100 Subject: [PATCH] Fix test --- test/test_core.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/test/test_core.py b/test/test_core.py index 867ed3e15..e5f02e279 100644 --- a/test/test_core.py +++ b/test/test_core.py @@ -70,7 +70,8 @@ def get_phys_reg_rrat(self, sim: TestbenchContext, reg_id): return sim.get(self.m.core.RRAT.entries[reg_id]) def get_arch_reg_val(self, sim: TestbenchContext, reg_id): - return sim.get(self.m.core.RF.entries[(self.get_phys_reg_rrat(sim, reg_id))].reg_val) + # TODO: better stubs for memory, remove ignore + return sim.get(self.m.core.RF.entries.data[(self.get_phys_reg_rrat(sim, reg_id))]) # type: ignore class TestCoreAsmSourceBase(TestCoreBase):