diff --git a/test/conftest.py b/test/conftest.py index c14a4394b..a291b488d 100644 --- a/test/conftest.py +++ b/test/conftest.py @@ -106,9 +106,8 @@ def pytest_runtest_setup(item: pytest.Item): if item.config.getoption("--coreblocks-profile", False): # type: ignore os.environ["__TRANSACTRON_PROFILE"] = "1" - os.environ["__TRANSACTRON_LOG_FILTER"] = item.config.getoption("--coreblocks-log-filter", default=".*") # type: ignore + log_filter = item.config.getoption("--coreblocks-log-filter") + os.environ["__TRANSACTRON_LOG_FILTER"] = ".*" if not isinstance(log_filter, str) else log_filter - log_level = item.config.getoption("--log-level") # type: ignore - if log_level is None: - log_level = "WARNING" - os.environ["__TRANSACTRON_LOG_LEVEL"] = log_level + log_level = item.config.getoption("--log-level") + os.environ["__TRANSACTRON_LOG_LEVEL"] = "WARNING" if not isinstance(log_level, str) else log_level diff --git a/test/transactron/testing/test_log.py b/test/transactron/testing/test_log.py index 99040a4a7..69f537fdd 100644 --- a/test/transactron/testing/test_log.py +++ b/test/transactron/testing/test_log.py @@ -1,13 +1,12 @@ -from unittest.mock import patch -from io import StringIO - from amaranth import * from transactron import * from transactron.testing import TestCaseWithSimulator from transactron.lib import logging -log = logging.HardwareLogger("test") +LOGGER_NAME = "test_logger" + +log = logging.HardwareLogger(LOGGER_NAME) class LogTest(Elaboratable): @@ -65,8 +64,7 @@ def elaborate(self, platform): class TestLog(TestCaseWithSimulator): - @patch("sys.stdout", new_callable=StringIO) - def test_log(self, stdout): + def test_log(self): m = LogTest() def proc(): @@ -74,39 +72,53 @@ def proc(): yield yield m.input.eq(i) - with self.run_simulation(m) as sim: - sim.add_sync_process(proc) + with self.assertLogs(LOGGER_NAME) as logs: + with self.run_simulation(m) as sim: + sim.add_sync_process(proc) - self.assertIn("Log triggered under Amaranth If value+3=0x2d", stdout.getvalue()) + self.assertIn( + "WARNING:test_logger:test/transactron/testing/test_log.py:21] Log triggered under Amaranth If value+3=0x2d", + logs.output, + ) for i in range(0, 50, 2): - self.assertIn(f"Input is even! input={i}, counter={i + 2}", stdout.getvalue()) - - @patch("sys.stdout", new_callable=StringIO) - def test_error_log(self, stdout): + expected_msg = ( + "WARNING:test_logger:test/transactron/testing/test_log.py:23] " + + f"Input is even! input={i}, counter={i + 2}" + ) + self.assertIn( + expected_msg, + logs.output, + ) + + def test_error_log(self): m = ErrorLogTest() def proc(): yield yield m.input.eq(1) - with self.assertRaises(AssertionError): - with self.run_simulation(m) as sim: - sim.add_sync_process(proc) + with self.assertLogs(LOGGER_NAME) as logs: + with self.assertRaises(AssertionError): + with self.run_simulation(m) as sim: + sim.add_sync_process(proc) - extected_out = "Input is different than output! input=0x1 output=0x0" - self.assertIn(extected_out, stdout.getvalue()) + extected_out = ( + "ERROR:test_logger:test/transactron/testing/test_log.py:40] " + + "Input is different than output! input=0x1 output=0x0" + ) + self.assertIn(extected_out, logs.output) - @patch("sys.stdout", new_callable=StringIO) - def test_assertion(self, stdout): + def test_assertion(self): m = AssertionTest() def proc(): yield yield m.input.eq(1) - with self.assertRaises(AssertionError): - with self.run_simulation(m) as sim: - sim.add_sync_process(proc) + with self.assertLogs(LOGGER_NAME) as logs: + with self.assertRaises(AssertionError): + with self.run_simulation(m) as sim: + sim.add_sync_process(proc) - extected_out = "Output differs" - self.assertIn(extected_out, stdout.getvalue()) + extected_out = "ERROR:test_logger:test/transactron/testing/test_log.py:61] Output differs" + self.assertIn(extected_out, logs.output)