diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree
index 87706c86c..5936720f8 100644
Binary files a/.doctrees/api.doctree and b/.doctrees/api.doctree differ
diff --git a/.doctrees/auto_graph.doctree b/.doctrees/auto_graph.doctree
index 7cf68705b..1515be415 100644
Binary files a/.doctrees/auto_graph.doctree and b/.doctrees/auto_graph.doctree differ
diff --git a/.doctrees/current-graph.doctree b/.doctrees/current-graph.doctree
index 08f524e7c..2f80d0143 100644
Binary files a/.doctrees/current-graph.doctree and b/.doctrees/current-graph.doctree differ
diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle
index d63b72ef7..9dbd012d9 100644
Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ
diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt
index fbf41fbeb..a49b8ce33 100644
--- a/_sources/auto_graph.rst.txt
+++ b/_sources/auto_graph.rst.txt
@@ -4,21 +4,21 @@
        subgraph TransactionModule["TransactionModule"]
            subgraph CoreTestElaboratable["elaboratable CoreTestElaboratable"]
                subgraph Core["core Core"]
-                   Core_InitFreeRFFifo["InitFreeRFFifo"]
                    Core_DiscardBranchVerify["DiscardBranchVerify"]
+                   Core_InitFreeRFFifo["InitFreeRFFifo"]
                    subgraph WishboneMaster["wb_master_instr WishboneMaster"]
-                       WishboneMaster_request["request"]
                        WishboneMaster_WishboneMaster["WishboneMaster"]
                        WishboneMaster_result["result"]
+                       WishboneMaster_request["request"]
                        subgraph Forwarder["result Forwarder"]
-                           Forwarder_write["write"]
                            Forwarder_read["read"]
+                           Forwarder_write["write"]
                        end
                    end
                    subgraph WishboneMaster1["wb_master_data WishboneMaster"]
-                       WishboneMaster1_request["request"]
-                       WishboneMaster1_WishboneMaster["WishboneMaster"]
                        WishboneMaster1_result["result"]
+                       WishboneMaster1_WishboneMaster["WishboneMaster"]
+                       WishboneMaster1_request["request"]
                        subgraph Forwarder1["result Forwarder"]
                            Forwarder1_read["read"]
                            Forwarder1_write["write"]
@@ -31,15 +31,15 @@
                            Serializer_Serializer["Serializer"]
                            Serializer_Serializer1["Serializer"]
                            subgraph BasicFifo["pending_requests BasicFifo"]
-                               BasicFifo_read["read"]
                                BasicFifo_write["write"]
+                               BasicFifo_read["read"]
                            end
                        end
                    end
                    subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"]
                        WishboneMasterAdapter1_get_write_response["get_write_response"]
-                       WishboneMasterAdapter1_get_read_response["get_read_response"]
                        WishboneMasterAdapter1_request_read["request_read"]
+                       WishboneMasterAdapter1_get_read_response["get_read_response"]
                        WishboneMasterAdapter1_request_write["request_write"]
                        subgraph Serializer1["bus_serializer Serializer"]
                            Serializer1_Serializer["Serializer"]
@@ -47,8 +47,8 @@
                            Serializer1_Serializer2["Serializer"]
                            Serializer1_Serializer3["Serializer"]
                            subgraph BasicFifo1["pending_requests BasicFifo"]
-                               BasicFifo1_write["write"]
                                BasicFifo1_read["read"]
+                               BasicFifo1_write["write"]
                            end
                        end
                    end
@@ -67,25 +67,25 @@
                        MethodProduct_method["method"]
                    end
                    subgraph BasicFifo2["free_rf_fifo BasicFifo"]
-                       BasicFifo2_read["read"]
                        BasicFifo2_write["write"]
+                       BasicFifo2_read["read"]
                    end
                    subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"]
                        SimpleCommonBusCacheRefiller_accept_refill["accept_refill"]
-                       SimpleCommonBusCacheRefiller_start_refill["start_refill"]
                        SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"]
+                       SimpleCommonBusCacheRefiller_start_refill["start_refill"]
                        subgraph Forwarder2["address_fwd Forwarder"]
-                           Forwarder2_write["write"]
                            Forwarder2_read["read"]
+                           Forwarder2_write["write"]
                        end
                    end
                    subgraph ICache["icache ICache"]
-                       ICache_issue_req["issue_req"]
                        ICache_ICache["ICache"]
                        ICache_ICache1["ICache"]
-                       ICache_accept_res["accept_res"]
                        ICache_ICache2["ICache"]
                        ICache_ICache3["ICache"]
+                       ICache_accept_res["accept_res"]
+                       ICache_issue_req["issue_req"]
                        subgraph HwCounter["perf_loads HwCounter"]
                            HwCounter__incr["_incr"]
                        end
@@ -117,21 +117,21 @@
                            FIFO2_read["read"]
                        end
                        subgraph Forwarder3["res_fwd Forwarder"]
-                           Forwarder3_read["read"]
                            Forwarder3_write["write"]
+                           Forwarder3_read["read"]
                        end
                    end
                    subgraph FRAT["FRAT FRAT"]
                        FRAT_rename["rename"]
                    end
                    subgraph RRAT["RRAT RRAT"]
-                       RRAT_commit["commit"]
                        RRAT_peek["peek"]
+                       RRAT_commit["commit"]
                    end
                    subgraph RegisterFile["RF RegisterFile"]
-                       RegisterFile_free["free"]
-                       RegisterFile_read2["read2"]
                        RegisterFile_read1["read1"]
+                       RegisterFile_read2["read2"]
+                       RegisterFile_free["free"]
                        RegisterFile_write["write"]
                    end
                    subgraph ReorderBuffer["ROB ReorderBuffer"]
@@ -141,21 +141,21 @@
                        ReorderBuffer_get_indices["get_indices"]
                        ReorderBuffer_mark_done["mark_done"]
                        subgraph LatencyMeasurer1["perf_rob_wait_time LatencyMeasurer"]
-                           LatencyMeasurer1__stop["_stop"]
                            LatencyMeasurer1__start["_start"]
+                           LatencyMeasurer1__stop["_stop"]
                            subgraph HwExpHistogram1["histogram HwExpHistogram"]
                                HwExpHistogram1__add["_add"]
                            end
                            subgraph FIFO3["fifo FIFO"]
-                               FIFO3_write["write"]
                                FIFO3_read["read"]
+                               FIFO3_write["write"]
                            end
                        end
                    end
                    subgraph Fetch["fetch Fetch"]
+                       Fetch_stall_exception["stall_exception"]
                        Fetch_Fetch["Fetch"]
                        Fetch_resume["resume"]
-                       Fetch_stall_exception["stall_exception"]
                        Fetch_Fetch1["Fetch"]
                        subgraph BasicFifo3["fetch_target_queue BasicFifo"]
                            BasicFifo3_write["write"]
@@ -164,8 +164,8 @@
                    end
                    subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"]
                        ExceptionCauseRegister_report["report"]
-                       ExceptionCauseRegister_get["get"]
                        ExceptionCauseRegister_clear["clear"]
+                       ExceptionCauseRegister_get["get"]
                        subgraph BasicFifo4["fu_report_fifo BasicFifo"]
                            BasicFifo4_write["write"]
                            BasicFifo4_read["read"]
@@ -178,8 +178,8 @@
                        subgraph Collector["result_collector Collector"]
                            Collector_method["method"]
                            subgraph Forwarder4["forwarder Forwarder"]
-                               Forwarder4_write["write"]
                                Forwarder4_read["read"]
+                               Forwarder4_write["write"]
                            end
                            subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"]
                                subgraph ConnectTrans1["ManyToOneConnectTrans_input_0 ConnectTrans"]
@@ -197,27 +197,27 @@
                            MethodProduct1_method["method"]
                        end
                        subgraph RSFuncBlock["rs_block_0 RSFuncBlock"]
+                           RSFuncBlock_select["select"]
+                           RSFuncBlock_get_result["get_result"]
                            RSFuncBlock_insert["insert"]
                            RSFuncBlock_update["update"]
-                           RSFuncBlock_get_result["get_result"]
-                           RSFuncBlock_select["select"]
                            subgraph RS["rs RS"]
-                               RS_take["take"]
-                               RS_RS["RS"]
                                RS_insert["insert"]
+                               RS_RS["RS"]
+                               RS_take["take"]
                                RS_RS1["RS"]
                                RS_RS2["RS"]
-                               RS_select["select"]
                                RS_RS3["RS"]
-                               RS_update["update"]
                                RS_RS4["RS"]
+                               RS_update["update"]
+                               RS_select["select"]
                            end
                            subgraph AluFuncUnit["func_unit_0 AluFuncUnit"]
                                AluFuncUnit_issue["issue"]
                                AluFuncUnit_accept["accept"]
                                subgraph FIFO4["fifo FIFO"]
-                                   FIFO4_read["read"]
                                    FIFO4_write["write"]
+                                   FIFO4_read["read"]
                                end
                            end
                            subgraph WakeupSelect["wakeup_select_0 WakeupSelect"]
@@ -238,8 +238,8 @@
                                JumpBranchFuncUnit_accept["accept"]
                                JumpBranchFuncUnit_issue["issue"]
                                subgraph FIFO6["fifo_branch_resolved FIFO"]
-                                   FIFO6_read["read"]
                                    FIFO6_write["write"]
+                                   FIFO6_read["read"]
                                end
                                subgraph HwCounter5["perf_jumps HwCounter"]
                                    HwCounter5__incr["_incr"]
@@ -259,8 +259,8 @@
                                WakeupSelect2_WakeupSelect["WakeupSelect"]
                            end
                            subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"]
-                               ExceptionFuncUnit_issue["issue"]
                                ExceptionFuncUnit_accept["accept"]
+                               ExceptionFuncUnit_issue["issue"]
                                subgraph FIFO8["fifo FIFO"]
                                    FIFO8_write["write"]
                                    FIFO8_read["read"]
@@ -284,8 +284,8 @@
                            subgraph Collector1["collector Collector"]
                                Collector1_method["method"]
                                subgraph Forwarder5["forwarder Forwarder"]
-                                   Forwarder5_read["read"]
                                    Forwarder5_write["write"]
+                                   Forwarder5_read["read"]
                                end
                                subgraph ManyToOneConnectTrans1["connect ManyToOneConnectTrans"]
                                    subgraph ConnectTrans4["ManyToOneConnectTrans_input_0 ConnectTrans"]
@@ -308,41 +308,41 @@
                        end
                        subgraph LSUDummy["rs_block_1 LSUDummy"]
                            LSUDummy_update["update"]
-                           LSUDummy_LSUDummy["LSUDummy"]
                            LSUDummy_select["select"]
-                           LSUDummy_LSUDummy1["LSUDummy"]
+                           LSUDummy_insert["insert"]
+                           LSUDummy_LSUDummy["LSUDummy"]
                            LSUDummy_precommit["precommit"]
-                           LSUDummy_get_result["get_result"]
+                           LSUDummy_LSUDummy1["LSUDummy"]
                            LSUDummy_LSUDummy2["LSUDummy"]
-                           LSUDummy_insert["insert"]
+                           LSUDummy_get_result["get_result"]
                            subgraph Forwarder6["forwarder Forwarder"]
-                               Forwarder6_read["read"]
                                Forwarder6_write["write"]
+                               Forwarder6_read["read"]
                            end
                            subgraph LSURequester["requester LSURequester"]
-                               LSURequester_issue_cond2["issue_cond2"]
+                               LSURequester_issue_cond1["issue_cond1"]
                                LSURequester_issue_cond0["issue_cond0"]
                                LSURequester_accept["accept"]
+                               LSURequester_issue_cond2["issue_cond2"]
                                LSURequester_issue["issue"]
                                LSURequester_accept_cond0["accept_cond0"]
-                               LSURequester_issue_cond1["issue_cond1"]
                                LSURequester_accept_cond1["accept_cond1"]
                            end
                        end
                        subgraph CSRUnit["rs_block_2 CSRUnit"]
-                           CSRUnit_update["update"]
-                           CSRUnit_CSRUnit["CSRUnit"]
+                           CSRUnit_insert["insert"]
                            CSRUnit_select["select"]
+                           CSRUnit_precommit["precommit"]
                            CSRUnit_fetch_resume["fetch_resume"]
                            CSRUnit_get_result["get_result"]
-                           CSRUnit_precommit["precommit"]
-                           CSRUnit_insert["insert"]
+                           CSRUnit_update["update"]
+                           CSRUnit_CSRUnit["CSRUnit"]
                        end
                        subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"]
                            MethodTryProduct_MethodTryProduct["MethodTryProduct"]
                            MethodTryProduct_MethodTryProduct1["MethodTryProduct"]
-                           MethodTryProduct_method["method"]
                            MethodTryProduct_MethodTryProduct2["MethodTryProduct"]
+                           MethodTryProduct_method["method"]
                        end
                        subgraph Collector2["FetchResumeKey_unifier Collector"]
                            Collector2_method["method"]
@@ -364,60 +364,60 @@
                        ResultAnnouncement_ResultAnnouncement["ResultAnnouncement"]
                    end
                    subgraph InterruptController["interrupt_controller InterruptController"]
-                       InterruptController_mret["mret"]
                        InterruptController_report_interrupt["report_interrupt"]
+                       InterruptController_mret["mret"]
                        InterruptController_entry["entry"]
                    end
                    subgraph GenericCSRRegisters["csr_generic GenericCSRRegisters"]
                        GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"]
                        subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"]
                            subgraph CSRRegister["mcause CSRRegister"]
-                               CSRRegister__fu_read["_fu_read"]
                                CSRRegister_write["write"]
+                               CSRRegister__fu_read["_fu_read"]
                                CSRRegister__fu_write["_fu_write"]
                            end
                            subgraph CSRRegister1["mtvec CSRRegister"]
+                               CSRRegister1__fu_read["_fu_read"]
                                CSRRegister1__fu_write["_fu_write"]
                                CSRRegister1_read["read"]
-                               CSRRegister1__fu_read["_fu_read"]
                            end
                            subgraph CSRRegister2["mepc CSRRegister"]
-                               CSRRegister2__fu_write["_fu_write"]
                                CSRRegister2__fu_read["_fu_read"]
-                               CSRRegister2_write["write"]
                                CSRRegister2_read["read"]
+                               CSRRegister2__fu_write["_fu_write"]
+                               CSRRegister2_write["write"]
                            end
                        end
                        subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"]
                            DoubleCounterCSR_increment["increment"]
                            subgraph CSRRegister3["register_low CSRRegister"]
-                               CSRRegister3_read["read"]
-                               CSRRegister3_write["write"]
                                CSRRegister3__fu_read["_fu_read"]
+                               CSRRegister3_write["write"]
+                               CSRRegister3_read["read"]
                            end
                            subgraph CSRRegister4["register_high CSRRegister"]
-                               CSRRegister4_write["write"]
-                               CSRRegister4_read["read"]
                                CSRRegister4__fu_read["_fu_read"]
+                               CSRRegister4_read["read"]
+                               CSRRegister4_write["write"]
                            end
                        end
                        subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"]
                            DoubleCounterCSR1_increment["increment"]
                            subgraph CSRRegister5["register_low CSRRegister"]
-                               CSRRegister5_read["read"]
                                CSRRegister5__fu_read["_fu_read"]
+                               CSRRegister5_read["read"]
                                CSRRegister5_write["write"]
                            end
                            subgraph CSRRegister6["register_high CSRRegister"]
-                               CSRRegister6_write["write"]
                                CSRRegister6__fu_read["_fu_read"]
                                CSRRegister6_read["read"]
+                               CSRRegister6_write["write"]
                            end
                        end
                    end
                    subgraph FIFO9["fifo_decode FIFO"]
-                       FIFO9_read["read"]
                        FIFO9_write["write"]
+                       FIFO9_read["read"]
                    end
                    subgraph DecodeStage["decode DecodeStage"]
                        DecodeStage_DecodeStage["DecodeStage"]
@@ -427,8 +427,8 @@
                    end
                    subgraph Scheduler["scheduler Scheduler"]
                        subgraph FIFO10["alloc_rename_buf FIFO"]
-                           FIFO10_write["write"]
                            FIFO10_read["read"]
+                           FIFO10_write["write"]
                        end
                        subgraph RegAllocation["reg_alloc RegAllocation"]
                            RegAllocation_RegAllocation["RegAllocation"]
@@ -457,8 +457,8 @@
                            RSSelection_RSSelection2["RSSelection"]
                            RSSelection_RSSelection3["RSSelection"]
                            subgraph Forwarder8["forwarder Forwarder"]
-                               Forwarder8_read["read"]
                                Forwarder8_write["write"]
+                               Forwarder8_read["read"]
                            end
                        end
                        subgraph RSInsertion["rs_insertion RSInsertion"]
@@ -469,19 +469,19 @@
                        ConnectTrans11_ConnectTrans["ConnectTrans"]
                    end
                    subgraph Retirement["retirement Retirement"]
-                       Retirement_Retirement_cond1["Retirement_cond1"]
                        Retirement_Retirement["Retirement"]
+                       Retirement_core_state["core_state"]
                        Retirement_Retirement1["Retirement"]
-                       Retirement_Retirement_cond0["Retirement_cond0"]
                        Retirement_Retirement2["Retirement"]
-                       Retirement_core_state["core_state"]
                        Retirement_Retirement3["Retirement"]
+                       Retirement_Retirement_cond0["Retirement_cond0"]
                        Retirement_Retirement4["Retirement"]
+                       Retirement_Retirement_cond1["Retirement_cond1"]
                        subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"]
                            DoubleCounterCSR2_increment["increment"]
                            subgraph CSRRegister7["register_low CSRRegister"]
-                               CSRRegister7__fu_read["_fu_read"]
                                CSRRegister7_read["read"]
+                               CSRRegister7__fu_read["_fu_read"]
                                CSRRegister7_write["write"]
                            end
                            subgraph CSRRegister8["register_high CSRRegister"]
@@ -512,61 +512,61 @@
                end
            end
            subgraph TransactionManager["transactionManager TransactionManager"]
-               TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"]
-               TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"]
-               TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"]
                TransactionManager_LSUDummy_accept_cond0["LSUDummy_accept_cond0"]
                TransactionManager_LSUDummy_accept_cond1["LSUDummy_accept_cond1"]
-               TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"]
+               TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"]
+               TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"]
+               TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"]
                TransactionManager_Retirement_cond0_Retirement["Retirement_cond0_Retirement"]
+               TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"]
            end
        end
    Core_InitFreeRFFifo --> BasicFifo2_write
    Retirement_Retirement --> BasicFifo2_write
    TransactionManager_Retirement_cond0_Retirement --> BasicFifo2_write
-   TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write
+   TransactionManager_Retirement_cond1_Retirement --> BasicFifo2_write
    FIFO6_read --> Core_DiscardBranchVerify
    WishboneMaster_WishboneMaster --> Forwarder_write
    WishboneMaster1_WishboneMaster --> Forwarder1_write
    Forwarder2_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller
    SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read
-   SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer
+   SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1
    SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write
    SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request
-   ICache_ICache1 <--> HwCounter4__incr
-   ICache_ICache2 <--> HwCounter3__incr
-   ICache_ICache2 <--> HwCounter2__incr
-   ICache_ICache2 <--> HwCounter1__incr
-   ICache_ICache2 --> Forwarder3_write
-   ICache_ICache3 --> SimpleCommonBusCacheRefiller_start_refill
-   ICache_ICache3 --> Forwarder2_write
-   ICache_ICache --> Forwarder2_write
-   SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache
-   WishboneMasterAdapter_get_read_response --> ICache_ICache
-   Serializer_Serializer1 --> ICache_ICache
-   BasicFifo_read --> ICache_ICache
-   WishboneMaster_result --> ICache_ICache
-   Forwarder_read --> ICache_ICache
-   Fetch_Fetch --> ICache_issue_req
-   Fetch_Fetch <--> HwCounter__incr
-   Fetch_Fetch <--> LatencyMeasurer__start
-   Fetch_Fetch --> FIFO1_write
-   Fetch_Fetch --> FIFO2_write
-   Fetch_Fetch --> BasicFifo3_write
-   BasicFifo3_read --> Fetch_Fetch1
-   ICache_accept_res --> Fetch_Fetch1
-   FIFO2_read --> Fetch_Fetch1
-   Fetch_Fetch1 <--> LatencyMeasurer__stop
-   FIFO1_read --> Fetch_Fetch1
-   Fetch_Fetch1 --> HwExpHistogram__add
-   Forwarder3_read --> Fetch_Fetch1
-   Fetch_Fetch1 --> MethodProduct_method
+   ICache_ICache <--> HwCounter4__incr
+   ICache_ICache3 <--> HwCounter3__incr
+   ICache_ICache3 <--> HwCounter2__incr
+   ICache_ICache3 <--> HwCounter1__incr
+   ICache_ICache3 --> Forwarder3_write
+   ICache_ICache1 --> SimpleCommonBusCacheRefiller_start_refill
+   ICache_ICache1 --> Forwarder2_write
+   ICache_ICache2 --> Forwarder2_write
+   SimpleCommonBusCacheRefiller_accept_refill --> ICache_ICache2
+   WishboneMasterAdapter_get_read_response --> ICache_ICache2
+   Serializer_Serializer --> ICache_ICache2
+   BasicFifo_read --> ICache_ICache2
+   WishboneMaster_result --> ICache_ICache2
+   Forwarder_read --> ICache_ICache2
+   Fetch_Fetch1 --> ICache_issue_req
+   Fetch_Fetch1 <--> HwCounter__incr
+   Fetch_Fetch1 <--> LatencyMeasurer__start
+   Fetch_Fetch1 --> FIFO1_write
+   Fetch_Fetch1 --> FIFO2_write
+   Fetch_Fetch1 --> BasicFifo3_write
+   BasicFifo3_read --> Fetch_Fetch
+   ICache_accept_res --> Fetch_Fetch
+   FIFO2_read --> Fetch_Fetch
+   Fetch_Fetch <--> LatencyMeasurer__stop
+   FIFO1_read --> Fetch_Fetch
+   Fetch_Fetch --> HwExpHistogram__add
+   Forwarder3_read --> Fetch_Fetch
+   Fetch_Fetch --> MethodProduct_method
    AdapterTrans_AdapterTrans_method --> MethodProduct_method
-   Fetch_Fetch1 --> FIFO_write
+   Fetch_Fetch --> FIFO_write
    AdapterTrans_AdapterTrans_method --> FIFO_write
-   Fetch_Fetch1 --> MethodMap_method
+   Fetch_Fetch --> MethodMap_method
    AdapterTrans_AdapterTrans_method --> MethodMap_method
-   Fetch_Fetch1 <--> CoreInstructionCounter_increment
+   Fetch_Fetch <--> CoreInstructionCounter_increment
    AdapterTrans_AdapterTrans_method <--> CoreInstructionCounter_increment
    FIFO_read --> DecodeStage_DecodeStage
    DecodeStage_DecodeStage <--> HwCounter8__incr
@@ -577,25 +577,25 @@
    FIFO10_read --> Renaming_Renaming
    Renaming_Renaming --> FRAT_rename
    Retirement_Retirement --> FRAT_rename
-   TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename
+   TransactionManager_Retirement_cond1_Retirement --> FRAT_rename
    Renaming_Renaming --> FIFO11_write
    FIFO11_read --> ROBAllocation_ROBAllocation
    ROBAllocation_ROBAllocation --> ReorderBuffer_put
    ROBAllocation_ROBAllocation <--> LatencyMeasurer1__start
    ROBAllocation_ROBAllocation --> FIFO3_write
    ROBAllocation_ROBAllocation --> FIFO12_write
-   FIFO12_read --> RSSelection_RSSelection3
-   RSSelection_RSSelection3 --> Forwarder8_write
-   Forwarder8_read --> RSSelection_RSSelection2
-   Forwarder8_read --> RSSelection_RSSelection1
+   FIFO12_read --> RSSelection_RSSelection1
+   RSSelection_RSSelection1 --> Forwarder8_write
    Forwarder8_read --> RSSelection_RSSelection
-   RSFuncBlock_select --> RSSelection_RSSelection2
-   RS_select --> RSSelection_RSSelection2
-   RSSelection_RSSelection2 --> FIFO13_write
-   RSSelection_RSSelection1 --> FIFO13_write
+   Forwarder8_read --> RSSelection_RSSelection2
+   Forwarder8_read --> RSSelection_RSSelection3
+   RSFuncBlock_select --> RSSelection_RSSelection
+   RS_select --> RSSelection_RSSelection
    RSSelection_RSSelection --> FIFO13_write
-   RSSelection_RSSelection1 <--> LSUDummy_select
-   RSSelection_RSSelection <--> CSRUnit_select
+   RSSelection_RSSelection2 --> FIFO13_write
+   RSSelection_RSSelection3 --> FIFO13_write
+   RSSelection_RSSelection2 <--> LSUDummy_select
+   RSSelection_RSSelection3 <--> CSRUnit_select
    FIFO13_read --> RSInsertion_RSInsertion
    RegisterFile_read1 --> RSInsertion_RSInsertion
    RegisterFile_read2 --> RSInsertion_RSInsertion
@@ -622,7 +622,7 @@
    ResultAnnouncement_ResultAnnouncement --> RS_update
    ResultAnnouncement_ResultAnnouncement --> LSUDummy_update
    ResultAnnouncement_ResultAnnouncement --> CSRUnit_update
-   RS_RS4 --> WakeupSelect_WakeupSelect
+   RS_RS --> WakeupSelect_WakeupSelect
    RS_take --> WakeupSelect_WakeupSelect
    RS_take --> WakeupSelect1_WakeupSelect
    RS_take --> WakeupSelect2_WakeupSelect
@@ -630,10 +630,10 @@
    RS_take --> WakeupSelect4_WakeupSelect
    WakeupSelect_WakeupSelect --> AluFuncUnit_issue
    WakeupSelect_WakeupSelect --> FIFO4_write
-   RS_RS2 --> WakeupSelect1_WakeupSelect
+   RS_RS3 --> WakeupSelect1_WakeupSelect
    WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue
    WakeupSelect1_WakeupSelect --> FIFO5_write
-   RS_RS1 --> WakeupSelect2_WakeupSelect
+   RS_RS4 --> WakeupSelect2_WakeupSelect
    WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue
    WakeupSelect2_WakeupSelect <--> HwCounter5__incr
    WakeupSelect2_WakeupSelect <--> HwCounter6__incr
@@ -645,10 +645,10 @@
    ConnectTrans3_ConnectTrans --> BasicFifo4_write
    WakeupSelect2_WakeupSelect --> FIFO7_write
    WakeupSelect2_WakeupSelect --> FIFO6_write
-   RS_RS --> WakeupSelect3_WakeupSelect
+   RS_RS2 --> WakeupSelect3_WakeupSelect
    WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue
    WakeupSelect3_WakeupSelect --> FIFO8_write
-   RS_RS3 --> WakeupSelect4_WakeupSelect
+   RS_RS1 --> WakeupSelect4_WakeupSelect
    WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue
    ConnectTrans4_ConnectTrans --> Forwarder5_write
    ConnectTrans5_ConnectTrans --> Forwarder5_write
@@ -669,9 +669,9 @@
    LSUDummy_LSUDummy --> Forwarder6_write
    TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write
    TransactionManager_LSUDummy_accept_cond1 --> Forwarder6_write
+   TransactionManager_LSUDummy_issue_cond0 --> Forwarder6_write
+   TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write
    TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write
-   TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write
-   TransactionManager_issue_cond1_LSUDummy --> Forwarder6_write
    CSRRegister__fu_read --> CSRUnit_CSRUnit
    CSRUnit_CSRUnit --> CSRRegister__fu_write
    CSRRegister1__fu_read --> CSRUnit_CSRUnit
@@ -693,43 +693,43 @@
    LSUDummy_get_result --> ConnectTrans2_ConnectTrans
    Forwarder6_read --> ConnectTrans2_ConnectTrans
    CSRUnit_get_result --> ConnectTrans3_ConnectTrans
-   MethodTryProduct_MethodTryProduct --> PrivilegedFuncUnit_precommit
-   MethodTryProduct_MethodTryProduct <--> InterruptController_mret
+   MethodTryProduct_MethodTryProduct1 --> PrivilegedFuncUnit_precommit
+   MethodTryProduct_MethodTryProduct1 <--> InterruptController_mret
    MethodTryProduct_MethodTryProduct2 --> LSUDummy_precommit
-   MethodTryProduct_MethodTryProduct1 --> CSRUnit_precommit
+   MethodTryProduct_MethodTryProduct --> CSRUnit_precommit
    ConnectTrans9_ConnectTrans --> Forwarder7_write
    ConnectTrans10_ConnectTrans --> Forwarder7_write
    BasicFifo5_read --> ConnectTrans9_ConnectTrans
    CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans
-   ReorderBuffer_peek --> Retirement_Retirement2
    ReorderBuffer_peek --> Retirement_Retirement1
+   ReorderBuffer_peek --> Retirement_Retirement2
    ReorderBuffer_peek --> Retirement_Retirement
    ReorderBuffer_peek --> TransactionManager_Retirement_cond0_Retirement
-   ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1
-   Retirement_Retirement2 --> MethodTryProduct_method
-   ExceptionCauseRegister_get --> Retirement_Retirement1
+   ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement
+   Retirement_Retirement1 --> MethodTryProduct_method
+   ExceptionCauseRegister_get --> Retirement_Retirement2
    ExceptionCauseRegister_get --> TransactionManager_Retirement_cond0_Retirement
-   ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1
+   ExceptionCauseRegister_get --> TransactionManager_Retirement_cond1_Retirement
    Retirement_Retirement <--> ReorderBuffer_retire
    TransactionManager_Retirement_cond0_Retirement <--> ReorderBuffer_retire
-   TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire
+   TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire
    Retirement_Retirement <--> LatencyMeasurer1__stop
    TransactionManager_Retirement_cond0_Retirement <--> LatencyMeasurer1__stop
-   TransactionManager_Retirement_Retirement_cond1 <--> LatencyMeasurer1__stop
+   TransactionManager_Retirement_cond1_Retirement <--> LatencyMeasurer1__stop
    FIFO3_read --> Retirement_Retirement
    FIFO3_read --> TransactionManager_Retirement_cond0_Retirement
-   FIFO3_read --> TransactionManager_Retirement_Retirement_cond1
+   FIFO3_read --> TransactionManager_Retirement_cond1_Retirement
    Retirement_Retirement --> HwExpHistogram1__add
    TransactionManager_Retirement_cond0_Retirement --> HwExpHistogram1__add
-   TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add
+   TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add
    CoreInstructionCounter_decrement --> Retirement_Retirement
    CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond0_Retirement
-   CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1
+   CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement
    RRAT_peek --> Retirement_Retirement
-   RRAT_peek --> TransactionManager_Retirement_Retirement_cond1
+   RRAT_peek --> TransactionManager_Retirement_cond1_Retirement
    Retirement_Retirement --> RegisterFile_free
    TransactionManager_Retirement_cond0_Retirement --> RegisterFile_free
-   TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free
+   TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free
    CSRRegister1_read --> Retirement_Retirement3
    Retirement_Retirement3 <--> ExceptionCauseRegister_clear
    GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment
@@ -749,7 +749,7 @@
    LSURequester_accept --> TransactionManager_LSUDummy_accept_cond1
    TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0
    WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0
-   Serializer1_Serializer2 --> TransactionManager_LSUDummy_accept_cond0
+   Serializer1_Serializer --> TransactionManager_LSUDummy_accept_cond0
    BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond0
    BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond1
    WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0
@@ -758,7 +758,23 @@
    Forwarder1_read --> TransactionManager_LSUDummy_accept_cond1
    TransactionManager_LSUDummy_accept_cond1 <--> LSURequester_accept_cond1
    WishboneMasterAdapter1_get_read_response --> TransactionManager_LSUDummy_accept_cond1
-   Serializer1_Serializer --> TransactionManager_LSUDummy_accept_cond1
+   Serializer1_Serializer3 --> TransactionManager_LSUDummy_accept_cond1
+   TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy2
+   TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy2
+   TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy2
+   TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue
+   TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue
+   TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue
+   TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0
+   TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write
+   TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer2
+   TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write
+   TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write
+   TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request
+   TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request
+   TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1
+   TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read
+   TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer1
    TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement_cond0
    TransactionManager_Retirement_cond0_Retirement --> RRAT_commit
    TransactionManager_Retirement_cond0_Retirement <--> DoubleCounterCSR2_increment
@@ -768,28 +784,12 @@
    TransactionManager_Retirement_cond0_Retirement --> CSRRegister8_write
    TransactionManager_Retirement_cond0_Retirement <--> HwCounter9__incr
    TransactionManager_Retirement_cond0_Retirement <--> Retirement_Retirement4
-   TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement4
+   TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement4
    TransactionManager_Retirement_cond0_Retirement --> CSRRegister_write
-   TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write
+   TransactionManager_Retirement_cond1_Retirement --> CSRRegister_write
    TransactionManager_Retirement_cond0_Retirement --> CSRRegister2_write
-   TransactionManager_Retirement_Retirement_cond1 --> CSRRegister2_write
+   TransactionManager_Retirement_cond1_Retirement --> CSRRegister2_write
    TransactionManager_Retirement_cond0_Retirement <--> InterruptController_entry
-   TransactionManager_Retirement_Retirement_cond1 <--> InterruptController_entry
-   TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1
+   TransactionManager_Retirement_cond1_Retirement <--> InterruptController_entry
    TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2
-   TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy2
-   TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy2
-   TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy2
-   TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue
-   TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue
-   TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue
-   TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0
-   TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write
-   TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer3
-   TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write
-   TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write
-   TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request
-   TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request
-   TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1
-   TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read
-   TransactionManager_issue_cond1_LSUDummy --> Serializer1_Serializer1
+   TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1
diff --git a/api.html b/api.html
index bce18c0e3..124967d62 100644
--- a/api.html
+++ b/api.html
@@ -281,7 +281,7 @@ <h2>transactron<a class="headerlink" href="#transactron" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/assumptions.html b/assumptions.html
index 2023cf7ec..4e425e4a1 100644
--- a/assumptions.html
+++ b/assumptions.html
@@ -104,7 +104,7 @@ <h1>List of assumptions made during development<a class="headerlink" href="#list
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/auto_graph.html b/auto_graph.html
index 36612db2f..ff4d030db 100644
--- a/auto_graph.html
+++ b/auto_graph.html
@@ -83,21 +83,21 @@
     subgraph TransactionModule[&quot;TransactionModule&quot;]
         subgraph CoreTestElaboratable[&quot;elaboratable CoreTestElaboratable&quot;]
             subgraph Core[&quot;core Core&quot;]
-                Core_InitFreeRFFifo[&quot;InitFreeRFFifo&quot;]
                 Core_DiscardBranchVerify[&quot;DiscardBranchVerify&quot;]
+                Core_InitFreeRFFifo[&quot;InitFreeRFFifo&quot;]
                 subgraph WishboneMaster[&quot;wb_master_instr WishboneMaster&quot;]
-                    WishboneMaster_request[&quot;request&quot;]
                     WishboneMaster_WishboneMaster[&quot;WishboneMaster&quot;]
                     WishboneMaster_result[&quot;result&quot;]
+                    WishboneMaster_request[&quot;request&quot;]
                     subgraph Forwarder[&quot;result Forwarder&quot;]
-                        Forwarder_write[&quot;write&quot;]
                         Forwarder_read[&quot;read&quot;]
+                        Forwarder_write[&quot;write&quot;]
                     end
                 end
                 subgraph WishboneMaster1[&quot;wb_master_data WishboneMaster&quot;]
-                    WishboneMaster1_request[&quot;request&quot;]
-                    WishboneMaster1_WishboneMaster[&quot;WishboneMaster&quot;]
                     WishboneMaster1_result[&quot;result&quot;]
+                    WishboneMaster1_WishboneMaster[&quot;WishboneMaster&quot;]
+                    WishboneMaster1_request[&quot;request&quot;]
                     subgraph Forwarder1[&quot;result Forwarder&quot;]
                         Forwarder1_read[&quot;read&quot;]
                         Forwarder1_write[&quot;write&quot;]
@@ -110,15 +110,15 @@
                         Serializer_Serializer[&quot;Serializer&quot;]
                         Serializer_Serializer1[&quot;Serializer&quot;]
                         subgraph BasicFifo[&quot;pending_requests BasicFifo&quot;]
-                            BasicFifo_read[&quot;read&quot;]
                             BasicFifo_write[&quot;write&quot;]
+                            BasicFifo_read[&quot;read&quot;]
                         end
                     end
                 end
                 subgraph WishboneMasterAdapter1[&quot;bus_master_data_adapter WishboneMasterAdapter&quot;]
                     WishboneMasterAdapter1_get_write_response[&quot;get_write_response&quot;]
-                    WishboneMasterAdapter1_get_read_response[&quot;get_read_response&quot;]
                     WishboneMasterAdapter1_request_read[&quot;request_read&quot;]
+                    WishboneMasterAdapter1_get_read_response[&quot;get_read_response&quot;]
                     WishboneMasterAdapter1_request_write[&quot;request_write&quot;]
                     subgraph Serializer1[&quot;bus_serializer Serializer&quot;]
                         Serializer1_Serializer[&quot;Serializer&quot;]
@@ -126,8 +126,8 @@
                         Serializer1_Serializer2[&quot;Serializer&quot;]
                         Serializer1_Serializer3[&quot;Serializer&quot;]
                         subgraph BasicFifo1[&quot;pending_requests BasicFifo&quot;]
-                            BasicFifo1_write[&quot;write&quot;]
                             BasicFifo1_read[&quot;read&quot;]
+                            BasicFifo1_write[&quot;write&quot;]
                         end
                     end
                 end
@@ -146,25 +146,25 @@
                     MethodProduct_method[&quot;method&quot;]
                 end
                 subgraph BasicFifo2[&quot;free_rf_fifo BasicFifo&quot;]
-                    BasicFifo2_read[&quot;read&quot;]
                     BasicFifo2_write[&quot;write&quot;]
+                    BasicFifo2_read[&quot;read&quot;]
                 end
                 subgraph SimpleCommonBusCacheRefiller[&quot;icache_refiller SimpleCommonBusCacheRefiller&quot;]
                     SimpleCommonBusCacheRefiller_accept_refill[&quot;accept_refill&quot;]
-                    SimpleCommonBusCacheRefiller_start_refill[&quot;start_refill&quot;]
                     SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller[&quot;SimpleCommonBusCacheRefiller&quot;]
+                    SimpleCommonBusCacheRefiller_start_refill[&quot;start_refill&quot;]
                     subgraph Forwarder2[&quot;address_fwd Forwarder&quot;]
-                        Forwarder2_write[&quot;write&quot;]
                         Forwarder2_read[&quot;read&quot;]
+                        Forwarder2_write[&quot;write&quot;]
                     end
                 end
                 subgraph ICache[&quot;icache ICache&quot;]
-                    ICache_issue_req[&quot;issue_req&quot;]
                     ICache_ICache[&quot;ICache&quot;]
                     ICache_ICache1[&quot;ICache&quot;]
-                    ICache_accept_res[&quot;accept_res&quot;]
                     ICache_ICache2[&quot;ICache&quot;]
                     ICache_ICache3[&quot;ICache&quot;]
+                    ICache_accept_res[&quot;accept_res&quot;]
+                    ICache_issue_req[&quot;issue_req&quot;]
                     subgraph HwCounter[&quot;perf_loads HwCounter&quot;]
                         HwCounter__incr[&quot;_incr&quot;]
                     end
@@ -196,21 +196,21 @@
                         FIFO2_read[&quot;read&quot;]
                     end
                     subgraph Forwarder3[&quot;res_fwd Forwarder&quot;]
-                        Forwarder3_read[&quot;read&quot;]
                         Forwarder3_write[&quot;write&quot;]
+                        Forwarder3_read[&quot;read&quot;]
                     end
                 end
                 subgraph FRAT[&quot;FRAT FRAT&quot;]
                     FRAT_rename[&quot;rename&quot;]
                 end
                 subgraph RRAT[&quot;RRAT RRAT&quot;]
-                    RRAT_commit[&quot;commit&quot;]
                     RRAT_peek[&quot;peek&quot;]
+                    RRAT_commit[&quot;commit&quot;]
                 end
                 subgraph RegisterFile[&quot;RF RegisterFile&quot;]
-                    RegisterFile_free[&quot;free&quot;]
-                    RegisterFile_read2[&quot;read2&quot;]
                     RegisterFile_read1[&quot;read1&quot;]
+                    RegisterFile_read2[&quot;read2&quot;]
+                    RegisterFile_free[&quot;free&quot;]
                     RegisterFile_write[&quot;write&quot;]
                 end
                 subgraph ReorderBuffer[&quot;ROB ReorderBuffer&quot;]
@@ -220,21 +220,21 @@
                     ReorderBuffer_get_indices[&quot;get_indices&quot;]
                     ReorderBuffer_mark_done[&quot;mark_done&quot;]
                     subgraph LatencyMeasurer1[&quot;perf_rob_wait_time LatencyMeasurer&quot;]
-                        LatencyMeasurer1__stop[&quot;_stop&quot;]
                         LatencyMeasurer1__start[&quot;_start&quot;]
+                        LatencyMeasurer1__stop[&quot;_stop&quot;]
                         subgraph HwExpHistogram1[&quot;histogram HwExpHistogram&quot;]
                             HwExpHistogram1__add[&quot;_add&quot;]
                         end
                         subgraph FIFO3[&quot;fifo FIFO&quot;]
-                            FIFO3_write[&quot;write&quot;]
                             FIFO3_read[&quot;read&quot;]
+                            FIFO3_write[&quot;write&quot;]
                         end
                     end
                 end
                 subgraph Fetch[&quot;fetch Fetch&quot;]
+                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     Fetch_Fetch[&quot;Fetch&quot;]
                     Fetch_resume[&quot;resume&quot;]
-                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     Fetch_Fetch1[&quot;Fetch&quot;]
                     subgraph BasicFifo3[&quot;fetch_target_queue BasicFifo&quot;]
                         BasicFifo3_write[&quot;write&quot;]
@@ -243,8 +243,8 @@
                 end
                 subgraph ExceptionCauseRegister[&quot;exception_cause_register ExceptionCauseRegister&quot;]
                     ExceptionCauseRegister_report[&quot;report&quot;]
-                    ExceptionCauseRegister_get[&quot;get&quot;]
                     ExceptionCauseRegister_clear[&quot;clear&quot;]
+                    ExceptionCauseRegister_get[&quot;get&quot;]
                     subgraph BasicFifo4[&quot;fu_report_fifo BasicFifo&quot;]
                         BasicFifo4_write[&quot;write&quot;]
                         BasicFifo4_read[&quot;read&quot;]
@@ -257,8 +257,8 @@
                     subgraph Collector[&quot;result_collector Collector&quot;]
                         Collector_method[&quot;method&quot;]
                         subgraph Forwarder4[&quot;forwarder Forwarder&quot;]
-                            Forwarder4_write[&quot;write&quot;]
                             Forwarder4_read[&quot;read&quot;]
+                            Forwarder4_write[&quot;write&quot;]
                         end
                         subgraph ManyToOneConnectTrans[&quot;connect ManyToOneConnectTrans&quot;]
                             subgraph ConnectTrans1[&quot;ManyToOneConnectTrans_input_0 ConnectTrans&quot;]
@@ -276,27 +276,27 @@
                         MethodProduct1_method[&quot;method&quot;]
                     end
                     subgraph RSFuncBlock[&quot;rs_block_0 RSFuncBlock&quot;]
+                        RSFuncBlock_select[&quot;select&quot;]
+                        RSFuncBlock_get_result[&quot;get_result&quot;]
                         RSFuncBlock_insert[&quot;insert&quot;]
                         RSFuncBlock_update[&quot;update&quot;]
-                        RSFuncBlock_get_result[&quot;get_result&quot;]
-                        RSFuncBlock_select[&quot;select&quot;]
                         subgraph RS[&quot;rs RS&quot;]
-                            RS_take[&quot;take&quot;]
-                            RS_RS[&quot;RS&quot;]
                             RS_insert[&quot;insert&quot;]
+                            RS_RS[&quot;RS&quot;]
+                            RS_take[&quot;take&quot;]
                             RS_RS1[&quot;RS&quot;]
                             RS_RS2[&quot;RS&quot;]
-                            RS_select[&quot;select&quot;]
                             RS_RS3[&quot;RS&quot;]
-                            RS_update[&quot;update&quot;]
                             RS_RS4[&quot;RS&quot;]
+                            RS_update[&quot;update&quot;]
+                            RS_select[&quot;select&quot;]
                         end
                         subgraph AluFuncUnit[&quot;func_unit_0 AluFuncUnit&quot;]
                             AluFuncUnit_issue[&quot;issue&quot;]
                             AluFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO4[&quot;fifo FIFO&quot;]
-                                FIFO4_read[&quot;read&quot;]
                                 FIFO4_write[&quot;write&quot;]
+                                FIFO4_read[&quot;read&quot;]
                             end
                         end
                         subgraph WakeupSelect[&quot;wakeup_select_0 WakeupSelect&quot;]
@@ -317,8 +317,8 @@
                             JumpBranchFuncUnit_accept[&quot;accept&quot;]
                             JumpBranchFuncUnit_issue[&quot;issue&quot;]
                             subgraph FIFO6[&quot;fifo_branch_resolved FIFO&quot;]
-                                FIFO6_read[&quot;read&quot;]
                                 FIFO6_write[&quot;write&quot;]
+                                FIFO6_read[&quot;read&quot;]
                             end
                             subgraph HwCounter5[&quot;perf_jumps HwCounter&quot;]
                                 HwCounter5__incr[&quot;_incr&quot;]
@@ -338,8 +338,8 @@
                             WakeupSelect2_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph ExceptionFuncUnit[&quot;func_unit_3 ExceptionFuncUnit&quot;]
-                            ExceptionFuncUnit_issue[&quot;issue&quot;]
                             ExceptionFuncUnit_accept[&quot;accept&quot;]
+                            ExceptionFuncUnit_issue[&quot;issue&quot;]
                             subgraph FIFO8[&quot;fifo FIFO&quot;]
                                 FIFO8_write[&quot;write&quot;]
                                 FIFO8_read[&quot;read&quot;]
@@ -363,8 +363,8 @@
                         subgraph Collector1[&quot;collector Collector&quot;]
                             Collector1_method[&quot;method&quot;]
                             subgraph Forwarder5[&quot;forwarder Forwarder&quot;]
-                                Forwarder5_read[&quot;read&quot;]
                                 Forwarder5_write[&quot;write&quot;]
+                                Forwarder5_read[&quot;read&quot;]
                             end
                             subgraph ManyToOneConnectTrans1[&quot;connect ManyToOneConnectTrans&quot;]
                                 subgraph ConnectTrans4[&quot;ManyToOneConnectTrans_input_0 ConnectTrans&quot;]
@@ -387,41 +387,41 @@
                     end
                     subgraph LSUDummy[&quot;rs_block_1 LSUDummy&quot;]
                         LSUDummy_update[&quot;update&quot;]
-                        LSUDummy_LSUDummy[&quot;LSUDummy&quot;]
                         LSUDummy_select[&quot;select&quot;]
-                        LSUDummy_LSUDummy1[&quot;LSUDummy&quot;]
+                        LSUDummy_insert[&quot;insert&quot;]
+                        LSUDummy_LSUDummy[&quot;LSUDummy&quot;]
                         LSUDummy_precommit[&quot;precommit&quot;]
-                        LSUDummy_get_result[&quot;get_result&quot;]
+                        LSUDummy_LSUDummy1[&quot;LSUDummy&quot;]
                         LSUDummy_LSUDummy2[&quot;LSUDummy&quot;]
-                        LSUDummy_insert[&quot;insert&quot;]
+                        LSUDummy_get_result[&quot;get_result&quot;]
                         subgraph Forwarder6[&quot;forwarder Forwarder&quot;]
-                            Forwarder6_read[&quot;read&quot;]
                             Forwarder6_write[&quot;write&quot;]
+                            Forwarder6_read[&quot;read&quot;]
                         end
                         subgraph LSURequester[&quot;requester LSURequester&quot;]
-                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
+                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                             LSURequester_issue_cond0[&quot;issue_cond0&quot;]
                             LSURequester_accept[&quot;accept&quot;]
+                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
                             LSURequester_issue[&quot;issue&quot;]
                             LSURequester_accept_cond0[&quot;accept_cond0&quot;]
-                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                             LSURequester_accept_cond1[&quot;accept_cond1&quot;]
                         end
                     end
                     subgraph CSRUnit[&quot;rs_block_2 CSRUnit&quot;]
-                        CSRUnit_update[&quot;update&quot;]
-                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
+                        CSRUnit_insert[&quot;insert&quot;]
                         CSRUnit_select[&quot;select&quot;]
+                        CSRUnit_precommit[&quot;precommit&quot;]
                         CSRUnit_fetch_resume[&quot;fetch_resume&quot;]
                         CSRUnit_get_result[&quot;get_result&quot;]
-                        CSRUnit_precommit[&quot;precommit&quot;]
-                        CSRUnit_insert[&quot;insert&quot;]
+                        CSRUnit_update[&quot;update&quot;]
+                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
                     end
                     subgraph MethodTryProduct[&quot;InstructionPrecommitKey_unifier MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct[&quot;MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct1[&quot;MethodTryProduct&quot;]
-                        MethodTryProduct_method[&quot;method&quot;]
                         MethodTryProduct_MethodTryProduct2[&quot;MethodTryProduct&quot;]
+                        MethodTryProduct_method[&quot;method&quot;]
                     end
                     subgraph Collector2[&quot;FetchResumeKey_unifier Collector&quot;]
                         Collector2_method[&quot;method&quot;]
@@ -443,60 +443,60 @@
                     ResultAnnouncement_ResultAnnouncement[&quot;ResultAnnouncement&quot;]
                 end
                 subgraph InterruptController[&quot;interrupt_controller InterruptController&quot;]
-                    InterruptController_mret[&quot;mret&quot;]
                     InterruptController_report_interrupt[&quot;report_interrupt&quot;]
+                    InterruptController_mret[&quot;mret&quot;]
                     InterruptController_entry[&quot;entry&quot;]
                 end
                 subgraph GenericCSRRegisters[&quot;csr_generic GenericCSRRegisters&quot;]
                     GenericCSRRegisters_GenericCSRRegisters[&quot;GenericCSRRegisters&quot;]
                     subgraph MachineModeCSRRegisters[&quot;m_mode MachineModeCSRRegisters&quot;]
                         subgraph CSRRegister[&quot;mcause CSRRegister&quot;]
-                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister_write[&quot;write&quot;]
+                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister__fu_write[&quot;_fu_write&quot;]
                         end
                         subgraph CSRRegister1[&quot;mtvec CSRRegister&quot;]
+                            CSRRegister1__fu_read[&quot;_fu_read&quot;]
                             CSRRegister1__fu_write[&quot;_fu_write&quot;]
                             CSRRegister1_read[&quot;read&quot;]
-                            CSRRegister1__fu_read[&quot;_fu_read&quot;]
                         end
                         subgraph CSRRegister2[&quot;mepc CSRRegister&quot;]
-                            CSRRegister2__fu_write[&quot;_fu_write&quot;]
                             CSRRegister2__fu_read[&quot;_fu_read&quot;]
-                            CSRRegister2_write[&quot;write&quot;]
                             CSRRegister2_read[&quot;read&quot;]
+                            CSRRegister2__fu_write[&quot;_fu_write&quot;]
+                            CSRRegister2_write[&quot;write&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR[&quot;csr_cycle DoubleCounterCSR&quot;]
                         DoubleCounterCSR_increment[&quot;increment&quot;]
                         subgraph CSRRegister3[&quot;register_low CSRRegister&quot;]
-                            CSRRegister3_read[&quot;read&quot;]
-                            CSRRegister3_write[&quot;write&quot;]
                             CSRRegister3__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister3_write[&quot;write&quot;]
+                            CSRRegister3_read[&quot;read&quot;]
                         end
                         subgraph CSRRegister4[&quot;register_high CSRRegister&quot;]
-                            CSRRegister4_write[&quot;write&quot;]
-                            CSRRegister4_read[&quot;read&quot;]
                             CSRRegister4__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister4_read[&quot;read&quot;]
+                            CSRRegister4_write[&quot;write&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR1[&quot;csr_time DoubleCounterCSR&quot;]
                         DoubleCounterCSR1_increment[&quot;increment&quot;]
                         subgraph CSRRegister5[&quot;register_low CSRRegister&quot;]
-                            CSRRegister5_read[&quot;read&quot;]
                             CSRRegister5__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister5_read[&quot;read&quot;]
                             CSRRegister5_write[&quot;write&quot;]
                         end
                         subgraph CSRRegister6[&quot;register_high CSRRegister&quot;]
-                            CSRRegister6_write[&quot;write&quot;]
                             CSRRegister6__fu_read[&quot;_fu_read&quot;]
                             CSRRegister6_read[&quot;read&quot;]
+                            CSRRegister6_write[&quot;write&quot;]
                         end
                     end
                 end
                 subgraph FIFO9[&quot;fifo_decode FIFO&quot;]
-                    FIFO9_read[&quot;read&quot;]
                     FIFO9_write[&quot;write&quot;]
+                    FIFO9_read[&quot;read&quot;]
                 end
                 subgraph DecodeStage[&quot;decode DecodeStage&quot;]
                     DecodeStage_DecodeStage[&quot;DecodeStage&quot;]
@@ -506,8 +506,8 @@
                 end
                 subgraph Scheduler[&quot;scheduler Scheduler&quot;]
                     subgraph FIFO10[&quot;alloc_rename_buf FIFO&quot;]
-                        FIFO10_write[&quot;write&quot;]
                         FIFO10_read[&quot;read&quot;]
+                        FIFO10_write[&quot;write&quot;]
                     end
                     subgraph RegAllocation[&quot;reg_alloc RegAllocation&quot;]
                         RegAllocation_RegAllocation[&quot;RegAllocation&quot;]
@@ -536,8 +536,8 @@
                         RSSelection_RSSelection2[&quot;RSSelection&quot;]
                         RSSelection_RSSelection3[&quot;RSSelection&quot;]
                         subgraph Forwarder8[&quot;forwarder Forwarder&quot;]
-                            Forwarder8_read[&quot;read&quot;]
                             Forwarder8_write[&quot;write&quot;]
+                            Forwarder8_read[&quot;read&quot;]
                         end
                     end
                     subgraph RSInsertion[&quot;rs_insertion RSInsertion&quot;]
@@ -548,19 +548,19 @@
                     ConnectTrans11_ConnectTrans[&quot;ConnectTrans&quot;]
                 end
                 subgraph Retirement[&quot;retirement Retirement&quot;]
-                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     Retirement_Retirement[&quot;Retirement&quot;]
+                    Retirement_core_state[&quot;core_state&quot;]
                     Retirement_Retirement1[&quot;Retirement&quot;]
-                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
                     Retirement_Retirement2[&quot;Retirement&quot;]
-                    Retirement_core_state[&quot;core_state&quot;]
                     Retirement_Retirement3[&quot;Retirement&quot;]
+                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
                     Retirement_Retirement4[&quot;Retirement&quot;]
+                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     subgraph DoubleCounterCSR2[&quot;instret_csr DoubleCounterCSR&quot;]
                         DoubleCounterCSR2_increment[&quot;increment&quot;]
                         subgraph CSRRegister7[&quot;register_low CSRRegister&quot;]
-                            CSRRegister7__fu_read[&quot;_fu_read&quot;]
                             CSRRegister7_read[&quot;read&quot;]
+                            CSRRegister7__fu_read[&quot;_fu_read&quot;]
                             CSRRegister7_write[&quot;write&quot;]
                         end
                         subgraph CSRRegister8[&quot;register_high CSRRegister&quot;]
@@ -591,61 +591,61 @@
             end
         end
         subgraph TransactionManager[&quot;transactionManager TransactionManager&quot;]
-            TransactionManager_Retirement_Retirement_cond1[&quot;Retirement_Retirement_cond1&quot;]
-            TransactionManager_issue_cond2_LSUDummy[&quot;issue_cond2_LSUDummy&quot;]
-            TransactionManager_issue_cond0_LSUDummy[&quot;issue_cond0_LSUDummy&quot;]
             TransactionManager_LSUDummy_accept_cond0[&quot;LSUDummy_accept_cond0&quot;]
             TransactionManager_LSUDummy_accept_cond1[&quot;LSUDummy_accept_cond1&quot;]
-            TransactionManager_issue_cond1_LSUDummy[&quot;issue_cond1_LSUDummy&quot;]
+            TransactionManager_LSUDummy_issue_cond1[&quot;LSUDummy_issue_cond1&quot;]
+            TransactionManager_issue_cond2_LSUDummy[&quot;issue_cond2_LSUDummy&quot;]
+            TransactionManager_Retirement_cond1_Retirement[&quot;Retirement_cond1_Retirement&quot;]
             TransactionManager_Retirement_cond0_Retirement[&quot;Retirement_cond0_Retirement&quot;]
+            TransactionManager_LSUDummy_issue_cond0[&quot;LSUDummy_issue_cond0&quot;]
         end
     end
 Core_InitFreeRFFifo --&gt; BasicFifo2_write
 Retirement_Retirement --&gt; BasicFifo2_write
 TransactionManager_Retirement_cond0_Retirement --&gt; BasicFifo2_write
-TransactionManager_Retirement_Retirement_cond1 --&gt; BasicFifo2_write
+TransactionManager_Retirement_cond1_Retirement --&gt; BasicFifo2_write
 FIFO6_read --&gt; Core_DiscardBranchVerify
 WishboneMaster_WishboneMaster --&gt; Forwarder_write
 WishboneMaster1_WishboneMaster --&gt; Forwarder1_write
 Forwarder2_read --&gt; SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; WishboneMasterAdapter_request_read
-SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; Serializer_Serializer
+SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; Serializer_Serializer1
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; BasicFifo_write
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; WishboneMaster_request
-ICache_ICache1 &lt;--&gt; HwCounter4__incr
-ICache_ICache2 &lt;--&gt; HwCounter3__incr
-ICache_ICache2 &lt;--&gt; HwCounter2__incr
-ICache_ICache2 &lt;--&gt; HwCounter1__incr
-ICache_ICache2 --&gt; Forwarder3_write
-ICache_ICache3 --&gt; SimpleCommonBusCacheRefiller_start_refill
-ICache_ICache3 --&gt; Forwarder2_write
-ICache_ICache --&gt; Forwarder2_write
-SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache
-WishboneMasterAdapter_get_read_response --&gt; ICache_ICache
-Serializer_Serializer1 --&gt; ICache_ICache
-BasicFifo_read --&gt; ICache_ICache
-WishboneMaster_result --&gt; ICache_ICache
-Forwarder_read --&gt; ICache_ICache
-Fetch_Fetch --&gt; ICache_issue_req
-Fetch_Fetch &lt;--&gt; HwCounter__incr
-Fetch_Fetch &lt;--&gt; LatencyMeasurer__start
-Fetch_Fetch --&gt; FIFO1_write
-Fetch_Fetch --&gt; FIFO2_write
-Fetch_Fetch --&gt; BasicFifo3_write
-BasicFifo3_read --&gt; Fetch_Fetch1
-ICache_accept_res --&gt; Fetch_Fetch1
-FIFO2_read --&gt; Fetch_Fetch1
-Fetch_Fetch1 &lt;--&gt; LatencyMeasurer__stop
-FIFO1_read --&gt; Fetch_Fetch1
-Fetch_Fetch1 --&gt; HwExpHistogram__add
-Forwarder3_read --&gt; Fetch_Fetch1
-Fetch_Fetch1 --&gt; MethodProduct_method
+ICache_ICache &lt;--&gt; HwCounter4__incr
+ICache_ICache3 &lt;--&gt; HwCounter3__incr
+ICache_ICache3 &lt;--&gt; HwCounter2__incr
+ICache_ICache3 &lt;--&gt; HwCounter1__incr
+ICache_ICache3 --&gt; Forwarder3_write
+ICache_ICache1 --&gt; SimpleCommonBusCacheRefiller_start_refill
+ICache_ICache1 --&gt; Forwarder2_write
+ICache_ICache2 --&gt; Forwarder2_write
+SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache2
+WishboneMasterAdapter_get_read_response --&gt; ICache_ICache2
+Serializer_Serializer --&gt; ICache_ICache2
+BasicFifo_read --&gt; ICache_ICache2
+WishboneMaster_result --&gt; ICache_ICache2
+Forwarder_read --&gt; ICache_ICache2
+Fetch_Fetch1 --&gt; ICache_issue_req
+Fetch_Fetch1 &lt;--&gt; HwCounter__incr
+Fetch_Fetch1 &lt;--&gt; LatencyMeasurer__start
+Fetch_Fetch1 --&gt; FIFO1_write
+Fetch_Fetch1 --&gt; FIFO2_write
+Fetch_Fetch1 --&gt; BasicFifo3_write
+BasicFifo3_read --&gt; Fetch_Fetch
+ICache_accept_res --&gt; Fetch_Fetch
+FIFO2_read --&gt; Fetch_Fetch
+Fetch_Fetch &lt;--&gt; LatencyMeasurer__stop
+FIFO1_read --&gt; Fetch_Fetch
+Fetch_Fetch --&gt; HwExpHistogram__add
+Forwarder3_read --&gt; Fetch_Fetch
+Fetch_Fetch --&gt; MethodProduct_method
 AdapterTrans_AdapterTrans_method --&gt; MethodProduct_method
-Fetch_Fetch1 --&gt; FIFO_write
+Fetch_Fetch --&gt; FIFO_write
 AdapterTrans_AdapterTrans_method --&gt; FIFO_write
-Fetch_Fetch1 --&gt; MethodMap_method
+Fetch_Fetch --&gt; MethodMap_method
 AdapterTrans_AdapterTrans_method --&gt; MethodMap_method
-Fetch_Fetch1 &lt;--&gt; CoreInstructionCounter_increment
+Fetch_Fetch &lt;--&gt; CoreInstructionCounter_increment
 AdapterTrans_AdapterTrans_method &lt;--&gt; CoreInstructionCounter_increment
 FIFO_read --&gt; DecodeStage_DecodeStage
 DecodeStage_DecodeStage &lt;--&gt; HwCounter8__incr
@@ -656,25 +656,25 @@
 FIFO10_read --&gt; Renaming_Renaming
 Renaming_Renaming --&gt; FRAT_rename
 Retirement_Retirement --&gt; FRAT_rename
-TransactionManager_Retirement_Retirement_cond1 --&gt; FRAT_rename
+TransactionManager_Retirement_cond1_Retirement --&gt; FRAT_rename
 Renaming_Renaming --&gt; FIFO11_write
 FIFO11_read --&gt; ROBAllocation_ROBAllocation
 ROBAllocation_ROBAllocation --&gt; ReorderBuffer_put
 ROBAllocation_ROBAllocation &lt;--&gt; LatencyMeasurer1__start
 ROBAllocation_ROBAllocation --&gt; FIFO3_write
 ROBAllocation_ROBAllocation --&gt; FIFO12_write
-FIFO12_read --&gt; RSSelection_RSSelection3
-RSSelection_RSSelection3 --&gt; Forwarder8_write
-Forwarder8_read --&gt; RSSelection_RSSelection2
-Forwarder8_read --&gt; RSSelection_RSSelection1
+FIFO12_read --&gt; RSSelection_RSSelection1
+RSSelection_RSSelection1 --&gt; Forwarder8_write
 Forwarder8_read --&gt; RSSelection_RSSelection
-RSFuncBlock_select --&gt; RSSelection_RSSelection2
-RS_select --&gt; RSSelection_RSSelection2
-RSSelection_RSSelection2 --&gt; FIFO13_write
-RSSelection_RSSelection1 --&gt; FIFO13_write
+Forwarder8_read --&gt; RSSelection_RSSelection2
+Forwarder8_read --&gt; RSSelection_RSSelection3
+RSFuncBlock_select --&gt; RSSelection_RSSelection
+RS_select --&gt; RSSelection_RSSelection
 RSSelection_RSSelection --&gt; FIFO13_write
-RSSelection_RSSelection1 &lt;--&gt; LSUDummy_select
-RSSelection_RSSelection &lt;--&gt; CSRUnit_select
+RSSelection_RSSelection2 --&gt; FIFO13_write
+RSSelection_RSSelection3 --&gt; FIFO13_write
+RSSelection_RSSelection2 &lt;--&gt; LSUDummy_select
+RSSelection_RSSelection3 &lt;--&gt; CSRUnit_select
 FIFO13_read --&gt; RSInsertion_RSInsertion
 RegisterFile_read1 --&gt; RSInsertion_RSInsertion
 RegisterFile_read2 --&gt; RSInsertion_RSInsertion
@@ -701,7 +701,7 @@
 ResultAnnouncement_ResultAnnouncement --&gt; RS_update
 ResultAnnouncement_ResultAnnouncement --&gt; LSUDummy_update
 ResultAnnouncement_ResultAnnouncement --&gt; CSRUnit_update
-RS_RS4 --&gt; WakeupSelect_WakeupSelect
+RS_RS --&gt; WakeupSelect_WakeupSelect
 RS_take --&gt; WakeupSelect_WakeupSelect
 RS_take --&gt; WakeupSelect1_WakeupSelect
 RS_take --&gt; WakeupSelect2_WakeupSelect
@@ -709,10 +709,10 @@
 RS_take --&gt; WakeupSelect4_WakeupSelect
 WakeupSelect_WakeupSelect --&gt; AluFuncUnit_issue
 WakeupSelect_WakeupSelect --&gt; FIFO4_write
-RS_RS2 --&gt; WakeupSelect1_WakeupSelect
+RS_RS3 --&gt; WakeupSelect1_WakeupSelect
 WakeupSelect1_WakeupSelect --&gt; ShiftFuncUnit_issue
 WakeupSelect1_WakeupSelect --&gt; FIFO5_write
-RS_RS1 --&gt; WakeupSelect2_WakeupSelect
+RS_RS4 --&gt; WakeupSelect2_WakeupSelect
 WakeupSelect2_WakeupSelect --&gt; JumpBranchFuncUnit_issue
 WakeupSelect2_WakeupSelect &lt;--&gt; HwCounter5__incr
 WakeupSelect2_WakeupSelect &lt;--&gt; HwCounter6__incr
@@ -724,10 +724,10 @@
 ConnectTrans3_ConnectTrans --&gt; BasicFifo4_write
 WakeupSelect2_WakeupSelect --&gt; FIFO7_write
 WakeupSelect2_WakeupSelect --&gt; FIFO6_write
-RS_RS --&gt; WakeupSelect3_WakeupSelect
+RS_RS2 --&gt; WakeupSelect3_WakeupSelect
 WakeupSelect3_WakeupSelect --&gt; ExceptionFuncUnit_issue
 WakeupSelect3_WakeupSelect --&gt; FIFO8_write
-RS_RS3 --&gt; WakeupSelect4_WakeupSelect
+RS_RS1 --&gt; WakeupSelect4_WakeupSelect
 WakeupSelect4_WakeupSelect --&gt; PrivilegedFuncUnit_issue
 ConnectTrans4_ConnectTrans --&gt; Forwarder5_write
 ConnectTrans5_ConnectTrans --&gt; Forwarder5_write
@@ -748,9 +748,9 @@
 LSUDummy_LSUDummy --&gt; Forwarder6_write
 TransactionManager_LSUDummy_accept_cond0 --&gt; Forwarder6_write
 TransactionManager_LSUDummy_accept_cond1 --&gt; Forwarder6_write
+TransactionManager_LSUDummy_issue_cond0 --&gt; Forwarder6_write
+TransactionManager_LSUDummy_issue_cond1 --&gt; Forwarder6_write
 TransactionManager_issue_cond2_LSUDummy --&gt; Forwarder6_write
-TransactionManager_issue_cond0_LSUDummy --&gt; Forwarder6_write
-TransactionManager_issue_cond1_LSUDummy --&gt; Forwarder6_write
 CSRRegister__fu_read --&gt; CSRUnit_CSRUnit
 CSRUnit_CSRUnit --&gt; CSRRegister__fu_write
 CSRRegister1__fu_read --&gt; CSRUnit_CSRUnit
@@ -772,43 +772,43 @@
 LSUDummy_get_result --&gt; ConnectTrans2_ConnectTrans
 Forwarder6_read --&gt; ConnectTrans2_ConnectTrans
 CSRUnit_get_result --&gt; ConnectTrans3_ConnectTrans
-MethodTryProduct_MethodTryProduct --&gt; PrivilegedFuncUnit_precommit
-MethodTryProduct_MethodTryProduct &lt;--&gt; InterruptController_mret
+MethodTryProduct_MethodTryProduct1 --&gt; PrivilegedFuncUnit_precommit
+MethodTryProduct_MethodTryProduct1 &lt;--&gt; InterruptController_mret
 MethodTryProduct_MethodTryProduct2 --&gt; LSUDummy_precommit
-MethodTryProduct_MethodTryProduct1 --&gt; CSRUnit_precommit
+MethodTryProduct_MethodTryProduct --&gt; CSRUnit_precommit
 ConnectTrans9_ConnectTrans --&gt; Forwarder7_write
 ConnectTrans10_ConnectTrans --&gt; Forwarder7_write
 BasicFifo5_read --&gt; ConnectTrans9_ConnectTrans
 CSRUnit_fetch_resume --&gt; ConnectTrans10_ConnectTrans
-ReorderBuffer_peek --&gt; Retirement_Retirement2
 ReorderBuffer_peek --&gt; Retirement_Retirement1
+ReorderBuffer_peek --&gt; Retirement_Retirement2
 ReorderBuffer_peek --&gt; Retirement_Retirement
 ReorderBuffer_peek --&gt; TransactionManager_Retirement_cond0_Retirement
-ReorderBuffer_peek --&gt; TransactionManager_Retirement_Retirement_cond1
-Retirement_Retirement2 --&gt; MethodTryProduct_method
-ExceptionCauseRegister_get --&gt; Retirement_Retirement1
+ReorderBuffer_peek --&gt; TransactionManager_Retirement_cond1_Retirement
+Retirement_Retirement1 --&gt; MethodTryProduct_method
+ExceptionCauseRegister_get --&gt; Retirement_Retirement2
 ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_cond0_Retirement
-ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_Retirement_cond1
+ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_cond1_Retirement
 Retirement_Retirement &lt;--&gt; ReorderBuffer_retire
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; ReorderBuffer_retire
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; ReorderBuffer_retire
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; ReorderBuffer_retire
 Retirement_Retirement &lt;--&gt; LatencyMeasurer1__stop
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; LatencyMeasurer1__stop
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; LatencyMeasurer1__stop
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; LatencyMeasurer1__stop
 FIFO3_read --&gt; Retirement_Retirement
 FIFO3_read --&gt; TransactionManager_Retirement_cond0_Retirement
-FIFO3_read --&gt; TransactionManager_Retirement_Retirement_cond1
+FIFO3_read --&gt; TransactionManager_Retirement_cond1_Retirement
 Retirement_Retirement --&gt; HwExpHistogram1__add
 TransactionManager_Retirement_cond0_Retirement --&gt; HwExpHistogram1__add
-TransactionManager_Retirement_Retirement_cond1 --&gt; HwExpHistogram1__add
+TransactionManager_Retirement_cond1_Retirement --&gt; HwExpHistogram1__add
 CoreInstructionCounter_decrement --&gt; Retirement_Retirement
 CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_cond0_Retirement
-CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_Retirement_cond1
+CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_cond1_Retirement
 RRAT_peek --&gt; Retirement_Retirement
-RRAT_peek --&gt; TransactionManager_Retirement_Retirement_cond1
+RRAT_peek --&gt; TransactionManager_Retirement_cond1_Retirement
 Retirement_Retirement --&gt; RegisterFile_free
 TransactionManager_Retirement_cond0_Retirement --&gt; RegisterFile_free
-TransactionManager_Retirement_Retirement_cond1 --&gt; RegisterFile_free
+TransactionManager_Retirement_cond1_Retirement --&gt; RegisterFile_free
 CSRRegister1_read --&gt; Retirement_Retirement3
 Retirement_Retirement3 &lt;--&gt; ExceptionCauseRegister_clear
 GenericCSRRegisters_GenericCSRRegisters &lt;--&gt; DoubleCounterCSR_increment
@@ -828,7 +828,7 @@
 LSURequester_accept --&gt; TransactionManager_LSUDummy_accept_cond1
 TransactionManager_LSUDummy_accept_cond0 &lt;--&gt; LSURequester_accept_cond0
 WishboneMasterAdapter1_get_write_response --&gt; TransactionManager_LSUDummy_accept_cond0
-Serializer1_Serializer2 --&gt; TransactionManager_LSUDummy_accept_cond0
+Serializer1_Serializer --&gt; TransactionManager_LSUDummy_accept_cond0
 BasicFifo1_read --&gt; TransactionManager_LSUDummy_accept_cond0
 BasicFifo1_read --&gt; TransactionManager_LSUDummy_accept_cond1
 WishboneMaster1_result --&gt; TransactionManager_LSUDummy_accept_cond0
@@ -837,7 +837,23 @@
 Forwarder1_read --&gt; TransactionManager_LSUDummy_accept_cond1
 TransactionManager_LSUDummy_accept_cond1 &lt;--&gt; LSURequester_accept_cond1
 WishboneMasterAdapter1_get_read_response --&gt; TransactionManager_LSUDummy_accept_cond1
-Serializer1_Serializer --&gt; TransactionManager_LSUDummy_accept_cond1
+Serializer1_Serializer3 --&gt; TransactionManager_LSUDummy_accept_cond1
+TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSUDummy_LSUDummy2
+TransactionManager_LSUDummy_issue_cond1 &lt;--&gt; LSUDummy_LSUDummy2
+TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
+TransactionManager_LSUDummy_issue_cond0 --&gt; LSURequester_issue
+TransactionManager_LSUDummy_issue_cond1 --&gt; LSURequester_issue
+TransactionManager_issue_cond2_LSUDummy --&gt; LSURequester_issue
+TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSURequester_issue_cond0
+TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMasterAdapter1_request_write
+TransactionManager_LSUDummy_issue_cond0 --&gt; Serializer1_Serializer2
+TransactionManager_LSUDummy_issue_cond0 --&gt; BasicFifo1_write
+TransactionManager_LSUDummy_issue_cond1 --&gt; BasicFifo1_write
+TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMaster1_request
+TransactionManager_LSUDummy_issue_cond1 --&gt; WishboneMaster1_request
+TransactionManager_LSUDummy_issue_cond1 &lt;--&gt; LSURequester_issue_cond1
+TransactionManager_LSUDummy_issue_cond1 --&gt; WishboneMasterAdapter1_request_read
+TransactionManager_LSUDummy_issue_cond1 --&gt; Serializer1_Serializer1
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; Retirement_Retirement_cond0
 TransactionManager_Retirement_cond0_Retirement --&gt; RRAT_commit
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; DoubleCounterCSR2_increment
@@ -847,31 +863,15 @@
 TransactionManager_Retirement_cond0_Retirement --&gt; CSRRegister8_write
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; HwCounter9__incr
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; Retirement_Retirement4
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement4
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; Retirement_Retirement4
 TransactionManager_Retirement_cond0_Retirement --&gt; CSRRegister_write
-TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister_write
+TransactionManager_Retirement_cond1_Retirement --&gt; CSRRegister_write
 TransactionManager_Retirement_cond0_Retirement --&gt; CSRRegister2_write
-TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister2_write
+TransactionManager_Retirement_cond1_Retirement --&gt; CSRRegister2_write
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; InterruptController_entry
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; InterruptController_entry
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement_cond1
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; InterruptController_entry
 TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSURequester_issue_cond2
-TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
-TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
-TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
-TransactionManager_issue_cond2_LSUDummy --&gt; LSURequester_issue
-TransactionManager_issue_cond0_LSUDummy --&gt; LSURequester_issue
-TransactionManager_issue_cond1_LSUDummy --&gt; LSURequester_issue
-TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSURequester_issue_cond0
-TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMasterAdapter1_request_write
-TransactionManager_issue_cond0_LSUDummy --&gt; Serializer1_Serializer3
-TransactionManager_issue_cond0_LSUDummy --&gt; BasicFifo1_write
-TransactionManager_issue_cond1_LSUDummy --&gt; BasicFifo1_write
-TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMaster1_request
-TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMaster1_request
-TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSURequester_issue_cond1
-TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMasterAdapter1_request_read
-TransactionManager_issue_cond1_LSUDummy --&gt; Serializer1_Serializer1
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; Retirement_Retirement_cond1
         </div>
 
            </div>
@@ -882,7 +882,7 @@
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/components/icache.html b/components/icache.html
index 87cdb7f4f..df6df8bb9 100644
--- a/components/icache.html
+++ b/components/icache.html
@@ -131,7 +131,7 @@ <h2>Address mapping example<a class="headerlink" href="#address-mapping-example"
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.cache.html b/coreblocks.cache.html
index d99062c9d..0682688f3 100644
--- a/coreblocks.cache.html
+++ b/coreblocks.cache.html
@@ -241,7 +241,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html
index 9d44e8e31..abd3b5abf 100644
--- a/coreblocks.frontend.html
+++ b/coreblocks.frontend.html
@@ -368,7 +368,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.fu.html b/coreblocks.fu.html
index f5c596217..5a38ff20c 100644
--- a/coreblocks.fu.html
+++ b/coreblocks.fu.html
@@ -965,7 +965,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.fu.unsigned_multiplication.html b/coreblocks.fu.unsigned_multiplication.html
index 215747d1b..83662f36b 100644
--- a/coreblocks.fu.unsigned_multiplication.html
+++ b/coreblocks.fu.unsigned_multiplication.html
@@ -237,7 +237,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.html b/coreblocks.html
index bcf5b75a1..277be79fc 100644
--- a/coreblocks.html
+++ b/coreblocks.html
@@ -234,7 +234,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.lsu.html b/coreblocks.lsu.html
index d37ccb6a1..9c8d47f7e 100644
--- a/coreblocks.lsu.html
+++ b/coreblocks.lsu.html
@@ -236,7 +236,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.params.html b/coreblocks.params.html
index b3ed9b11e..84058894c 100644
--- a/coreblocks.params.html
+++ b/coreblocks.params.html
@@ -2696,7 +2696,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html
index 47e167ddd..ec82da497 100644
--- a/coreblocks.peripherals.html
+++ b/coreblocks.peripherals.html
@@ -598,7 +598,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html
index 621f4b6db..c532b21dd 100644
--- a/coreblocks.scheduler.html
+++ b/coreblocks.scheduler.html
@@ -191,7 +191,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.stages.html b/coreblocks.stages.html
index d6aa8ab84..beb8b8b19 100644
--- a/coreblocks.stages.html
+++ b/coreblocks.stages.html
@@ -263,7 +263,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.structs_common.html b/coreblocks.structs_common.html
index 07befecb5..f1c48f231 100644
--- a/coreblocks.structs_common.html
+++ b/coreblocks.structs_common.html
@@ -522,7 +522,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/coreblocks.utils.html b/coreblocks.utils.html
index ac64099ed..ceb7537ed 100644
--- a/coreblocks.utils.html
+++ b/coreblocks.utils.html
@@ -149,7 +149,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/current-graph.html b/current-graph.html
index a66262e97..5394db36b 100644
--- a/current-graph.html
+++ b/current-graph.html
@@ -89,21 +89,21 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
     subgraph TransactionModule[&quot;TransactionModule&quot;]
         subgraph CoreTestElaboratable[&quot;elaboratable CoreTestElaboratable&quot;]
             subgraph Core[&quot;core Core&quot;]
-                Core_InitFreeRFFifo[&quot;InitFreeRFFifo&quot;]
                 Core_DiscardBranchVerify[&quot;DiscardBranchVerify&quot;]
+                Core_InitFreeRFFifo[&quot;InitFreeRFFifo&quot;]
                 subgraph WishboneMaster[&quot;wb_master_instr WishboneMaster&quot;]
-                    WishboneMaster_request[&quot;request&quot;]
                     WishboneMaster_WishboneMaster[&quot;WishboneMaster&quot;]
                     WishboneMaster_result[&quot;result&quot;]
+                    WishboneMaster_request[&quot;request&quot;]
                     subgraph Forwarder[&quot;result Forwarder&quot;]
-                        Forwarder_write[&quot;write&quot;]
                         Forwarder_read[&quot;read&quot;]
+                        Forwarder_write[&quot;write&quot;]
                     end
                 end
                 subgraph WishboneMaster1[&quot;wb_master_data WishboneMaster&quot;]
-                    WishboneMaster1_request[&quot;request&quot;]
-                    WishboneMaster1_WishboneMaster[&quot;WishboneMaster&quot;]
                     WishboneMaster1_result[&quot;result&quot;]
+                    WishboneMaster1_WishboneMaster[&quot;WishboneMaster&quot;]
+                    WishboneMaster1_request[&quot;request&quot;]
                     subgraph Forwarder1[&quot;result Forwarder&quot;]
                         Forwarder1_read[&quot;read&quot;]
                         Forwarder1_write[&quot;write&quot;]
@@ -116,15 +116,15 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         Serializer_Serializer[&quot;Serializer&quot;]
                         Serializer_Serializer1[&quot;Serializer&quot;]
                         subgraph BasicFifo[&quot;pending_requests BasicFifo&quot;]
-                            BasicFifo_read[&quot;read&quot;]
                             BasicFifo_write[&quot;write&quot;]
+                            BasicFifo_read[&quot;read&quot;]
                         end
                     end
                 end
                 subgraph WishboneMasterAdapter1[&quot;bus_master_data_adapter WishboneMasterAdapter&quot;]
                     WishboneMasterAdapter1_get_write_response[&quot;get_write_response&quot;]
-                    WishboneMasterAdapter1_get_read_response[&quot;get_read_response&quot;]
                     WishboneMasterAdapter1_request_read[&quot;request_read&quot;]
+                    WishboneMasterAdapter1_get_read_response[&quot;get_read_response&quot;]
                     WishboneMasterAdapter1_request_write[&quot;request_write&quot;]
                     subgraph Serializer1[&quot;bus_serializer Serializer&quot;]
                         Serializer1_Serializer[&quot;Serializer&quot;]
@@ -132,8 +132,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         Serializer1_Serializer2[&quot;Serializer&quot;]
                         Serializer1_Serializer3[&quot;Serializer&quot;]
                         subgraph BasicFifo1[&quot;pending_requests BasicFifo&quot;]
-                            BasicFifo1_write[&quot;write&quot;]
                             BasicFifo1_read[&quot;read&quot;]
+                            BasicFifo1_write[&quot;write&quot;]
                         end
                     end
                 end
@@ -152,25 +152,25 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     MethodProduct_method[&quot;method&quot;]
                 end
                 subgraph BasicFifo2[&quot;free_rf_fifo BasicFifo&quot;]
-                    BasicFifo2_read[&quot;read&quot;]
                     BasicFifo2_write[&quot;write&quot;]
+                    BasicFifo2_read[&quot;read&quot;]
                 end
                 subgraph SimpleCommonBusCacheRefiller[&quot;icache_refiller SimpleCommonBusCacheRefiller&quot;]
                     SimpleCommonBusCacheRefiller_accept_refill[&quot;accept_refill&quot;]
-                    SimpleCommonBusCacheRefiller_start_refill[&quot;start_refill&quot;]
                     SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller[&quot;SimpleCommonBusCacheRefiller&quot;]
+                    SimpleCommonBusCacheRefiller_start_refill[&quot;start_refill&quot;]
                     subgraph Forwarder2[&quot;address_fwd Forwarder&quot;]
-                        Forwarder2_write[&quot;write&quot;]
                         Forwarder2_read[&quot;read&quot;]
+                        Forwarder2_write[&quot;write&quot;]
                     end
                 end
                 subgraph ICache[&quot;icache ICache&quot;]
-                    ICache_issue_req[&quot;issue_req&quot;]
                     ICache_ICache[&quot;ICache&quot;]
                     ICache_ICache1[&quot;ICache&quot;]
-                    ICache_accept_res[&quot;accept_res&quot;]
                     ICache_ICache2[&quot;ICache&quot;]
                     ICache_ICache3[&quot;ICache&quot;]
+                    ICache_accept_res[&quot;accept_res&quot;]
+                    ICache_issue_req[&quot;issue_req&quot;]
                     subgraph HwCounter[&quot;perf_loads HwCounter&quot;]
                         HwCounter__incr[&quot;_incr&quot;]
                     end
@@ -202,21 +202,21 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         FIFO2_read[&quot;read&quot;]
                     end
                     subgraph Forwarder3[&quot;res_fwd Forwarder&quot;]
-                        Forwarder3_read[&quot;read&quot;]
                         Forwarder3_write[&quot;write&quot;]
+                        Forwarder3_read[&quot;read&quot;]
                     end
                 end
                 subgraph FRAT[&quot;FRAT FRAT&quot;]
                     FRAT_rename[&quot;rename&quot;]
                 end
                 subgraph RRAT[&quot;RRAT RRAT&quot;]
-                    RRAT_commit[&quot;commit&quot;]
                     RRAT_peek[&quot;peek&quot;]
+                    RRAT_commit[&quot;commit&quot;]
                 end
                 subgraph RegisterFile[&quot;RF RegisterFile&quot;]
-                    RegisterFile_free[&quot;free&quot;]
-                    RegisterFile_read2[&quot;read2&quot;]
                     RegisterFile_read1[&quot;read1&quot;]
+                    RegisterFile_read2[&quot;read2&quot;]
+                    RegisterFile_free[&quot;free&quot;]
                     RegisterFile_write[&quot;write&quot;]
                 end
                 subgraph ReorderBuffer[&quot;ROB ReorderBuffer&quot;]
@@ -226,21 +226,21 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     ReorderBuffer_get_indices[&quot;get_indices&quot;]
                     ReorderBuffer_mark_done[&quot;mark_done&quot;]
                     subgraph LatencyMeasurer1[&quot;perf_rob_wait_time LatencyMeasurer&quot;]
-                        LatencyMeasurer1__stop[&quot;_stop&quot;]
                         LatencyMeasurer1__start[&quot;_start&quot;]
+                        LatencyMeasurer1__stop[&quot;_stop&quot;]
                         subgraph HwExpHistogram1[&quot;histogram HwExpHistogram&quot;]
                             HwExpHistogram1__add[&quot;_add&quot;]
                         end
                         subgraph FIFO3[&quot;fifo FIFO&quot;]
-                            FIFO3_write[&quot;write&quot;]
                             FIFO3_read[&quot;read&quot;]
+                            FIFO3_write[&quot;write&quot;]
                         end
                     end
                 end
                 subgraph Fetch[&quot;fetch Fetch&quot;]
+                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     Fetch_Fetch[&quot;Fetch&quot;]
                     Fetch_resume[&quot;resume&quot;]
-                    Fetch_stall_exception[&quot;stall_exception&quot;]
                     Fetch_Fetch1[&quot;Fetch&quot;]
                     subgraph BasicFifo3[&quot;fetch_target_queue BasicFifo&quot;]
                         BasicFifo3_write[&quot;write&quot;]
@@ -249,8 +249,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                 end
                 subgraph ExceptionCauseRegister[&quot;exception_cause_register ExceptionCauseRegister&quot;]
                     ExceptionCauseRegister_report[&quot;report&quot;]
-                    ExceptionCauseRegister_get[&quot;get&quot;]
                     ExceptionCauseRegister_clear[&quot;clear&quot;]
+                    ExceptionCauseRegister_get[&quot;get&quot;]
                     subgraph BasicFifo4[&quot;fu_report_fifo BasicFifo&quot;]
                         BasicFifo4_write[&quot;write&quot;]
                         BasicFifo4_read[&quot;read&quot;]
@@ -263,8 +263,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     subgraph Collector[&quot;result_collector Collector&quot;]
                         Collector_method[&quot;method&quot;]
                         subgraph Forwarder4[&quot;forwarder Forwarder&quot;]
-                            Forwarder4_write[&quot;write&quot;]
                             Forwarder4_read[&quot;read&quot;]
+                            Forwarder4_write[&quot;write&quot;]
                         end
                         subgraph ManyToOneConnectTrans[&quot;connect ManyToOneConnectTrans&quot;]
                             subgraph ConnectTrans1[&quot;ManyToOneConnectTrans_input_0 ConnectTrans&quot;]
@@ -282,27 +282,27 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         MethodProduct1_method[&quot;method&quot;]
                     end
                     subgraph RSFuncBlock[&quot;rs_block_0 RSFuncBlock&quot;]
+                        RSFuncBlock_select[&quot;select&quot;]
+                        RSFuncBlock_get_result[&quot;get_result&quot;]
                         RSFuncBlock_insert[&quot;insert&quot;]
                         RSFuncBlock_update[&quot;update&quot;]
-                        RSFuncBlock_get_result[&quot;get_result&quot;]
-                        RSFuncBlock_select[&quot;select&quot;]
                         subgraph RS[&quot;rs RS&quot;]
-                            RS_take[&quot;take&quot;]
-                            RS_RS[&quot;RS&quot;]
                             RS_insert[&quot;insert&quot;]
+                            RS_RS[&quot;RS&quot;]
+                            RS_take[&quot;take&quot;]
                             RS_RS1[&quot;RS&quot;]
                             RS_RS2[&quot;RS&quot;]
-                            RS_select[&quot;select&quot;]
                             RS_RS3[&quot;RS&quot;]
-                            RS_update[&quot;update&quot;]
                             RS_RS4[&quot;RS&quot;]
+                            RS_update[&quot;update&quot;]
+                            RS_select[&quot;select&quot;]
                         end
                         subgraph AluFuncUnit[&quot;func_unit_0 AluFuncUnit&quot;]
                             AluFuncUnit_issue[&quot;issue&quot;]
                             AluFuncUnit_accept[&quot;accept&quot;]
                             subgraph FIFO4[&quot;fifo FIFO&quot;]
-                                FIFO4_read[&quot;read&quot;]
                                 FIFO4_write[&quot;write&quot;]
+                                FIFO4_read[&quot;read&quot;]
                             end
                         end
                         subgraph WakeupSelect[&quot;wakeup_select_0 WakeupSelect&quot;]
@@ -323,8 +323,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                             JumpBranchFuncUnit_accept[&quot;accept&quot;]
                             JumpBranchFuncUnit_issue[&quot;issue&quot;]
                             subgraph FIFO6[&quot;fifo_branch_resolved FIFO&quot;]
-                                FIFO6_read[&quot;read&quot;]
                                 FIFO6_write[&quot;write&quot;]
+                                FIFO6_read[&quot;read&quot;]
                             end
                             subgraph HwCounter5[&quot;perf_jumps HwCounter&quot;]
                                 HwCounter5__incr[&quot;_incr&quot;]
@@ -344,8 +344,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                             WakeupSelect2_WakeupSelect[&quot;WakeupSelect&quot;]
                         end
                         subgraph ExceptionFuncUnit[&quot;func_unit_3 ExceptionFuncUnit&quot;]
-                            ExceptionFuncUnit_issue[&quot;issue&quot;]
                             ExceptionFuncUnit_accept[&quot;accept&quot;]
+                            ExceptionFuncUnit_issue[&quot;issue&quot;]
                             subgraph FIFO8[&quot;fifo FIFO&quot;]
                                 FIFO8_write[&quot;write&quot;]
                                 FIFO8_read[&quot;read&quot;]
@@ -369,8 +369,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         subgraph Collector1[&quot;collector Collector&quot;]
                             Collector1_method[&quot;method&quot;]
                             subgraph Forwarder5[&quot;forwarder Forwarder&quot;]
-                                Forwarder5_read[&quot;read&quot;]
                                 Forwarder5_write[&quot;write&quot;]
+                                Forwarder5_read[&quot;read&quot;]
                             end
                             subgraph ManyToOneConnectTrans1[&quot;connect ManyToOneConnectTrans&quot;]
                                 subgraph ConnectTrans4[&quot;ManyToOneConnectTrans_input_0 ConnectTrans&quot;]
@@ -393,41 +393,41 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     end
                     subgraph LSUDummy[&quot;rs_block_1 LSUDummy&quot;]
                         LSUDummy_update[&quot;update&quot;]
-                        LSUDummy_LSUDummy[&quot;LSUDummy&quot;]
                         LSUDummy_select[&quot;select&quot;]
-                        LSUDummy_LSUDummy1[&quot;LSUDummy&quot;]
+                        LSUDummy_insert[&quot;insert&quot;]
+                        LSUDummy_LSUDummy[&quot;LSUDummy&quot;]
                         LSUDummy_precommit[&quot;precommit&quot;]
-                        LSUDummy_get_result[&quot;get_result&quot;]
+                        LSUDummy_LSUDummy1[&quot;LSUDummy&quot;]
                         LSUDummy_LSUDummy2[&quot;LSUDummy&quot;]
-                        LSUDummy_insert[&quot;insert&quot;]
+                        LSUDummy_get_result[&quot;get_result&quot;]
                         subgraph Forwarder6[&quot;forwarder Forwarder&quot;]
-                            Forwarder6_read[&quot;read&quot;]
                             Forwarder6_write[&quot;write&quot;]
+                            Forwarder6_read[&quot;read&quot;]
                         end
                         subgraph LSURequester[&quot;requester LSURequester&quot;]
-                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
+                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                             LSURequester_issue_cond0[&quot;issue_cond0&quot;]
                             LSURequester_accept[&quot;accept&quot;]
+                            LSURequester_issue_cond2[&quot;issue_cond2&quot;]
                             LSURequester_issue[&quot;issue&quot;]
                             LSURequester_accept_cond0[&quot;accept_cond0&quot;]
-                            LSURequester_issue_cond1[&quot;issue_cond1&quot;]
                             LSURequester_accept_cond1[&quot;accept_cond1&quot;]
                         end
                     end
                     subgraph CSRUnit[&quot;rs_block_2 CSRUnit&quot;]
-                        CSRUnit_update[&quot;update&quot;]
-                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
+                        CSRUnit_insert[&quot;insert&quot;]
                         CSRUnit_select[&quot;select&quot;]
+                        CSRUnit_precommit[&quot;precommit&quot;]
                         CSRUnit_fetch_resume[&quot;fetch_resume&quot;]
                         CSRUnit_get_result[&quot;get_result&quot;]
-                        CSRUnit_precommit[&quot;precommit&quot;]
-                        CSRUnit_insert[&quot;insert&quot;]
+                        CSRUnit_update[&quot;update&quot;]
+                        CSRUnit_CSRUnit[&quot;CSRUnit&quot;]
                     end
                     subgraph MethodTryProduct[&quot;InstructionPrecommitKey_unifier MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct[&quot;MethodTryProduct&quot;]
                         MethodTryProduct_MethodTryProduct1[&quot;MethodTryProduct&quot;]
-                        MethodTryProduct_method[&quot;method&quot;]
                         MethodTryProduct_MethodTryProduct2[&quot;MethodTryProduct&quot;]
+                        MethodTryProduct_method[&quot;method&quot;]
                     end
                     subgraph Collector2[&quot;FetchResumeKey_unifier Collector&quot;]
                         Collector2_method[&quot;method&quot;]
@@ -449,60 +449,60 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     ResultAnnouncement_ResultAnnouncement[&quot;ResultAnnouncement&quot;]
                 end
                 subgraph InterruptController[&quot;interrupt_controller InterruptController&quot;]
-                    InterruptController_mret[&quot;mret&quot;]
                     InterruptController_report_interrupt[&quot;report_interrupt&quot;]
+                    InterruptController_mret[&quot;mret&quot;]
                     InterruptController_entry[&quot;entry&quot;]
                 end
                 subgraph GenericCSRRegisters[&quot;csr_generic GenericCSRRegisters&quot;]
                     GenericCSRRegisters_GenericCSRRegisters[&quot;GenericCSRRegisters&quot;]
                     subgraph MachineModeCSRRegisters[&quot;m_mode MachineModeCSRRegisters&quot;]
                         subgraph CSRRegister[&quot;mcause CSRRegister&quot;]
-                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister_write[&quot;write&quot;]
+                            CSRRegister__fu_read[&quot;_fu_read&quot;]
                             CSRRegister__fu_write[&quot;_fu_write&quot;]
                         end
                         subgraph CSRRegister1[&quot;mtvec CSRRegister&quot;]
+                            CSRRegister1__fu_read[&quot;_fu_read&quot;]
                             CSRRegister1__fu_write[&quot;_fu_write&quot;]
                             CSRRegister1_read[&quot;read&quot;]
-                            CSRRegister1__fu_read[&quot;_fu_read&quot;]
                         end
                         subgraph CSRRegister2[&quot;mepc CSRRegister&quot;]
-                            CSRRegister2__fu_write[&quot;_fu_write&quot;]
                             CSRRegister2__fu_read[&quot;_fu_read&quot;]
-                            CSRRegister2_write[&quot;write&quot;]
                             CSRRegister2_read[&quot;read&quot;]
+                            CSRRegister2__fu_write[&quot;_fu_write&quot;]
+                            CSRRegister2_write[&quot;write&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR[&quot;csr_cycle DoubleCounterCSR&quot;]
                         DoubleCounterCSR_increment[&quot;increment&quot;]
                         subgraph CSRRegister3[&quot;register_low CSRRegister&quot;]
-                            CSRRegister3_read[&quot;read&quot;]
-                            CSRRegister3_write[&quot;write&quot;]
                             CSRRegister3__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister3_write[&quot;write&quot;]
+                            CSRRegister3_read[&quot;read&quot;]
                         end
                         subgraph CSRRegister4[&quot;register_high CSRRegister&quot;]
-                            CSRRegister4_write[&quot;write&quot;]
-                            CSRRegister4_read[&quot;read&quot;]
                             CSRRegister4__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister4_read[&quot;read&quot;]
+                            CSRRegister4_write[&quot;write&quot;]
                         end
                     end
                     subgraph DoubleCounterCSR1[&quot;csr_time DoubleCounterCSR&quot;]
                         DoubleCounterCSR1_increment[&quot;increment&quot;]
                         subgraph CSRRegister5[&quot;register_low CSRRegister&quot;]
-                            CSRRegister5_read[&quot;read&quot;]
                             CSRRegister5__fu_read[&quot;_fu_read&quot;]
+                            CSRRegister5_read[&quot;read&quot;]
                             CSRRegister5_write[&quot;write&quot;]
                         end
                         subgraph CSRRegister6[&quot;register_high CSRRegister&quot;]
-                            CSRRegister6_write[&quot;write&quot;]
                             CSRRegister6__fu_read[&quot;_fu_read&quot;]
                             CSRRegister6_read[&quot;read&quot;]
+                            CSRRegister6_write[&quot;write&quot;]
                         end
                     end
                 end
                 subgraph FIFO9[&quot;fifo_decode FIFO&quot;]
-                    FIFO9_read[&quot;read&quot;]
                     FIFO9_write[&quot;write&quot;]
+                    FIFO9_read[&quot;read&quot;]
                 end
                 subgraph DecodeStage[&quot;decode DecodeStage&quot;]
                     DecodeStage_DecodeStage[&quot;DecodeStage&quot;]
@@ -512,8 +512,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                 end
                 subgraph Scheduler[&quot;scheduler Scheduler&quot;]
                     subgraph FIFO10[&quot;alloc_rename_buf FIFO&quot;]
-                        FIFO10_write[&quot;write&quot;]
                         FIFO10_read[&quot;read&quot;]
+                        FIFO10_write[&quot;write&quot;]
                     end
                     subgraph RegAllocation[&quot;reg_alloc RegAllocation&quot;]
                         RegAllocation_RegAllocation[&quot;RegAllocation&quot;]
@@ -542,8 +542,8 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                         RSSelection_RSSelection2[&quot;RSSelection&quot;]
                         RSSelection_RSSelection3[&quot;RSSelection&quot;]
                         subgraph Forwarder8[&quot;forwarder Forwarder&quot;]
-                            Forwarder8_read[&quot;read&quot;]
                             Forwarder8_write[&quot;write&quot;]
+                            Forwarder8_read[&quot;read&quot;]
                         end
                     end
                     subgraph RSInsertion[&quot;rs_insertion RSInsertion&quot;]
@@ -554,19 +554,19 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
                     ConnectTrans11_ConnectTrans[&quot;ConnectTrans&quot;]
                 end
                 subgraph Retirement[&quot;retirement Retirement&quot;]
-                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     Retirement_Retirement[&quot;Retirement&quot;]
+                    Retirement_core_state[&quot;core_state&quot;]
                     Retirement_Retirement1[&quot;Retirement&quot;]
-                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
                     Retirement_Retirement2[&quot;Retirement&quot;]
-                    Retirement_core_state[&quot;core_state&quot;]
                     Retirement_Retirement3[&quot;Retirement&quot;]
+                    Retirement_Retirement_cond0[&quot;Retirement_cond0&quot;]
                     Retirement_Retirement4[&quot;Retirement&quot;]
+                    Retirement_Retirement_cond1[&quot;Retirement_cond1&quot;]
                     subgraph DoubleCounterCSR2[&quot;instret_csr DoubleCounterCSR&quot;]
                         DoubleCounterCSR2_increment[&quot;increment&quot;]
                         subgraph CSRRegister7[&quot;register_low CSRRegister&quot;]
-                            CSRRegister7__fu_read[&quot;_fu_read&quot;]
                             CSRRegister7_read[&quot;read&quot;]
+                            CSRRegister7__fu_read[&quot;_fu_read&quot;]
                             CSRRegister7_write[&quot;write&quot;]
                         end
                         subgraph CSRRegister8[&quot;register_high CSRRegister&quot;]
@@ -597,61 +597,61 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
             end
         end
         subgraph TransactionManager[&quot;transactionManager TransactionManager&quot;]
-            TransactionManager_Retirement_Retirement_cond1[&quot;Retirement_Retirement_cond1&quot;]
-            TransactionManager_issue_cond2_LSUDummy[&quot;issue_cond2_LSUDummy&quot;]
-            TransactionManager_issue_cond0_LSUDummy[&quot;issue_cond0_LSUDummy&quot;]
             TransactionManager_LSUDummy_accept_cond0[&quot;LSUDummy_accept_cond0&quot;]
             TransactionManager_LSUDummy_accept_cond1[&quot;LSUDummy_accept_cond1&quot;]
-            TransactionManager_issue_cond1_LSUDummy[&quot;issue_cond1_LSUDummy&quot;]
+            TransactionManager_LSUDummy_issue_cond1[&quot;LSUDummy_issue_cond1&quot;]
+            TransactionManager_issue_cond2_LSUDummy[&quot;issue_cond2_LSUDummy&quot;]
+            TransactionManager_Retirement_cond1_Retirement[&quot;Retirement_cond1_Retirement&quot;]
             TransactionManager_Retirement_cond0_Retirement[&quot;Retirement_cond0_Retirement&quot;]
+            TransactionManager_LSUDummy_issue_cond0[&quot;LSUDummy_issue_cond0&quot;]
         end
     end
 Core_InitFreeRFFifo --&gt; BasicFifo2_write
 Retirement_Retirement --&gt; BasicFifo2_write
 TransactionManager_Retirement_cond0_Retirement --&gt; BasicFifo2_write
-TransactionManager_Retirement_Retirement_cond1 --&gt; BasicFifo2_write
+TransactionManager_Retirement_cond1_Retirement --&gt; BasicFifo2_write
 FIFO6_read --&gt; Core_DiscardBranchVerify
 WishboneMaster_WishboneMaster --&gt; Forwarder_write
 WishboneMaster1_WishboneMaster --&gt; Forwarder1_write
 Forwarder2_read --&gt; SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; WishboneMasterAdapter_request_read
-SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; Serializer_Serializer
+SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; Serializer_Serializer1
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; BasicFifo_write
 SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --&gt; WishboneMaster_request
-ICache_ICache1 &lt;--&gt; HwCounter4__incr
-ICache_ICache2 &lt;--&gt; HwCounter3__incr
-ICache_ICache2 &lt;--&gt; HwCounter2__incr
-ICache_ICache2 &lt;--&gt; HwCounter1__incr
-ICache_ICache2 --&gt; Forwarder3_write
-ICache_ICache3 --&gt; SimpleCommonBusCacheRefiller_start_refill
-ICache_ICache3 --&gt; Forwarder2_write
-ICache_ICache --&gt; Forwarder2_write
-SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache
-WishboneMasterAdapter_get_read_response --&gt; ICache_ICache
-Serializer_Serializer1 --&gt; ICache_ICache
-BasicFifo_read --&gt; ICache_ICache
-WishboneMaster_result --&gt; ICache_ICache
-Forwarder_read --&gt; ICache_ICache
-Fetch_Fetch --&gt; ICache_issue_req
-Fetch_Fetch &lt;--&gt; HwCounter__incr
-Fetch_Fetch &lt;--&gt; LatencyMeasurer__start
-Fetch_Fetch --&gt; FIFO1_write
-Fetch_Fetch --&gt; FIFO2_write
-Fetch_Fetch --&gt; BasicFifo3_write
-BasicFifo3_read --&gt; Fetch_Fetch1
-ICache_accept_res --&gt; Fetch_Fetch1
-FIFO2_read --&gt; Fetch_Fetch1
-Fetch_Fetch1 &lt;--&gt; LatencyMeasurer__stop
-FIFO1_read --&gt; Fetch_Fetch1
-Fetch_Fetch1 --&gt; HwExpHistogram__add
-Forwarder3_read --&gt; Fetch_Fetch1
-Fetch_Fetch1 --&gt; MethodProduct_method
+ICache_ICache &lt;--&gt; HwCounter4__incr
+ICache_ICache3 &lt;--&gt; HwCounter3__incr
+ICache_ICache3 &lt;--&gt; HwCounter2__incr
+ICache_ICache3 &lt;--&gt; HwCounter1__incr
+ICache_ICache3 --&gt; Forwarder3_write
+ICache_ICache1 --&gt; SimpleCommonBusCacheRefiller_start_refill
+ICache_ICache1 --&gt; Forwarder2_write
+ICache_ICache2 --&gt; Forwarder2_write
+SimpleCommonBusCacheRefiller_accept_refill --&gt; ICache_ICache2
+WishboneMasterAdapter_get_read_response --&gt; ICache_ICache2
+Serializer_Serializer --&gt; ICache_ICache2
+BasicFifo_read --&gt; ICache_ICache2
+WishboneMaster_result --&gt; ICache_ICache2
+Forwarder_read --&gt; ICache_ICache2
+Fetch_Fetch1 --&gt; ICache_issue_req
+Fetch_Fetch1 &lt;--&gt; HwCounter__incr
+Fetch_Fetch1 &lt;--&gt; LatencyMeasurer__start
+Fetch_Fetch1 --&gt; FIFO1_write
+Fetch_Fetch1 --&gt; FIFO2_write
+Fetch_Fetch1 --&gt; BasicFifo3_write
+BasicFifo3_read --&gt; Fetch_Fetch
+ICache_accept_res --&gt; Fetch_Fetch
+FIFO2_read --&gt; Fetch_Fetch
+Fetch_Fetch &lt;--&gt; LatencyMeasurer__stop
+FIFO1_read --&gt; Fetch_Fetch
+Fetch_Fetch --&gt; HwExpHistogram__add
+Forwarder3_read --&gt; Fetch_Fetch
+Fetch_Fetch --&gt; MethodProduct_method
 AdapterTrans_AdapterTrans_method --&gt; MethodProduct_method
-Fetch_Fetch1 --&gt; FIFO_write
+Fetch_Fetch --&gt; FIFO_write
 AdapterTrans_AdapterTrans_method --&gt; FIFO_write
-Fetch_Fetch1 --&gt; MethodMap_method
+Fetch_Fetch --&gt; MethodMap_method
 AdapterTrans_AdapterTrans_method --&gt; MethodMap_method
-Fetch_Fetch1 &lt;--&gt; CoreInstructionCounter_increment
+Fetch_Fetch &lt;--&gt; CoreInstructionCounter_increment
 AdapterTrans_AdapterTrans_method &lt;--&gt; CoreInstructionCounter_increment
 FIFO_read --&gt; DecodeStage_DecodeStage
 DecodeStage_DecodeStage &lt;--&gt; HwCounter8__incr
@@ -662,25 +662,25 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 FIFO10_read --&gt; Renaming_Renaming
 Renaming_Renaming --&gt; FRAT_rename
 Retirement_Retirement --&gt; FRAT_rename
-TransactionManager_Retirement_Retirement_cond1 --&gt; FRAT_rename
+TransactionManager_Retirement_cond1_Retirement --&gt; FRAT_rename
 Renaming_Renaming --&gt; FIFO11_write
 FIFO11_read --&gt; ROBAllocation_ROBAllocation
 ROBAllocation_ROBAllocation --&gt; ReorderBuffer_put
 ROBAllocation_ROBAllocation &lt;--&gt; LatencyMeasurer1__start
 ROBAllocation_ROBAllocation --&gt; FIFO3_write
 ROBAllocation_ROBAllocation --&gt; FIFO12_write
-FIFO12_read --&gt; RSSelection_RSSelection3
-RSSelection_RSSelection3 --&gt; Forwarder8_write
-Forwarder8_read --&gt; RSSelection_RSSelection2
-Forwarder8_read --&gt; RSSelection_RSSelection1
+FIFO12_read --&gt; RSSelection_RSSelection1
+RSSelection_RSSelection1 --&gt; Forwarder8_write
 Forwarder8_read --&gt; RSSelection_RSSelection
-RSFuncBlock_select --&gt; RSSelection_RSSelection2
-RS_select --&gt; RSSelection_RSSelection2
-RSSelection_RSSelection2 --&gt; FIFO13_write
-RSSelection_RSSelection1 --&gt; FIFO13_write
+Forwarder8_read --&gt; RSSelection_RSSelection2
+Forwarder8_read --&gt; RSSelection_RSSelection3
+RSFuncBlock_select --&gt; RSSelection_RSSelection
+RS_select --&gt; RSSelection_RSSelection
 RSSelection_RSSelection --&gt; FIFO13_write
-RSSelection_RSSelection1 &lt;--&gt; LSUDummy_select
-RSSelection_RSSelection &lt;--&gt; CSRUnit_select
+RSSelection_RSSelection2 --&gt; FIFO13_write
+RSSelection_RSSelection3 --&gt; FIFO13_write
+RSSelection_RSSelection2 &lt;--&gt; LSUDummy_select
+RSSelection_RSSelection3 &lt;--&gt; CSRUnit_select
 FIFO13_read --&gt; RSInsertion_RSInsertion
 RegisterFile_read1 --&gt; RSInsertion_RSInsertion
 RegisterFile_read2 --&gt; RSInsertion_RSInsertion
@@ -707,7 +707,7 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 ResultAnnouncement_ResultAnnouncement --&gt; RS_update
 ResultAnnouncement_ResultAnnouncement --&gt; LSUDummy_update
 ResultAnnouncement_ResultAnnouncement --&gt; CSRUnit_update
-RS_RS4 --&gt; WakeupSelect_WakeupSelect
+RS_RS --&gt; WakeupSelect_WakeupSelect
 RS_take --&gt; WakeupSelect_WakeupSelect
 RS_take --&gt; WakeupSelect1_WakeupSelect
 RS_take --&gt; WakeupSelect2_WakeupSelect
@@ -715,10 +715,10 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 RS_take --&gt; WakeupSelect4_WakeupSelect
 WakeupSelect_WakeupSelect --&gt; AluFuncUnit_issue
 WakeupSelect_WakeupSelect --&gt; FIFO4_write
-RS_RS2 --&gt; WakeupSelect1_WakeupSelect
+RS_RS3 --&gt; WakeupSelect1_WakeupSelect
 WakeupSelect1_WakeupSelect --&gt; ShiftFuncUnit_issue
 WakeupSelect1_WakeupSelect --&gt; FIFO5_write
-RS_RS1 --&gt; WakeupSelect2_WakeupSelect
+RS_RS4 --&gt; WakeupSelect2_WakeupSelect
 WakeupSelect2_WakeupSelect --&gt; JumpBranchFuncUnit_issue
 WakeupSelect2_WakeupSelect &lt;--&gt; HwCounter5__incr
 WakeupSelect2_WakeupSelect &lt;--&gt; HwCounter6__incr
@@ -730,10 +730,10 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 ConnectTrans3_ConnectTrans --&gt; BasicFifo4_write
 WakeupSelect2_WakeupSelect --&gt; FIFO7_write
 WakeupSelect2_WakeupSelect --&gt; FIFO6_write
-RS_RS --&gt; WakeupSelect3_WakeupSelect
+RS_RS2 --&gt; WakeupSelect3_WakeupSelect
 WakeupSelect3_WakeupSelect --&gt; ExceptionFuncUnit_issue
 WakeupSelect3_WakeupSelect --&gt; FIFO8_write
-RS_RS3 --&gt; WakeupSelect4_WakeupSelect
+RS_RS1 --&gt; WakeupSelect4_WakeupSelect
 WakeupSelect4_WakeupSelect --&gt; PrivilegedFuncUnit_issue
 ConnectTrans4_ConnectTrans --&gt; Forwarder5_write
 ConnectTrans5_ConnectTrans --&gt; Forwarder5_write
@@ -754,9 +754,9 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 LSUDummy_LSUDummy --&gt; Forwarder6_write
 TransactionManager_LSUDummy_accept_cond0 --&gt; Forwarder6_write
 TransactionManager_LSUDummy_accept_cond1 --&gt; Forwarder6_write
+TransactionManager_LSUDummy_issue_cond0 --&gt; Forwarder6_write
+TransactionManager_LSUDummy_issue_cond1 --&gt; Forwarder6_write
 TransactionManager_issue_cond2_LSUDummy --&gt; Forwarder6_write
-TransactionManager_issue_cond0_LSUDummy --&gt; Forwarder6_write
-TransactionManager_issue_cond1_LSUDummy --&gt; Forwarder6_write
 CSRRegister__fu_read --&gt; CSRUnit_CSRUnit
 CSRUnit_CSRUnit --&gt; CSRRegister__fu_write
 CSRRegister1__fu_read --&gt; CSRUnit_CSRUnit
@@ -778,43 +778,43 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 LSUDummy_get_result --&gt; ConnectTrans2_ConnectTrans
 Forwarder6_read --&gt; ConnectTrans2_ConnectTrans
 CSRUnit_get_result --&gt; ConnectTrans3_ConnectTrans
-MethodTryProduct_MethodTryProduct --&gt; PrivilegedFuncUnit_precommit
-MethodTryProduct_MethodTryProduct &lt;--&gt; InterruptController_mret
+MethodTryProduct_MethodTryProduct1 --&gt; PrivilegedFuncUnit_precommit
+MethodTryProduct_MethodTryProduct1 &lt;--&gt; InterruptController_mret
 MethodTryProduct_MethodTryProduct2 --&gt; LSUDummy_precommit
-MethodTryProduct_MethodTryProduct1 --&gt; CSRUnit_precommit
+MethodTryProduct_MethodTryProduct --&gt; CSRUnit_precommit
 ConnectTrans9_ConnectTrans --&gt; Forwarder7_write
 ConnectTrans10_ConnectTrans --&gt; Forwarder7_write
 BasicFifo5_read --&gt; ConnectTrans9_ConnectTrans
 CSRUnit_fetch_resume --&gt; ConnectTrans10_ConnectTrans
-ReorderBuffer_peek --&gt; Retirement_Retirement2
 ReorderBuffer_peek --&gt; Retirement_Retirement1
+ReorderBuffer_peek --&gt; Retirement_Retirement2
 ReorderBuffer_peek --&gt; Retirement_Retirement
 ReorderBuffer_peek --&gt; TransactionManager_Retirement_cond0_Retirement
-ReorderBuffer_peek --&gt; TransactionManager_Retirement_Retirement_cond1
-Retirement_Retirement2 --&gt; MethodTryProduct_method
-ExceptionCauseRegister_get --&gt; Retirement_Retirement1
+ReorderBuffer_peek --&gt; TransactionManager_Retirement_cond1_Retirement
+Retirement_Retirement1 --&gt; MethodTryProduct_method
+ExceptionCauseRegister_get --&gt; Retirement_Retirement2
 ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_cond0_Retirement
-ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_Retirement_cond1
+ExceptionCauseRegister_get --&gt; TransactionManager_Retirement_cond1_Retirement
 Retirement_Retirement &lt;--&gt; ReorderBuffer_retire
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; ReorderBuffer_retire
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; ReorderBuffer_retire
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; ReorderBuffer_retire
 Retirement_Retirement &lt;--&gt; LatencyMeasurer1__stop
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; LatencyMeasurer1__stop
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; LatencyMeasurer1__stop
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; LatencyMeasurer1__stop
 FIFO3_read --&gt; Retirement_Retirement
 FIFO3_read --&gt; TransactionManager_Retirement_cond0_Retirement
-FIFO3_read --&gt; TransactionManager_Retirement_Retirement_cond1
+FIFO3_read --&gt; TransactionManager_Retirement_cond1_Retirement
 Retirement_Retirement --&gt; HwExpHistogram1__add
 TransactionManager_Retirement_cond0_Retirement --&gt; HwExpHistogram1__add
-TransactionManager_Retirement_Retirement_cond1 --&gt; HwExpHistogram1__add
+TransactionManager_Retirement_cond1_Retirement --&gt; HwExpHistogram1__add
 CoreInstructionCounter_decrement --&gt; Retirement_Retirement
 CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_cond0_Retirement
-CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_Retirement_cond1
+CoreInstructionCounter_decrement --&gt; TransactionManager_Retirement_cond1_Retirement
 RRAT_peek --&gt; Retirement_Retirement
-RRAT_peek --&gt; TransactionManager_Retirement_Retirement_cond1
+RRAT_peek --&gt; TransactionManager_Retirement_cond1_Retirement
 Retirement_Retirement --&gt; RegisterFile_free
 TransactionManager_Retirement_cond0_Retirement --&gt; RegisterFile_free
-TransactionManager_Retirement_Retirement_cond1 --&gt; RegisterFile_free
+TransactionManager_Retirement_cond1_Retirement --&gt; RegisterFile_free
 CSRRegister1_read --&gt; Retirement_Retirement3
 Retirement_Retirement3 &lt;--&gt; ExceptionCauseRegister_clear
 GenericCSRRegisters_GenericCSRRegisters &lt;--&gt; DoubleCounterCSR_increment
@@ -834,7 +834,7 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 LSURequester_accept --&gt; TransactionManager_LSUDummy_accept_cond1
 TransactionManager_LSUDummy_accept_cond0 &lt;--&gt; LSURequester_accept_cond0
 WishboneMasterAdapter1_get_write_response --&gt; TransactionManager_LSUDummy_accept_cond0
-Serializer1_Serializer2 --&gt; TransactionManager_LSUDummy_accept_cond0
+Serializer1_Serializer --&gt; TransactionManager_LSUDummy_accept_cond0
 BasicFifo1_read --&gt; TransactionManager_LSUDummy_accept_cond0
 BasicFifo1_read --&gt; TransactionManager_LSUDummy_accept_cond1
 WishboneMaster1_result --&gt; TransactionManager_LSUDummy_accept_cond0
@@ -843,7 +843,23 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 Forwarder1_read --&gt; TransactionManager_LSUDummy_accept_cond1
 TransactionManager_LSUDummy_accept_cond1 &lt;--&gt; LSURequester_accept_cond1
 WishboneMasterAdapter1_get_read_response --&gt; TransactionManager_LSUDummy_accept_cond1
-Serializer1_Serializer --&gt; TransactionManager_LSUDummy_accept_cond1
+Serializer1_Serializer3 --&gt; TransactionManager_LSUDummy_accept_cond1
+TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSUDummy_LSUDummy2
+TransactionManager_LSUDummy_issue_cond1 &lt;--&gt; LSUDummy_LSUDummy2
+TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
+TransactionManager_LSUDummy_issue_cond0 --&gt; LSURequester_issue
+TransactionManager_LSUDummy_issue_cond1 --&gt; LSURequester_issue
+TransactionManager_issue_cond2_LSUDummy --&gt; LSURequester_issue
+TransactionManager_LSUDummy_issue_cond0 &lt;--&gt; LSURequester_issue_cond0
+TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMasterAdapter1_request_write
+TransactionManager_LSUDummy_issue_cond0 --&gt; Serializer1_Serializer2
+TransactionManager_LSUDummy_issue_cond0 --&gt; BasicFifo1_write
+TransactionManager_LSUDummy_issue_cond1 --&gt; BasicFifo1_write
+TransactionManager_LSUDummy_issue_cond0 --&gt; WishboneMaster1_request
+TransactionManager_LSUDummy_issue_cond1 --&gt; WishboneMaster1_request
+TransactionManager_LSUDummy_issue_cond1 &lt;--&gt; LSURequester_issue_cond1
+TransactionManager_LSUDummy_issue_cond1 --&gt; WishboneMasterAdapter1_request_read
+TransactionManager_LSUDummy_issue_cond1 --&gt; Serializer1_Serializer1
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; Retirement_Retirement_cond0
 TransactionManager_Retirement_cond0_Retirement --&gt; RRAT_commit
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; DoubleCounterCSR2_increment
@@ -853,31 +869,15 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 TransactionManager_Retirement_cond0_Retirement --&gt; CSRRegister8_write
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; HwCounter9__incr
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; Retirement_Retirement4
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement4
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; Retirement_Retirement4
 TransactionManager_Retirement_cond0_Retirement --&gt; CSRRegister_write
-TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister_write
+TransactionManager_Retirement_cond1_Retirement --&gt; CSRRegister_write
 TransactionManager_Retirement_cond0_Retirement --&gt; CSRRegister2_write
-TransactionManager_Retirement_Retirement_cond1 --&gt; CSRRegister2_write
+TransactionManager_Retirement_cond1_Retirement --&gt; CSRRegister2_write
 TransactionManager_Retirement_cond0_Retirement &lt;--&gt; InterruptController_entry
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; InterruptController_entry
-TransactionManager_Retirement_Retirement_cond1 &lt;--&gt; Retirement_Retirement_cond1
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; InterruptController_entry
 TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSURequester_issue_cond2
-TransactionManager_issue_cond2_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
-TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
-TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSUDummy_LSUDummy2
-TransactionManager_issue_cond2_LSUDummy --&gt; LSURequester_issue
-TransactionManager_issue_cond0_LSUDummy --&gt; LSURequester_issue
-TransactionManager_issue_cond1_LSUDummy --&gt; LSURequester_issue
-TransactionManager_issue_cond0_LSUDummy &lt;--&gt; LSURequester_issue_cond0
-TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMasterAdapter1_request_write
-TransactionManager_issue_cond0_LSUDummy --&gt; Serializer1_Serializer3
-TransactionManager_issue_cond0_LSUDummy --&gt; BasicFifo1_write
-TransactionManager_issue_cond1_LSUDummy --&gt; BasicFifo1_write
-TransactionManager_issue_cond0_LSUDummy --&gt; WishboneMaster1_request
-TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMaster1_request
-TransactionManager_issue_cond1_LSUDummy &lt;--&gt; LSURequester_issue_cond1
-TransactionManager_issue_cond1_LSUDummy --&gt; WishboneMasterAdapter1_request_read
-TransactionManager_issue_cond1_LSUDummy --&gt; Serializer1_Serializer1
+TransactionManager_Retirement_cond1_Retirement &lt;--&gt; Retirement_Retirement_cond1
         </div></div>
 </div>
 </div>
@@ -894,7 +894,7 @@ <h1>Full transaction-method graph<a class="headerlink" href="#full-transaction-m
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/development-environment.html b/development-environment.html
index e6bfa5a94..02f7f4b3d 100644
--- a/development-environment.html
+++ b/development-environment.html
@@ -209,7 +209,7 @@ <h3>tprof.py<a class="headerlink" href="#tprof-py" title="Permalink to this head
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/genindex.html b/genindex.html
index ad7b241e3..5ee2968cf 100644
--- a/genindex.html
+++ b/genindex.html
@@ -3752,7 +3752,7 @@ <h2 id="Z">Z</h2>
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/home.html b/home.html
index a54e93940..4b7688937 100644
--- a/home.html
+++ b/home.html
@@ -129,7 +129,7 @@ <h2>Documentation<a class="headerlink" href="#documentation" title="Permalink to
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/index.html b/index.html
index 2c9cadb95..51375da8c 100644
--- a/index.html
+++ b/index.html
@@ -229,7 +229,7 @@ <h1>Coreblocks<a class="headerlink" href="#coreblocks" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/miscellany/exceptions-summary.html b/miscellany/exceptions-summary.html
index 71777f464..06b5982c1 100644
--- a/miscellany/exceptions-summary.html
+++ b/miscellany/exceptions-summary.html
@@ -271,7 +271,7 @@ <h2>Summary<a class="headerlink" href="#summary" title="Permalink to this headin
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/modules-coreblocks.html b/modules-coreblocks.html
index 06a9ba943..8520b3612 100644
--- a/modules-coreblocks.html
+++ b/modules-coreblocks.html
@@ -203,7 +203,7 @@ <h1>coreblocks<a class="headerlink" href="#coreblocks" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/modules-transactron.html b/modules-transactron.html
index 5b9444853..89b9bc05f 100644
--- a/modules-transactron.html
+++ b/modules-transactron.html
@@ -148,7 +148,7 @@ <h1>transactron<a class="headerlink" href="#transactron" title="Permalink to thi
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/problem-checklist.html b/problem-checklist.html
index 9e5f215da..2f1bb65ad 100644
--- a/problem-checklist.html
+++ b/problem-checklist.html
@@ -105,7 +105,7 @@ <h1>Problem checklist<a class="headerlink" href="#problem-checklist" title="Perm
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/py-modindex.html b/py-modindex.html
index c7945255d..5a5332e59 100644
--- a/py-modindex.html
+++ b/py-modindex.html
@@ -613,7 +613,7 @@ <h1>Python Module Index</h1>
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/scheduler/overview.html b/scheduler/overview.html
index e38988a2c..c55eff521 100644
--- a/scheduler/overview.html
+++ b/scheduler/overview.html
@@ -146,7 +146,7 @@ <h2>More detailed description of each block<a class="headerlink" href="#more-det
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/search.html b/search.html
index 639e63a12..9f2992472 100644
--- a/search.html
+++ b/search.html
@@ -101,7 +101,7 @@
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/shared-structs/implementation/rs-impl.html b/shared-structs/implementation/rs-impl.html
index f0a8d40a1..9cb37e4cb 100644
--- a/shared-structs/implementation/rs-impl.html
+++ b/shared-structs/implementation/rs-impl.html
@@ -252,7 +252,7 @@ <h3>Read and clean row<a class="headerlink" href="#read-and-clean-row" title="Pe
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/shared-structs/rs.html b/shared-structs/rs.html
index 0e2e03359..5c6ef5166 100644
--- a/shared-structs/rs.html
+++ b/shared-structs/rs.html
@@ -222,7 +222,7 @@ <h2>External interface signals<a class="headerlink" href="#external-interface-si
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/synthesis/synthesis.html b/synthesis/synthesis.html
index 528ca6321..6ec526f85 100644
--- a/synthesis/synthesis.html
+++ b/synthesis/synthesis.html
@@ -266,7 +266,7 @@ <h3>Regression tests manual execution<a class="headerlink" href="#regression-tes
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/transactions.html b/transactions.html
index af59fe277..b959998e3 100644
--- a/transactions.html
+++ b/transactions.html
@@ -409,7 +409,7 @@ <h3>Transaction and method nesting<a class="headerlink" href="#transaction-and-m
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/transactron.html b/transactron.html
index 763db8ebe..aa0e08a71 100644
--- a/transactron.html
+++ b/transactron.html
@@ -1550,7 +1550,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/transactron.lib.html b/transactron.lib.html
index 05c97ee7f..e6c936ea2 100644
--- a/transactron.lib.html
+++ b/transactron.lib.html
@@ -1643,7 +1643,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/transactron.testing.html b/transactron.testing.html
index 6e965c3df..23604f388 100644
--- a/transactron.testing.html
+++ b/transactron.testing.html
@@ -399,7 +399,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/transactron.utils.amaranth_ext.html b/transactron.utils.amaranth_ext.html
index abae4ad00..d4c78e5b8 100644
--- a/transactron.utils.amaranth_ext.html
+++ b/transactron.utils.amaranth_ext.html
@@ -293,7 +293,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>
 
diff --git a/transactron.utils.html b/transactron.utils.html
index 3b96d2735..2652bf9ae 100644
--- a/transactron.utils.html
+++ b/transactron.utils.html
@@ -771,7 +771,7 @@ <h2>Submodules<a class="headerlink" href="#submodules" title="Permalink to this
 
   <div role="contentinfo">
     <p>&#169; Copyright Kuźnia Rdzeni, 2024.
-      <span class="lastupdated">Last updated on 22:02 2024-02-16.
+      <span class="lastupdated">Last updated on 10:09 2024-02-27.
       </span></p>
   </div>