diff --git a/.doctrees/api.doctree b/.doctrees/api.doctree index 4eda203e7..8af9dd2f9 100644 Binary files a/.doctrees/api.doctree and b/.doctrees/api.doctree differ diff --git a/.doctrees/auto_graph.doctree b/.doctrees/auto_graph.doctree index 0773c04f1..d7d384c88 100644 Binary files a/.doctrees/auto_graph.doctree and b/.doctrees/auto_graph.doctree differ diff --git a/.doctrees/current-graph.doctree b/.doctrees/current-graph.doctree index 463cde5e9..c8040cee0 100644 Binary files a/.doctrees/current-graph.doctree and b/.doctrees/current-graph.doctree differ diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle index c17477fde..716eeece0 100644 Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ diff --git a/_sources/auto_graph.rst.txt b/_sources/auto_graph.rst.txt index e1832a581..e332048e1 100644 --- a/_sources/auto_graph.rst.txt +++ b/_sources/auto_graph.rst.txt @@ -7,20 +7,20 @@ Core_InitFreeRFFifo["InitFreeRFFifo"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] WishboneMaster_WishboneMaster["WishboneMaster"] - WishboneMaster_request["request"] WishboneMaster_result["result"] + WishboneMaster_request["request"] subgraph Forwarder["result Forwarder"] Forwarder_read["read"] Forwarder_write["write"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_request["request"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] + WishboneMaster1_WishboneMaster["WishboneMaster"] + WishboneMaster1_request["request"] subgraph Forwarder1["result Forwarder"] - Forwarder1_read["read"] Forwarder1_write["write"] + Forwarder1_read["read"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] @@ -30,16 +30,16 @@ Serializer_Serializer["Serializer"] Serializer_Serializer1["Serializer"] subgraph BasicFifo["pending_requests BasicFifo"] - BasicFifo_read["read"] BasicFifo_write["write"] + BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] - WishboneMasterAdapter1_request_read["request_read"] + WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_write_response["get_write_response"] + WishboneMasterAdapter1_request_read["request_read"] WishboneMasterAdapter1_get_read_response["get_read_response"] - WishboneMasterAdapter1_request_write["request_write"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] @@ -52,32 +52,32 @@ end end subgraph CoreFrontend["frontend CoreFrontend"] - CoreFrontend_stall["stall"] CoreFrontend_DiscardBranchVerify["DiscardBranchVerify"] CoreFrontend_target_pred_req["target_pred_req"] + CoreFrontend_stall["stall"] CoreFrontend_target_pred_resp["target_pred_resp"] subgraph BasicFifo2["instr_buffer BasicFifo"] - BasicFifo2_read["read"] - BasicFifo2_clear["clear"] BasicFifo2_write["write"] + BasicFifo2_clear["clear"] + BasicFifo2_read["read"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] - SimpleCommonBusCacheRefiller_start_refill["start_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] + SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1["SimpleCommonBusCacheRefiller"] + SimpleCommonBusCacheRefiller_start_refill["start_refill"] subgraph Forwarder2["resp_fwd Forwarder"] - Forwarder2_read["read"] Forwarder2_write["write"] + Forwarder2_read["read"] end end subgraph ICache["icache ICache"] + ICache_issue_req["issue_req"] ICache_MemRead["MemRead"] ICache_ICache["ICache"] ICache_accept_res["accept_res"] - ICache_ICache1["ICache"] ICache_flush["flush"] - ICache_issue_req["issue_req"] + ICache_ICache1["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] end @@ -94,8 +94,8 @@ HwCounter4__incr["_incr"] end subgraph FIFOLatencyMeasurer["req_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer__stop["_stop"] FIFOLatencyMeasurer__start["_start"] + FIFOLatencyMeasurer__stop["_stop"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -105,14 +105,14 @@ end end subgraph ArgumentsToResultsZipper["req_zipper ArgumentsToResultsZipper"] - ArgumentsToResultsZipper_write_args["write_args"] ArgumentsToResultsZipper_peek_arg["peek_arg"] - ArgumentsToResultsZipper_write_results["write_results"] ArgumentsToResultsZipper_read["read"] + ArgumentsToResultsZipper_write_args["write_args"] + ArgumentsToResultsZipper_write_results["write_results"] subgraph BasicFifo3["fifo BasicFifo"] BasicFifo3_read["read"] - BasicFifo3_peek["peek"] BasicFifo3_write["write"] + BasicFifo3_peek["peek"] end subgraph Forwarder3["forwarder Forwarder"] Forwarder3_write["write"] @@ -121,14 +121,14 @@ end end subgraph FetchUnit["fetch FetchUnit"] - FetchUnit_Fetch_Stage1["Fetch_Stage1"] - FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] - FetchUnit_resume_from_exception["resume_from_exception"] FetchUnit_Fetch_Stage2["Fetch_Stage2"] - FetchUnit_Fetch_Stage0["Fetch_Stage0"] + FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] + FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] FetchUnit_stall_exception["stall_exception"] + FetchUnit_Fetch_Stage1["Fetch_Stage1"] + FetchUnit_resume_from_exception["resume_from_exception"] FetchUnit_resume_from_unsafe["resume_from_unsafe"] - FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] + FetchUnit_Fetch_Stage0["Fetch_Stage0"] subgraph TaggedCounter["perf_fetch_utilization TaggedCounter"] TaggedCounter__incr["_incr"] end @@ -136,9 +136,9 @@ HwCounter5__incr["_incr"] end subgraph Serializer["serializer Serializer"] - Serializer_clean["clean"] Serializer_write["write"] Serializer_read["read"] + Serializer_clean["clean"] end subgraph ConnectTrans["serializer_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -152,8 +152,8 @@ Semaphore_release["release"] end subgraph Pipe["s1_s2_pipe Pipe"] - Pipe_read["read"] Pipe_write["write"] + Pipe_read["read"] end subgraph Predecoder["predecoder_0 Predecoder"] Predecoder_predecode["predecode"] @@ -172,9 +172,9 @@ end end subgraph Pipe1["decode_pipe Pipe"] - Pipe1_clean["clean"] - Pipe1_write["write"] Pipe1_read["read"] + Pipe1_write["write"] + Pipe1_clean["clean"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] @@ -184,22 +184,22 @@ end end subgraph BasicFifo5["free_rf_fifo BasicFifo"] - BasicFifo5_read["read"] BasicFifo5_write["write"] + BasicFifo5_read["read"] end subgraph FRAT["FRAT FRAT"] FRAT_rename["rename"] end subgraph RRAT["RRAT RRAT"] - RRAT_commit["commit"] RRAT_peek["peek"] + RRAT_commit["commit"] end subgraph RegisterFile["RF RegisterFile"] + RegisterFile_perf["perf"] RegisterFile_write["write"] RegisterFile_free["free"] - RegisterFile_perf["perf"] - RegisterFile_read2["read2"] RegisterFile_read1["read1"] + RegisterFile_read2["read2"] subgraph TaggedLatencyMeasurer["perf_rf_valid_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer__start["_start"] TaggedLatencyMeasurer__stop["_stop"] @@ -207,8 +207,8 @@ HwExpHistogram1__add["_add"] end subgraph AsyncMemoryBank["slots AsyncMemoryBank"] - AsyncMemoryBank_write["write"] AsyncMemoryBank_read["read"] + AsyncMemoryBank_write["write"] end end subgraph HwExpHistogram2["perf_num_valid HwExpHistogram"] @@ -216,12 +216,12 @@ end end subgraph ReorderBuffer["ROB ReorderBuffer"] + ReorderBuffer_peek["peek"] ReorderBuffer_get_indices["get_indices"] - ReorderBuffer_retire["retire"] - ReorderBuffer_put["put"] ReorderBuffer_mark_done["mark_done"] + ReorderBuffer_retire["retire"] ReorderBuffer_perf["perf"] - ReorderBuffer_peek["peek"] + ReorderBuffer_put["put"] subgraph FIFOLatencyMeasurer1["perf_rob_wait_time FIFOLatencyMeasurer"] FIFOLatencyMeasurer1__start["_start"] FIFOLatencyMeasurer1__stop["_stop"] @@ -229,8 +229,8 @@ HwExpHistogram3__add["_add"] end subgraph FIFO1["fifo FIFO"] - FIFO1_write["write"] FIFO1_read["read"] + FIFO1_write["write"] end end subgraph HwExpHistogram4["perf_rob_size HwExpHistogram"] @@ -238,8 +238,8 @@ end end subgraph ExceptionInformationRegister["exception_information_register ExceptionInformationRegister"] - ExceptionInformationRegister_report["report"] ExceptionInformationRegister_clear["clear"] + ExceptionInformationRegister_report["report"] ExceptionInformationRegister_get["get"] subgraph BasicFifo6["fu_report_fifo BasicFifo"] BasicFifo6_write["write"] @@ -253,8 +253,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_write["write"] Forwarder4_read["read"] + Forwarder4_write["write"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans2["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -272,21 +272,21 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_insert["insert"] RSFuncBlock_update["update"] + RSFuncBlock_insert["insert"] RSFuncBlock_get_result["get_result"] RSFuncBlock_select["select"] subgraph RS["rs RS"] RS_RS["RS"] - RS_insert["insert"] RS_RS1["RS"] - RS_take["take"] + RS_insert["insert"] RS_RS2["RS"] - RS_perf["perf"] - RS_RS3["RS"] - RS_RS4["RS"] RS_update["update"] RS_select["select"] + RS_RS3["RS"] + RS_RS4["RS"] + RS_perf["perf"] + RS_take["take"] subgraph TaggedLatencyMeasurer1["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer1__start["_start"] TaggedLatencyMeasurer1__stop["_stop"] @@ -320,19 +320,19 @@ ShiftFuncUnit_accept["accept"] ShiftFuncUnit_issue["issue"] subgraph FIFO3["fifo FIFO"] - FIFO3_write["write"] FIFO3_read["read"] + FIFO3_write["write"] end end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_issue["issue"] subgraph FIFO4["fifo_branch_resolved FIFO"] - FIFO4_read["read"] FIFO4_write["write"] + FIFO4_read["read"] end subgraph TaggedCounter5["perf_instr TaggedCounter"] TaggedCounter5__incr["_incr"] @@ -363,16 +363,16 @@ WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] - PrivilegedFuncUnit_accept["accept"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] PrivilegedFuncUnit_issue["issue"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] + PrivilegedFuncUnit_accept["accept"] subgraph BasicFifo8["fetch_resume_fifo BasicFifo"] - BasicFifo8_write["write"] BasicFifo8_read["read"] + BasicFifo8_write["write"] end subgraph TaggedCounter6["perf_instr TaggedCounter"] TaggedCounter6__incr["_incr"] @@ -407,26 +407,26 @@ end end subgraph RSFuncBlock1["rs_block_1 RSFuncBlock"] - RSFuncBlock1_update["update"] - RSFuncBlock1_insert["insert"] RSFuncBlock1_get_result["get_result"] RSFuncBlock1_select["select"] + RSFuncBlock1_insert["insert"] + RSFuncBlock1_update["update"] subgraph FifoRS["rs FifoRS"] + FifoRS_select["select"] + FifoRS_FifoRS["FifoRS"] FifoRS_update["update"] FifoRS_insert["insert"] - FifoRS_perf["perf"] FifoRS_take["take"] - FifoRS_select["select"] - FifoRS_FifoRS["FifoRS"] + FifoRS_perf["perf"] subgraph TaggedLatencyMeasurer2["perf_rs_wait_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer2__stop["_stop"] TaggedLatencyMeasurer2__start["_start"] + TaggedLatencyMeasurer2__stop["_stop"] subgraph HwExpHistogram7["histogram HwExpHistogram"] HwExpHistogram7__add["_add"] end subgraph AsyncMemoryBank2["slots AsyncMemoryBank"] - AsyncMemoryBank2_write["write"] AsyncMemoryBank2_read["read"] + AsyncMemoryBank2_write["write"] end end subgraph HwExpHistogram8["perf_num_full HwExpHistogram"] @@ -437,21 +437,21 @@ LSUDummy_accept_cond0["accept_cond0"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_LSUDummy1["LSUDummy"] - LSUDummy_LSUDummy2["LSUDummy"] LSUDummy_issue["issue"] LSUDummy_accept["accept"] LSUDummy_accept_cond1["accept_cond1"] + LSUDummy_LSUDummy2["LSUDummy"] subgraph LSURequester["requester LSURequester"] - LSURequester_accept["accept"] - LSURequester_issue_cond2["issue_cond2"] - LSURequester_accept_cond1["accept_cond1"] + LSURequester_issue_cond0["issue_cond0"] LSURequester_accept_cond0["accept_cond0"] + LSURequester_accept_cond1["accept_cond1"] LSURequester_issue["issue"] + LSURequester_issue_cond2["issue_cond2"] + LSURequester_accept["accept"] LSURequester_issue_cond1["issue_cond1"] - LSURequester_issue_cond0["issue_cond0"] subgraph BasicFifo9["args_fifo BasicFifo"] - BasicFifo9_write["write"] BasicFifo9_read["read"] + BasicFifo9_write["write"] end end subgraph Forwarder6["requests Forwarder"] @@ -488,13 +488,13 @@ end end subgraph CSRUnit["rs_block_2 CSRUnit"] + CSRUnit_CSRUnit["CSRUnit"] + CSRUnit_update["update"] + CSRUnit_get_result["get_result"] CSRUnit_fetch_resume["fetch_resume"] + CSRUnit_CSRUnit1["CSRUnit"] CSRUnit_insert["insert"] - CSRUnit_update["update"] CSRUnit_select["select"] - CSRUnit_CSRUnit["CSRUnit"] - CSRUnit_CSRUnit1["CSRUnit"] - CSRUnit_get_result["get_result"] end end subgraph ResultAnnouncement["announcement ResultAnnouncement"] @@ -547,12 +547,12 @@ end end subgraph AliasedCSR["mstatus AliasedCSR"] - AliasedCSR__fu_read["_fu_read"] AliasedCSR__fu_write["_fu_write"] + AliasedCSR__fu_read["_fu_read"] end subgraph AliasedCSR1["mstatush AliasedCSR"] - AliasedCSR1__fu_write["_fu_write"] AliasedCSR1__fu_read["_fu_read"] + AliasedCSR1__fu_write["_fu_write"] end subgraph CSRRegister6["mcause CSRRegister"] CSRRegister6__internal_fu_read["_internal_fu_read"] @@ -569,8 +569,8 @@ end end subgraph CSRRegister7["mtvec CSRRegister"] - CSRRegister7__internal_fu_read["_internal_fu_read"] CSRRegister7_read["read"] + CSRRegister7__internal_fu_read["_internal_fu_read"] CSRRegister7__internal_fu_write["_internal_fu_write"] subgraph MethodMap14["fu_write_map MethodMap"] MethodMap14_method["method"] @@ -583,10 +583,10 @@ end end subgraph CSRRegister8["mepc CSRRegister"] - CSRRegister8__internal_fu_read["_internal_fu_read"] + CSRRegister8_read["read"] CSRRegister8_write["write"] + CSRRegister8__internal_fu_read["_internal_fu_read"] CSRRegister8__internal_fu_write["_internal_fu_write"] - CSRRegister8_read["read"] subgraph MethodMap16["fu_write_map MethodMap"] MethodMap16_method["method"] end @@ -612,14 +612,14 @@ end end subgraph CSRRegister10["priv_mode CSRRegister"] - CSRRegister10_write["write"] CSRRegister10_read["read"] + CSRRegister10_write["write"] end subgraph CSRRegister11["mstatus_mie CSRRegister"] + CSRRegister11__internal_fu_read["_internal_fu_read"] CSRRegister11_write["write"] CSRRegister11__internal_fu_write["_internal_fu_write"] CSRRegister11_read["read"] - CSRRegister11__internal_fu_read["_internal_fu_read"] subgraph MethodMap22["fu_write_map MethodMap"] MethodMap22_method["method"] end @@ -631,10 +631,10 @@ end end subgraph CSRRegister12["mstatus_mpie CSRRegister"] - CSRRegister12__internal_fu_read["_internal_fu_read"] CSRRegister12__internal_fu_write["_internal_fu_write"] - CSRRegister12_write["write"] + CSRRegister12__internal_fu_read["_internal_fu_read"] CSRRegister12_read["read"] + CSRRegister12_write["write"] subgraph MethodMap24["fu_write_map MethodMap"] MethodMap24_method["method"] end @@ -646,9 +646,9 @@ end end subgraph CSRRegister13["mstatus_mpp CSRRegister"] - CSRRegister13__internal_fu_read["_internal_fu_read"] CSRRegister13_read["read"] CSRRegister13_write["write"] + CSRRegister13__internal_fu_read["_internal_fu_read"] CSRRegister13__internal_fu_write["_internal_fu_write"] subgraph MethodMap26["fu_write_map MethodMap"] MethodMap26_method["method"] @@ -661,9 +661,9 @@ end end subgraph CSRRegister14["mstatus_mprv CSRRegister"] - CSRRegister14_write["write"] CSRRegister14__internal_fu_read["_internal_fu_read"] CSRRegister14__internal_fu_write["_internal_fu_write"] + CSRRegister14_write["write"] subgraph MethodMap28["fu_write_map MethodMap"] MethodMap28_method["method"] end @@ -675,9 +675,9 @@ end end subgraph CSRRegister15["mstatus_tw CSRRegister"] - CSRRegister15__internal_fu_read["_internal_fu_read"] - CSRRegister15__internal_fu_write["_internal_fu_write"] CSRRegister15_read["read"] + CSRRegister15__internal_fu_write["_internal_fu_write"] + CSRRegister15__internal_fu_read["_internal_fu_read"] subgraph MethodMap30["fu_write_map MethodMap"] MethodMap30_method["method"] end @@ -711,9 +711,9 @@ subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] DoubleCounterCSR1_increment["increment"] subgraph CSRRegister18["register_low CSRRegister"] - CSRRegister18__internal_fu_read["_internal_fu_read"] CSRRegister18_write["write"] CSRRegister18_read["read"] + CSRRegister18__internal_fu_read["_internal_fu_read"] subgraph MethodMap37["fu_read_map MethodMap"] MethodMap37_method["method"] end @@ -750,11 +750,11 @@ end end subgraph CSRRegister21["mip CSRRegister"] + CSRRegister21__internal_fu_write["_internal_fu_write"] CSRRegister21_write["write"] CSRRegister21_read["read"] CSRRegister21__internal_fu_read["_internal_fu_read"] CSRRegister21_read_comb["read_comb"] - CSRRegister21__internal_fu_write["_internal_fu_write"] subgraph MethodMap42["fu_write_map MethodMap"] MethodMap42_method["method"] end @@ -767,30 +767,30 @@ end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] - CoreInstructionCounter_decrement["decrement"] CoreInstructionCounter_increment["increment"] + CoreInstructionCounter_decrement["decrement"] end subgraph MethodProduct1["get_instr MethodProduct"] MethodProduct1_method["method"] end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO9["alloc_rename_buf FIFO"] - FIFO9_read["read"] FIFO9_write["write"] + FIFO9_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph Connect["rename_out_buf Connect"] - Connect_write["write"] Connect_read["read"] + Connect_write["write"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO10["reg_alloc_out_buf FIFO"] - FIFO10_write["write"] FIFO10_read["read"] + FIFO10_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] @@ -812,8 +812,8 @@ subgraph Collector3["FetchResumeKey_unifier Collector"] Collector3_method["method"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end subgraph ManyToOneConnectTrans3["connect ManyToOneConnectTrans"] subgraph ConnectTrans11["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -829,28 +829,28 @@ ConnectTrans13_ConnectTrans["ConnectTrans"] end subgraph Retirement["retirement Retirement"] + Retirement_precommit["precommit"] + Retirement_Retirement_cond0["Retirement_cond0"] Retirement_Retirement["Retirement"] Retirement_Retirement1["Retirement"] - Retirement_core_state["core_state"] - Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement2["Retirement"] - Retirement_precommit["precommit"] - Retirement_Retirement_cond0["Retirement_cond0"] + Retirement_Retirement_cond1["Retirement_cond1"] + Retirement_core_state["core_state"] Retirement_Retirement3["Retirement"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister22["register_low CSRRegister"] + CSRRegister22__internal_fu_read["_internal_fu_read"] CSRRegister22_write["write"] CSRRegister22_read["read"] - CSRRegister22__internal_fu_read["_internal_fu_read"] subgraph MethodMap45["fu_read_map MethodMap"] MethodMap45_method["method"] end end subgraph CSRRegister23["register_high CSRRegister"] - CSRRegister23_read["read"] - CSRRegister23_write["write"] CSRRegister23__internal_fu_read["_internal_fu_read"] + CSRRegister23_write["write"] + CSRRegister23_read["read"] subgraph MethodMap47["fu_read_map MethodMap"] MethodMap47_method["method"] end @@ -860,54 +860,54 @@ HwCounter9__incr["_incr"] end subgraph FIFOLatencyMeasurer2["perf_trap_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer2__start["_start"] FIFOLatencyMeasurer2__stop["_stop"] + FIFOLatencyMeasurer2__start["_start"] subgraph HwExpHistogram9["histogram HwExpHistogram"] HwExpHistogram9__add["_add"] end subgraph FIFO12["fifo FIFO"] - FIFO12_write["write"] FIFO12_read["read"] + FIFO12_write["write"] end end end end end subgraph TransactionManager["transaction_manager TransactionManager"] - TransactionManager_ConnectTrans_accept_cond1["ConnectTrans_accept_cond1"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit["PrivilegedFuncUnit_cond2_PrivilegedFuncUnit"] - TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] - TransactionManager_accept_cond1_accept_cond0_ConnectTrans["accept_cond1_accept_cond0_ConnectTrans"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] - TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit["PrivilegedFuncUnit_cond1_PrivilegedFuncUnit"] + TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"] TransactionManager_accept_cond0_accept_cond0_ConnectTrans["accept_cond0_accept_cond0_ConnectTrans"] - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2["Fetch_Stage2_cond1_Fetch_Stage2"] TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2["Fetch_Stage2_cond0_Fetch_Stage2"] - TransactionManager_Renaming_ROBAllocation["Renaming_ROBAllocation"] + TransactionManager_ROBAllocation_Renaming["ROBAllocation_Renaming"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_PrivilegedFuncUnit_cond1"] TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit["PrivilegedFuncUnit_cond0_PrivilegedFuncUnit"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_PrivilegedFuncUnit_cond2"] + TransactionManager_accept_cond1_ConnectTrans["accept_cond1_ConnectTrans"] + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0["Fetch_Stage2_Fetch_Stage2_cond0"] + TransactionManager_accept_cond0_accept_cond1_ConnectTrans["accept_cond0_accept_cond1_ConnectTrans"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1["Fetch_Stage2_Fetch_Stage2_cond1"] + TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] end end Core_InitFreeRFFifo --> BasicFifo5_write - Retirement_Retirement --> BasicFifo5_write + Retirement_Retirement1 --> BasicFifo5_write TransactionManager_Retirement_Retirement_cond0 --> BasicFifo5_write - TransactionManager_Retirement_Retirement_cond1 --> BasicFifo5_write + TransactionManager_Retirement_cond1_Retirement --> BasicFifo5_write WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write FIFO4_read --> CoreFrontend_DiscardBranchVerify - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1 - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request - WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 - Serializer_Serializer --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 - BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 - WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 - Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 - SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Forwarder2_write + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMasterAdapter_request_read + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Serializer_Serializer1 + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> BasicFifo_write + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMaster_request + WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller + Serializer_Serializer --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller + BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller + WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller + Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller + SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Forwarder2_write ICache_ICache1 <--> HwCounter4__incr ArgumentsToResultsZipper_peek_arg --> ICache_MemRead BasicFifo3_peek --> ICache_MemRead @@ -959,9 +959,9 @@ CSRRegister10_read --> InternalInterruptController_InternalInterruptController2 CSRRegister10_read --> WakeupSelect3_WakeupSelect CSRRegister10_read --> CSRUnit_CSRUnit + CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 - CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit - CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit CSRRegister20_read --> InternalInterruptController_InternalInterruptController1 CSRRegister21_read --> InternalInterruptController_InternalInterruptController1 @@ -1031,7 +1031,7 @@ ResultAnnouncement_ResultAnnouncement --> FifoRS_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update RS_perf --> HwExpHistogram6__add - RS_RS --> WakeupSelect_WakeupSelect + RS_RS1 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -1058,22 +1058,22 @@ RS_RS3 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO3_write - RS_RS4 --> WakeupSelect2_WakeupSelect + RS_RS2 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> CoreFrontend_target_pred_req WakeupSelect2_WakeupSelect --> BasicFifo7_write WakeupSelect2_WakeupSelect --> TaggedCounter5__incr - RS_RS2 --> WakeupSelect3_WakeupSelect + RS_RS --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> BasicFifo6_write ConnectTrans7_ConnectTrans --> BasicFifo6_write ConnectTrans9_ConnectTrans --> BasicFifo6_write ConnectTrans4_ConnectTrans --> BasicFifo6_write - TransactionManager_ConnectTrans_accept_cond1 --> BasicFifo6_write TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> BasicFifo6_write - TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> BasicFifo6_write + TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> BasicFifo6_write + TransactionManager_accept_cond1_ConnectTrans --> BasicFifo6_write WakeupSelect3_WakeupSelect --> FIFO5_write - RS_RS1 --> WakeupSelect4_WakeupSelect + RS_RS4 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans5_ConnectTrans --> Forwarder5_write ConnectTrans6_ConnectTrans --> Forwarder5_write @@ -1096,35 +1096,35 @@ CSRRegister8_read --> ConnectTrans9_ConnectTrans ConnectTrans9_ConnectTrans --> BasicFifo8_write FifoRS_perf --> HwExpHistogram8__add - Forwarder6_read --> LSUDummy_LSUDummy1 - Forwarder6_read --> TransactionManager_LSUDummy_issue_cond1 + Forwarder6_read --> LSUDummy_LSUDummy Forwarder6_read --> TransactionManager_LSUDummy_issue_cond0 + Forwarder6_read --> TransactionManager_LSUDummy_issue_cond1 Forwarder6_read --> TransactionManager_LSUDummy_issue_cond2 - LSUDummy_LSUDummy1 --> FIFO6_write + LSUDummy_LSUDummy --> FIFO6_write WakeupSelect5_WakeupSelect --> FIFO6_write - TransactionManager_LSUDummy_issue_cond1 --> FIFO6_write TransactionManager_LSUDummy_issue_cond0 --> FIFO6_write + TransactionManager_LSUDummy_issue_cond1 --> FIFO6_write TransactionManager_LSUDummy_issue_cond2 --> FIFO6_write - LSUDummy_LSUDummy1 --> FIFO8_write + LSUDummy_LSUDummy --> FIFO8_write WakeupSelect5_WakeupSelect --> FIFO8_write - TransactionManager_LSUDummy_issue_cond1 --> FIFO8_write TransactionManager_LSUDummy_issue_cond0 --> FIFO8_write + TransactionManager_LSUDummy_issue_cond1 --> FIFO8_write TransactionManager_LSUDummy_issue_cond2 --> FIFO8_write Retirement_precommit --> LSUDummy_LSUDummy2 Retirement_precommit --> CSRUnit_CSRUnit1 + Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 - Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit - Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit ReorderBuffer_peek --> LSUDummy_LSUDummy2 ReorderBuffer_peek --> CSRUnit_CSRUnit1 - ReorderBuffer_peek --> Retirement_Retirement2 ReorderBuffer_peek --> Retirement_Retirement + ReorderBuffer_peek --> Retirement_Retirement1 + ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 - ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 - ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 - ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit + ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit FifoRS_FifoRS --> WakeupSelect5_WakeupSelect FifoRS_take --> WakeupSelect5_WakeupSelect @@ -1229,134 +1229,160 @@ Collector2_method --> ConnectTrans3_ConnectTrans Forwarder7_read --> ConnectTrans3_ConnectTrans CSRUnit_get_result --> ConnectTrans4_ConnectTrans - ExceptionInformationRegister_get --> Retirement_Retirement2 + ExceptionInformationRegister_get --> Retirement_Retirement ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond0 - ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement <--> ReorderBuffer_retire + ExceptionInformationRegister_get --> TransactionManager_Retirement_cond1_Retirement + Retirement_Retirement1 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire - TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire - Retirement_Retirement <--> FIFOLatencyMeasurer1__stop + TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire + Retirement_Retirement1 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1__stop - TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer1__stop - FIFO1_read --> Retirement_Retirement + TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer1__stop + FIFO1_read --> Retirement_Retirement1 FIFO1_read --> TransactionManager_Retirement_Retirement_cond0 - FIFO1_read --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement --> HwExpHistogram3__add + FIFO1_read --> TransactionManager_Retirement_cond1_Retirement + Retirement_Retirement1 --> HwExpHistogram3__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram3__add - TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram3__add - CoreInstructionCounter_decrement --> Retirement_Retirement + TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram3__add + CoreInstructionCounter_decrement --> Retirement_Retirement1 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 - CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 - RRAT_peek --> Retirement_Retirement - RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement --> RegisterFile_free + CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement + RRAT_peek --> Retirement_Retirement1 + RRAT_peek --> TransactionManager_Retirement_cond1_Retirement + Retirement_Retirement1 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free - TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free - Retirement_Retirement --> TaggedLatencyMeasurer__stop + TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free + Retirement_Retirement1 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer__stop - TransactionManager_Retirement_Retirement_cond1 --> TaggedLatencyMeasurer__stop - AsyncMemoryBank_read --> Retirement_Retirement + TransactionManager_Retirement_cond1_Retirement --> TaggedLatencyMeasurer__stop + AsyncMemoryBank_read --> Retirement_Retirement1 AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond0 - AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement --> HwExpHistogram1__add + AsyncMemoryBank_read --> TransactionManager_Retirement_cond1_Retirement + Retirement_Retirement1 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add - TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add - Retirement_Retirement --> FRAT_rename - TransactionManager_Renaming_ROBAllocation --> FRAT_rename - TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename - Retirement_Retirement1 <--> FIFOLatencyMeasurer2__stop - FIFO12_read --> Retirement_Retirement1 - Retirement_Retirement1 --> HwExpHistogram9__add - CSRRegister7_read --> Retirement_Retirement1 - Retirement_Retirement1 --> FetchUnit_resume_from_exception - Retirement_Retirement1 <--> ExceptionInformationRegister_clear + TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add + Retirement_Retirement1 --> FRAT_rename + TransactionManager_ROBAllocation_Renaming --> FRAT_rename + TransactionManager_Retirement_cond1_Retirement --> FRAT_rename + Retirement_Retirement3 <--> FIFOLatencyMeasurer2__stop + FIFO12_read --> Retirement_Retirement3 + Retirement_Retirement3 --> HwExpHistogram9__add + CSRRegister7_read --> Retirement_Retirement3 + Retirement_Retirement3 --> FetchUnit_resume_from_exception + Retirement_Retirement3 <--> ExceptionInformationRegister_clear + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> TaggedCounter6__incr + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 --> TaggedCounter6__incr TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> TaggedCounter6__incr - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit --> TaggedCounter6__incr - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit --> TaggedCounter6__incr TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit --> TaggedCounter6__incr + CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 - CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit - CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit - TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 - TransactionManager_ConnectTrans_accept_cond1 <--> ConnectTrans10_ConnectTrans - TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> ConnectTrans10_ConnectTrans - TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> ConnectTrans10_ConnectTrans - TransactionManager_ConnectTrans_accept_cond1 --> Forwarder7_write - TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> Forwarder7_write - TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> Forwarder7_write - LSUDummy_accept --> TransactionManager_ConnectTrans_accept_cond1 - LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - LSUDummy_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_ConnectTrans_accept_cond1 <--> LSUDummy_accept_cond1 - FIFO6_read --> TransactionManager_ConnectTrans_accept_cond1 - FIFO8_read --> TransactionManager_ConnectTrans_accept_cond1 - TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> ICache_flush + TransactionManager_ROBAllocation_Renaming <--> ROBAllocation_ROBAllocation + Connect_read --> TransactionManager_ROBAllocation_Renaming + TransactionManager_ROBAllocation_Renaming --> ReorderBuffer_put + TransactionManager_ROBAllocation_Renaming <--> FIFOLatencyMeasurer1__start + TransactionManager_ROBAllocation_Renaming --> FIFO1_write + TransactionManager_ROBAllocation_Renaming --> FIFO10_write + TransactionManager_ROBAllocation_Renaming <--> Renaming_Renaming + FIFO9_read --> TransactionManager_ROBAllocation_Renaming + TransactionManager_ROBAllocation_Renaming --> Connect_write + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 + TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy1 + TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy1 + TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy1 TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue + TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond1 --> BasicFifo9_write TransactionManager_LSUDummy_issue_cond0 --> BasicFifo9_write + TransactionManager_LSUDummy_issue_cond1 --> BasicFifo9_write TransactionManager_LSUDummy_issue_cond2 --> BasicFifo9_write - TransactionManager_LSUDummy_issue_cond1 --> FIFO7_write TransactionManager_LSUDummy_issue_cond0 --> FIFO7_write + TransactionManager_LSUDummy_issue_cond1 --> FIFO7_write TransactionManager_LSUDummy_issue_cond2 --> FIFO7_write - TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 - TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read - TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer3 - TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write + TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 + TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write + TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer3 TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request + TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2_cond1 - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2 - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2 - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 <--> Semaphore_release - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> Semaphore_release - Pipe_read --> TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 - Pipe_read --> TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> Predecoder_predecode - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> Predecoder_predecode - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> PredictionChecker_check - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> PredictionChecker_check - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> TaggedCounter1__incr - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter1__incr - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> TaggedCounter2__incr - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter2__incr - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> TaggedCounter3__incr - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter3__incr - TransactionManager_Renaming_ROBAllocation <--> Renaming_Renaming - FIFO9_read --> TransactionManager_Renaming_ROBAllocation - TransactionManager_Renaming_ROBAllocation --> Connect_write - TransactionManager_Renaming_ROBAllocation <--> ROBAllocation_ROBAllocation - Connect_read --> TransactionManager_Renaming_ROBAllocation - TransactionManager_Renaming_ROBAllocation --> ReorderBuffer_put - TransactionManager_Renaming_ROBAllocation <--> FIFOLatencyMeasurer1__start - TransactionManager_Renaming_ROBAllocation --> FIFO1_write - TransactionManager_Renaming_ROBAllocation --> FIFO10_write - TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement3 - TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement3 + TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 + TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 + TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond0 + LSURequester_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + LSURequester_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + BasicFifo9_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + BasicFifo9_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + FIFO7_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + FIFO7_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSURequester_accept_cond0 + WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + Serializer1_Serializer --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + Forwarder1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + Forwarder1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> ConnectTrans10_ConnectTrans + TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> ConnectTrans10_ConnectTrans + TransactionManager_accept_cond1_ConnectTrans <--> ConnectTrans10_ConnectTrans + TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> Forwarder7_write + TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> Forwarder7_write + TransactionManager_accept_cond1_ConnectTrans --> Forwarder7_write + LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans + LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + LSUDummy_accept --> TransactionManager_accept_cond1_ConnectTrans + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2 + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2 + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> Semaphore_release + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> Semaphore_release + Pipe_read --> TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 + Pipe_read --> TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> Predecoder_predecode + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Predecoder_predecode + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> PredictionChecker_check + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> PredictionChecker_check + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter1__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter1__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter2__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter2__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter3__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter3__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 + TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSURequester_accept_cond1 + WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + Serializer1_Serializer1 --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans + TransactionManager_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond1 + FIFO6_read --> TransactionManager_accept_cond1_ConnectTrans + FIFO8_read --> TransactionManager_accept_cond1_ConnectTrans + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2_cond0 + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> HwCounter5__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter__incr + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Serializer_write + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2 + TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement2 TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer2__start - TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer2__start + TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer2__start TransactionManager_Retirement_Retirement_cond0 --> FIFO12_write - TransactionManager_Retirement_Retirement_cond1 --> FIFO12_write + TransactionManager_Retirement_cond1_Retirement --> FIFO12_write InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond0 - InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond1 + InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond1_Retirement TransactionManager_Retirement_Retirement_cond0 --> CSRRegister6_write - TransactionManager_Retirement_Retirement_cond1 --> CSRRegister6_write + TransactionManager_Retirement_cond1_Retirement --> CSRRegister6_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write - TransactionManager_Retirement_Retirement_cond1 --> CSRRegister8_write + TransactionManager_Retirement_cond1_Retirement --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister9_write - TransactionManager_Retirement_Retirement_cond1 --> CSRRegister9_write + TransactionManager_Retirement_cond1_Retirement --> CSRRegister9_write TransactionManager_Retirement_Retirement_cond0 <--> InternalInterruptController_entry - TransactionManager_Retirement_Retirement_cond1 <--> InternalInterruptController_entry + TransactionManager_Retirement_cond1_Retirement <--> InternalInterruptController_entry TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment @@ -1365,36 +1391,10 @@ CSRRegister23_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister23_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr - TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 - TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSURequester_accept_cond0 - WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - Serializer1_Serializer --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - BasicFifo1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - WishboneMaster1_result --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - Forwarder1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - Forwarder1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 - TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 - LSURequester_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - LSURequester_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - BasicFifo9_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - BasicFifo9_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - FIFO7_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans - FIFO7_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> ICache_flush - TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSURequester_accept_cond1 - WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - Serializer1_Serializer2 --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans - TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 - TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write - TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer1 - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2_cond0 - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> HwCounter5__incr - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter__incr - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> Serializer_write + TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 + TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read + TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer2 + TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> InternalInterruptController_mret diff --git a/api.html b/api.html index c4b464b9b..be84b1e13 100644 --- a/api.html +++ b/api.html @@ -271,7 +271,7 @@

transactron

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/assumptions.html b/assumptions.html index 9bd3ebfb7..5f0973fed 100644 --- a/assumptions.html +++ b/assumptions.html @@ -104,7 +104,7 @@

List of assumptions made during development

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/auto_graph.html b/auto_graph.html index 24382c5e3..e054a5181 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -86,20 +86,20 @@ Core_InitFreeRFFifo["InitFreeRFFifo"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] WishboneMaster_WishboneMaster["WishboneMaster"] - WishboneMaster_request["request"] WishboneMaster_result["result"] + WishboneMaster_request["request"] subgraph Forwarder["result Forwarder"] Forwarder_read["read"] Forwarder_write["write"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] - WishboneMaster1_request["request"] - WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] + WishboneMaster1_WishboneMaster["WishboneMaster"] + WishboneMaster1_request["request"] subgraph Forwarder1["result Forwarder"] - Forwarder1_read["read"] Forwarder1_write["write"] + Forwarder1_read["read"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] @@ -109,16 +109,16 @@ Serializer_Serializer["Serializer"] Serializer_Serializer1["Serializer"] subgraph BasicFifo["pending_requests BasicFifo"] - BasicFifo_read["read"] BasicFifo_write["write"] + BasicFifo_read["read"] end end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] - WishboneMasterAdapter1_request_read["request_read"] + WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_write_response["get_write_response"] + WishboneMasterAdapter1_request_read["request_read"] WishboneMasterAdapter1_get_read_response["get_read_response"] - WishboneMasterAdapter1_request_write["request_write"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] @@ -131,32 +131,32 @@ end end subgraph CoreFrontend["frontend CoreFrontend"] - CoreFrontend_stall["stall"] CoreFrontend_DiscardBranchVerify["DiscardBranchVerify"] CoreFrontend_target_pred_req["target_pred_req"] + CoreFrontend_stall["stall"] CoreFrontend_target_pred_resp["target_pred_resp"] subgraph BasicFifo2["instr_buffer BasicFifo"] - BasicFifo2_read["read"] - BasicFifo2_clear["clear"] BasicFifo2_write["write"] + BasicFifo2_clear["clear"] + BasicFifo2_read["read"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] - SimpleCommonBusCacheRefiller_start_refill["start_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] + SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1["SimpleCommonBusCacheRefiller"] + SimpleCommonBusCacheRefiller_start_refill["start_refill"] subgraph Forwarder2["resp_fwd Forwarder"] - Forwarder2_read["read"] Forwarder2_write["write"] + Forwarder2_read["read"] end end subgraph ICache["icache ICache"] + ICache_issue_req["issue_req"] ICache_MemRead["MemRead"] ICache_ICache["ICache"] ICache_accept_res["accept_res"] - ICache_ICache1["ICache"] ICache_flush["flush"] - ICache_issue_req["issue_req"] + ICache_ICache1["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] end @@ -173,8 +173,8 @@ HwCounter4__incr["_incr"] end subgraph FIFOLatencyMeasurer["req_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer__stop["_stop"] FIFOLatencyMeasurer__start["_start"] + FIFOLatencyMeasurer__stop["_stop"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -184,14 +184,14 @@ end end subgraph ArgumentsToResultsZipper["req_zipper ArgumentsToResultsZipper"] - ArgumentsToResultsZipper_write_args["write_args"] ArgumentsToResultsZipper_peek_arg["peek_arg"] - ArgumentsToResultsZipper_write_results["write_results"] ArgumentsToResultsZipper_read["read"] + ArgumentsToResultsZipper_write_args["write_args"] + ArgumentsToResultsZipper_write_results["write_results"] subgraph BasicFifo3["fifo BasicFifo"] BasicFifo3_read["read"] - BasicFifo3_peek["peek"] BasicFifo3_write["write"] + BasicFifo3_peek["peek"] end subgraph Forwarder3["forwarder Forwarder"] Forwarder3_write["write"] @@ -200,14 +200,14 @@ end end subgraph FetchUnit["fetch FetchUnit"] - FetchUnit_Fetch_Stage1["Fetch_Stage1"] - FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] - FetchUnit_resume_from_exception["resume_from_exception"] FetchUnit_Fetch_Stage2["Fetch_Stage2"] - FetchUnit_Fetch_Stage0["Fetch_Stage0"] + FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] + FetchUnit_Fetch_Stage2_cond0["Fetch_Stage2_cond0"] FetchUnit_stall_exception["stall_exception"] + FetchUnit_Fetch_Stage1["Fetch_Stage1"] + FetchUnit_resume_from_exception["resume_from_exception"] FetchUnit_resume_from_unsafe["resume_from_unsafe"] - FetchUnit_Fetch_Stage2_cond1["Fetch_Stage2_cond1"] + FetchUnit_Fetch_Stage0["Fetch_Stage0"] subgraph TaggedCounter["perf_fetch_utilization TaggedCounter"] TaggedCounter__incr["_incr"] end @@ -215,9 +215,9 @@ HwCounter5__incr["_incr"] end subgraph Serializer["serializer Serializer"] - Serializer_clean["clean"] Serializer_write["write"] Serializer_read["read"] + Serializer_clean["clean"] end subgraph ConnectTrans["serializer_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -231,8 +231,8 @@ Semaphore_release["release"] end subgraph Pipe["s1_s2_pipe Pipe"] - Pipe_read["read"] Pipe_write["write"] + Pipe_read["read"] end subgraph Predecoder["predecoder_0 Predecoder"] Predecoder_predecode["predecode"] @@ -251,9 +251,9 @@ end end subgraph Pipe1["decode_pipe Pipe"] - Pipe1_clean["clean"] - Pipe1_write["write"] Pipe1_read["read"] + Pipe1_write["write"] + Pipe1_clean["clean"] end subgraph DecodeStage["decode DecodeStage"] DecodeStage_DecodeStage["DecodeStage"] @@ -263,22 +263,22 @@ end end subgraph BasicFifo5["free_rf_fifo BasicFifo"] - BasicFifo5_read["read"] BasicFifo5_write["write"] + BasicFifo5_read["read"] end subgraph FRAT["FRAT FRAT"] FRAT_rename["rename"] end subgraph RRAT["RRAT RRAT"] - RRAT_commit["commit"] RRAT_peek["peek"] + RRAT_commit["commit"] end subgraph RegisterFile["RF RegisterFile"] + RegisterFile_perf["perf"] RegisterFile_write["write"] RegisterFile_free["free"] - RegisterFile_perf["perf"] - RegisterFile_read2["read2"] RegisterFile_read1["read1"] + RegisterFile_read2["read2"] subgraph TaggedLatencyMeasurer["perf_rf_valid_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer__start["_start"] TaggedLatencyMeasurer__stop["_stop"] @@ -286,8 +286,8 @@ HwExpHistogram1__add["_add"] end subgraph AsyncMemoryBank["slots AsyncMemoryBank"] - AsyncMemoryBank_write["write"] AsyncMemoryBank_read["read"] + AsyncMemoryBank_write["write"] end end subgraph HwExpHistogram2["perf_num_valid HwExpHistogram"] @@ -295,12 +295,12 @@ end end subgraph ReorderBuffer["ROB ReorderBuffer"] + ReorderBuffer_peek["peek"] ReorderBuffer_get_indices["get_indices"] - ReorderBuffer_retire["retire"] - ReorderBuffer_put["put"] ReorderBuffer_mark_done["mark_done"] + ReorderBuffer_retire["retire"] ReorderBuffer_perf["perf"] - ReorderBuffer_peek["peek"] + ReorderBuffer_put["put"] subgraph FIFOLatencyMeasurer1["perf_rob_wait_time FIFOLatencyMeasurer"] FIFOLatencyMeasurer1__start["_start"] FIFOLatencyMeasurer1__stop["_stop"] @@ -308,8 +308,8 @@ HwExpHistogram3__add["_add"] end subgraph FIFO1["fifo FIFO"] - FIFO1_write["write"] FIFO1_read["read"] + FIFO1_write["write"] end end subgraph HwExpHistogram4["perf_rob_size HwExpHistogram"] @@ -317,8 +317,8 @@ end end subgraph ExceptionInformationRegister["exception_information_register ExceptionInformationRegister"] - ExceptionInformationRegister_report["report"] ExceptionInformationRegister_clear["clear"] + ExceptionInformationRegister_report["report"] ExceptionInformationRegister_get["get"] subgraph BasicFifo6["fu_report_fifo BasicFifo"] BasicFifo6_write["write"] @@ -332,8 +332,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_write["write"] Forwarder4_read["read"] + Forwarder4_write["write"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans2["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -351,21 +351,21 @@ MethodProduct_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] - RSFuncBlock_insert["insert"] RSFuncBlock_update["update"] + RSFuncBlock_insert["insert"] RSFuncBlock_get_result["get_result"] RSFuncBlock_select["select"] subgraph RS["rs RS"] RS_RS["RS"] - RS_insert["insert"] RS_RS1["RS"] - RS_take["take"] + RS_insert["insert"] RS_RS2["RS"] - RS_perf["perf"] - RS_RS3["RS"] - RS_RS4["RS"] RS_update["update"] RS_select["select"] + RS_RS3["RS"] + RS_RS4["RS"] + RS_perf["perf"] + RS_take["take"] subgraph TaggedLatencyMeasurer1["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer1__start["_start"] TaggedLatencyMeasurer1__stop["_stop"] @@ -399,19 +399,19 @@ ShiftFuncUnit_accept["accept"] ShiftFuncUnit_issue["issue"] subgraph FIFO3["fifo FIFO"] - FIFO3_write["write"] FIFO3_read["read"] + FIFO3_write["write"] end end subgraph WakeupSelect1["wakeup_select_1 WakeupSelect"] WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_issue["issue"] subgraph FIFO4["fifo_branch_resolved FIFO"] - FIFO4_read["read"] FIFO4_write["write"] + FIFO4_read["read"] end subgraph TaggedCounter5["perf_instr TaggedCounter"] TaggedCounter5__incr["_incr"] @@ -442,16 +442,16 @@ WakeupSelect3_WakeupSelect["WakeupSelect"] end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] - PrivilegedFuncUnit_accept["accept"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_cond1"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_cond2"] PrivilegedFuncUnit_PrivilegedFuncUnit["PrivilegedFuncUnit"] + PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] PrivilegedFuncUnit_PrivilegedFuncUnit_cond0["PrivilegedFuncUnit_cond0"] PrivilegedFuncUnit_issue["issue"] - PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_cond3"] + PrivilegedFuncUnit_accept["accept"] subgraph BasicFifo8["fetch_resume_fifo BasicFifo"] - BasicFifo8_write["write"] BasicFifo8_read["read"] + BasicFifo8_write["write"] end subgraph TaggedCounter6["perf_instr TaggedCounter"] TaggedCounter6__incr["_incr"] @@ -486,26 +486,26 @@ end end subgraph RSFuncBlock1["rs_block_1 RSFuncBlock"] - RSFuncBlock1_update["update"] - RSFuncBlock1_insert["insert"] RSFuncBlock1_get_result["get_result"] RSFuncBlock1_select["select"] + RSFuncBlock1_insert["insert"] + RSFuncBlock1_update["update"] subgraph FifoRS["rs FifoRS"] + FifoRS_select["select"] + FifoRS_FifoRS["FifoRS"] FifoRS_update["update"] FifoRS_insert["insert"] - FifoRS_perf["perf"] FifoRS_take["take"] - FifoRS_select["select"] - FifoRS_FifoRS["FifoRS"] + FifoRS_perf["perf"] subgraph TaggedLatencyMeasurer2["perf_rs_wait_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer2__stop["_stop"] TaggedLatencyMeasurer2__start["_start"] + TaggedLatencyMeasurer2__stop["_stop"] subgraph HwExpHistogram7["histogram HwExpHistogram"] HwExpHistogram7__add["_add"] end subgraph AsyncMemoryBank2["slots AsyncMemoryBank"] - AsyncMemoryBank2_write["write"] AsyncMemoryBank2_read["read"] + AsyncMemoryBank2_write["write"] end end subgraph HwExpHistogram8["perf_num_full HwExpHistogram"] @@ -516,21 +516,21 @@ LSUDummy_accept_cond0["accept_cond0"] LSUDummy_LSUDummy["LSUDummy"] LSUDummy_LSUDummy1["LSUDummy"] - LSUDummy_LSUDummy2["LSUDummy"] LSUDummy_issue["issue"] LSUDummy_accept["accept"] LSUDummy_accept_cond1["accept_cond1"] + LSUDummy_LSUDummy2["LSUDummy"] subgraph LSURequester["requester LSURequester"] - LSURequester_accept["accept"] - LSURequester_issue_cond2["issue_cond2"] - LSURequester_accept_cond1["accept_cond1"] + LSURequester_issue_cond0["issue_cond0"] LSURequester_accept_cond0["accept_cond0"] + LSURequester_accept_cond1["accept_cond1"] LSURequester_issue["issue"] + LSURequester_issue_cond2["issue_cond2"] + LSURequester_accept["accept"] LSURequester_issue_cond1["issue_cond1"] - LSURequester_issue_cond0["issue_cond0"] subgraph BasicFifo9["args_fifo BasicFifo"] - BasicFifo9_write["write"] BasicFifo9_read["read"] + BasicFifo9_write["write"] end end subgraph Forwarder6["requests Forwarder"] @@ -567,13 +567,13 @@ end end subgraph CSRUnit["rs_block_2 CSRUnit"] + CSRUnit_CSRUnit["CSRUnit"] + CSRUnit_update["update"] + CSRUnit_get_result["get_result"] CSRUnit_fetch_resume["fetch_resume"] + CSRUnit_CSRUnit1["CSRUnit"] CSRUnit_insert["insert"] - CSRUnit_update["update"] CSRUnit_select["select"] - CSRUnit_CSRUnit["CSRUnit"] - CSRUnit_CSRUnit1["CSRUnit"] - CSRUnit_get_result["get_result"] end end subgraph ResultAnnouncement["announcement ResultAnnouncement"] @@ -626,12 +626,12 @@ end end subgraph AliasedCSR["mstatus AliasedCSR"] - AliasedCSR__fu_read["_fu_read"] AliasedCSR__fu_write["_fu_write"] + AliasedCSR__fu_read["_fu_read"] end subgraph AliasedCSR1["mstatush AliasedCSR"] - AliasedCSR1__fu_write["_fu_write"] AliasedCSR1__fu_read["_fu_read"] + AliasedCSR1__fu_write["_fu_write"] end subgraph CSRRegister6["mcause CSRRegister"] CSRRegister6__internal_fu_read["_internal_fu_read"] @@ -648,8 +648,8 @@ end end subgraph CSRRegister7["mtvec CSRRegister"] - CSRRegister7__internal_fu_read["_internal_fu_read"] CSRRegister7_read["read"] + CSRRegister7__internal_fu_read["_internal_fu_read"] CSRRegister7__internal_fu_write["_internal_fu_write"] subgraph MethodMap14["fu_write_map MethodMap"] MethodMap14_method["method"] @@ -662,10 +662,10 @@ end end subgraph CSRRegister8["mepc CSRRegister"] - CSRRegister8__internal_fu_read["_internal_fu_read"] + CSRRegister8_read["read"] CSRRegister8_write["write"] + CSRRegister8__internal_fu_read["_internal_fu_read"] CSRRegister8__internal_fu_write["_internal_fu_write"] - CSRRegister8_read["read"] subgraph MethodMap16["fu_write_map MethodMap"] MethodMap16_method["method"] end @@ -691,14 +691,14 @@ end end subgraph CSRRegister10["priv_mode CSRRegister"] - CSRRegister10_write["write"] CSRRegister10_read["read"] + CSRRegister10_write["write"] end subgraph CSRRegister11["mstatus_mie CSRRegister"] + CSRRegister11__internal_fu_read["_internal_fu_read"] CSRRegister11_write["write"] CSRRegister11__internal_fu_write["_internal_fu_write"] CSRRegister11_read["read"] - CSRRegister11__internal_fu_read["_internal_fu_read"] subgraph MethodMap22["fu_write_map MethodMap"] MethodMap22_method["method"] end @@ -710,10 +710,10 @@ end end subgraph CSRRegister12["mstatus_mpie CSRRegister"] - CSRRegister12__internal_fu_read["_internal_fu_read"] CSRRegister12__internal_fu_write["_internal_fu_write"] - CSRRegister12_write["write"] + CSRRegister12__internal_fu_read["_internal_fu_read"] CSRRegister12_read["read"] + CSRRegister12_write["write"] subgraph MethodMap24["fu_write_map MethodMap"] MethodMap24_method["method"] end @@ -725,9 +725,9 @@ end end subgraph CSRRegister13["mstatus_mpp CSRRegister"] - CSRRegister13__internal_fu_read["_internal_fu_read"] CSRRegister13_read["read"] CSRRegister13_write["write"] + CSRRegister13__internal_fu_read["_internal_fu_read"] CSRRegister13__internal_fu_write["_internal_fu_write"] subgraph MethodMap26["fu_write_map MethodMap"] MethodMap26_method["method"] @@ -740,9 +740,9 @@ end end subgraph CSRRegister14["mstatus_mprv CSRRegister"] - CSRRegister14_write["write"] CSRRegister14__internal_fu_read["_internal_fu_read"] CSRRegister14__internal_fu_write["_internal_fu_write"] + CSRRegister14_write["write"] subgraph MethodMap28["fu_write_map MethodMap"] MethodMap28_method["method"] end @@ -754,9 +754,9 @@ end end subgraph CSRRegister15["mstatus_tw CSRRegister"] - CSRRegister15__internal_fu_read["_internal_fu_read"] - CSRRegister15__internal_fu_write["_internal_fu_write"] CSRRegister15_read["read"] + CSRRegister15__internal_fu_write["_internal_fu_write"] + CSRRegister15__internal_fu_read["_internal_fu_read"] subgraph MethodMap30["fu_write_map MethodMap"] MethodMap30_method["method"] end @@ -790,9 +790,9 @@ subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] DoubleCounterCSR1_increment["increment"] subgraph CSRRegister18["register_low CSRRegister"] - CSRRegister18__internal_fu_read["_internal_fu_read"] CSRRegister18_write["write"] CSRRegister18_read["read"] + CSRRegister18__internal_fu_read["_internal_fu_read"] subgraph MethodMap37["fu_read_map MethodMap"] MethodMap37_method["method"] end @@ -829,11 +829,11 @@ end end subgraph CSRRegister21["mip CSRRegister"] + CSRRegister21__internal_fu_write["_internal_fu_write"] CSRRegister21_write["write"] CSRRegister21_read["read"] CSRRegister21__internal_fu_read["_internal_fu_read"] CSRRegister21_read_comb["read_comb"] - CSRRegister21__internal_fu_write["_internal_fu_write"] subgraph MethodMap42["fu_write_map MethodMap"] MethodMap42_method["method"] end @@ -846,30 +846,30 @@ end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] - CoreInstructionCounter_decrement["decrement"] CoreInstructionCounter_increment["increment"] + CoreInstructionCounter_decrement["decrement"] end subgraph MethodProduct1["get_instr MethodProduct"] MethodProduct1_method["method"] end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO9["alloc_rename_buf FIFO"] - FIFO9_read["read"] FIFO9_write["write"] + FIFO9_read["read"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] end subgraph Connect["rename_out_buf Connect"] - Connect_write["write"] Connect_read["read"] + Connect_write["write"] end subgraph Renaming["renaming Renaming"] Renaming_Renaming["Renaming"] end subgraph FIFO10["reg_alloc_out_buf FIFO"] - FIFO10_write["write"] FIFO10_read["read"] + FIFO10_write["write"] end subgraph ROBAllocation["rob_alloc ROBAllocation"] ROBAllocation_ROBAllocation["ROBAllocation"] @@ -891,8 +891,8 @@ subgraph Collector3["FetchResumeKey_unifier Collector"] Collector3_method["method"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end subgraph ManyToOneConnectTrans3["connect ManyToOneConnectTrans"] subgraph ConnectTrans11["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -908,28 +908,28 @@ ConnectTrans13_ConnectTrans["ConnectTrans"] end subgraph Retirement["retirement Retirement"] + Retirement_precommit["precommit"] + Retirement_Retirement_cond0["Retirement_cond0"] Retirement_Retirement["Retirement"] Retirement_Retirement1["Retirement"] - Retirement_core_state["core_state"] - Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement2["Retirement"] - Retirement_precommit["precommit"] - Retirement_Retirement_cond0["Retirement_cond0"] + Retirement_Retirement_cond1["Retirement_cond1"] + Retirement_core_state["core_state"] Retirement_Retirement3["Retirement"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister22["register_low CSRRegister"] + CSRRegister22__internal_fu_read["_internal_fu_read"] CSRRegister22_write["write"] CSRRegister22_read["read"] - CSRRegister22__internal_fu_read["_internal_fu_read"] subgraph MethodMap45["fu_read_map MethodMap"] MethodMap45_method["method"] end end subgraph CSRRegister23["register_high CSRRegister"] - CSRRegister23_read["read"] - CSRRegister23_write["write"] CSRRegister23__internal_fu_read["_internal_fu_read"] + CSRRegister23_write["write"] + CSRRegister23_read["read"] subgraph MethodMap47["fu_read_map MethodMap"] MethodMap47_method["method"] end @@ -939,54 +939,54 @@ HwCounter9__incr["_incr"] end subgraph FIFOLatencyMeasurer2["perf_trap_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer2__start["_start"] FIFOLatencyMeasurer2__stop["_stop"] + FIFOLatencyMeasurer2__start["_start"] subgraph HwExpHistogram9["histogram HwExpHistogram"] HwExpHistogram9__add["_add"] end subgraph FIFO12["fifo FIFO"] - FIFO12_write["write"] FIFO12_read["read"] + FIFO12_write["write"] end end end end end subgraph TransactionManager["transaction_manager TransactionManager"] - TransactionManager_ConnectTrans_accept_cond1["ConnectTrans_accept_cond1"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] - TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit["PrivilegedFuncUnit_cond2_PrivilegedFuncUnit"] - TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] - TransactionManager_accept_cond1_accept_cond0_ConnectTrans["accept_cond1_accept_cond0_ConnectTrans"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] - TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] - TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit["PrivilegedFuncUnit_cond1_PrivilegedFuncUnit"] + TransactionManager_Retirement_cond1_Retirement["Retirement_cond1_Retirement"] TransactionManager_accept_cond0_accept_cond0_ConnectTrans["accept_cond0_accept_cond0_ConnectTrans"] - TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2["Fetch_Stage2_cond1_Fetch_Stage2"] TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] - TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2["Fetch_Stage2_cond0_Fetch_Stage2"] - TransactionManager_Renaming_ROBAllocation["Renaming_ROBAllocation"] + TransactionManager_ROBAllocation_Renaming["ROBAllocation_Renaming"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1["PrivilegedFuncUnit_PrivilegedFuncUnit_cond1"] TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit["PrivilegedFuncUnit_cond0_PrivilegedFuncUnit"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2["PrivilegedFuncUnit_PrivilegedFuncUnit_cond2"] + TransactionManager_accept_cond1_ConnectTrans["accept_cond1_ConnectTrans"] + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0["Fetch_Stage2_Fetch_Stage2_cond0"] + TransactionManager_accept_cond0_accept_cond1_ConnectTrans["accept_cond0_accept_cond1_ConnectTrans"] + TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3["PrivilegedFuncUnit_PrivilegedFuncUnit_cond3"] + TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1["Fetch_Stage2_Fetch_Stage2_cond1"] + TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] + TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] end end Core_InitFreeRFFifo --> BasicFifo5_write -Retirement_Retirement --> BasicFifo5_write +Retirement_Retirement1 --> BasicFifo5_write TransactionManager_Retirement_Retirement_cond0 --> BasicFifo5_write -TransactionManager_Retirement_Retirement_cond1 --> BasicFifo5_write +TransactionManager_Retirement_cond1_Retirement --> BasicFifo5_write WishboneMaster_WishboneMaster --> Forwarder_write WishboneMaster1_WishboneMaster --> Forwarder1_write FIFO4_read --> CoreFrontend_DiscardBranchVerify -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMasterAdapter_request_read -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Serializer_Serializer1 -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> BasicFifo_write -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> WishboneMaster_request -WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 -Serializer_Serializer --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 -BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 -WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 -Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 -SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Forwarder2_write +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMasterAdapter_request_read +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> Serializer_Serializer1 +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> BasicFifo_write +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1 --> WishboneMaster_request +WishboneMasterAdapter_get_read_response --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller +Serializer_Serializer --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller +BasicFifo_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller +WishboneMaster_result --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller +Forwarder_read --> SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller +SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller --> Forwarder2_write ICache_ICache1 <--> HwCounter4__incr ArgumentsToResultsZipper_peek_arg --> ICache_MemRead BasicFifo3_peek --> ICache_MemRead @@ -1038,9 +1038,9 @@ CSRRegister10_read --> InternalInterruptController_InternalInterruptController2 CSRRegister10_read --> WakeupSelect3_WakeupSelect CSRRegister10_read --> CSRUnit_CSRUnit +CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 -CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit -CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit CSRRegister10_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit CSRRegister20_read --> InternalInterruptController_InternalInterruptController1 CSRRegister21_read --> InternalInterruptController_InternalInterruptController1 @@ -1110,7 +1110,7 @@ ResultAnnouncement_ResultAnnouncement --> FifoRS_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update RS_perf --> HwExpHistogram6__add -RS_RS --> WakeupSelect_WakeupSelect +RS_RS1 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -1137,22 +1137,22 @@ RS_RS3 --> WakeupSelect1_WakeupSelect WakeupSelect1_WakeupSelect --> ShiftFuncUnit_issue WakeupSelect1_WakeupSelect --> FIFO3_write -RS_RS4 --> WakeupSelect2_WakeupSelect +RS_RS2 --> WakeupSelect2_WakeupSelect WakeupSelect2_WakeupSelect --> JumpBranchFuncUnit_issue WakeupSelect2_WakeupSelect <--> CoreFrontend_target_pred_req WakeupSelect2_WakeupSelect --> BasicFifo7_write WakeupSelect2_WakeupSelect --> TaggedCounter5__incr -RS_RS2 --> WakeupSelect3_WakeupSelect +RS_RS --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> BasicFifo6_write ConnectTrans7_ConnectTrans --> BasicFifo6_write ConnectTrans9_ConnectTrans --> BasicFifo6_write ConnectTrans4_ConnectTrans --> BasicFifo6_write -TransactionManager_ConnectTrans_accept_cond1 --> BasicFifo6_write TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> BasicFifo6_write -TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> BasicFifo6_write +TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> BasicFifo6_write +TransactionManager_accept_cond1_ConnectTrans --> BasicFifo6_write WakeupSelect3_WakeupSelect --> FIFO5_write -RS_RS1 --> WakeupSelect4_WakeupSelect +RS_RS4 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans5_ConnectTrans --> Forwarder5_write ConnectTrans6_ConnectTrans --> Forwarder5_write @@ -1175,35 +1175,35 @@ CSRRegister8_read --> ConnectTrans9_ConnectTrans ConnectTrans9_ConnectTrans --> BasicFifo8_write FifoRS_perf --> HwExpHistogram8__add -Forwarder6_read --> LSUDummy_LSUDummy1 -Forwarder6_read --> TransactionManager_LSUDummy_issue_cond1 +Forwarder6_read --> LSUDummy_LSUDummy Forwarder6_read --> TransactionManager_LSUDummy_issue_cond0 +Forwarder6_read --> TransactionManager_LSUDummy_issue_cond1 Forwarder6_read --> TransactionManager_LSUDummy_issue_cond2 -LSUDummy_LSUDummy1 --> FIFO6_write +LSUDummy_LSUDummy --> FIFO6_write WakeupSelect5_WakeupSelect --> FIFO6_write -TransactionManager_LSUDummy_issue_cond1 --> FIFO6_write TransactionManager_LSUDummy_issue_cond0 --> FIFO6_write +TransactionManager_LSUDummy_issue_cond1 --> FIFO6_write TransactionManager_LSUDummy_issue_cond2 --> FIFO6_write -LSUDummy_LSUDummy1 --> FIFO8_write +LSUDummy_LSUDummy --> FIFO8_write WakeupSelect5_WakeupSelect --> FIFO8_write -TransactionManager_LSUDummy_issue_cond1 --> FIFO8_write TransactionManager_LSUDummy_issue_cond0 --> FIFO8_write +TransactionManager_LSUDummy_issue_cond1 --> FIFO8_write TransactionManager_LSUDummy_issue_cond2 --> FIFO8_write Retirement_precommit --> LSUDummy_LSUDummy2 Retirement_precommit --> CSRUnit_CSRUnit1 +Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 -Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit -Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit Retirement_precommit --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit ReorderBuffer_peek --> LSUDummy_LSUDummy2 ReorderBuffer_peek --> CSRUnit_CSRUnit1 -ReorderBuffer_peek --> Retirement_Retirement2 ReorderBuffer_peek --> Retirement_Retirement +ReorderBuffer_peek --> Retirement_Retirement1 +ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 -ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 -ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 -ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit +ReorderBuffer_peek --> TransactionManager_Retirement_cond1_Retirement ReorderBuffer_peek --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit FifoRS_FifoRS --> WakeupSelect5_WakeupSelect FifoRS_take --> WakeupSelect5_WakeupSelect @@ -1308,134 +1308,160 @@ Collector2_method --> ConnectTrans3_ConnectTrans Forwarder7_read --> ConnectTrans3_ConnectTrans CSRUnit_get_result --> ConnectTrans4_ConnectTrans -ExceptionInformationRegister_get --> Retirement_Retirement2 +ExceptionInformationRegister_get --> Retirement_Retirement ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond0 -ExceptionInformationRegister_get --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement <--> ReorderBuffer_retire +ExceptionInformationRegister_get --> TransactionManager_Retirement_cond1_Retirement +Retirement_Retirement1 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire -TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire -Retirement_Retirement <--> FIFOLatencyMeasurer1__stop +TransactionManager_Retirement_cond1_Retirement <--> ReorderBuffer_retire +Retirement_Retirement1 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1__stop -TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer1__stop -FIFO1_read --> Retirement_Retirement +TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer1__stop +FIFO1_read --> Retirement_Retirement1 FIFO1_read --> TransactionManager_Retirement_Retirement_cond0 -FIFO1_read --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement --> HwExpHistogram3__add +FIFO1_read --> TransactionManager_Retirement_cond1_Retirement +Retirement_Retirement1 --> HwExpHistogram3__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram3__add -TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram3__add -CoreInstructionCounter_decrement --> Retirement_Retirement +TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram3__add +CoreInstructionCounter_decrement --> Retirement_Retirement1 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 -CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 -RRAT_peek --> Retirement_Retirement -RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement --> RegisterFile_free +CoreInstructionCounter_decrement --> TransactionManager_Retirement_cond1_Retirement +RRAT_peek --> Retirement_Retirement1 +RRAT_peek --> TransactionManager_Retirement_cond1_Retirement +Retirement_Retirement1 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free -TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free -Retirement_Retirement --> TaggedLatencyMeasurer__stop +TransactionManager_Retirement_cond1_Retirement --> RegisterFile_free +Retirement_Retirement1 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer__stop -TransactionManager_Retirement_Retirement_cond1 --> TaggedLatencyMeasurer__stop -AsyncMemoryBank_read --> Retirement_Retirement +TransactionManager_Retirement_cond1_Retirement --> TaggedLatencyMeasurer__stop +AsyncMemoryBank_read --> Retirement_Retirement1 AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond0 -AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement --> HwExpHistogram1__add +AsyncMemoryBank_read --> TransactionManager_Retirement_cond1_Retirement +Retirement_Retirement1 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add -TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add -Retirement_Retirement --> FRAT_rename -TransactionManager_Renaming_ROBAllocation --> FRAT_rename -TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename -Retirement_Retirement1 <--> FIFOLatencyMeasurer2__stop -FIFO12_read --> Retirement_Retirement1 -Retirement_Retirement1 --> HwExpHistogram9__add -CSRRegister7_read --> Retirement_Retirement1 -Retirement_Retirement1 --> FetchUnit_resume_from_exception -Retirement_Retirement1 <--> ExceptionInformationRegister_clear +TransactionManager_Retirement_cond1_Retirement --> HwExpHistogram1__add +Retirement_Retirement1 --> FRAT_rename +TransactionManager_ROBAllocation_Renaming --> FRAT_rename +TransactionManager_Retirement_cond1_Retirement --> FRAT_rename +Retirement_Retirement3 <--> FIFOLatencyMeasurer2__stop +FIFO12_read --> Retirement_Retirement3 +Retirement_Retirement3 --> HwExpHistogram9__add +CSRRegister7_read --> Retirement_Retirement3 +Retirement_Retirement3 --> FetchUnit_resume_from_exception +Retirement_Retirement3 <--> ExceptionInformationRegister_clear +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit -TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 --> TaggedCounter6__incr +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 --> TaggedCounter6__incr TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 --> TaggedCounter6__incr -TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit --> TaggedCounter6__incr -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit --> TaggedCounter6__incr TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit --> TaggedCounter6__incr +CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 -CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit -CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit CSRRegister15_read --> TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit -TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 -TransactionManager_ConnectTrans_accept_cond1 <--> ConnectTrans10_ConnectTrans -TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> ConnectTrans10_ConnectTrans -TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> ConnectTrans10_ConnectTrans -TransactionManager_ConnectTrans_accept_cond1 --> Forwarder7_write -TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> Forwarder7_write -TransactionManager_accept_cond1_accept_cond0_ConnectTrans --> Forwarder7_write -LSUDummy_accept --> TransactionManager_ConnectTrans_accept_cond1 -LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -LSUDummy_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_ConnectTrans_accept_cond1 <--> LSUDummy_accept_cond1 -FIFO6_read --> TransactionManager_ConnectTrans_accept_cond1 -FIFO8_read --> TransactionManager_ConnectTrans_accept_cond1 -TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 <--> ICache_flush +TransactionManager_ROBAllocation_Renaming <--> ROBAllocation_ROBAllocation +Connect_read --> TransactionManager_ROBAllocation_Renaming +TransactionManager_ROBAllocation_Renaming --> ReorderBuffer_put +TransactionManager_ROBAllocation_Renaming <--> FIFOLatencyMeasurer1__start +TransactionManager_ROBAllocation_Renaming --> FIFO1_write +TransactionManager_ROBAllocation_Renaming --> FIFO10_write +TransactionManager_ROBAllocation_Renaming <--> Renaming_Renaming +FIFO9_read --> TransactionManager_ROBAllocation_Renaming +TransactionManager_ROBAllocation_Renaming --> Connect_write +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 +TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy1 +TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy1 +TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy1 TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue +TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond1 --> BasicFifo9_write TransactionManager_LSUDummy_issue_cond0 --> BasicFifo9_write +TransactionManager_LSUDummy_issue_cond1 --> BasicFifo9_write TransactionManager_LSUDummy_issue_cond2 --> BasicFifo9_write -TransactionManager_LSUDummy_issue_cond1 --> FIFO7_write TransactionManager_LSUDummy_issue_cond0 --> FIFO7_write +TransactionManager_LSUDummy_issue_cond1 --> FIFO7_write TransactionManager_LSUDummy_issue_cond2 --> FIFO7_write -TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 -TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read -TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer3 -TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write +TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 +TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write +TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer3 TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request +TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request -TransactionManager_PrivilegedFuncUnit_cond2_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond2 -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2_cond1 -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2 -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2 -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 <--> Semaphore_release -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> Semaphore_release -Pipe_read --> TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 -Pipe_read --> TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> Predecoder_predecode -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> Predecoder_predecode -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> PredictionChecker_check -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> PredictionChecker_check -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> TaggedCounter1__incr -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter1__incr -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> TaggedCounter2__incr -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter2__incr -TransactionManager_Fetch_Stage2_cond1_Fetch_Stage2 --> TaggedCounter3__incr -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter3__incr -TransactionManager_Renaming_ROBAllocation <--> Renaming_Renaming -FIFO9_read --> TransactionManager_Renaming_ROBAllocation -TransactionManager_Renaming_ROBAllocation --> Connect_write -TransactionManager_Renaming_ROBAllocation <--> ROBAllocation_ROBAllocation -Connect_read --> TransactionManager_Renaming_ROBAllocation -TransactionManager_Renaming_ROBAllocation --> ReorderBuffer_put -TransactionManager_Renaming_ROBAllocation <--> FIFOLatencyMeasurer1__start -TransactionManager_Renaming_ROBAllocation --> FIFO1_write -TransactionManager_Renaming_ROBAllocation --> FIFO10_write -TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement3 -TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement3 +TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request +TransactionManager_PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond3 +TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 +TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond0 +LSURequester_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +LSURequester_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +BasicFifo9_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +BasicFifo9_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +FIFO7_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +FIFO7_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSURequester_accept_cond0 +WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +Serializer1_Serializer --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +Forwarder1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +Forwarder1_read --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> ConnectTrans10_ConnectTrans +TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> ConnectTrans10_ConnectTrans +TransactionManager_accept_cond1_ConnectTrans <--> ConnectTrans10_ConnectTrans +TransactionManager_accept_cond0_accept_cond0_ConnectTrans --> Forwarder7_write +TransactionManager_accept_cond0_accept_cond1_ConnectTrans --> Forwarder7_write +TransactionManager_accept_cond1_ConnectTrans --> Forwarder7_write +LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans +LSUDummy_accept --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +LSUDummy_accept --> TransactionManager_accept_cond1_ConnectTrans +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2 +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2 +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> Semaphore_release +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> Semaphore_release +Pipe_read --> TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 +Pipe_read --> TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> Predecoder_predecode +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Predecoder_predecode +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> PredictionChecker_check +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> PredictionChecker_check +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter1__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter1__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter2__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter2__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 --> TaggedCounter3__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter3__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond1 <--> FetchUnit_Fetch_Stage2_cond1 +TransactionManager_accept_cond0_accept_cond1_ConnectTrans <--> LSURequester_accept_cond1 +WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +Serializer1_Serializer1 --> TransactionManager_accept_cond0_accept_cond1_ConnectTrans +TransactionManager_accept_cond1_ConnectTrans <--> LSUDummy_accept_cond1 +FIFO6_read --> TransactionManager_accept_cond1_ConnectTrans +FIFO8_read --> TransactionManager_accept_cond1_ConnectTrans +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> FetchUnit_Fetch_Stage2_cond0 +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 <--> HwCounter5__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> TaggedCounter__incr +TransactionManager_Fetch_Stage2_Fetch_Stage2_cond0 --> Serializer_write +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2 +TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement2 TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer2__start -TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer2__start +TransactionManager_Retirement_cond1_Retirement <--> FIFOLatencyMeasurer2__start TransactionManager_Retirement_Retirement_cond0 --> FIFO12_write -TransactionManager_Retirement_Retirement_cond1 --> FIFO12_write +TransactionManager_Retirement_cond1_Retirement --> FIFO12_write InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond0 -InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_Retirement_cond1 +InternalInterruptController_interrupt_cause --> TransactionManager_Retirement_cond1_Retirement TransactionManager_Retirement_Retirement_cond0 --> CSRRegister6_write -TransactionManager_Retirement_Retirement_cond1 --> CSRRegister6_write +TransactionManager_Retirement_cond1_Retirement --> CSRRegister6_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write -TransactionManager_Retirement_Retirement_cond1 --> CSRRegister8_write +TransactionManager_Retirement_cond1_Retirement --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister9_write -TransactionManager_Retirement_Retirement_cond1 --> CSRRegister9_write +TransactionManager_Retirement_cond1_Retirement --> CSRRegister9_write TransactionManager_Retirement_Retirement_cond0 <--> InternalInterruptController_entry -TransactionManager_Retirement_Retirement_cond1 <--> InternalInterruptController_entry +TransactionManager_Retirement_cond1_Retirement <--> InternalInterruptController_entry TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> RRAT_commit TransactionManager_Retirement_Retirement_cond0 <--> DoubleCounterCSR2_increment @@ -1444,36 +1470,10 @@ CSRRegister23_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister23_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter9__incr -TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 -TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSURequester_accept_cond0 -WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -Serializer1_Serializer --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -BasicFifo1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -BasicFifo1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -WishboneMaster1_result --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -WishboneMaster1_result --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -Forwarder1_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -Forwarder1_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_accept_cond0_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 -TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSUDummy_accept_cond0 -LSURequester_accept --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -LSURequester_accept --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -BasicFifo9_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -BasicFifo9_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -FIFO7_read --> TransactionManager_accept_cond0_accept_cond0_ConnectTrans -FIFO7_read --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond1 -TransactionManager_PrivilegedFuncUnit_cond1_PrivilegedFuncUnit <--> ICache_flush -TransactionManager_accept_cond1_accept_cond0_ConnectTrans <--> LSURequester_accept_cond1 -WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -Serializer1_Serializer2 --> TransactionManager_accept_cond1_accept_cond0_ConnectTrans -TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 -TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write -TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer1 -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> FetchUnit_Fetch_Stage2_cond0 -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 <--> HwCounter5__incr -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> TaggedCounter__incr -TransactionManager_Fetch_Stage2_cond0_Fetch_Stage2 --> Serializer_write +TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 +TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read +TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer2 +TransactionManager_Retirement_cond1_Retirement <--> Retirement_Retirement_cond1 TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> PrivilegedFuncUnit_PrivilegedFuncUnit_cond0 TransactionManager_PrivilegedFuncUnit_cond0_PrivilegedFuncUnit <--> InternalInterruptController_mret @@ -1487,7 +1487,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/components/icache.html b/components/icache.html index ab55af8a9..57dbfc35e 100644 --- a/components/icache.html +++ b/components/icache.html @@ -131,7 +131,7 @@

Address mapping example

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diff --git a/coreblocks.arch.html b/coreblocks.arch.html index dbd62a909..2a4542806 100644 --- a/coreblocks.arch.html +++ b/coreblocks.arch.html @@ -3923,7 +3923,7 @@

Submodules

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diff --git a/coreblocks.backend.html b/coreblocks.backend.html index 21de702e6..461322b46 100644 --- a/coreblocks.backend.html +++ b/coreblocks.backend.html @@ -165,7 +165,7 @@

Submodules

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diff --git a/coreblocks.cache.html b/coreblocks.cache.html index fa7c047da..dd3a43902 100644 --- a/coreblocks.cache.html +++ b/coreblocks.cache.html @@ -241,7 +241,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.core_structs.html b/coreblocks.core_structs.html index a3cdd7d8c..0a39d01d5 100644 --- a/coreblocks.core_structs.html +++ b/coreblocks.core_structs.html @@ -157,7 +157,7 @@

Submodules

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diff --git a/coreblocks.frontend.decoder.html b/coreblocks.frontend.decoder.html index d35e4a5bf..169ea8d48 100644 --- a/coreblocks.frontend.decoder.html +++ b/coreblocks.frontend.decoder.html @@ -313,7 +313,7 @@

Submodules

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diff --git a/coreblocks.frontend.fetch.html b/coreblocks.frontend.fetch.html index f1159fdb1..a4173a3c9 100644 --- a/coreblocks.frontend.fetch.html +++ b/coreblocks.frontend.fetch.html @@ -210,7 +210,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html index 5b5c82532..b5c897c62 100644 --- a/coreblocks.frontend.html +++ b/coreblocks.frontend.html @@ -187,7 +187,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.func_blocks.fu.html b/coreblocks.func_blocks.fu.html index 86a9f7fe0..ffdac250a 100644 --- a/coreblocks.func_blocks.fu.html +++ b/coreblocks.func_blocks.fu.html @@ -886,7 +886,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.func_blocks.fu.lsu.html b/coreblocks.func_blocks.fu.lsu.html index 7e67bc988..02302ade8 100644 --- a/coreblocks.func_blocks.fu.lsu.html +++ b/coreblocks.func_blocks.fu.lsu.html @@ -290,7 +290,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.func_blocks.fu.unsigned_multiplication.html b/coreblocks.func_blocks.fu.unsigned_multiplication.html index e0cf37c83..23eda010b 100644 --- a/coreblocks.func_blocks.fu.unsigned_multiplication.html +++ b/coreblocks.func_blocks.fu.unsigned_multiplication.html @@ -260,7 +260,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.func_blocks.html b/coreblocks.func_blocks.html index ca7a483e1..b1338c28b 100644 --- a/coreblocks.func_blocks.html +++ b/coreblocks.func_blocks.html @@ -150,7 +150,7 @@

Subpackages

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.func_blocks.interface.html b/coreblocks.func_blocks.interface.html index b6ef6b484..70abca79a 100644 --- a/coreblocks.func_blocks.interface.html +++ b/coreblocks.func_blocks.interface.html @@ -164,7 +164,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.html b/coreblocks.html index cdf30992e..d58c70df8 100644 --- a/coreblocks.html +++ b/coreblocks.html @@ -268,7 +268,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.params.html b/coreblocks.params.html index 76f39e126..5b4993466 100644 --- a/coreblocks.params.html +++ b/coreblocks.params.html @@ -832,7 +832,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html index cedabe6d1..eac6c3d85 100644 --- a/coreblocks.peripherals.html +++ b/coreblocks.peripherals.html @@ -746,7 +746,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.priv.csr.html b/coreblocks.priv.csr.html index 10601ad0e..3b32ec7d3 100644 --- a/coreblocks.priv.csr.html +++ b/coreblocks.priv.csr.html @@ -311,7 +311,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.priv.html b/coreblocks.priv.html index 7effce9e0..231fa4de1 100644 --- a/coreblocks.priv.html +++ b/coreblocks.priv.html @@ -124,7 +124,7 @@

Subpackages

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diff --git a/coreblocks.priv.traps.html b/coreblocks.priv.traps.html index 8eb3194c3..ee9d1172b 100644 --- a/coreblocks.priv.traps.html +++ b/coreblocks.priv.traps.html @@ -205,7 +205,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html index b7fe3e885..2e19a2d51 100644 --- a/coreblocks.scheduler.html +++ b/coreblocks.scheduler.html @@ -191,7 +191,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/current-graph.html b/current-graph.html index e51ba3e93..cbaa2115a 100644 --- a/current-graph.html +++ b/current-graph.html @@ -92,20 +92,20 @@

Full transaction-method graph

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diff --git a/development-environment.html b/development-environment.html index 1d468a70e..7a9b9d06e 100644 --- a/development-environment.html +++ b/development-environment.html @@ -209,7 +209,7 @@

tprof.py

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diff --git a/genindex.html b/genindex.html index 26bc41c16..55093656b 100644 --- a/genindex.html +++ b/genindex.html @@ -4803,7 +4803,7 @@

Z

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diff --git a/home.html b/home.html index 78eafd8a6..52eb74b40 100644 --- a/home.html +++ b/home.html @@ -129,7 +129,7 @@

Documentation

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diff --git a/index.html b/index.html index 9f05dc431..783cdf72a 100644 --- a/index.html +++ b/index.html @@ -229,7 +229,7 @@

Coreblocks

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diff --git a/miscellany/exceptions-summary.html b/miscellany/exceptions-summary.html index 9d15b9aad..168ba0577 100644 --- a/miscellany/exceptions-summary.html +++ b/miscellany/exceptions-summary.html @@ -271,7 +271,7 @@

Summary

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diff --git a/modules-coreblocks.html b/modules-coreblocks.html index d7766ee31..5edb24830 100644 --- a/modules-coreblocks.html +++ b/modules-coreblocks.html @@ -179,7 +179,7 @@

coreblocks

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diff --git a/modules-transactron.html b/modules-transactron.html index 48e359251..49ca8710a 100644 --- a/modules-transactron.html +++ b/modules-transactron.html @@ -162,7 +162,7 @@

transactron

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diff --git a/problem-checklist.html b/problem-checklist.html index a986f345d..fdf87ec4d 100644 --- a/problem-checklist.html +++ b/problem-checklist.html @@ -105,7 +105,7 @@

Problem checklist

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diff --git a/py-modindex.html b/py-modindex.html index d96d7e8cb..1476a848d 100644 --- a/py-modindex.html +++ b/py-modindex.html @@ -708,7 +708,7 @@

Python Module Index

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diff --git a/scheduler/overview.html b/scheduler/overview.html index 3d7271223..cf06d5f8a 100644 --- a/scheduler/overview.html +++ b/scheduler/overview.html @@ -146,7 +146,7 @@

More detailed description of each block

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diff --git a/search.html b/search.html index 21bf32923..ff77b6640 100644 --- a/search.html +++ b/search.html @@ -101,7 +101,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 06:35 2024-10-15. + Last updated on 07:48 2024-10-15.

diff --git a/shared-structs/implementation/rs-impl.html b/shared-structs/implementation/rs-impl.html index 978c77e47..f324843c1 100644 --- a/shared-structs/implementation/rs-impl.html +++ b/shared-structs/implementation/rs-impl.html @@ -252,7 +252,7 @@

Read and clean row

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diff --git a/shared-structs/rs.html b/shared-structs/rs.html index d8f17ed72..408d2bcb2 100644 --- a/shared-structs/rs.html +++ b/shared-structs/rs.html @@ -222,7 +222,7 @@

External interface signals

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diff --git a/synthesis/synthesis.html b/synthesis/synthesis.html index 0ec592a7c..29c89ce2e 100644 --- a/synthesis/synthesis.html +++ b/synthesis/synthesis.html @@ -266,7 +266,7 @@

Regression tests manual execution

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diff --git a/transactions.html b/transactions.html index 08d74d6af..e252927e8 100644 --- a/transactions.html +++ b/transactions.html @@ -409,7 +409,7 @@

Transaction and method nesting

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diff --git a/transactron.core.html b/transactron.core.html index 2522dd75f..6d0448fe2 100644 --- a/transactron.core.html +++ b/transactron.core.html @@ -960,7 +960,7 @@

Submodules

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diff --git a/transactron.html b/transactron.html index a85bbeac4..bbcc901e4 100644 --- a/transactron.html +++ b/transactron.html @@ -752,7 +752,7 @@

Submodules

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diff --git a/transactron.lib.html b/transactron.lib.html index 377a21c1a..8741f5984 100644 --- a/transactron.lib.html +++ b/transactron.lib.html @@ -2238,7 +2238,7 @@

Submodules

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diff --git a/transactron.testing.html b/transactron.testing.html index 77ecd2b8b..d63da4618 100644 --- a/transactron.testing.html +++ b/transactron.testing.html @@ -471,7 +471,7 @@

Submodules

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diff --git a/transactron.utils.amaranth_ext.html b/transactron.utils.amaranth_ext.html index 23e198d67..afad04211 100644 --- a/transactron.utils.amaranth_ext.html +++ b/transactron.utils.amaranth_ext.html @@ -478,7 +478,7 @@

Submodules

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diff --git a/transactron.utils.html b/transactron.utils.html index 1e6bdd50b..92f7e505c 100644 --- a/transactron.utils.html +++ b/transactron.utils.html @@ -823,7 +823,7 @@

Submodules

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