From 04aea3bdf46bf77853e5bcc3944482177c7926b3 Mon Sep 17 00:00:00 2001 From: tilk Date: Tue, 2 Apr 2024 15:20:08 +0000 Subject: [PATCH] FIFO reservation station (#634) --- .doctrees/api.doctree | Bin 21253 -> 21253 bytes .doctrees/auto_graph.doctree | Bin 49016 -> 49017 bytes .doctrees/current-graph.doctree | Bin 50237 -> 50238 bytes .doctrees/environment.pickle | Bin 510639 -> 510639 bytes _sources/auto_graph.rst.txt | 282 ++++++++--------- api.html | 2 +- assumptions.html | 2 +- auto_graph.html | 284 +++++++++--------- components/icache.html | 2 +- coreblocks.backend.html | 2 +- coreblocks.cache.html | 2 +- coreblocks.core_structs.html | 2 +- coreblocks.frontend.decoder.html | 2 +- coreblocks.frontend.fetch.html | 2 +- coreblocks.frontend.html | 2 +- coreblocks.func_blocks.fu.html | 2 +- ...unc_blocks.fu.unsigned_multiplication.html | 2 +- coreblocks.func_blocks.html | 2 +- coreblocks.func_blocks.interface.html | 2 +- coreblocks.func_blocks.lsu.html | 2 +- coreblocks.html | 2 +- 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Core_DiscardBranchVerify @@ -618,7 +618,7 @@ RegAllocation_RegAllocation --> FIFO9_write FIFO9_read --> Renaming_Renaming Renaming_Renaming --> FRAT_rename - Retirement_Retirement4 --> FRAT_rename + Retirement_Retirement1 --> FRAT_rename TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename Renaming_Renaming --> FIFO10_write FIFO10_read --> ROBAllocation_ROBAllocation @@ -626,18 +626,18 @@ ROBAllocation_ROBAllocation <--> FIFOLatencyMeasurer1__start ROBAllocation_ROBAllocation --> FIFO2_write ROBAllocation_ROBAllocation --> FIFO11_write - FIFO11_read --> RSSelection_RSSelection3 - RSSelection_RSSelection3 --> Forwarder8_write - Forwarder8_read --> RSSelection_RSSelection1 + FIFO11_read --> RSSelection_RSSelection + RSSelection_RSSelection --> Forwarder8_write Forwarder8_read --> RSSelection_RSSelection2 - Forwarder8_read --> RSSelection_RSSelection - RSFuncBlock_select --> RSSelection_RSSelection1 - RS_select --> RSSelection_RSSelection1 - RSSelection_RSSelection1 --> FIFO12_write + Forwarder8_read --> RSSelection_RSSelection3 + Forwarder8_read --> RSSelection_RSSelection1 + RSFuncBlock_select --> RSSelection_RSSelection2 + RS_select --> RSSelection_RSSelection2 RSSelection_RSSelection2 --> FIFO12_write - RSSelection_RSSelection --> FIFO12_write - RSSelection_RSSelection2 <--> LSUDummy_select - RSSelection_RSSelection <--> CSRUnit_select + RSSelection_RSSelection3 --> FIFO12_write + RSSelection_RSSelection1 --> FIFO12_write + RSSelection_RSSelection3 <--> LSUDummy_select + RSSelection_RSSelection1 <--> CSRUnit_select FIFO12_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion @@ -655,7 +655,7 @@ Collector2_method --> ConnectTrans11_ConnectTrans Forwarder7_read --> ConnectTrans11_ConnectTrans ConnectTrans11_ConnectTrans --> Fetch_resume - Retirement_Retirement3 --> Fetch_resume + Retirement_Retirement2 --> Fetch_resume Collector_method --> ResultAnnouncement_ResultAnnouncement Forwarder4_read --> ResultAnnouncement_ResultAnnouncement ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done @@ -668,7 +668,7 @@ ResultAnnouncement_ResultAnnouncement --> LSUDummy_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update RS_perf --> HwExpHistogram6__add - RS_RS1 --> WakeupSelect_WakeupSelect + RS_RS4 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -706,10 +706,10 @@ ConnectTrans3_ConnectTrans --> BasicFifo5_write WakeupSelect2_WakeupSelect --> FIFO6_write WakeupSelect2_WakeupSelect --> FIFO5_write - RS_RS4 --> WakeupSelect3_WakeupSelect + RS_RS3 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO7_write - RS_RS3 --> WakeupSelect4_WakeupSelect + RS_RS1 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans4_ConnectTrans --> Forwarder5_write ConnectTrans5_ConnectTrans --> Forwarder5_write @@ -728,11 +728,11 @@ CSRRegister2_read --> ConnectTrans8_ConnectTrans ConnectTrans8_ConnectTrans --> BasicFifo6_write LSUDummy_LSUDummy1 --> Forwarder6_write + TransactionManager_issue_cond1_LSUDummy --> Forwarder6_write + TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write + TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write TransactionManager_accept_cond1_LSUDummy --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond2 --> Forwarder6_write - TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write - TransactionManager_LSUDummy_issue_cond0 --> Forwarder6_write + TransactionManager_accept_cond0_LSUDummy --> Forwarder6_write CSRRegister__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> CSRRegister__fu_write CSRRegister1__fu_read --> CSRUnit_CSRUnit @@ -754,54 +754,54 @@ LSUDummy_get_result --> ConnectTrans2_ConnectTrans Forwarder6_read --> ConnectTrans2_ConnectTrans CSRUnit_get_result --> ConnectTrans3_ConnectTrans - MethodTryProduct_MethodTryProduct1 --> PrivilegedFuncUnit_precommit - MethodTryProduct_MethodTryProduct1 <--> InterruptController_mret + MethodTryProduct_MethodTryProduct2 --> PrivilegedFuncUnit_precommit + MethodTryProduct_MethodTryProduct2 <--> InterruptController_mret MethodTryProduct_MethodTryProduct --> LSUDummy_precommit - MethodTryProduct_MethodTryProduct2 --> CSRUnit_precommit + MethodTryProduct_MethodTryProduct1 --> CSRUnit_precommit ConnectTrans9_ConnectTrans --> Forwarder7_write ConnectTrans10_ConnectTrans --> Forwarder7_write BasicFifo6_read --> ConnectTrans9_ConnectTrans CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans - ReorderBuffer_peek --> Retirement_Retirement1 - ReorderBuffer_peek --> Retirement_Retirement + ReorderBuffer_peek --> Retirement_Retirement3 ReorderBuffer_peek --> Retirement_Retirement4 + ReorderBuffer_peek --> Retirement_Retirement1 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement1 --> MethodTryProduct_method - ExceptionCauseRegister_get --> Retirement_Retirement + Retirement_Retirement3 --> MethodTryProduct_method + ExceptionCauseRegister_get --> Retirement_Retirement4 ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0 ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement4 <--> ReorderBuffer_retire + Retirement_Retirement1 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire - Retirement_Retirement4 <--> FIFOLatencyMeasurer1__stop + Retirement_Retirement1 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer1__stop - FIFO2_read --> Retirement_Retirement4 + FIFO2_read --> Retirement_Retirement1 FIFO2_read --> TransactionManager_Retirement_Retirement_cond0 FIFO2_read --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement4 --> HwExpHistogram3__add + Retirement_Retirement1 --> HwExpHistogram3__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram3__add TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram3__add - CoreInstructionCounter_decrement --> Retirement_Retirement4 + CoreInstructionCounter_decrement --> Retirement_Retirement1 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 - RRAT_peek --> Retirement_Retirement4 + RRAT_peek --> Retirement_Retirement1 RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement4 --> RegisterFile_free + Retirement_Retirement1 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free - Retirement_Retirement4 --> TaggedLatencyMeasurer__stop + Retirement_Retirement1 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_Retirement_cond1 --> TaggedLatencyMeasurer__stop - AsyncMemoryBank_read --> Retirement_Retirement4 + AsyncMemoryBank_read --> Retirement_Retirement1 AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond0 AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond1 - Retirement_Retirement4 --> HwExpHistogram1__add + Retirement_Retirement1 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add - CSRRegister1_read --> Retirement_Retirement3 - Retirement_Retirement3 <--> ExceptionCauseRegister_clear + CSRRegister1_read --> Retirement_Retirement2 + Retirement_Retirement2 <--> ExceptionCauseRegister_clear GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write @@ -813,8 +813,8 @@ CSRRegister6_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister6_write AdapterTrans1_AdapterTrans_report_interrupt <--> InterruptController_report_interrupt - TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2 - TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement2 + TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement + TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister2_write @@ -829,37 +829,37 @@ CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter7__incr + TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 + TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read + TransactionManager_issue_cond1_LSUDummy --> Serializer1_Serializer2 + TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write + TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write + TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request + TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request + TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy + TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy + TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy + TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue + TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 + TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write + TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer + TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 + TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 TransactionManager_accept_cond1_LSUDummy <--> LSURequester_accept_cond1 WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_LSUDummy - Serializer1_Serializer --> TransactionManager_accept_cond1_LSUDummy + Serializer1_Serializer1 --> TransactionManager_accept_cond1_LSUDummy BasicFifo1_read --> TransactionManager_accept_cond1_LSUDummy - BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond0 + BasicFifo1_read --> TransactionManager_accept_cond0_LSUDummy WishboneMaster1_result --> TransactionManager_accept_cond1_LSUDummy - WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0 + WishboneMaster1_result --> TransactionManager_accept_cond0_LSUDummy Forwarder1_read --> TransactionManager_accept_cond1_LSUDummy - Forwarder1_read --> TransactionManager_LSUDummy_accept_cond0 + Forwarder1_read --> TransactionManager_accept_cond0_LSUDummy TransactionManager_accept_cond1_LSUDummy <--> LSUDummy_LSUDummy2 - TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy2 + TransactionManager_accept_cond0_LSUDummy <--> LSUDummy_LSUDummy2 LSURequester_accept --> TransactionManager_accept_cond1_LSUDummy - LSURequester_accept --> TransactionManager_LSUDummy_accept_cond0 - TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy - TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue - TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 - TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 - WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 - Serializer1_Serializer2 --> TransactionManager_LSUDummy_accept_cond0 - TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 - TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read - TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer1 - TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write - TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request - TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request - TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 - TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 - TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write - TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer3 + LSURequester_accept --> TransactionManager_accept_cond0_LSUDummy + TransactionManager_accept_cond0_LSUDummy <--> LSURequester_accept_cond0 + WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_LSUDummy + Serializer1_Serializer3 --> TransactionManager_accept_cond0_LSUDummy diff --git a/api.html b/api.html index bdbe9bc35..9b34f0514 100644 --- a/api.html +++ b/api.html @@ -259,7 +259,7 @@

transactron

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/assumptions.html b/assumptions.html index f000556d0..9970b164c 100644 --- a/assumptions.html +++ b/assumptions.html @@ -104,7 +104,7 @@

List of assumptions made during development

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/auto_graph.html b/auto_graph.html index 6453dbc38..fe7d78e70 100644 --- a/auto_graph.html +++ b/auto_graph.html @@ -83,24 +83,24 @@ subgraph TransactionModule["TransactionModule"] subgraph CoreTestElaboratable["elaboratable CoreTestElaboratable"] subgraph Core["core Core"] - Core_DiscardBranchVerify["DiscardBranchVerify"] Core_InitFreeRFFifo["InitFreeRFFifo"] + Core_DiscardBranchVerify["DiscardBranchVerify"] subgraph WishboneMaster["wb_master_instr WishboneMaster"] - WishboneMaster_WishboneMaster["WishboneMaster"] WishboneMaster_request["request"] + WishboneMaster_WishboneMaster["WishboneMaster"] WishboneMaster_result["result"] subgraph Forwarder["result Forwarder"] - Forwarder_read["read"] Forwarder_write["write"] + Forwarder_read["read"] end end subgraph WishboneMaster1["wb_master_data WishboneMaster"] + WishboneMaster1_WishboneMaster["WishboneMaster"] WishboneMaster1_result["result"] WishboneMaster1_request["request"] - WishboneMaster1_WishboneMaster["WishboneMaster"] subgraph Forwarder1["result Forwarder"] - Forwarder1_read["read"] Forwarder1_write["write"] + Forwarder1_read["read"] end end subgraph WishboneMasterAdapter["bus_master_instr_adapter WishboneMasterAdapter"] @@ -116,28 +116,28 @@ end end subgraph WishboneMasterAdapter1["bus_master_data_adapter WishboneMasterAdapter"] + WishboneMasterAdapter1_request_read["request_read"] WishboneMasterAdapter1_get_write_response["get_write_response"] WishboneMasterAdapter1_request_write["request_write"] WishboneMasterAdapter1_get_read_response["get_read_response"] - WishboneMasterAdapter1_request_read["request_read"] subgraph Serializer1["bus_serializer Serializer"] Serializer1_Serializer["Serializer"] Serializer1_Serializer1["Serializer"] Serializer1_Serializer2["Serializer"] Serializer1_Serializer3["Serializer"] subgraph BasicFifo1["pending_requests BasicFifo"] - BasicFifo1_read["read"] BasicFifo1_write["write"] + BasicFifo1_read["read"] end end end subgraph CoreInstructionCounter["core_counter CoreInstructionCounter"] - CoreInstructionCounter_increment["increment"] CoreInstructionCounter_decrement["decrement"] + CoreInstructionCounter_increment["increment"] end subgraph FIFO["fifo_fetch FIFO"] - FIFO_write["write"] FIFO_read["read"] + FIFO_write["write"] end subgraph MethodMap["core_counter_increment_discard_map MethodMap"] MethodMap_method["method"] @@ -150,21 +150,21 @@ BasicFifo2_write["write"] end subgraph SimpleCommonBusCacheRefiller["icache_refiller SimpleCommonBusCacheRefiller"] + SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] SimpleCommonBusCacheRefiller_start_refill["start_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller["SimpleCommonBusCacheRefiller"] - SimpleCommonBusCacheRefiller_accept_refill["accept_refill"] SimpleCommonBusCacheRefiller_SimpleCommonBusCacheRefiller1["SimpleCommonBusCacheRefiller"] subgraph Forwarder2["resp_fwd Forwarder"] - Forwarder2_write["write"] Forwarder2_read["read"] + Forwarder2_write["write"] end end subgraph ICache["icache ICache"] - ICache_ICache["ICache"] - ICache_ICache1["ICache"] ICache_accept_res["accept_res"] - ICache_MemRead["MemRead"] + ICache_ICache["ICache"] ICache_issue_req["issue_req"] + ICache_MemRead["MemRead"] + ICache_ICache1["ICache"] subgraph HwCounter["perf_loads HwCounter"] HwCounter__incr["_incr"] end @@ -181,8 +181,8 @@ HwCounter4__incr["_incr"] end subgraph FIFOLatencyMeasurer["req_latency FIFOLatencyMeasurer"] - FIFOLatencyMeasurer__stop["_stop"] FIFOLatencyMeasurer__start["_start"] + FIFOLatencyMeasurer__stop["_stop"] subgraph HwExpHistogram["histogram HwExpHistogram"] HwExpHistogram__add["_add"] end @@ -193,8 +193,8 @@ end subgraph ArgumentsToResultsZipper["req_zipper ArgumentsToResultsZipper"] ArgumentsToResultsZipper_write_results["write_results"] - ArgumentsToResultsZipper_write_args["write_args"] ArgumentsToResultsZipper_peek_arg["peek_arg"] + ArgumentsToResultsZipper_write_args["write_args"] ArgumentsToResultsZipper_read["read"] subgraph BasicFifo3["fifo BasicFifo"] BasicFifo3_write["write"] @@ -215,14 +215,14 @@ RRAT_commit["commit"] end subgraph RegisterFile["RF RegisterFile"] - RegisterFile_read1["read1"] - RegisterFile_write["write"] RegisterFile_perf["perf"] + RegisterFile_write["write"] RegisterFile_read2["read2"] RegisterFile_free["free"] + RegisterFile_read1["read1"] subgraph TaggedLatencyMeasurer["perf_rf_valid_time TaggedLatencyMeasurer"] - TaggedLatencyMeasurer__stop["_stop"] TaggedLatencyMeasurer__start["_start"] + TaggedLatencyMeasurer__stop["_stop"] subgraph HwExpHistogram1["histogram HwExpHistogram"] HwExpHistogram1__add["_add"] end @@ -236,12 +236,12 @@ end end subgraph ReorderBuffer["ROB ReorderBuffer"] - ReorderBuffer_peek["peek"] ReorderBuffer_retire["retire"] - ReorderBuffer_get_indices["get_indices"] - ReorderBuffer_perf["perf"] ReorderBuffer_put["put"] ReorderBuffer_mark_done["mark_done"] + ReorderBuffer_get_indices["get_indices"] + ReorderBuffer_perf["perf"] + ReorderBuffer_peek["peek"] subgraph FIFOLatencyMeasurer1["perf_rob_wait_time FIFOLatencyMeasurer"] FIFOLatencyMeasurer1__stop["_stop"] FIFOLatencyMeasurer1__start["_start"] @@ -249,8 +249,8 @@ HwExpHistogram3__add["_add"] end subgraph FIFO2["fifo FIFO"] - FIFO2_read["read"] FIFO2_write["write"] + FIFO2_read["read"] end end subgraph HwExpHistogram4["perf_rob_size HwExpHistogram"] @@ -258,8 +258,8 @@ end end subgraph Fetch["fetch Fetch"] - Fetch_Fetch["Fetch"] Fetch_stall_exception["stall_exception"] + Fetch_Fetch["Fetch"] Fetch_Fetch1["Fetch"] Fetch_resume["resume"] subgraph BasicFifo4["fetch_target_queue BasicFifo"] @@ -269,11 +269,11 @@ end subgraph ExceptionCauseRegister["exception_cause_register ExceptionCauseRegister"] ExceptionCauseRegister_report["report"] - ExceptionCauseRegister_clear["clear"] ExceptionCauseRegister_get["get"] + ExceptionCauseRegister_clear["clear"] subgraph BasicFifo5["fu_report_fifo BasicFifo"] - BasicFifo5_write["write"] BasicFifo5_read["read"] + BasicFifo5_write["write"] end subgraph ConnectTrans["report_connector ConnectTrans"] ConnectTrans_ConnectTrans["ConnectTrans"] @@ -283,8 +283,8 @@ subgraph Collector["result_collector Collector"] Collector_method["method"] subgraph Forwarder4["forwarder Forwarder"] - Forwarder4_read["read"] Forwarder4_write["write"] + Forwarder4_read["read"] end subgraph ManyToOneConnectTrans["connect ManyToOneConnectTrans"] subgraph ConnectTrans1["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -302,21 +302,21 @@ MethodProduct1_method["method"] end subgraph RSFuncBlock["rs_block_0 RSFuncBlock"] + RSFuncBlock_update["update"] RSFuncBlock_insert["insert"] RSFuncBlock_select["select"] - RSFuncBlock_update["update"] RSFuncBlock_get_result["get_result"] subgraph RS["rs RS"] + RS_take["take"] + RS_perf["perf"] + RS_select["select"] RS_RS["RS"] RS_RS1["RS"] - RS_RS2["RS"] - RS_update["update"] RS_insert["insert"] + RS_RS2["RS"] RS_RS3["RS"] - RS_perf["perf"] - RS_take["take"] - RS_select["select"] RS_RS4["RS"] + RS_update["update"] subgraph TaggedLatencyMeasurer1["perf_rs_wait_time TaggedLatencyMeasurer"] TaggedLatencyMeasurer1__start["_start"] TaggedLatencyMeasurer1__stop["_stop"] @@ -347,8 +347,8 @@ WakeupSelect_WakeupSelect["WakeupSelect"] end subgraph ShiftFuncUnit["func_unit_1 ShiftFuncUnit"] - ShiftFuncUnit_issue["issue"] ShiftFuncUnit_accept["accept"] + ShiftFuncUnit_issue["issue"] subgraph FIFO4["fifo FIFO"] FIFO4_read["read"] FIFO4_write["write"] @@ -358,11 +358,11 @@ WakeupSelect1_WakeupSelect["WakeupSelect"] end subgraph JumpBranchFuncUnit["func_unit_2 JumpBranchFuncUnit"] - JumpBranchFuncUnit_issue["issue"] JumpBranchFuncUnit_accept["accept"] + JumpBranchFuncUnit_issue["issue"] subgraph FIFO5["fifo_branch_resolved FIFO"] - FIFO5_write["write"] FIFO5_read["read"] + FIFO5_write["write"] end subgraph TaggedCounter1["perf_instr TaggedCounter"] TaggedCounter1__incr["_incr"] @@ -379,11 +379,11 @@ WakeupSelect2_WakeupSelect["WakeupSelect"] end subgraph ExceptionFuncUnit["func_unit_3 ExceptionFuncUnit"] - ExceptionFuncUnit_accept["accept"] ExceptionFuncUnit_issue["issue"] + ExceptionFuncUnit_accept["accept"] subgraph FIFO7["fifo FIFO"] - FIFO7_write["write"] FIFO7_read["read"] + FIFO7_write["write"] end end subgraph WakeupSelect3["wakeup_select_3 WakeupSelect"] @@ -391,11 +391,11 @@ end subgraph PrivilegedFuncUnit["func_unit_4 PrivilegedFuncUnit"] PrivilegedFuncUnit_issue["issue"] - PrivilegedFuncUnit_accept["accept"] PrivilegedFuncUnit_precommit["precommit"] + PrivilegedFuncUnit_accept["accept"] subgraph BasicFifo6["fetch_resume_fifo BasicFifo"] - BasicFifo6_write["write"] BasicFifo6_read["read"] + BasicFifo6_write["write"] end end subgraph WakeupSelect4["wakeup_select_4 WakeupSelect"] @@ -404,8 +404,8 @@ subgraph Collector1["collector Collector"] Collector1_method["method"] subgraph Forwarder5["forwarder Forwarder"] - Forwarder5_write["write"] Forwarder5_read["read"] + Forwarder5_write["write"] end subgraph ManyToOneConnectTrans1["connect ManyToOneConnectTrans"] subgraph ConnectTrans4["ManyToOneConnectTrans_input_0 ConnectTrans"] @@ -427,41 +427,41 @@ end end subgraph LSUDummy["rs_block_1 LSUDummy"] - LSUDummy_update["update"] - LSUDummy_select["select"] - LSUDummy_get_result["get_result"] LSUDummy_LSUDummy["LSUDummy"] + LSUDummy_insert["insert"] LSUDummy_LSUDummy1["LSUDummy"] LSUDummy_LSUDummy2["LSUDummy"] - LSUDummy_insert["insert"] + LSUDummy_update["update"] + LSUDummy_select["select"] + LSUDummy_get_result["get_result"] LSUDummy_precommit["precommit"] subgraph Forwarder6["forwarder Forwarder"] - Forwarder6_write["write"] Forwarder6_read["read"] + Forwarder6_write["write"] end subgraph LSURequester["requester LSURequester"] LSURequester_accept_cond1["accept_cond1"] LSURequester_accept["accept"] - LSURequester_issue["issue"] LSURequester_accept_cond0["accept_cond0"] - LSURequester_issue_cond1["issue_cond1"] + LSURequester_issue["issue"] LSURequester_issue_cond0["issue_cond0"] + LSURequester_issue_cond1["issue_cond1"] LSURequester_issue_cond2["issue_cond2"] end end subgraph CSRUnit["rs_block_2 CSRUnit"] CSRUnit_insert["insert"] + CSRUnit_update["update"] CSRUnit_select["select"] + CSRUnit_fetch_resume["fetch_resume"] CSRUnit_CSRUnit["CSRUnit"] - CSRUnit_update["update"] CSRUnit_precommit["precommit"] CSRUnit_get_result["get_result"] - CSRUnit_fetch_resume["fetch_resume"] end subgraph MethodTryProduct["InstructionPrecommitKey_unifier MethodTryProduct"] + MethodTryProduct_method["method"] MethodTryProduct_MethodTryProduct["MethodTryProduct"] MethodTryProduct_MethodTryProduct1["MethodTryProduct"] - MethodTryProduct_method["method"] MethodTryProduct_MethodTryProduct2["MethodTryProduct"] end subgraph Collector2["FetchResumeKey_unifier Collector"] @@ -484,53 +484,53 @@ ResultAnnouncement_ResultAnnouncement["ResultAnnouncement"] end subgraph InterruptController["interrupt_controller InterruptController"] - InterruptController_mret["mret"] - InterruptController_entry["entry"] InterruptController_report_interrupt["report_interrupt"] + InterruptController_entry["entry"] + InterruptController_mret["mret"] end subgraph GenericCSRRegisters["csr_generic GenericCSRRegisters"] GenericCSRRegisters_GenericCSRRegisters["GenericCSRRegisters"] subgraph MachineModeCSRRegisters["m_mode MachineModeCSRRegisters"] subgraph CSRRegister["mcause CSRRegister"] - CSRRegister__fu_write["_fu_write"] CSRRegister__fu_read["_fu_read"] + CSRRegister__fu_write["_fu_write"] CSRRegister_write["write"] end subgraph CSRRegister1["mtvec CSRRegister"] - CSRRegister1_read["read"] - CSRRegister1__fu_read["_fu_read"] CSRRegister1__fu_write["_fu_write"] + CSRRegister1__fu_read["_fu_read"] + CSRRegister1_read["read"] end subgraph CSRRegister2["mepc CSRRegister"] - CSRRegister2__fu_write["_fu_write"] - CSRRegister2_read["read"] CSRRegister2__fu_read["_fu_read"] CSRRegister2_write["write"] + CSRRegister2__fu_write["_fu_write"] + CSRRegister2_read["read"] end end subgraph DoubleCounterCSR["csr_cycle DoubleCounterCSR"] DoubleCounterCSR_increment["increment"] subgraph CSRRegister3["register_low CSRRegister"] CSRRegister3__fu_read["_fu_read"] - CSRRegister3_write["write"] CSRRegister3_read["read"] + CSRRegister3_write["write"] end subgraph CSRRegister4["register_high CSRRegister"] - CSRRegister4__fu_read["_fu_read"] - CSRRegister4_read["read"] CSRRegister4_write["write"] + CSRRegister4_read["read"] + CSRRegister4__fu_read["_fu_read"] end end subgraph DoubleCounterCSR1["csr_time DoubleCounterCSR"] DoubleCounterCSR1_increment["increment"] subgraph CSRRegister5["register_low CSRRegister"] CSRRegister5__fu_read["_fu_read"] - CSRRegister5_read["read"] CSRRegister5_write["write"] + CSRRegister5_read["read"] end subgraph CSRRegister6["register_high CSRRegister"] - CSRRegister6_read["read"] CSRRegister6_write["write"] + CSRRegister6_read["read"] CSRRegister6__fu_read["_fu_read"] end end @@ -547,8 +547,8 @@ end subgraph Scheduler["scheduler Scheduler"] subgraph FIFO9["alloc_rename_buf FIFO"] - FIFO9_write["write"] FIFO9_read["read"] + FIFO9_write["write"] end subgraph RegAllocation["reg_alloc RegAllocation"] RegAllocation_RegAllocation["RegAllocation"] @@ -577,8 +577,8 @@ RSSelection_RSSelection2["RSSelection"] RSSelection_RSSelection3["RSSelection"] subgraph Forwarder8["forwarder Forwarder"] - Forwarder8_read["read"] Forwarder8_write["write"] + Forwarder8_read["read"] end end subgraph RSInsertion["rs_insertion RSInsertion"] @@ -590,24 +590,24 @@ end subgraph Retirement["retirement Retirement"] Retirement_Retirement["Retirement"] + Retirement_Retirement_cond0["Retirement_cond0"] + Retirement_Retirement_cond1["Retirement_cond1"] Retirement_Retirement1["Retirement"] Retirement_Retirement2["Retirement"] Retirement_Retirement3["Retirement"] - Retirement_Retirement_cond0["Retirement_cond0"] - Retirement_Retirement_cond1["Retirement_cond1"] Retirement_core_state["core_state"] Retirement_Retirement4["Retirement"] subgraph DoubleCounterCSR2["instret_csr DoubleCounterCSR"] DoubleCounterCSR2_increment["increment"] subgraph CSRRegister7["register_low CSRRegister"] - CSRRegister7_write["write"] CSRRegister7_read["read"] + CSRRegister7_write["write"] CSRRegister7__fu_read["_fu_read"] end subgraph CSRRegister8["register_high CSRRegister"] CSRRegister8__fu_read["_fu_read"] - CSRRegister8_read["read"] CSRRegister8_write["write"] + CSRRegister8_read["read"] end end subgraph HwCounter7["perf_instr_ret HwCounter"] @@ -627,17 +627,17 @@ end end subgraph TransactionManager["transactionManager TransactionManager"] - TransactionManager_LSUDummy_issue_cond1["LSUDummy_issue_cond1"] + TransactionManager_issue_cond1_LSUDummy["issue_cond1_LSUDummy"] TransactionManager_accept_cond1_LSUDummy["accept_cond1_LSUDummy"] - TransactionManager_LSUDummy_issue_cond0["LSUDummy_issue_cond0"] - TransactionManager_LSUDummy_issue_cond2["LSUDummy_issue_cond2"] - TransactionManager_LSUDummy_accept_cond0["LSUDummy_accept_cond0"] TransactionManager_Retirement_Retirement_cond1["Retirement_Retirement_cond1"] + TransactionManager_issue_cond2_LSUDummy["issue_cond2_LSUDummy"] + TransactionManager_accept_cond0_LSUDummy["accept_cond0_LSUDummy"] + TransactionManager_issue_cond0_LSUDummy["issue_cond0_LSUDummy"] TransactionManager_Retirement_Retirement_cond0["Retirement_Retirement_cond0"] end end Core_InitFreeRFFifo --> BasicFifo2_write -Retirement_Retirement4 --> BasicFifo2_write +Retirement_Retirement1 --> BasicFifo2_write TransactionManager_Retirement_Retirement_cond0 --> BasicFifo2_write TransactionManager_Retirement_Retirement_cond1 --> BasicFifo2_write FIFO5_read --> Core_DiscardBranchVerify @@ -697,7 +697,7 @@ RegAllocation_RegAllocation --> FIFO9_write FIFO9_read --> Renaming_Renaming Renaming_Renaming --> FRAT_rename -Retirement_Retirement4 --> FRAT_rename +Retirement_Retirement1 --> FRAT_rename TransactionManager_Retirement_Retirement_cond1 --> FRAT_rename Renaming_Renaming --> FIFO10_write FIFO10_read --> ROBAllocation_ROBAllocation @@ -705,18 +705,18 @@ ROBAllocation_ROBAllocation <--> FIFOLatencyMeasurer1__start ROBAllocation_ROBAllocation --> FIFO2_write ROBAllocation_ROBAllocation --> FIFO11_write -FIFO11_read --> RSSelection_RSSelection3 -RSSelection_RSSelection3 --> Forwarder8_write -Forwarder8_read --> RSSelection_RSSelection1 +FIFO11_read --> RSSelection_RSSelection +RSSelection_RSSelection --> Forwarder8_write Forwarder8_read --> RSSelection_RSSelection2 -Forwarder8_read --> RSSelection_RSSelection -RSFuncBlock_select --> RSSelection_RSSelection1 -RS_select --> RSSelection_RSSelection1 -RSSelection_RSSelection1 --> FIFO12_write +Forwarder8_read --> RSSelection_RSSelection3 +Forwarder8_read --> RSSelection_RSSelection1 +RSFuncBlock_select --> RSSelection_RSSelection2 +RS_select --> RSSelection_RSSelection2 RSSelection_RSSelection2 --> FIFO12_write -RSSelection_RSSelection --> FIFO12_write -RSSelection_RSSelection2 <--> LSUDummy_select -RSSelection_RSSelection <--> CSRUnit_select +RSSelection_RSSelection3 --> FIFO12_write +RSSelection_RSSelection1 --> FIFO12_write +RSSelection_RSSelection3 <--> LSUDummy_select +RSSelection_RSSelection1 <--> CSRUnit_select FIFO12_read --> RSInsertion_RSInsertion RegisterFile_read1 --> RSInsertion_RSInsertion RegisterFile_read2 --> RSInsertion_RSInsertion @@ -734,7 +734,7 @@ Collector2_method --> ConnectTrans11_ConnectTrans Forwarder7_read --> ConnectTrans11_ConnectTrans ConnectTrans11_ConnectTrans --> Fetch_resume -Retirement_Retirement3 --> Fetch_resume +Retirement_Retirement2 --> Fetch_resume Collector_method --> ResultAnnouncement_ResultAnnouncement Forwarder4_read --> ResultAnnouncement_ResultAnnouncement ResultAnnouncement_ResultAnnouncement --> ReorderBuffer_mark_done @@ -747,7 +747,7 @@ ResultAnnouncement_ResultAnnouncement --> LSUDummy_update ResultAnnouncement_ResultAnnouncement --> CSRUnit_update RS_perf --> HwExpHistogram6__add -RS_RS1 --> WakeupSelect_WakeupSelect +RS_RS4 --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect_WakeupSelect RS_take --> WakeupSelect1_WakeupSelect RS_take --> WakeupSelect2_WakeupSelect @@ -785,10 +785,10 @@ ConnectTrans3_ConnectTrans --> BasicFifo5_write WakeupSelect2_WakeupSelect --> FIFO6_write WakeupSelect2_WakeupSelect --> FIFO5_write -RS_RS4 --> WakeupSelect3_WakeupSelect +RS_RS3 --> WakeupSelect3_WakeupSelect WakeupSelect3_WakeupSelect --> ExceptionFuncUnit_issue WakeupSelect3_WakeupSelect --> FIFO7_write -RS_RS3 --> WakeupSelect4_WakeupSelect +RS_RS1 --> WakeupSelect4_WakeupSelect WakeupSelect4_WakeupSelect --> PrivilegedFuncUnit_issue ConnectTrans4_ConnectTrans --> Forwarder5_write ConnectTrans5_ConnectTrans --> Forwarder5_write @@ -807,11 +807,11 @@ CSRRegister2_read --> ConnectTrans8_ConnectTrans ConnectTrans8_ConnectTrans --> BasicFifo6_write LSUDummy_LSUDummy1 --> Forwarder6_write +TransactionManager_issue_cond1_LSUDummy --> Forwarder6_write +TransactionManager_issue_cond0_LSUDummy --> Forwarder6_write +TransactionManager_issue_cond2_LSUDummy --> Forwarder6_write TransactionManager_accept_cond1_LSUDummy --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond2 --> Forwarder6_write -TransactionManager_LSUDummy_accept_cond0 --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond1 --> Forwarder6_write -TransactionManager_LSUDummy_issue_cond0 --> Forwarder6_write +TransactionManager_accept_cond0_LSUDummy --> Forwarder6_write CSRRegister__fu_read --> CSRUnit_CSRUnit CSRUnit_CSRUnit --> CSRRegister__fu_write CSRRegister1__fu_read --> CSRUnit_CSRUnit @@ -833,54 +833,54 @@ LSUDummy_get_result --> ConnectTrans2_ConnectTrans Forwarder6_read --> ConnectTrans2_ConnectTrans CSRUnit_get_result --> ConnectTrans3_ConnectTrans -MethodTryProduct_MethodTryProduct1 --> PrivilegedFuncUnit_precommit -MethodTryProduct_MethodTryProduct1 <--> InterruptController_mret +MethodTryProduct_MethodTryProduct2 --> PrivilegedFuncUnit_precommit +MethodTryProduct_MethodTryProduct2 <--> InterruptController_mret MethodTryProduct_MethodTryProduct --> LSUDummy_precommit -MethodTryProduct_MethodTryProduct2 --> CSRUnit_precommit +MethodTryProduct_MethodTryProduct1 --> CSRUnit_precommit ConnectTrans9_ConnectTrans --> Forwarder7_write ConnectTrans10_ConnectTrans --> Forwarder7_write BasicFifo6_read --> ConnectTrans9_ConnectTrans CSRUnit_fetch_resume --> ConnectTrans10_ConnectTrans -ReorderBuffer_peek --> Retirement_Retirement1 -ReorderBuffer_peek --> Retirement_Retirement +ReorderBuffer_peek --> Retirement_Retirement3 ReorderBuffer_peek --> Retirement_Retirement4 +ReorderBuffer_peek --> Retirement_Retirement1 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond0 ReorderBuffer_peek --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement1 --> MethodTryProduct_method -ExceptionCauseRegister_get --> Retirement_Retirement +Retirement_Retirement3 --> MethodTryProduct_method +ExceptionCauseRegister_get --> Retirement_Retirement4 ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond0 ExceptionCauseRegister_get --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement4 <--> ReorderBuffer_retire +Retirement_Retirement1 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond0 <--> ReorderBuffer_retire TransactionManager_Retirement_Retirement_cond1 <--> ReorderBuffer_retire -Retirement_Retirement4 <--> FIFOLatencyMeasurer1__stop +Retirement_Retirement1 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond0 <--> FIFOLatencyMeasurer1__stop TransactionManager_Retirement_Retirement_cond1 <--> FIFOLatencyMeasurer1__stop -FIFO2_read --> Retirement_Retirement4 +FIFO2_read --> Retirement_Retirement1 FIFO2_read --> TransactionManager_Retirement_Retirement_cond0 FIFO2_read --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement4 --> HwExpHistogram3__add +Retirement_Retirement1 --> HwExpHistogram3__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram3__add TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram3__add -CoreInstructionCounter_decrement --> Retirement_Retirement4 +CoreInstructionCounter_decrement --> Retirement_Retirement1 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond0 CoreInstructionCounter_decrement --> TransactionManager_Retirement_Retirement_cond1 -RRAT_peek --> Retirement_Retirement4 +RRAT_peek --> Retirement_Retirement1 RRAT_peek --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement4 --> RegisterFile_free +Retirement_Retirement1 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond0 --> RegisterFile_free TransactionManager_Retirement_Retirement_cond1 --> RegisterFile_free -Retirement_Retirement4 --> TaggedLatencyMeasurer__stop +Retirement_Retirement1 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_Retirement_cond0 --> TaggedLatencyMeasurer__stop TransactionManager_Retirement_Retirement_cond1 --> TaggedLatencyMeasurer__stop -AsyncMemoryBank_read --> Retirement_Retirement4 +AsyncMemoryBank_read --> Retirement_Retirement1 AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond0 AsyncMemoryBank_read --> TransactionManager_Retirement_Retirement_cond1 -Retirement_Retirement4 --> HwExpHistogram1__add +Retirement_Retirement1 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond0 --> HwExpHistogram1__add TransactionManager_Retirement_Retirement_cond1 --> HwExpHistogram1__add -CSRRegister1_read --> Retirement_Retirement3 -Retirement_Retirement3 <--> ExceptionCauseRegister_clear +CSRRegister1_read --> Retirement_Retirement2 +Retirement_Retirement2 <--> ExceptionCauseRegister_clear GenericCSRRegisters_GenericCSRRegisters <--> DoubleCounterCSR_increment CSRRegister3_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister3_write @@ -892,8 +892,8 @@ CSRRegister6_read --> GenericCSRRegisters_GenericCSRRegisters GenericCSRRegisters_GenericCSRRegisters --> CSRRegister6_write AdapterTrans1_AdapterTrans_report_interrupt <--> InterruptController_report_interrupt -TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement2 -TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement2 +TransactionManager_Retirement_Retirement_cond0 <--> Retirement_Retirement +TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement TransactionManager_Retirement_Retirement_cond0 --> CSRRegister_write TransactionManager_Retirement_Retirement_cond1 --> CSRRegister_write TransactionManager_Retirement_Retirement_cond0 --> CSRRegister2_write @@ -908,40 +908,40 @@ CSRRegister8_read --> TransactionManager_Retirement_Retirement_cond0 TransactionManager_Retirement_Retirement_cond0 --> CSRRegister8_write TransactionManager_Retirement_Retirement_cond0 <--> HwCounter7__incr +TransactionManager_issue_cond1_LSUDummy <--> LSURequester_issue_cond1 +TransactionManager_issue_cond1_LSUDummy --> WishboneMasterAdapter1_request_read +TransactionManager_issue_cond1_LSUDummy --> Serializer1_Serializer2 +TransactionManager_issue_cond1_LSUDummy --> BasicFifo1_write +TransactionManager_issue_cond0_LSUDummy --> BasicFifo1_write +TransactionManager_issue_cond1_LSUDummy --> WishboneMaster1_request +TransactionManager_issue_cond0_LSUDummy --> WishboneMaster1_request +TransactionManager_issue_cond1_LSUDummy <--> LSUDummy_LSUDummy +TransactionManager_issue_cond0_LSUDummy <--> LSUDummy_LSUDummy +TransactionManager_issue_cond2_LSUDummy <--> LSUDummy_LSUDummy +TransactionManager_issue_cond1_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond0_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond2_LSUDummy --> LSURequester_issue +TransactionManager_issue_cond0_LSUDummy <--> LSURequester_issue_cond0 +TransactionManager_issue_cond0_LSUDummy --> WishboneMasterAdapter1_request_write +TransactionManager_issue_cond0_LSUDummy --> Serializer1_Serializer +TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 +TransactionManager_issue_cond2_LSUDummy <--> LSURequester_issue_cond2 TransactionManager_accept_cond1_LSUDummy <--> LSURequester_accept_cond1 WishboneMasterAdapter1_get_read_response --> TransactionManager_accept_cond1_LSUDummy -Serializer1_Serializer --> TransactionManager_accept_cond1_LSUDummy +Serializer1_Serializer1 --> TransactionManager_accept_cond1_LSUDummy BasicFifo1_read --> TransactionManager_accept_cond1_LSUDummy -BasicFifo1_read --> TransactionManager_LSUDummy_accept_cond0 +BasicFifo1_read --> TransactionManager_accept_cond0_LSUDummy WishboneMaster1_result --> TransactionManager_accept_cond1_LSUDummy -WishboneMaster1_result --> TransactionManager_LSUDummy_accept_cond0 +WishboneMaster1_result --> TransactionManager_accept_cond0_LSUDummy Forwarder1_read --> TransactionManager_accept_cond1_LSUDummy -Forwarder1_read --> TransactionManager_LSUDummy_accept_cond0 +Forwarder1_read --> TransactionManager_accept_cond0_LSUDummy TransactionManager_accept_cond1_LSUDummy <--> LSUDummy_LSUDummy2 -TransactionManager_LSUDummy_accept_cond0 <--> LSUDummy_LSUDummy2 +TransactionManager_accept_cond0_LSUDummy <--> LSUDummy_LSUDummy2 LSURequester_accept --> TransactionManager_accept_cond1_LSUDummy -LSURequester_accept --> TransactionManager_LSUDummy_accept_cond0 -TransactionManager_LSUDummy_issue_cond2 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond1 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond0 <--> LSUDummy_LSUDummy -TransactionManager_LSUDummy_issue_cond2 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond1 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond0 --> LSURequester_issue -TransactionManager_LSUDummy_issue_cond2 <--> LSURequester_issue_cond2 -TransactionManager_LSUDummy_accept_cond0 <--> LSURequester_accept_cond0 -WishboneMasterAdapter1_get_write_response --> TransactionManager_LSUDummy_accept_cond0 -Serializer1_Serializer2 --> TransactionManager_LSUDummy_accept_cond0 -TransactionManager_LSUDummy_issue_cond1 <--> LSURequester_issue_cond1 -TransactionManager_LSUDummy_issue_cond1 --> WishboneMasterAdapter1_request_read -TransactionManager_LSUDummy_issue_cond1 --> Serializer1_Serializer1 -TransactionManager_LSUDummy_issue_cond1 --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond0 --> BasicFifo1_write -TransactionManager_LSUDummy_issue_cond1 --> WishboneMaster1_request -TransactionManager_LSUDummy_issue_cond0 --> WishboneMaster1_request -TransactionManager_Retirement_Retirement_cond1 <--> Retirement_Retirement_cond1 -TransactionManager_LSUDummy_issue_cond0 <--> LSURequester_issue_cond0 -TransactionManager_LSUDummy_issue_cond0 --> WishboneMasterAdapter1_request_write -TransactionManager_LSUDummy_issue_cond0 --> Serializer1_Serializer3 +LSURequester_accept --> TransactionManager_accept_cond0_LSUDummy +TransactionManager_accept_cond0_LSUDummy <--> LSURequester_accept_cond0 +WishboneMasterAdapter1_get_write_response --> TransactionManager_accept_cond0_LSUDummy +Serializer1_Serializer3 --> TransactionManager_accept_cond0_LSUDummy @@ -952,7 +952,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/components/icache.html b/components/icache.html index 1924defef..ef4412a2a 100644 --- a/components/icache.html +++ b/components/icache.html @@ -131,7 +131,7 @@

Address mapping example

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.backend.html b/coreblocks.backend.html index adde4fc48..6f863d537 100644 --- a/coreblocks.backend.html +++ b/coreblocks.backend.html @@ -165,7 +165,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.cache.html b/coreblocks.cache.html index 5ac13c07e..e01d6d952 100644 --- a/coreblocks.cache.html +++ b/coreblocks.cache.html @@ -241,7 +241,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.core_structs.html b/coreblocks.core_structs.html index 0f6e7faa9..1c19dd8f8 100644 --- a/coreblocks.core_structs.html +++ b/coreblocks.core_structs.html @@ -157,7 +157,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.frontend.decoder.html b/coreblocks.frontend.decoder.html index 2e077c6fd..b57cc30ed 100644 --- a/coreblocks.frontend.decoder.html +++ b/coreblocks.frontend.decoder.html @@ -1726,7 +1726,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.frontend.fetch.html b/coreblocks.frontend.fetch.html index 8ec482ce0..0cb7ae65f 100644 --- a/coreblocks.frontend.fetch.html +++ b/coreblocks.frontend.fetch.html @@ -161,7 +161,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.frontend.html b/coreblocks.frontend.html index 32f850cf2..6be5e42cc 100644 --- a/coreblocks.frontend.html +++ b/coreblocks.frontend.html @@ -125,7 +125,7 @@

Subpackages

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.func_blocks.fu.html b/coreblocks.func_blocks.fu.html index 5ef301293..6bf5bd6f8 100644 --- a/coreblocks.func_blocks.fu.html +++ b/coreblocks.func_blocks.fu.html @@ -867,7 +867,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.func_blocks.fu.unsigned_multiplication.html b/coreblocks.func_blocks.fu.unsigned_multiplication.html index 18e69b51b..6c2281379 100644 --- a/coreblocks.func_blocks.fu.unsigned_multiplication.html +++ b/coreblocks.func_blocks.fu.unsigned_multiplication.html @@ -238,7 +238,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.func_blocks.html b/coreblocks.func_blocks.html index 53d3acc93..d61618540 100644 --- a/coreblocks.func_blocks.html +++ b/coreblocks.func_blocks.html @@ -148,7 +148,7 @@

Subpackages

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.func_blocks.interface.html b/coreblocks.func_blocks.interface.html index e84d9cc6e..39154937d 100644 --- a/coreblocks.func_blocks.interface.html +++ b/coreblocks.func_blocks.interface.html @@ -169,7 +169,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.func_blocks.lsu.html b/coreblocks.func_blocks.lsu.html index c15c0f99c..a04dfb5cd 100644 --- a/coreblocks.func_blocks.lsu.html +++ b/coreblocks.func_blocks.lsu.html @@ -253,7 +253,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.html b/coreblocks.html index 849490bf9..62fe7cb40 100644 --- a/coreblocks.html +++ b/coreblocks.html @@ -255,7 +255,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.params.html b/coreblocks.params.html index 356b4ea3f..a26f9a2cd 100644 --- a/coreblocks.params.html +++ b/coreblocks.params.html @@ -1171,7 +1171,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.peripherals.html b/coreblocks.peripherals.html index 0644860d2..feab597e2 100644 --- a/coreblocks.peripherals.html +++ b/coreblocks.peripherals.html @@ -746,7 +746,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.priv.csr.html b/coreblocks.priv.csr.html index 1e32072e3..f421ba051 100644 --- a/coreblocks.priv.csr.html +++ b/coreblocks.priv.csr.html @@ -327,7 +327,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.priv.html b/coreblocks.priv.html index cd98ca8ad..24162004f 100644 --- a/coreblocks.priv.html +++ b/coreblocks.priv.html @@ -123,7 +123,7 @@

Subpackages

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.priv.traps.html b/coreblocks.priv.traps.html index 3779612a4..946e21191 100644 --- a/coreblocks.priv.traps.html +++ b/coreblocks.priv.traps.html @@ -171,7 +171,7 @@

Submodules

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/coreblocks.scheduler.html b/coreblocks.scheduler.html index 4487e8d29..72879eb86 100644 --- a/coreblocks.scheduler.html +++ b/coreblocks.scheduler.html @@ -191,7 +191,7 @@

Submodules

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diff --git a/current-graph.html b/current-graph.html index ce1861e83..1a772df7a 100644 --- a/current-graph.html +++ b/current-graph.html @@ -89,24 +89,24 @@

Full transaction-method graph

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diff --git a/development-environment.html b/development-environment.html index 94518213a..3d18a35a6 100644 --- a/development-environment.html +++ b/development-environment.html @@ -209,7 +209,7 @@

tprof.py

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/genindex.html b/genindex.html index 3beb6111e..07cfaf867 100644 --- a/genindex.html +++ b/genindex.html @@ -3819,7 +3819,7 @@

Z

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diff --git a/home.html b/home.html index 069c9f570..fe674ff0c 100644 --- a/home.html +++ b/home.html @@ -129,7 +129,7 @@

Documentation

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diff --git a/index.html b/index.html index 8044bd6fa..652c6863e 100644 --- a/index.html +++ b/index.html @@ -229,7 +229,7 @@

Coreblocks

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/miscellany/exceptions-summary.html b/miscellany/exceptions-summary.html index 9094e2faf..c9ee7be55 100644 --- a/miscellany/exceptions-summary.html +++ b/miscellany/exceptions-summary.html @@ -271,7 +271,7 @@

Summary

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diff --git a/modules-coreblocks.html b/modules-coreblocks.html index d8494a3d4..aaeb379fc 100644 --- a/modules-coreblocks.html +++ b/modules-coreblocks.html @@ -168,7 +168,7 @@

coreblocks

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/modules-transactron.html b/modules-transactron.html index 66f47f9b5..8e1c046d4 100644 --- a/modules-transactron.html +++ b/modules-transactron.html @@ -161,7 +161,7 @@

transactron

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diff --git a/problem-checklist.html b/problem-checklist.html index 2c348d648..b9b183587 100644 --- a/problem-checklist.html +++ b/problem-checklist.html @@ -105,7 +105,7 @@

Problem checklist

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diff --git a/py-modindex.html b/py-modindex.html index eb5a53ed3..638b201f7 100644 --- a/py-modindex.html +++ b/py-modindex.html @@ -668,7 +668,7 @@

Python Module Index

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diff --git a/scheduler/overview.html b/scheduler/overview.html index 6be53442e..271c9f968 100644 --- a/scheduler/overview.html +++ b/scheduler/overview.html @@ -146,7 +146,7 @@

More detailed description of each block

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diff --git a/search.html b/search.html index 2ebb65955..9f9c1d654 100644 --- a/search.html +++ b/search.html @@ -101,7 +101,7 @@

© Copyright Kuźnia Rdzeni, 2024. - Last updated on 14:37 2024-04-02. + Last updated on 15:20 2024-04-02.

diff --git a/shared-structs/implementation/rs-impl.html b/shared-structs/implementation/rs-impl.html index 16f8c327b..f09afe39f 100644 --- a/shared-structs/implementation/rs-impl.html +++ b/shared-structs/implementation/rs-impl.html @@ -252,7 +252,7 @@

Read and clean row

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diff --git a/shared-structs/rs.html b/shared-structs/rs.html index 81abb5f37..7f1dc2405 100644 --- a/shared-structs/rs.html +++ b/shared-structs/rs.html @@ -222,7 +222,7 @@

External interface signals

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Regression tests manual execution

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Transaction and method nesting

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Submodules

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Submodules

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Submodules

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Submodules

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