This repository has been archived by the owner on Jan 31, 2024. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 0
/
uartauto.s43
128 lines (127 loc) · 6.81 KB
/
uartauto.s43
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
#include "msp430x11x1.h"
;******************************************************************************
; MSP430x11x(1) Demo - 9600-baud UART using 3.579545Hz Crystal
;
; Description: This program demonstrates a half-duplex 9600-baud UART using
; Timer_A3 and a 3.58Mhz crystal. The program will wait in LPM0, echoing
; back a received character using 8N1 protocol.
;
;
; MSP430F1121
; -----------------
; /|\| XIN|-
; | | | 3.58Mhz
; --|RST XOUT|-
; | |
; | | 9600 8N1
; | TX/P1.1|-------->
; | TX/P2.2|<--------
;
; CPU registers used
#define RXTXData R4
#define BitCnt R5
;
; Conditions for 9600 Baud HW/SW UART, ACLK = 3.579545MHz
Bitime_5 equ 0186 ; 0.5 bit length
Bitime equ 0373 ; 104 us
RXD set 004h ; RXD on P2.2
TXD set 002h ; TXD on P1.1
;
; M.Buccini
; Texas Instruments, Inc
; March 2002
;******************************************************************************
;
Mainloop call #RX_Ready ; UART ready to RX one Byte
;-----------------------------------------------------------------------------
Init_Sys; Initialize System Peripherals
;-----------------------------------------------------------------------------
SetupC0 mov.w #OUT,&CCTL0 ; TXD Idle as Mark
SetupTA mov.w #TASSEL0+MC1,&TACTL ; ACLK, continous mode
SetupP1_2 bis.b #TXD,&P1SEL ; P1.1/TA0 for TXD function
bis.b #TXD,&P1DIR ; TXD output on P1
bis.b #RXD,&P2SEL ; P2.2/TA0 as RXD input
SetupBC bis.b #XTS,&BCSCTL1 ; ACLK = LFXT1 HF XTAL
SetupOsc bic.b #OFIFG,&IFG1 ; Clear OSC fault flag
mov.b #0FFh,R15
SetupOsc1 dec.b R15 ; Ddelay to ensure startup
jnz SetupOsc1
bit.b #OFIFG,&IFG1 ; OSC fault flag set?
jnz SetupOsc ;
bis.b #SELM1+SELM0,&BCSCTL2 ; (CPU) MCLK = LFXT1
eint ; General enable interrupts
ret ; Return from subroutine
;
;-----------------------------------------------------------------------------
TX_Byte; Subroutine that will TX Byte from RXTXData Buffer
;-----------------------------------------------------------------------------
mov.w #TX_Count,BitCnt ; TX_Count --> Branch Pointer
push.w &TAR ; Current state of TA Counter
add.w #Bitime,0(SP) ; Bitime till next bit
pop.w &CCR0 ; CCR0=Bitime till next bit
mov.w #OUTMOD2+OUTMOD0+CCIE,&CCTL0 ; TXD = Space = Start Bit
TX_Wait bit.w #CCIE,&CCTL0 ; Wait for TX completion
jnz TX_Wait ;
ret ; Return from subroutine
;
;-----------------------------------------------------------------------------
RX_Ready; Subroutine that Readies UART to RX Byte into RXTXData Buffer
;-----------------------------------------------------------------------------
mov.w #RX_Count,BitCnt ; RX_Count --> Branch Pointer
mov.w #SCS+CCIS0+CM1+CAP+OUT+CCIE,&CCTL0 ; Neg Edge, Cap., Out
ret ; Return from subroutine
;
;-----------------------------------------------------------------------------
TA0_ISR; CCR0/UART ISR, RXTXData Buffer holds UART Data
;-----------------------------------------------------------------------------
add.w #Bitime,&CCR0 ; Bitime till next bit
br @BitCnt+ ; Branch To Routine
;
TX_Bit rra.b RXTXData ; LSB is shifted to carry
jc TX_Mark ; Jump if bit = 1
TX_Space bis.w #OUTMOD2,&CCTL0 ; TX Space
reti ;
TX_Comp bic.w #CCIE,&CCTL0 ; All Bits RX, disable interrupt
TX_Mark bic.w #OUTMOD2,&CCTL0 ; TX Mark
reti ;
RX_Edge bic.w #CAP,&CCTL0 ; Switch to Compare mode
add.w #Bitime_5,&CCR0 ; First Databit 1.5 Bits from edge
reti ;
RX_Bit bit.w #SCCI,&CCTL0 ; Get bit waiting in SCCI
rrc.b RXTXData ; Store received bit
reti ;
;>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Comp bic.w #CCIE,&CCTL0 ; All Bits RXed, Disable Interrupt
mov.w #GIE,0(SP) ; Decode Byte= Active in Mainloop
reti ;
;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
EVEN
RX_Count DW RX_Edge ; Special for TA
DW RX_Bit ; RX First Data Bit
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Bit ;
DW RX_Comp ; RX Complete, process RX data
TX_Count DW TX_Bit ; TX First Data Bit
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Bit ;
DW TX_Mark ; TX Stop Bit= Mark
TX_End DW TX_Comp ; TX Complete and Complete
;
;-----------------------------------------------------------------------------
; Interrupt Vectors Used MSP430x11x1
;-----------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
ORG 0FFF2h ; Timer_A0 Vector
DW TA0_ISR ;
END