forked from ScaryTea/STM32F103
-
Notifications
You must be signed in to change notification settings - Fork 0
/
uart.c
134 lines (117 loc) · 2.98 KB
/
uart.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
#include "uart.h"
unsigned char* str;
void uart1_init();
void uart2_init();
void uart3_init();
void uart1_send(unsigned char* s);
void uart2_send(unsigned char* s);
void uart3_send(unsigned char* s);
void uart1_init() {
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);
// tx - AFIO push-pull
MODIFY_REG(GPIOA->CRH,
GPIO_CRH_CNF9_0 | GPIO_CRH_MODE9_0,
GPIO_CRH_CNF9_1 | GPIO_CRH_MODE9_1);
// rx - input floating
MODIFY_REG(GPIOA->CRH, GPIO_CRH_CNF10 | GPIO_CRH_MODE10, GPIO_CRH_CNF10_0);
// baudrate
USART1->BRR = 0x341;
// Update event bit, transmit|recieve enable
SET_BIT(USART1->CR1, USART_CR1_UE | USART_CR1_RE | USART_CR1_TE);
NVIC_EnableIRQ(USART1_IRQn);
}
void uart2_init() {
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART2EN);
// tx - AFIO push-pull
MODIFY_REG(GPIOA->CRL,
GPIO_CRL_CNF2_0 | GPIO_CRL_MODE2_0,
GPIO_CRL_CNF2_1 | GPIO_CRL_MODE2_1);
// rx - input floating
MODIFY_REG(GPIOA->CRL, GPIO_CRL_CNF3 | GPIO_CRL_MODE3, GPIO_CRL_CNF3_0);
// baudrate
USART2->BRR = 0x341;
// Update event bit, transmit|recieve enable
SET_BIT(USART2->CR1, USART_CR1_UE | USART_CR1_RE | USART_CR1_TE);
}
void uart3_init() {
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);
// tx - AFIO push-pull
MODIFY_REG(GPIOB->CRH,
GPIO_CRH_CNF10_0 | GPIO_CRH_MODE10_0,
GPIO_CRH_CNF10_1 | GPIO_CRH_MODE10_1);
// rx - input floating
MODIFY_REG(GPIOB->CRH, GPIO_CRH_CNF11 | GPIO_CRH_MODE11, GPIO_CRH_CNF11_0);
// baudrate
USART3->BRR = 0x341;
// Update event bit, transmit|recieve enable
SET_BIT(USART3->CR1, USART_CR1_UE | USART_CR1_RE | USART_CR1_TE);
}
unsigned char uart1_get() {
while(!(USART1->SR&USART_SR_RXNE));
unsigned char c = USART1->DR;
return c;
}
unsigned char uart2_get() {
while(!(USART2->SR&USART_SR_RXNE));
unsigned char c = USART2->DR;
return c;
}
unsigned char uart3_get() {
while(!(USART3->SR&USART_SR_RXNE));
unsigned char c = USART3->DR;
return c;
}
void send_byte_u1(unsigned char byte) {
if(byte != '\0') {
USART1->DR = byte;
SET_BIT(USART1->CR1, USART_CR1_TXEIE);
}
else {
CLEAR_BIT(USART1->CR1, USART_CR1_TXEIE);
}
}
void send_byte_u2(unsigned char byte) {
if(byte != '\0') {
USART2->DR = byte;
SET_BIT(USART2->CR1, USART_CR1_TXEIE);
}
else {
CLEAR_BIT(USART2->CR1, USART_CR1_TXEIE);
}
}
void send_byte_u3(unsigned char byte) {
if(byte != '\0') {
USART3->DR = byte;
SET_BIT(USART3->CR1, USART_CR1_TXEIE);
}
else {
CLEAR_BIT(USART3->CR1, USART_CR1_TXEIE);
}
}
void uart1_send(unsigned char* s) {
if(!(USART1->SR&USART_SR_TXE));
str = s;
send_byte_u1(*s);
}
void uart2_send(unsigned char* s) {
if(!(USART2->SR&USART_SR_TXE));
str = s;
send_byte_u2(*s);
}
void uart3_send(unsigned char* s) {
if(!(USART3->SR&USART_SR_TXE));
str = s;
send_byte_u3(*s);
}
void USART1_IRQHandler(void) {
send_byte_u1(*(++str));
}
void USART2_IRQHandler(void) {
send_byte_u2(*(++str));
}
void USART3_IRQHandler(void) {
send_byte_u3(*(++str));
}