diff --git a/Writerside/d.tree b/Writerside/d.tree index d5afa29..a84abf0 100644 --- a/Writerside/d.tree +++ b/Writerside/d.tree @@ -11,6 +11,8 @@ + + diff --git a/Writerside/topics/Bookmark.md b/Writerside/topics/Bookmark.md index 54594d7..234d696 100644 --- a/Writerside/topics/Bookmark.md +++ b/Writerside/topics/Bookmark.md @@ -8,4 +8,6 @@ In no particular order, some things I've found interesting or that i simply enjo - [Apollo Guidance Computer Restoration](https://www.youtube.com/playlist?list=PL-_93BVApb59FWrLZfdlisi_x7-Ut_-w7) (YouTube playlist from CuriousMarc) - [Mechanical calculators](https://www.youtube.com/playlist?list=PL-_93BVApb58cdHy3Z2sUWtd6q2LsmO2Z) (YouTube playlist from CuriousMarc again) and, yes, I own a few of them. - [The Surprising Creativity of Digital Evolution: A Collection of Anecdotes from the Evolutionary Computation and Artificial Life Research Communities](https://arxiv.org/abs/1803.03453) -- [Self-Consuming Generative Models Go MAD](https://arxiv.org/abs/2307.01850) \ No newline at end of file +- [Self-Consuming Generative Models Go MAD](https://arxiv.org/abs/2307.01850) +- [Microsoft C Runtime library (CRT) reference](https://learn.microsoft.com/en-us/cpp/c-runtime-library/c-run-time-library-reference?view=msvc-170) +- \ No newline at end of file diff --git a/Writerside/topics/Fastfail-Codes.md b/Writerside/topics/Fastfail-Codes.md new file mode 100644 index 0000000..f8dc139 --- /dev/null +++ b/Writerside/topics/Fastfail-Codes.md @@ -0,0 +1,74 @@ +# Fastfail Codes + +https://www.softwareverify.com/blog/fail-fast-codes/ + +| Definition | Value | Comment | +|------------------------------------------|-------|-------------------------------------------| +| FAST_FAIL_LEGACY_GS_VIOLATION | 0 | Do not use. Legacy value. | +| FAST_FAIL_VTGUARD_CHECK_FAILURE | 1 | | +| FAST_FAIL_STACK_COOKIE_CHECK_FAILURE | 2 | | +| FAST_FAIL_CORRUPT_LIST_ENTRY | 3 | | +| FAST_FAIL_INCORRECT_STACK | 4 | | +| FAST_FAIL_INVALID_ARG | 5 | | +| FAST_FAIL_GS_COOKIE_INIT | 6 | | +| FAST_FAIL_FATAL_APP_EXIT | 7 | | +| FAST_FAIL_RANGE_CHECK_FAILURE | 8 | | +| FAST_FAIL_UNSAFE_REGISTRY_ACCESS | 9 | | +| FAST_FAIL_GUARD_ICALL_CHECK_FAILURE | 10 | | +| FAST_FAIL_GUARD_WRITE_CHECK_FAILURE | 11 | | +| FAST_FAIL_INVALID_FIBER_SWITCH | 12 | | +| FAST_FAIL_INVALID_SET_OF_CONTEXT | 13 | | +| FAST_FAIL_INVALID_REFERENCE_COUNT | 14 | | +| FAST_FAIL_INVALID_JUMP_BUFFER | 18 | | +| FAST_FAIL_MRDATA_MODIFIED | 19 | | +| FAST_FAIL_CERTIFICATION_FAILURE | 20 | | +| FAST_FAIL_INVALID_EXCEPTION_CHAIN | 21 | | +| FAST_FAIL_CRYPTO_LIBRARY | 22 | | +| FAST_FAIL_INVALID_CALL_IN_DLL_CALLOUT | 23 | | +| FAST_FAIL_INVALID_IMAGE_BASE | 24 | | +| FAST_FAIL_DLOAD_PROTECTION_FAILURE | 25 | | +| FAST_FAIL_UNSAFE_EXTENSION_CALL | 26 | | +| FAST_FAIL_DEPRECATED_SERVICE_INVOKED | 27 | | +| FAST_FAIL_INVALID_BUFFER_ACCESS | 28 | | +| FAST_FAIL_INVALID_BALANCED_TREE | 29 | | +| FAST_FAIL_INVALID_NEXT_THREAD | 30 | | +| FAST_FAIL_GUARD_ICALL_CHECK_SUPPRESSED | 31 | Telemetry, nonfatal | +| FAST_FAIL_APCS_DISABLED | 32 | | +| FAST_FAIL_INVALID_IDLE_STATE | 33 | | +| FAST_FAIL_MRDATA_PROTECTION_FAILURE | 34 | | +| FAST_FAIL_UNEXPECTED_HEAP_EXCEPTION | 35 | | +| FAST_FAIL_INVALID_LOCK_STATE | 36 | | +| FAST_FAIL_GUARD_JUMPTABLE | 37 | Compiler uses this value. Do not change. | +| FAST_FAIL_INVALID_LONGJUMP_TARGET | 38 | | +| FAST_FAIL_INVALID_DISPATCH_CONTEXT | 39 | | +| FAST_FAIL_INVALID_THREAD | 40 | | +| FAST_FAIL_INVALID_SYSCALL_NUMBER | 41 | Telemetry, nonfatal | +| FAST_FAIL_INVALID_FILE_OPERATION | 42 | Telemetry, nonfatal | +| FAST_FAIL_LPAC_ACCESS_DENIED | 43 | Telemetry, nonfatal | +| FAST_FAIL_GUARD_SS_FAILURE | 44 | | +| FAST_FAIL_LOADER_CONTINUITY_FAILURE | 45 | Telemetry, nonfatal | +| FAST_FAIL_GUARD_EXPORT_SUPPRESSION_FAILURE | 46 | | +| FAST_FAIL_INVALID_CONTROL_STACK | 47 | | +| FAST_FAIL_SET_CONTEXT_DENIED | 48 | | +| FAST_FAIL_INVALID_IAT | 49 | | +| FAST_FAIL_HEAP_METADATA_CORRUPTION | 50 | | +| FAST_FAIL_PAYLOAD_RESTRICTION_VIOLATION | 51 | | +| FAST_FAIL_LOW_LABEL_ACCESS_DENIED | 52 | Telemetry, nonfatal | +| FAST_FAIL_ENCLAVE_CALL_FAILURE | 53 | | +| FAST_FAIL_UNHANDLED_LSS_EXCEPTON | 54 | | +| FAST_FAIL_ADMINLESS_ACCESS_DENIED | 55 | Telemetry, nonfatal | +| FAST_FAIL_UNEXPECTED_CALL | 56 | | +| FAST_FAIL_CONTROL_INVALID_RETURN_ADDRESS | 57 | | +| FAST_FAIL_UNEXPECTED_HOST_BEHAVIOR | 58 | | +| FAST_FAIL_FLAGS_CORRUPTION | 59 | | +| FAST_FAIL_VEH_CORRUPTION | 60 | | +| FAST_FAIL_ETW_CORRUPTION | 61 | | +| FAST_FAIL_RIO_ABORT | 62 | | +| FAST_FAIL_INVALID_PFN | 63 | | +| FAST_FAIL_GUARD_ICALL_CHECK_FAILURE_XFG | 64 | | +| FAST_FAIL_CAST_GUARD | 65 | Compiler uses this value. Do not change. | +| FAST_FAIL_HOST_VISIBILITY_CHANGE | 66 | | +| FAST_FAIL_KERNEL_CET_SHADOW_STACK_ASSIST | 67 | | +| FAST_FAIL_PATCH_CALLBACK_FAILED | 68 | | +| FAST_FAIL_NTDLL_PATCH_FAILED | 69 | | +| FAST_FAIL_INVALID_FLS_DATA | 70 | | \ No newline at end of file diff --git a/Writerside/topics/IsProcessorFeaturePresent.md b/Writerside/topics/IsProcessorFeaturePresent.md new file mode 100644 index 0000000..16b48a0 --- /dev/null +++ b/Writerside/topics/IsProcessorFeaturePresent.md @@ -0,0 +1,44 @@ +# IsProcessorFeaturePresent + +Just because i always have trouble finding it. + +| Enum | Value | Meaning | +|------------------------|--|-------------------------------------------------------------------| +| PF_ARM_64BIT_LOADSTORE_ATOMIC | 25 | The 64-bit load/store atomic instructions are available. | +| PF_ARM_DIVIDE_INSTRUCTION_AVAILABLE | 24 | The divide instructions are available. | +| PF_ARM_EXTERNAL_CACHE_AVAILABLE | 26 | The external cache is available. | +| PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE | 27 | The floating-point multiply-accumulate instruction is available. | +| PF_ARM_VFP_32_REGISTERS_AVAILABLE | 18 | The VFP/Neon: 32 x 64bit register bank is present. This flag has the same meaning as PF_ARM_VFP_EXTENDED_REGISTERS. | +| PF_3DNOW_INSTRUCTIONS_AVAILABLE| 7| The 3D-Now instruction set is available.| +| PF_CHANNELS_ENABLED| 16| The processor channels are enabled.| +| PF_COMPARE_EXCHANGE_DOUBLE| 2| The atomic compare and exchange operation (cmpxchg) is available.| +| PF_COMPARE_EXCHANGE128| 14| The atomic compare and exchange 128-bit operation (cmpxchg16b) is available. Windows Server 2003 and Windows XP/2000: This feature is not supported.| +| PF_COMPARE64_EXCHANGE128| 15| The atomic compare 64 and exchange 128-bit operation (cmp8xchg16) is available. Windows Server 2003 and Windows XP/2000: This feature is not supported.| +| PF_FASTFAIL_AVAILABLE| 23| _fastfail() is available.| +| PF_FLOATING_POINT_EMULATED| 1| Floating-point operations are emulated using a software emulator. This function returns a nonzero value if floating-point operations are emulated; otherwise, it returns zero.| +| PF_FLOATING_POINT_PRECISION_ERRATA| 0| On a Pentium, a floating-point precision error can occur in rare circumstances.| +| PF_MMX_INSTRUCTIONS_AVAILABLE| 3| The MMX instruction set is available.| +| PF_NX_ENABLED| 12| Data execution prevention is enabled.Windows XP/2000: This feature is not supported until Windows XP with SP2 and Windows Server 2003 with SP1.| +| PF_PAE_ENABLED| 9| The processor is PAE-enabled. For more information, see Physical Address Extension.All x64 processors always return a nonzero value for this feature.| +| PF_RDTSC_INSTRUCTION_AVAILABLE| 8| The RDTSC instruction is available.| +| PF_RDWRFSGSBASE_AVAILABLE| 22| RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE instructions are available.| +| PF_SECOND_LEVEL_ADDRESS_TRANSLATION| 20| Second Level Address Translation is supported by the hardware.| +| PF_SSE3_INSTRUCTIONS_AVAILABLE| 13| The SSE3 instruction set is available. Windows Server 2003 and Windows XP/2000: This feature is not supported.| +| PF_SSSE3_INSTRUCTIONS_AVAILABLE| 36| The SSSE3 instruction set is available.| +| PF_SSE4_1_INSTRUCTIONS_AVAILABLE| 37| The SSE4_1 instruction set is available.| +| PF_SSE4_2_INSTRUCTIONS_AVAILABLE| 38| The SSE4_2 instruction set is available.| +| PF_AVX_INSTRUCTIONS_AVAILABLE| 39| The AVX instruction set is available.| +| PF_AVX2_INSTRUCTIONS_AVAILABLE| 40| The AVX2 instruction set is available.| +| PF_AVX512F_INSTRUCTIONS_AVAILABLE| 41| The AVX512F instruction set is available.| +| PF_VIRT_FIRMWARE_ENABLED| 21| Virtualization is enabled in the firmware and made available by the operating system.| +| PF_XMMI_INSTRUCTIONS_AVAILABLE| 6| The SSE instruction set is available.| +| PF_XMMI64_INSTRUCTIONS_AVAILABLE| 10| The SSE2 instruction set is available.Windows 2000: This feature is not supported.| +| PF_XSAVE_ENABLED| 17| The processor implements the XSAVE and XRSTOR instructions.Windows Server 2008, Windows Vista, Windows Server 2003 and Windows XP/2000: This feature is not supported until Windows 7 and Windows Server 2008 R2.| +| PF_ARM_V8_INSTRUCTIONS_AVAILABLE| 29| This Arm processor implements the Arm v8 instructions set.| +| PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE| 30| This Arm processor implements the Arm v8 extra cryptographic instructions (for example, AES, SHA1 and SHA2).| +| PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE| 31| This Arm processor implements the Arm v8 extra CRC32 instructions.| +| PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE| 34| This Arm processor implements the Arm v8.1 atomic instructions (for example, CAS, SWP).| +| PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE| 43| This Arm processor implements the Arm v8.2 DP instructions (for example, SDOT, UDOT). This feature is optional in Arm v8.2 implementations and mandatory in Arm v8.4 implementations.| +| PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE| 44| This Arm processor implements the Arm v8.3 JSCVT instructions (for example, FJCVTZS).| +| PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE| 45| This Arm processor implements the Arm v8.3 LRCPC instructions (for example, LDAPR). Note that certain Arm v8.2 CPUs may optionally support the LRCPC instructions.| +