From a2d2ffe31f576419e2993bc6a46d3c95c3b53f60 Mon Sep 17 00:00:00 2001 From: HZ1 Date: Sat, 6 Aug 2022 13:54:12 +0800 Subject: [PATCH 01/74] add isp-tuningd resolution setup (#234) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * add isp-tuningd resolution setup Signed-off-by: 黄子懿 * add isp-tuningd resolution setup Signed-off-by: 黄子懿 * fix struct alignment Signed-off-by: 黄子懿 Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> Co-authored-by: Wentao Wu --- package/isp-tuningd/src/isp-tuningd.c | 158 +++++++++++++----- .../src/v4l2_drm_isptool/v4l2_drm_isptool.c | 2 +- 2 files changed, 113 insertions(+), 47 deletions(-) diff --git a/package/isp-tuningd/src/isp-tuningd.c b/package/isp-tuningd/src/isp-tuningd.c index 30f1053..ba435de 100644 --- a/package/isp-tuningd/src/isp-tuningd.c +++ b/package/isp-tuningd/src/isp-tuningd.c @@ -24,6 +24,7 @@ */ #include "uv/unix.h" +#include #include #include #include @@ -65,9 +66,9 @@ #define ISP_TOF_ADDR_END (ISP_TOF_ADDR_START + 0x0400 + 0x0324) #define REGISTER_END_ADDR (0x0324 + 0x0400 + 0x92670000) #define DEFAULT_PORT 9982 -#define PIC_YUV_WIDTH 1088 -#define PIC_YUV_HEIGHT 1920 -#define PIC_YUV_SIZE (PIC_YUV_WIDTH * PIC_YUV_HEIGHT * 3 / 2) + +unsigned pic_yuv_width = 0, pic_yuv_height = 0; +unsigned pic_yuv_size = 0; int page_size = 4096; unsigned offset_in_page = 0; @@ -75,13 +76,14 @@ unsigned map_size = 1048576; void* map_base = MAP_FAILED; EncoderHandle* henc = NULL; EncoderHandle* henc_h264 = NULL; -uint8_t pic_write_buffer_select = 0; -uint8_t pic_write_buffer[2][PIC_YUV_SIZE + 6] = { - {0x99, 0x9a, PIC_YUV_SIZE & 0xff, (PIC_YUV_SIZE >> 8) & 0xff, - (PIC_YUV_SIZE >> 16) & 0xff, (PIC_YUV_SIZE >> 24) & 0xff}, - {0x99, 0x9a, PIC_YUV_SIZE & 0xff, (PIC_YUV_SIZE >> 8) & 0xff, - (PIC_YUV_SIZE >> 16) & 0xff, (PIC_YUV_SIZE >> 24) & 0xff}, +struct __attribute__((__packed__)) command_buffer { + uint8_t head; + uint8_t command; + uint32_t size; + uint8_t buffer[0]; }; +uint8_t pic_write_buffer_select = 0; +struct command_buffer* pic_write_buffer[2]; uint8_t* mem_yuv_logic_addr = MAP_FAILED; unsigned int mem_yuv_map_size = 0; unsigned int mem_yuv_phy_addr = 0; @@ -436,13 +438,12 @@ void exec_cmd(void) { } else if (cmd == CMD_JPEG) { if (henc != NULL) { // encode JPEG - uint8_t *pic_nv12_buffer = - pic_write_buffer[pic_write_buffer_select ^ 1] + 6; - memcpy(mem_yuv_logic_addr, pic_nv12_buffer, PIC_YUV_SIZE); + uint8_t *pic_nv12_buffer = pic_write_buffer[pic_write_buffer_select ^ 1]->buffer; + memcpy(mem_yuv_logic_addr, pic_nv12_buffer, pic_yuv_size); EncInputFrame frame = { - .width = PIC_YUV_WIDTH, - .height = PIC_YUV_HEIGHT, - .stride = (PIC_YUV_WIDTH + 0x1F) & (~0x1F), + .width = pic_yuv_width, + .height = pic_yuv_height, + .stride = (pic_yuv_width + 0x1F) & (~0x1F), .data = (unsigned char *)mem_yuv_phy_addr }; // FIXME: async @@ -457,13 +458,12 @@ void exec_cmd(void) { // encode h264 if (henc_h264 != NULL) { // encode h264 - uint8_t *pic_nv12_buffer = - pic_write_buffer[pic_write_buffer_select ^ 1] + 6; - memcpy(mem_yuv_logic_addr, pic_nv12_buffer, PIC_YUV_SIZE); + uint8_t *pic_nv12_buffer = pic_write_buffer[pic_write_buffer_select ^ 1]->buffer; + memcpy(mem_yuv_logic_addr, pic_nv12_buffer, pic_yuv_size); EncInputFrame frame = { - .width = PIC_YUV_WIDTH, - .height = PIC_YUV_HEIGHT, - .stride = (PIC_YUV_WIDTH + 0x1F) & (~0x1F), + .width = pic_yuv_width, + .height = pic_yuv_height, + .stride = (pic_yuv_width + 0x1F) & (~0x1F), .data = (unsigned char *)mem_yuv_phy_addr }; // FIXME: async @@ -551,6 +551,13 @@ void sock_read(uv_stream_t *client, ssize_t nread, const uv_buf_t *buf) { } } +void sock_report_write_done (uv_write_t *req, int status) { + if (status) { + fprintf(stderr, "Write error %s\n", uv_strerror(status)); + } + free(req); +} + void on_new_connection(uv_stream_t *server, int status) { if (status < 0) { fprintf(stderr, "New connection error %s\n", uv_strerror(status)); @@ -562,6 +569,19 @@ void on_new_connection(uv_stream_t *server, int status) { struct list_node* n = &cw->node; uv_tcp_init(loop, client); if (uv_accept(server, (uv_stream_t*) client) == 0) { + // write message + struct command_buffer report_command = { + .head = 0x99, + .command = 0x91, + .size = 4 + }; + uint16_t report_data[2] = {pic_yuv_width, pic_yuv_height}; + uv_buf_t buf[2] = { + uv_buf_init((char*)&report_command, sizeof(struct command_buffer)), + uv_buf_init((char*)report_data, 4) + }; + uv_write_t* write_req = malloc(sizeof(uv_write_t)); + uv_write(write_req, (uv_stream_t*)client, buf, 2, sock_report_write_done); uv_read_start((uv_stream_t*)client, alloc_buffer, sock_read); // insert to clients list_push_front(clients, n); @@ -578,14 +598,14 @@ void stdin_read(uv_stream_t *stream, ssize_t nread, const uv_buf_t* buf) return; } static uint32_t ptr = 0; - uint8_t* pic_nv12_buffer = pic_write_buffer[pic_write_buffer_select] + 6; - size_t lack = PIC_YUV_SIZE - ptr; + uint8_t* pic_nv12_buffer = pic_write_buffer[pic_write_buffer_select]->buffer; + size_t lack = pic_yuv_size - ptr; if (nread >= lack) { static time_t last_time = 0; if (flag_send_pic && time(NULL) - last_time >= 1) { memcpy(pic_nv12_buffer + ptr, buf->base, lack); // broadcast - broadcast(pic_write_buffer[pic_write_buffer_select], sizeof(pic_write_buffer[0]), 1); + broadcast(pic_write_buffer[pic_write_buffer_select], sizeof(struct command_buffer) + pic_yuv_size, 1); static uint32_t pic_num = 0; printf("received pictures, #%d\r", pic_num++); fflush(stdout); @@ -593,9 +613,9 @@ void stdin_read(uv_stream_t *stream, ssize_t nread, const uv_buf_t* buf) } // reset pic_write_buffer_select ^= 1; - pic_nv12_buffer = pic_write_buffer[pic_write_buffer_select] + 6; - // drop on too much data, align PIC_YUV_SIZE - ptr = (nread - lack) % PIC_YUV_SIZE; + pic_nv12_buffer = pic_write_buffer[pic_write_buffer_select]->buffer; + // drop on too much data, align pic_yuv_size + ptr = (nread - lack) % pic_yuv_size; if (flag_send_pic) { memcpy(pic_nv12_buffer, buf->base + (nread - ptr), ptr); } @@ -612,9 +632,9 @@ void stdin_read(uv_stream_t *stream, ssize_t nread, const uv_buf_t* buf) } void idle_mock_stdin (uv_idle_t* idle) { - char *stack_dirty = malloc(PIC_YUV_SIZE); - uv_buf_t buf = {.base = stack_dirty, .len = PIC_YUV_SIZE}; - stdin_read(NULL, PIC_YUV_SIZE, &buf); + char *stack_dirty = malloc(pic_yuv_size); + uv_buf_t buf = {.base = stack_dirty, .len = pic_yuv_size}; + stdin_read(NULL, pic_yuv_size, &buf); } int share_mem_fd = -1, mem_fd = -1; @@ -643,6 +663,52 @@ void before_exit(int sig) { } int main(int argc, char *argv[]) { + uint8_t flag_enable_codec = 0; + const char shortopts[] = "jw:h:"; + int c = 0; + while (c != -1) { + c = getopt(argc, argv, shortopts); + switch (c) { + case -1: break; + case 'j': { + flag_enable_codec = 1; + break; + } + case 'w': { + pic_yuv_width = atol(optarg); + break; + } + case 'h': { + pic_yuv_height = atol(optarg); + break; + } + case '?': + default: { + fprintf(stderr, + "Usage: %s [options]\n\n" + "-w \tImage width\n" + "-h \tImage height\n" + "-j\tEnable hardware codec\n", + argv[0]); + return -1; + } + } + } + // FIXME: alignment + pic_yuv_size = pic_yuv_width * pic_yuv_height * 3 / 2; + if (pic_yuv_size > 0) { + pic_write_buffer[0] = malloc(sizeof(struct command_buffer) + pic_yuv_size); + pic_write_buffer[1] = malloc(sizeof(struct command_buffer) + pic_yuv_size); + } + pic_write_buffer[0]->head = 0x99; + pic_write_buffer[0]->command = 0x9A; + pic_write_buffer[0]->size = pic_yuv_size; + pic_write_buffer[1]->head = 0x99; + pic_write_buffer[1]->command = 0x9A; + pic_write_buffer[1]->size = pic_yuv_size; + + fprintf(stderr, "width: %u, height: %u, frame size: %u\n", pic_yuv_width, pic_yuv_height, pic_yuv_size); + // uv loop = uv_default_loop(); signal(SIGINT, before_exit); signal(SIGTERM, before_exit); @@ -663,23 +729,23 @@ int main(int argc, char *argv[]) { assert(mem_fd >= 0); map_base = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_SHARED, mem_fd, REGISTER_BASE_ADDR & ~(off_t)(page_size - 1)); assert(map_base != MAP_FAILED); - // for hd encoder - share_mem_fd = open("/dev/k510-share-memory", O_RDWR | O_SYNC); - assert(share_mem_fd >= 0); - assert(alloc_memory(share_mem_fd, PIC_YUV_SIZE, &mem_yuv_phy_addr, - &mem_yuv_map_size) == 0); - mem_yuv_logic_addr = mmap(NULL, mem_yuv_map_size, - PROT_READ | PROT_WRITE, MAP_SHARED, - mem_fd, (uint64_t)mem_yuv_phy_addr | 0x100000000); - assert(mem_yuv_logic_addr != MAP_FAILED); - fprintf(stderr, "map share mem phy addr: 0x%08X, size: %u\n", mem_yuv_phy_addr, mem_yuv_map_size); - - if (argc > 1 && strcmp(argv[1], "-j") == 0) { + + if (flag_enable_codec && pic_yuv_size > 0) { + // for hd encoder + share_mem_fd = open("/dev/k510-share-memory", O_RDWR | O_SYNC); + assert(share_mem_fd >= 0); + assert(alloc_memory(share_mem_fd, pic_yuv_size, &mem_yuv_phy_addr, + &mem_yuv_map_size) == 0); + mem_yuv_logic_addr = mmap(NULL, mem_yuv_map_size, + PROT_READ | PROT_WRITE, MAP_SHARED, + mem_fd, (uint64_t)mem_yuv_phy_addr | 0x100000000); + assert(mem_yuv_logic_addr != MAP_FAILED); + fprintf(stderr, "map share mem phy addr: 0x%08X, size: %u\n", mem_yuv_phy_addr, mem_yuv_map_size); // open encoder EncSettings encoder_settings = { .channel = 0, - .width = PIC_YUV_WIDTH, - .height = PIC_YUV_HEIGHT, + .width = pic_yuv_width, + .height = pic_yuv_height, .FrameRate = 30, .BitRate = 4000000, .MaxBitRate = 4000000, @@ -700,8 +766,8 @@ int main(int argc, char *argv[]) { henc = VideoEncoder_Create(&encoder_settings); EncSettings encoder_settings_h264 = { .channel = 1, - .width = PIC_YUV_WIDTH, - .height = PIC_YUV_HEIGHT, + .width = pic_yuv_width, + .height = pic_yuv_height, .FrameRate = 30, .BitRate = 4000000, .MaxBitRate = 4000000, diff --git a/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c b/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c index a23aa3a..1fe1f80 100644 --- a/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c +++ b/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c @@ -1009,7 +1009,7 @@ static pid_t spawn_isp_tuningd (int* pipe_fd_ptr) { // dup to stdin dup2(pipe_fd[0], 0); // exec isp-tuningd - if(execl("./isp-tuningd", "./isp-tuningd", "-j", NULL) < 0) { + if(execl("./isp-tuningd", "./isp-tuningd", "-j", "-w", "1088", "-h", "1920", NULL) < 0) { exit(-1); } return 0; From 6acf5b7cf9a4dd3687c899ccef6b6a15a40a2628 Mon Sep 17 00:00:00 2001 From: xiangbingj <1137486478@qq.com> Date: Sat, 6 Aug 2022 16:22:22 +0800 Subject: [PATCH 02/74] Delete alsa demo.AI demo adds some useful print information for automated testing. (#268) * display ds2 optional * Delete alsa demo Co-authored-by: jiangxiangbing Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- Config.in | 1 - configs/k510_crb_lp3_v0_1_defconfig | 1 - configs/k510_crb_lp3_v1_2_defconfig | 3 +- configs/k510_evb_lp3_v1_1_defconfig | 1 - package/ai/code/object_detect_demo/main.cc | 4 + package/ai/code/retinaface_mb_320/main.cc | 7 +- package/alsa_demo/Config.in | 6 - package/alsa_demo/alsa_demo.mk | 21 -- package/alsa_demo/src/Makefile | 25 -- package/alsa_demo/src/alsa_demo.c | 255 --------------------- 10 files changed, 11 insertions(+), 313 deletions(-) delete mode 100644 package/alsa_demo/Config.in delete mode 100644 package/alsa_demo/alsa_demo.mk delete mode 100644 package/alsa_demo/src/Makefile delete mode 100644 package/alsa_demo/src/alsa_demo.c diff --git a/Config.in b/Config.in index 078bd1e..e9b6551 100644 --- a/Config.in +++ b/Config.in @@ -13,7 +13,6 @@ source "$BR2_EXTERNAL_K510_PATH/package/dsp_app_new/Config.in" source "$BR2_EXTERNAL_K510_PATH/package/k510_evb_test/Config.in" source "$BR2_EXTERNAL_K510_PATH/package/dsp_log/Config.in" source "$BR2_EXTERNAL_K510_PATH/package/venc_lib/Config.in" -source "$BR2_EXTERNAL_K510_PATH/package/alsa_demo/Config.in" source "$BR2_EXTERNAL_K510_PATH/package/ffmpeg_canaan/Config.in" source "$BR2_EXTERNAL_K510_PATH/package/audio3a_lib/Config.in" source "$BR2_EXTERNAL_K510_PATH/package/mediactl_lib/Config.in" diff --git a/configs/k510_crb_lp3_v0_1_defconfig b/configs/k510_crb_lp3_v0_1_defconfig index af41fe3..e76ffbe 100644 --- a/configs/k510_crb_lp3_v0_1_defconfig +++ b/configs/k510_crb_lp3_v0_1_defconfig @@ -107,7 +107,6 @@ BR2_TARGET_K510_EVB_TEST_MAILBOX_FIRMWARE=y BR2_TARGET_K510_EVB_TEST_SIMD_UMUL8_FIRMWARE=y BR2_PACKAGE_DSP_LOG=y BR2_PACKAGE_VENC_LIB=y -BR2_PACKAGE_ALSA_DEMO=y BR2_PACKAGE_LIBRTMP=y BR2_PACKAGE_OPENSSL=y BR2_PACKAGE_LIBOPENSSL=y diff --git a/configs/k510_crb_lp3_v1_2_defconfig b/configs/k510_crb_lp3_v1_2_defconfig index dfa654b..9de1b8d 100644 --- a/configs/k510_crb_lp3_v1_2_defconfig +++ b/configs/k510_crb_lp3_v1_2_defconfig @@ -107,7 +107,6 @@ BR2_TARGET_K510_EVB_TEST_MAILBOX_FIRMWARE=y BR2_TARGET_K510_EVB_TEST_SIMD_UMUL8_FIRMWARE=y BR2_PACKAGE_DSP_LOG=y BR2_PACKAGE_VENC_LIB=y -BR2_PACKAGE_ALSA_DEMO=y BR2_PACKAGE_FFMPEG_CANAAN=y BR2_PACKAGE_AUDIO3A_LIB=y BR2_PACKAGE_MEDIACTL_LIB=y @@ -131,4 +130,4 @@ BR2_PACKAGE_WRITE_READ_FILE=y BR2_PACKAGE_WIFI=y BR2_PACKAGE_AWS_IOT_TEST=y BR2_PACKAGE_GPIO_KEYS=y -BR2_PACKAGE_RAPIDJSON=y \ No newline at end of file +BR2_PACKAGE_RAPIDJSON=y diff --git a/configs/k510_evb_lp3_v1_1_defconfig b/configs/k510_evb_lp3_v1_1_defconfig index 66d1837..e41be59 100644 --- a/configs/k510_evb_lp3_v1_1_defconfig +++ b/configs/k510_evb_lp3_v1_1_defconfig @@ -105,7 +105,6 @@ BR2_PACKAGE_K510_EVB_TEST=y BR2_TARGET_K510_EVB_TEST_FFT_FIRMWARE=y BR2_PACKAGE_DSP_LOG=y BR2_PACKAGE_VENC_LIB=y -BR2_PACKAGE_ALSA_DEMO=y BR2_PACKAGE_FFMPEG_CANAAN=y BR2_PACKAGE_AUDIO3A_LIB=y BR2_PACKAGE_MEDIACTL_LIB=y diff --git a/package/ai/code/object_detect_demo/main.cc b/package/ai/code/object_detect_demo/main.cc index 96f9995..08cd407 100644 --- a/package/ai/code/object_detect_demo/main.cc +++ b/package/ai/code/object_detect_demo/main.cc @@ -145,7 +145,9 @@ void ai_worker() while(quit.load()) { bool ret = false; +#if PROFILING ScopedTiming st("total"); +#endif mtx.lock(); ret = capture.read(rgb24_img_for_ai); mtx.unlock(); @@ -278,7 +280,9 @@ void ai_worker() origin.y = (int)(r.y1* screen_height / gnne_valid_height - 10); std::string text = od.labels[r.label] + ":" + std::to_string(round(r.score * 100) / 100.0); cv::putText(img_argb, text, origin, cv::FONT_HERSHEY_COMPLEX, 1.5, cv::Scalar(0, 0, 255, 255), 1, 8, 0); + std::cout << obj_cnt << ":" << text<< ":" << frame.line_x_start <<":"<< frame.line_y_start <<":"<< frame.line_x_end <<":"<< frame.line_y_end << std::endl; } + obj_cnt += 1; } } diff --git a/package/ai/code/retinaface_mb_320/main.cc b/package/ai/code/retinaface_mb_320/main.cc index ac23d19..544b3ea 100644 --- a/package/ai/code/retinaface_mb_320/main.cc +++ b/package/ai/code/retinaface_mb_320/main.cc @@ -142,7 +142,9 @@ void ai_worker() while(quit.load()) { bool ret = false; +#if PROFILING ScopedTiming st("total"); +#endif mtx.lock(); ret = capture.read(rgb24_img_for_ai); mtx.unlock(); @@ -252,6 +254,7 @@ void ai_worker() frame.line_x_end = frame.line_x_end > screen_width ? screen_width : frame.line_x_end; frame.line_y_end = frame.line_y_end > screen_height ? screen_height : frame.line_y_end; draw_frame(&frame); + std::cout << obj_cnt << ":" << frame.line_x_start <<":"<< frame.line_y_start <<":"<< frame.line_x_end <<":"<< frame.line_y_end << std::endl; } obj_cnt += 1; } @@ -263,7 +266,7 @@ void ai_worker() draw_frame(&frame); } } - printf("obj_cnt = %d \n", obj_cnt); + { #if PROFILING ScopedTiming st("draw point"); @@ -280,8 +283,10 @@ void ai_worker() cv::circle(img_argb, cv::Point(x0, y0), 4, cv::Scalar(0, 0, 255, 255), -1); point[index][obj_point[index]][ll] = cv::Point(x0, y0); + std::cout << ":" << x0 <<","<< y0; } } + std::cout << std::endl; obj_point[index] += 1; } } diff --git a/package/alsa_demo/Config.in b/package/alsa_demo/Config.in deleted file mode 100644 index 31fa54b..0000000 --- a/package/alsa_demo/Config.in +++ /dev/null @@ -1,6 +0,0 @@ - -config BR2_PACKAGE_ALSA_DEMO - bool "alsa_demo" - depends on BR2_riscv - help - k510 ALSA for demo diff --git a/package/alsa_demo/alsa_demo.mk b/package/alsa_demo/alsa_demo.mk deleted file mode 100644 index ffd7e9d..0000000 --- a/package/alsa_demo/alsa_demo.mk +++ /dev/null @@ -1,21 +0,0 @@ -################################################################################ -# -# alsa_demo -# -################################################################################ - -ALSA_DEMO_SITE = $(BR2_EXTERNAL_K510_PATH)/package/alsa_demo/src -ALSA_DEMO_SITE_METHOD = local -ALSA_DEMO_INSTALL_STAGING = YES - -ALSA_DEMO_DEPENDENCIES += alsa-lib - -define ALSA_DEMO_BUILD_CMDS - $(TARGET_MAKE_ENV) $(MAKE) -C $(@D) -endef - -define ALSA_DEMO_INSTALL_TARGET_CMDS - $(INSTALL) -D -m 0755 $(@D)/alsa_demo $(TARGET_DIR)/app/alsa_demo/alsa_demo -endef - -$(eval $(generic-package)) diff --git a/package/alsa_demo/src/Makefile b/package/alsa_demo/src/Makefile deleted file mode 100644 index f16fc6a..0000000 --- a/package/alsa_demo/src/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -CROSS_COMPILE := riscv64-linux- - -CC := $(CROSS_COMPILE)gcc -C++ := $(CROSS_COMPILE)g++ -OBJDUMP := $(CROSS_COMPILE)objdump -OBJCOPY := $(CROSS_COMPILE)objcopy -AR := $(CROSS_COMPILE)ar -AS := $(CROSS_COMPILE)as -LD := $(CROSS_COMPILE)gcc - -CFLAGS = \ - -fomit-frame-pointer -fno-strict-aliasing -fno-builtin \ - -ffunction-sections -fdata-sections \ - -DCFG_MAKEFILE -DTARGET_BOARD_TYPE_def=\"$(BR2_TARGET_BOARD_TYPE)\" - -OBJ ?= alsa_demo - -$(OBJ): alsa_demo.c - $(C++) $(CFLAGS) $^ -L ./ -Wl,-Bdynamic -lasound -g -o $@ - -clean: - rm -f *.o - rm -f *.d - rm -f $(OBJ) - diff --git a/package/alsa_demo/src/alsa_demo.c b/package/alsa_demo/src/alsa_demo.c deleted file mode 100644 index bfacfd5..0000000 --- a/package/alsa_demo/src/alsa_demo.c +++ /dev/null @@ -1,255 +0,0 @@ -/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/*! - ***************************************************************************** - * \file alsa_demo.c - * \author Jiangxb - * \version 1.0 - * \date 2021/11/03 - * \brief 基于alsalib的测试程序，实现录音播放功能, - * 捕获的音频数据为原始的数据，即没有任何头信息的。可以Autacity软件打开分析 - * 文件->导入->原始数据 - * - * change history: - * | | | - *---------------------------------------------------------------------------- - * 2021/11/03 | 1.0 | Jiangxb | creat file - *---------------------------------------------------------------------------- - * - ***************************************************************************** - */ - -#include -#include -#include -#include - -#define TEST_FORMAT SND_PCM_FORMAT_S16_LE //pcm.h:SND_PCM_FORMAT_U32_LE -#define TEST_CHANNEL_SET 2 //K510只有I2S接口，支持2声道，如果需要单声道，可以从用户层对双声道做分离，或复制单声道为双声道。 -#define TEST_RATE_SET 44100 //音频采样率,常用的采样频率: 44100Hz 、16000HZ、8000HZ、48000HZ、22050HZ -#define TEST_DEV "hw:0" //K510默认只有一个声卡设备，为0设备 -#define TEST_FILE "capture.pcm" - -FILE *pcm_data_file=NULL; -int run_flag=0; - -void exit_sighandler(int sig) -{ - run_flag=1; -} - -snd_pcm_t *open_sound_dev(snd_pcm_stream_t type) -{ - int err; - snd_pcm_t *handle; - snd_pcm_hw_params_t *hw_params; - unsigned int rate = TEST_RATE_SET; - - if ((err = snd_pcm_open (&handle, TEST_DEV, type, 0)) < 0) { - return NULL; - } - - if ((err = snd_pcm_hw_params_malloc (&hw_params)) < 0) { - fprintf (stderr, "cannot allocate hardware parameter structure (%s)\n", - snd_strerror (err)); - return NULL; - } - - if ((err = snd_pcm_hw_params_any (handle, hw_params)) < 0) { - fprintf (stderr, "cannot initialize hardware parameter structure (%s)\n", - snd_strerror (err)); - return NULL; - } - - if ((err = snd_pcm_hw_params_set_access (handle, hw_params, SND_PCM_ACCESS_RW_INTERLEAVED)) < 0) { - fprintf (stderr, "cannot set access type (%s)\n", - snd_strerror (err)); - return NULL; - } - - if ((err = snd_pcm_hw_params_set_format (handle, hw_params, TEST_FORMAT)) < 0) { - fprintf (stderr, "cannot set sample format (%s)\n", - snd_strerror (err)); - return NULL; - } - - if ((err = snd_pcm_hw_params_set_rate_near (handle, hw_params, &rate, 0)) < 0) { - fprintf (stderr, "cannot set sample rate (%s)\n", - snd_strerror (err)); - return NULL; - } - - if ((err = snd_pcm_hw_params_set_channels (handle, hw_params, TEST_CHANNEL_SET)) < 0) { - fprintf (stderr, "cannot set channel count (%s)\n", - snd_strerror (err)); - return NULL; - } - - if ((err = snd_pcm_hw_params (handle, hw_params)) < 0) { - fprintf (stderr, "cannot set parameters (%s)\n", - snd_strerror (err)); - return NULL; - } - - snd_pcm_hw_params_free (hw_params); - - return handle; -} - -void close_sound_dev(snd_pcm_t *handle) -{ - snd_pcm_close (handle); -} - -snd_pcm_t *open_playback(void) -{ - return open_sound_dev(SND_PCM_STREAM_PLAYBACK); -} - -snd_pcm_t *open_capture(void) -{ - return open_sound_dev(SND_PCM_STREAM_CAPTURE); -} - -int main(int argc, char *argv[]) -{ - int i; - int err; - char *buffer; - int buffer_frames = TEST_RATE_SET;//buffer大小为采集1s钟的数据量 - unsigned int rate = TEST_RATE_SET; - snd_pcm_t *capture_handle; - snd_pcm_t *playback_handle; - snd_pcm_hw_params_t *hw_params; - - if(argc!=2) - { - printf("test pcm capture:./alsa_demo c \n"); - printf("test pcm playback:./alsa_demo p \n"); - exit(1); - } - signal(2,exit_sighandler); - int frame_byte=snd_pcm_format_width(TEST_FORMAT)/8; - - buffer=(char *)malloc(buffer_frames*frame_byte*TEST_CHANNEL_SET); - - if(!strncmp(argv[1], "c", 1)) - { - if((pcm_data_file = fopen(TEST_FILE, "wb")) == NULL) - { - printf("open %s error.\n", TEST_FILE); - exit(1); - } - - capture_handle = open_capture(); - if (!capture_handle) - { - fprintf (stderr, "cannot open for capture\n"); - return -1; - } - - if ((err = snd_pcm_prepare (capture_handle)) < 0) { - fprintf (stderr, "cannot prepare audio interface for use (%s)\n", - snd_strerror (err)); - return -1; - } - - printf("capture start...\n"); - int actual; - while(1) - { - if((err=snd_pcm_readi(capture_handle,buffer,buffer_frames))!=buffer_frames) - { - printf("pcm readi(%s)\n",snd_strerror(err)); - exit(1); - } - - fwrite(buffer,(buffer_frames*TEST_CHANNEL_SET), frame_byte, pcm_data_file); - if(run_flag) - { - printf("capture stop.\n"); - break; - } - } - snd_pcm_drain(capture_handle); - snd_pcm_close(capture_handle); - fclose(pcm_data_file); - } - else if(!strncmp(argv[1], "p", 1)) - { - run_flag = 0; - if((pcm_data_file = fopen(TEST_FILE, "rb")) == NULL) - { - printf("open %s error.\n", TEST_FILE); - exit(1); - } - - playback_handle = open_playback(); - if (!playback_handle) - { - fprintf (stderr, "cannot open for playback\n"); - return -1; - } - - if ((err = snd_pcm_prepare (playback_handle)) < 0) { - fprintf (stderr, "cannot prepare audio interface for use (%s)\n", - snd_strerror (err)); - return -1; - } - - printf("playback start...\n"); - int read_cnt; - while(1) - { - read_cnt=fread(buffer,1,frame_byte*(buffer_frames*TEST_CHANNEL_SET), pcm_data_file); - if(read_cnt<=0) break; - - if((err=snd_pcm_writei(playback_handle,buffer,buffer_frames))!=buffer_frames) - { - printf("pcm writei(%s)\n",snd_strerror(err)); - exit(1); - } - if(run_flag) - { - break; - } - } - printf("playback stop.\n"); - - snd_pcm_drain(playback_handle); - snd_pcm_close(playback_handle); - - fclose(pcm_data_file); - free(buffer); - } - else - { - printf("test pcm capture:./alsa_demo c \n"); - printf("test pcm playback:./alsa_demo p \n"); - } - return 0; -} - \ No newline at end of file From f929abd18f4565cf1f427987ae3d6e3fab3e1df7 Mon Sep 17 00:00:00 2001 From: canaancuiyan <103239907+canaancuiyan@users.noreply.github.com> Date: Mon, 8 Aug 2022 09:56:42 +0800 Subject: [PATCH 03/74] fix ffmpeg options (#270) Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- .../ffmpeg_canaan/0032-buildroot-ffmpeg.patch | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 package/ffmpeg_canaan/0032-buildroot-ffmpeg.patch diff --git a/package/ffmpeg_canaan/0032-buildroot-ffmpeg.patch b/package/ffmpeg_canaan/0032-buildroot-ffmpeg.patch new file mode 100644 index 0000000..3b79fe1 --- /dev/null +++ b/package/ffmpeg_canaan/0032-buildroot-ffmpeg.patch @@ -0,0 +1,64 @@ +Index: b/libavcodec/libk510_h264.c +=================================================================== +--- a/libavcodec/libk510_h264.c ++++ b/libavcodec/libk510_h264.c +@@ -177,9 +177,9 @@ static av_cold int k510_h264_encode_init + Cfg.MaxQP = 51;//from SliceQP to 51 + Cfg.roiCtrlMode = ROI_QP_TABLE_NONE; + Cfg.encDblkCfg.disable_deblocking_filter_idc = 0; +- Cfg.encDblkCfg.slice_beta_offset_div2 = 1; +- Cfg.encDblkCfg.slice_alpha_c0_offset_div2 = 1; +- Cfg.entropyMode = ENTROPY_MODE_CAVLC; ++ Cfg.encDblkCfg.slice_beta_offset_div2 = 1; ++ Cfg.encDblkCfg.slice_alpha_c0_offset_div2 = 1; ++ Cfg.entropyMode = ENTROPY_MODE_CAVLC; + Cfg.sliceSplitCfg.bSplitEnable = false; + + printf("Encoder Settings:\n"); +@@ -421,10 +421,10 @@ static const AVOption options[] = + { "main", "", 0, AV_OPT_TYPE_CONST, { .i64 = AVC_MAIN }, 0, 0, FLAGS, "profile_flags" }, + { "high", "", 0, AV_OPT_TYPE_CONST, { .i64 = AVC_HIGH }, 0, 0, FLAGS, "profile_flags" }, + { "level", "Specify level", OFFSET(level), AV_OPT_TYPE_INT, {.i64 = 42}, 10, 42, FLAGS, "level_flags"}, +- { "ar", "Set aspect ratio", OFFSET(ar), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_16_9, FLAGS, "profile_flags"}, +- { "auto", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_AUTO }, 0, 0, FLAGS, "profile_flags" }, +- { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "profile_flags" }, +- { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "profile_flags" }, ++ { "ar", "Set aspect ratio", OFFSET(ar), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_16_9, FLAGS, "ar_flags"}, ++ { "auto", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_AUTO }, 0, 0, FLAGS, "ar_flags" }, ++ { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "ar_flags" }, ++ { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "ar_flags" }, + { "framesToEncode", "set the libk510_h264 framesToEncode", OFFSET(framesToEncode), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, INT_MAX, FLAGS }, + {NULL} + }; +Index: b/libavcodec/libk510_jpeg.c +=================================================================== +--- a/libavcodec/libk510_jpeg.c ++++ b/libavcodec/libk510_jpeg.c +@@ -141,9 +141,9 @@ static av_cold int k510_jpeg_encode_init + Cfg.MaxQP = 51;//from SliceQP to 51 + Cfg.roiCtrlMode = ROI_QP_TABLE_NONE; + Cfg.encDblkCfg.disable_deblocking_filter_idc = 0; +- Cfg.encDblkCfg.slice_beta_offset_div2 = 1; +- Cfg.encDblkCfg.slice_alpha_c0_offset_div2 = 1; +- Cfg.entropyMode = ENTROPY_MODE_CAVLC; ++ Cfg.encDblkCfg.slice_beta_offset_div2 = 1; ++ Cfg.encDblkCfg.slice_alpha_c0_offset_div2 = 1; ++ Cfg.entropyMode = ENTROPY_MODE_CAVLC; + Cfg.sliceSplitCfg.bSplitEnable = false; + + printf("Encoder Settings:\n"); +@@ -312,10 +312,10 @@ static const AVOption options[] = + { "b", "Set video bitrate", OFFSET(bit_rate), AV_OPT_TYPE_INT, {.i64 = 4000000}, 0, 100000000, FLAGS }, + { "ch", "Set encode channel ", OFFSET(channel), AV_OPT_TYPE_INT, {.i64 = 0}, 0, (VENC_MAX_CHANNELS-1), FLAGS }, + { "maxrate", "Maximum bitrate. (0=ignore)", OFFSET(maxrate), AV_OPT_TYPE_INT, {.i64 = 4000000}, 0, 100000000, FLAGS }, +- { "ar", "Set aspect ratio", OFFSET(ar), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_16_9, FLAGS, "profile_flags"}, +- { "auto", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_AUTO }, 0, 0, FLAGS, "profile_flags" }, +- { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "profile_flags" }, +- { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "profile_flags" }, ++ { "ar", "Set aspect ratio", OFFSET(ar), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_16_9, FLAGS, "ar_flags"}, ++ { "auto", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_AUTO }, 0, 0, FLAGS, "ar_flags" }, ++ { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "ar_flags" }, ++ { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "ar_flags" }, + {NULL} + }; + From e3b6ec17d42ffa79eb8f8dd810988ff4297b30ee Mon Sep 17 00:00:00 2001 From: HZ1 Date: Mon, 8 Aug 2022 14:45:53 +0800 Subject: [PATCH 04/74] fix #272, v4l2_drm add -e options to switch AE (#273) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * fix #272, v4l2_drm add -e options to switch AE Signed-off-by: 黄子懿 * fix compile error Signed-off-by: 黄子懿 Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- package/mediactl_lib/src/media_ctl.c | 230 +++--------------- package/mediactl_lib/src/media_ctl.h | 1 + package/mediactl_lib/src/v4l2_drm/Makefile | 2 +- package/mediactl_lib/src/v4l2_drm/media_ctl.h | 87 ------- package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc | 8 +- .../src/v4l2_drm_isptool/Makefile | 24 +- 6 files changed, 57 insertions(+), 295 deletions(-) delete mode 100644 package/mediactl_lib/src/v4l2_drm/media_ctl.h diff --git a/package/mediactl_lib/src/media_ctl.c b/package/mediactl_lib/src/media_ctl.c index c71ce8b..0cd0b9d 100644 --- a/package/mediactl_lib/src/media_ctl.c +++ b/package/mediactl_lib/src/media_ctl.c @@ -1121,210 +1121,60 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) } #endif -/** - * @brief - * - */ -#define F2K_AE_DEVICE "/dev/f2k-ae" - -void *run_f2k_ae_video(void *info) -{ - int fd ; - int i = 0; - fd_set fds; - struct timeval tv; - int r; - int ret; +static volatile uint8_t flag_ae_enable = 3; - printf("run_f2k_ae_video ------------------- start \n"); - fd = open(F2K_AE_DEVICE, O_RDWR); - if (fd < 0) { - printf("open %s error!\r\n", F2K_AE_DEVICE); - return 1; +void mediactl_disable_ae(enum isp_pipeline_e pipeline) { + if (pipeline == ISP_F2K_PIPELINE) { + flag_ae_enable &= ~1U; + } else if (pipeline == ISP_R2K_PIPELINE) { + flag_ae_enable &= ~2U; } - - - FD_ZERO(&fds); - FD_SET(fd, &fds); - while (1) { - /* Timeout. */ - tv.tv_sec = 5; - tv.tv_usec = 0; - - r = select(fd + 1, &fds, NULL, NULL, &tv); - if (-1 == r) { - if (EINTR == errno) - continue; - //errno_exit("select"); - //done = true; - printf("error: ae select failed with %d\n",errno); - ret = -1; - break; - } - - if (0 == r) { - //done = true; - printf("%s:ae select timeout\n",__func__); - //exit(EXIT_FAILURE); - ret = -1; - break; - } - - //mediactl_set_ae(); -#if 0 - if(Sensor1_Sync == FALSE) - { - ret = mediactl_set_ae_single(ISP_F2K_PIPELINE); - } - else - { - ret = mediactl_set_ae_sync(ISP_F2K_PIPELINE); - ret = mediactl_set_awb_sync(ISP_F2K_PIPELINE); - } -#else - -#if 0 - if(i == 0) - { - usleep(3950); - mediactl_all_set_ae(ISP_F2K_PIPELINE); - } - - i ++; - if(i == 2) - { - i = 0; - } -#else - // char tmp; - // read(fd, &tmp, 1); - //usleep(3900); - mediactl_all_set_ae(ISP_F2K_PIPELINE); -#endif - -#endif - - /* EAGAIN - continue select loop. */ - } - - //printf("%s: camera %d fd(%d) mainloop end ret(%d)!\n", __func__,camera_seq,fd,ret); - return ret; } +/** + * @brief + * + */ +#define F2K_AE_DEVICE "/dev/f2k-ae" #define R2K_AE_DEVICE "/dev/r2k-ae" -void *run_r2k_ae_video(void *info) -{ - int fd ; - - fd_set fds; - struct timeval tv; - int r; - int ret; - int i = 0; - - printf("run_r2k_ae_video ------------------- start \n"); - - fd = open(R2K_AE_DEVICE, O_RDWR); - if (fd < 0) { - printf("open %s error!\r\n", R2K_AE_DEVICE); - return 1; - } - - - FD_ZERO(&fds); - FD_SET(fd, &fds); - while (1) { - /* Timeout. */ - tv.tv_sec = 5; - tv.tv_usec = 0; - - r = select(fd + 1, &fds, NULL, NULL, &tv); - if (-1 == r) { - if (EINTR == errno) - continue; - //errno_exit("select"); - //done = true; - printf("error: ae select failed with %d\n",errno); - ret = -1; - break; - } - - if (0 == r) { - //done = true; - printf("%s:ae select timeout\n",__func__); - //exit(EXIT_FAILURE); - ret = -1; - break; - } - - //mediactl_set_ae(); -#if 0 - if(Sensor1_Sync == FALSE) - { - ret = mediactl_set_ae_single(ISP_R2K_PIPELINE); - } - else - { - ret = mediactl_set_ae_sync(ISP_F2K_PIPELINE); - ret = mediactl_set_awb_sync(ISP_F2K_PIPELINE); - } -#else - -#if 0 - if(i == 0) - { - usleep(3950); - mediactl_all_set_ae(ISP_R2K_PIPELINE); - } - - i ++; - if(i == 2) - { - i = 0; - } -#else - //usleep(3900); - mediactl_all_set_ae(ISP_R2K_PIPELINE); - -#endif - -#endif - /* EAGAIN - continue select loop. */ - } - //printf("%s: camera %d fd(%d) mainloop end ret(%d)!\n", __func__,camera_seq,fd,ret); - return ret; -} - - void run_all_ae_video(void *info) { - int fd[2]; + if (flag_ae_enable == 0) { + return; + } + int fd[2] = {-1, -1}; int i = 0; fd_set fds; + FD_ZERO(&fds); struct timeval tv; int r; - printf("run_all_ae_video ------------------- start \n"); + printf("run_all_ae_video ------------------- start %d \n", flag_ae_enable); - fd[0] = open(F2K_AE_DEVICE, O_RDWR); - if (fd[0] < 0) { - printf("open %s error!\r\n", F2K_AE_DEVICE); - return; + if ((flag_ae_enable & 1) && v4l_isp.isp_pipeline[ISP_F2K].pipeline_en) { + fd[0] = open(F2K_AE_DEVICE, O_RDWR); + FD_SET(fd[0], &fds); + if (fd[0] < 0) { + printf("open %s error!\r\n", F2K_AE_DEVICE); + return; + } + fprintf(stderr, "enable F2K AE\n"); } - fd[1] = open(R2K_AE_DEVICE, O_RDWR); - if (fd[1] < 0) { - printf("open %s error!\r\n", F2K_AE_DEVICE); - return; + if ((flag_ae_enable & 2) && v4l_isp.isp_pipeline[ISP_R2K].pipeline_en) { + fd[1] = open(R2K_AE_DEVICE, O_RDWR); + FD_SET(fd[1], &fds); + if (fd[1] < 0) { + printf("open %s error!\r\n", F2K_AE_DEVICE); + return; + } + fprintf(stderr, "enable R2K AE\n"); } - FD_ZERO(&fds); - FD_SET(fd[0], &fds); - FD_SET(fd[1], &fds); int max_fd = (fd[0] > fd[1] ? fd[0] : fd[1]) + 1; while (1) { /* @@ -1345,14 +1195,14 @@ void run_all_ae_video(void *info) fd_set rfds = fds; r = select(max_fd, &rfds, NULL, NULL, &tv); if (r > 0) { - if (FD_ISSET(fd[0], &rfds)) { + if (v4l_isp.isp_pipeline[ISP_F2K].pipeline_en && FD_ISSET(fd[0], &rfds)) { struct timeval tv1, tv2; // gettimeofday(&tv1, NULL); mediactl_all_set_ae(ISP_F2K_PIPELINE); // gettimeofday(&tv2, NULL); // fprintf(stderr, "cam %d AE %ldus\n", 0, (tv2.tv_sec - tv1.tv_sec) * 1000000 + (tv2.tv_usec - tv1.tv_usec)); } - if (FD_ISSET(fd[1], &rfds)) { + if (v4l_isp.isp_pipeline[ISP_R2K].pipeline_en && FD_ISSET(fd[1], &rfds)) { struct timeval tv1, tv2; // gettimeofday(&tv1, NULL); mediactl_all_set_ae(ISP_R2K_PIPELINE); @@ -1601,15 +1451,7 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) pthread_create(&isp_r2k_ae,NULL,run_r2k_ae_video,NULL); } #else - if(v4l_isp.isp_pipeline[ISP_R2K].pipeline_en == 1 && v4l_isp.isp_pipeline[ISP_F2K].pipeline_en == 1) { - pthread_create(&isp_all_ae, NULL, run_all_ae_video, NULL); - //pthread_create(&isp_r2k_ae, NULL, run_r2k_ae_video, NULL); - //pthread_create(&isp_f2k_ae, NULL, run_f2k_ae_video, NULL); - } else if (v4l_isp.isp_pipeline[ISP_R2K].pipeline_en == 1) { - pthread_create(&isp_r2k_ae, NULL, run_r2k_ae_video, NULL); - } else if( v4l_isp.isp_pipeline[ISP_F2K].pipeline_en == 1 ) { - pthread_create(&isp_f2k_ae, NULL, run_f2k_ae_video, NULL); - } + pthread_create(&isp_all_ae, NULL, run_all_ae_video, NULL); #endif return 0; diff --git a/package/mediactl_lib/src/media_ctl.h b/package/mediactl_lib/src/media_ctl.h index 1a51e47..693547c 100644 --- a/package/mediactl_lib/src/media_ctl.h +++ b/package/mediactl_lib/src/media_ctl.h @@ -80,6 +80,7 @@ struct video_info int mediactl_init(char *video_cfg_file,struct video_info *dev_info); void mediactl_exit(void); +void mediactl_disable_ae(enum isp_pipeline_e pipeline); int mediactl_set_ae(enum isp_pipeline_e pipeline); int mediactl_set_ae_single(enum isp_pipeline_e pipeline); int mediactl_set_ae_sync(enum isp_pipeline_e pipeline); diff --git a/package/mediactl_lib/src/v4l2_drm/Makefile b/package/mediactl_lib/src/v4l2_drm/Makefile index 48f1fde..a746c22 100644 --- a/package/mediactl_lib/src/v4l2_drm/Makefile +++ b/package/mediactl_lib/src/v4l2_drm/Makefile @@ -5,7 +5,7 @@ TARGET = v4l2_drm.out OBJS = v4l2_drm.cc drm/k510_drm.c all: - ${CC} ${OBJS} -I. -L. -L../ -fpermissive -Idrm -ldrm -lmediactl -lpthread -lstdc++ -g -o ${TARGET} + ${CC} ${OBJS} -I. -I../ -L. -L../ -fpermissive -Idrm -ldrm -lmediactl -lpthread -lstdc++ -g -o ${TARGET} @echo "Compile done." clean: @rm -f *.o ${TARGET} diff --git a/package/mediactl_lib/src/v4l2_drm/media_ctl.h b/package/mediactl_lib/src/v4l2_drm/media_ctl.h deleted file mode 100644 index 96257c5..0000000 --- a/package/mediactl_lib/src/v4l2_drm/media_ctl.h +++ /dev/null @@ -1,87 +0,0 @@ -/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __MEDIACTL_H__ -#define __MEDIACTL_H__ - -#ifdef __cplusplus -extern "C"{ -#endif - -enum isp_pipeline_e -{ - ISP_F2K_PIPELINE, - ISP_R2K_PIPELINE, - ISP_TOF_PIPELINE -}; - -enum isp_modules -{ - ISP_TPG, - ISP_BLC, - ISP_LSC, - ISP_AE, - ISP_AWB, - ISP_AWB_D65, - ISP_AWB_CCM, - ISP_WDR, - ISP_RGB_GAMMA, - ISP_YUV_GAMMA, - ISP_ADA, - ISP_ADA_SBZ, - ISP_ADA_CCR, - ISP_RGBIR, - ISP_RAW_2DNR, - ISP_YUV_Y_2DNR, - ISP_YUV_UV_2DNR, - ISP_3DNR, - ISP_LTM, - ISP_SHARP, - ISP_CC, - ISP_CTRST, - ISP_LUMA, - ISP_SATURATION, - ISP_LDC, - ISP_AF, -}; - -struct video_info -{ - unsigned int video_used; - char *video_name[4]; - unsigned int enable[4]; - unsigned int video_width[4]; - unsigned int video_height[4]; - unsigned int video_out_format[4]; -}; - -int mediactl_init(char *video_cfg_file,struct video_info *dev_info); -void mediactl_exit(void); -int mediactl_set_ae(enum isp_pipeline_e pipeline); -unsigned int mediactl_get_isp_modules(enum isp_pipeline_e pipeline,enum isp_modules module); -#ifdef __cplusplus -} -#endif -#endif /*__MEDIACTL_H__*/ diff --git a/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc b/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc index d1e25f9..54031b4 100644 --- a/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc +++ b/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc @@ -24,7 +24,6 @@ */ /* v4l2_test */ -#include #include #include #include @@ -873,6 +872,13 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu } } + if ((isp_ae_status & 1) == 0) { + mediactl_disable_ae(ISP_F2K_PIPELINE); + } + if ((isp_ae_status & 2) == 0) { + mediactl_disable_ae(ISP_R2K_PIPELINE); + } + /* Register a signal handler for SIGINT, received when the user presses * CTRL-C. This will allow the main loop to be interrupted, and resources * to be freed cleanly. diff --git a/package/mediactl_lib/src/v4l2_drm_isptool/Makefile b/package/mediactl_lib/src/v4l2_drm_isptool/Makefile index 3d2a1b5..d25d98d 100644 --- a/package/mediactl_lib/src/v4l2_drm_isptool/Makefile +++ b/package/mediactl_lib/src/v4l2_drm_isptool/Makefile @@ -1,12 +1,12 @@ -CROSS_COMPILE = riscv64-linux- -CC=$(CROSS_COMPILE)gcc - -TARGET = v4l2_drm_isptool.out -OBJS = v4l2_drm_isptool.c ../v4l2_drm/drm/k510_drm.c ../v4l2_drm/sequeue.c - -all: - ${CC} ${OBJS} -I../v4l2_drm/ -L. -L../ -I../v4l2_drm/drm -ldrm -lmediactl -lpthread -lstdc++ -o ${TARGET} - @echo "Compile done." -clean: - @rm -f *.o ${TARGET} - @echo "Clean done." +CROSS_COMPILE = riscv64-linux- +CC=$(CROSS_COMPILE)gcc + +TARGET = v4l2_drm_isptool.out +OBJS = v4l2_drm_isptool.c ../v4l2_drm/drm/k510_drm.c ../v4l2_drm/sequeue.c + +all: + ${CC} ${OBJS} -I../v4l2_drm/ -I../ -L. -L../ -I../v4l2_drm/drm -ldrm -lmediactl -lpthread -lstdc++ -o ${TARGET} + @echo "Compile done." +clean: + @rm -f *.o ${TARGET} + @echo "Clean done." From df31236ffc46c9438c814477d2af6db1fa7b0e48 Mon Sep 17 00:00:00 2001 From: HZ1 Date: Mon, 8 Aug 2022 17:54:13 +0800 Subject: [PATCH 05/74] fix #275, Initialize VO before starting DSI (#276) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: 黄子懿 --- ...11-Initialize-VO-before-starting-DSI.patch | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 package/patches/uboot/0011-Initialize-VO-before-starting-DSI.patch diff --git a/package/patches/uboot/0011-Initialize-VO-before-starting-DSI.patch b/package/patches/uboot/0011-Initialize-VO-before-starting-DSI.patch new file mode 100644 index 0000000..9432661 --- /dev/null +++ b/package/patches/uboot/0011-Initialize-VO-before-starting-DSI.patch @@ -0,0 +1,40 @@ +From 0812c5c6e8390ae1c9eb6a35d3ad5dd53584cef3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=E9=BB=84=E5=AD=90=E6=87=BF?= + +Date: Mon, 8 Aug 2022 16:24:23 +0800 +Subject: [PATCH] Initialize VO before starting DSI +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: 黄子懿 +--- + board/Canaan/dsi_logo/test/log/vo/vo_app.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/board/Canaan/dsi_logo/test/log/vo/vo_app.c b/board/Canaan/dsi_logo/test/log/vo/vo_app.c +index b3f5af4f..1087268f 100755 +--- a/board/Canaan/dsi_logo/test/log/vo/vo_app.c ++++ b/board/Canaan/dsi_logo/test/log/vo/vo_app.c +@@ -2929,8 +2929,6 @@ int VO_TEST_VideoOut(VO_TEST_CASE_E voTestCase) + int lcd_id = 0; + VO_INFO_S voInfo; + +- //enable dsi output +- dsi_init(voTestCase); + // + VO_TEST_Init(); + //table +@@ -2941,6 +2939,9 @@ int VO_TEST_VideoOut(VO_TEST_CASE_E voTestCase) + VO_CORE_INFO_S *voCoreInfo = &voInfo.voCoreInfo; + VO_TEST_Core(voTestCase,voCoreInfo); + ++ //enable dsi output ++ dsi_init(voTestCase); ++ + hpd_state = lt9611_get_hpd_state(); + lcd_id = get_lcd_id(); + if (hpd_state) { +-- +2.36.1 + From 572eefebe4c1129f22769b04c10fc881c1ebb471 Mon Sep 17 00:00:00 2001 From: gh-sxp <100889366+gh-sxp@users.noreply.github.com> Date: Tue, 9 Aug 2022 22:02:06 +0800 Subject: [PATCH 06/74] Encoding JPEG, QP value > = 52, core dump exception (#282) * test * test * ffmpeg pushes RTMP with error conversion failed * encod JPEG, QP exceeds 51 coredump * modify jpeg maxqp value * modify maxqp Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- package/encode_app/src/main.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/package/encode_app/src/main.cpp b/package/encode_app/src/main.cpp index 439cac5..b242e1c 100755 --- a/package/encode_app/src/main.cpp +++ b/package/encode_app/src/main.cpp @@ -2382,6 +2382,8 @@ int main(int argc, char *argv[]) printf("slice qp error\n"); return -1; } + if (pCtx->Cfg[i].SliceQP > pCtx->Cfg[i].MaxQP) + pCtx->Cfg[i].MaxQP = pCtx->Cfg[i].SliceQP; } else { From 02048f8354ddf74b1aea6a72675ffe4f00699b08 Mon Sep 17 00:00:00 2001 From: canaancuiyan <103239907+canaancuiyan@users.noreply.github.com> Date: Thu, 11 Aug 2022 22:57:06 +0800 Subject: [PATCH 07/74] Add disableAE cmd in encode_app (#285) * Encode app free rc control * cancel cpu2dsp task when terminate ffmpeg * modify default output framerate * add disableAE * add ae flag Co-authored-by: bunny720 Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- package/encode_app/src/main.cpp | 93 +++++++++------------------------ 1 file changed, 24 insertions(+), 69 deletions(-) diff --git a/package/encode_app/src/main.cpp b/package/encode_app/src/main.cpp index b242e1c..7dcd08c 100755 --- a/package/encode_app/src/main.cpp +++ b/package/encode_app/src/main.cpp @@ -154,8 +154,6 @@ typedef struct long *shared_phyAddr; void **shared_vAddr; unsigned int *shared_size; - unsigned int *exp; - unsigned int *agc; int *stride; int *width; int *height; @@ -190,10 +188,9 @@ typedef struct uint32_t *drop; uint32_t *drop_en; uint32_t *framerate_mod; - int *set_ae; unsigned char *out_framerate; int video_enabled; - int ae_enable; + uint32_t *ae_disable; int setQos; /* audio */ @@ -462,19 +459,6 @@ static void enqueue_buf(unsigned char index, int channel) } } -static void set_ae(char* dev_name, int ae_enable) -{ - if((dev_name[10] >= '2') && (dev_name[10] <= '5') && (ae_enable & 0x1)) - { - mediactl_set_ae(ISP_F2K_PIPELINE); - } - else if((dev_name[10] >= '6') && (dev_name[10] <= '9') && (ae_enable & 0x1)) - { - mediactl_set_ae(ISP_R2K_PIPELINE); - } - return; -} - static void *v4l2_output(void *arg) { printf("%s\n", __FUNCTION__); @@ -506,8 +490,6 @@ static void *v4l2_output(void *arg) buf.memory = V4L2_MEMORY_USERPTR; res = ioctl(pCtx->fd_v4l2[channel], VIDIOC_DQBUF, &buf); - - set_ae(pCtx->dev_name[channel], pCtx->ae_enable); if (res < 0 || errno == EINTR) { @@ -974,8 +956,6 @@ int free_context(void *arg) free(pCtx->shared_phyAddr ); free(pCtx->shared_vAddr ); free(pCtx->shared_size ); - free(pCtx->exp ); - free(pCtx->agc ); free(pCtx->stride ); free(pCtx->width ); free(pCtx->height ); @@ -1000,7 +980,7 @@ int free_context(void *arg) free(pCtx->drop ); free(pCtx->drop_en ); free(pCtx->out_framerate ); - free(pCtx->set_ae ); + free(pCtx->ae_disable ); return 0; } @@ -1241,17 +1221,6 @@ static int init_isp() pCtx->fd_isp = isp_video(&ds1_info, sensor_type, lcd_type); - if(pCtx->exp[0] > 0) - { - printf("isp exp = %d\n", pCtx->exp[0]); - video_set_ae_dgain_cfg(pCtx->exp[0]); - } - if(pCtx->agc[0] > 0) - { - printf("isp agc = %d\n", pCtx->agc[0]); - video_set_ae_again_cfg(pCtx->agc[0]); - } - printf("%s>fd_isp: 0x%x\n", __FUNCTION__, pCtx->fd_isp); sleep(1); //It seems ISP output is not stable at the beginning @@ -1309,6 +1278,7 @@ int init_v4l2() struct v4l2_format fmt; int i; int f2k=0, r2k=0; + int ae_disabled[2] = {0}; for(int j = 0; j < pCtx->ch_cnt; j++) { @@ -1324,6 +1294,23 @@ int init_v4l2() sem_init(&pCtx->pSemGetData[i],0,0); } + for(i = 0; i < pCtx->ch_cnt; i++) + { + if(pCtx->ae_disable[i]) + { + if((pCtx->dev_name[i][10] >= '2') && (pCtx->dev_name[i][10] <= '5') && (!ae_disabled[0])) + { + mediactl_disable_ae(ISP_F2K_PIPELINE); + ae_disabled[0] = 1; + } + else if((pCtx->dev_name[i][10] >= '6') && (pCtx->dev_name[i][10] <= '9') && (!ae_disabled[1])) + { + mediactl_disable_ae(ISP_R2K_PIPELINE); + ae_disabled[1] = 1; + } + } + } + if(mediactl_init(REAL_CONF_FILENAME, &(pCtx->dev_info[0])) < 0) { printf("mediactl_init error!\n"); @@ -1905,8 +1892,6 @@ int alloc_context(void *arg) pCtx->shared_phyAddr = (long*)malloc(sizeof(long) * pCtx->ch_cnt); pCtx->shared_vAddr = (void**)malloc(sizeof(void*) * pCtx->ch_cnt); pCtx->shared_size = (unsigned int*)malloc(sizeof(unsigned int) * pCtx->ch_cnt); - pCtx->exp = (unsigned int*)malloc(sizeof(unsigned int) * pCtx->ch_cnt); - pCtx->agc = (unsigned int*)malloc(sizeof(unsigned int) * pCtx->ch_cnt); pCtx->stride = (int*)malloc(sizeof(int) * pCtx->ch_cnt); pCtx->width = (int*)malloc(sizeof(int) * pCtx->ch_cnt); pCtx->height = (int*)malloc(sizeof(int) * pCtx->ch_cnt); @@ -1931,8 +1916,8 @@ int alloc_context(void *arg) pCtx->drop = (uint32_t*)malloc(sizeof(uint32_t) * pCtx->ch_cnt); pCtx->drop_en = (uint32_t*)malloc(sizeof(uint32_t) * pCtx->ch_cnt); pCtx->framerate_mod = (uint32_t*)malloc(sizeof(uint32_t) * pCtx->ch_cnt); + pCtx->ae_disable = (uint32_t*)malloc(sizeof(uint32_t) * pCtx->ch_cnt); pCtx->out_framerate = (unsigned char*)malloc(sizeof(unsigned char) * pCtx->ch_cnt); - pCtx->set_ae = (int*)malloc(sizeof(int) * pCtx->ch_cnt); memset(pCtx->Cfg,0,sizeof(EncSettings)); @@ -1957,8 +1942,6 @@ int parse_cmd(int argc, char *argv[]) printf("-o: output file name or rtsp\n"); printf("-w: width\n"); printf("-h: height\n"); - printf("-e: set sensor exposure rate\n"); - printf("-ag: analog gain\n"); printf("-fps: sensor input framerate\n"); printf("-r: encoder output framrate\n"); printf("-inframes: input frames for input file\n"); @@ -1976,7 +1959,7 @@ int parse_cmd(int argc, char *argv[]) printf("-GDRMode: GDR mode 0:GDR_VERTICAL 1:GDR_HORIZONTAL\n"); printf("-enableLTR: enbale long term reference picture and specifies LTR refresh frequency in number of frames,0 to disable use refresh frequency\n"); printf("-roi: roi config file\n"); - printf("-ae: enable ae\n"); + printf("-disableAE: disable ae\n"); printf("-conf: v4l2 config file\n"); /* audio */ printf("-alsa: enable audio\n"); @@ -1984,7 +1967,6 @@ int parse_cmd(int argc, char *argv[]) printf("-ar: audio sample rate\n"); printf("-af: auido sample format\n"); printf("-ad: audio device"); - printf("-lossless: enable jpeg lossless encode"); // printf("-aof: audio output frames\n"); return 1; } @@ -2077,27 +2059,6 @@ int parse_cmd(int argc, char *argv[]) pCtx->Cfg[cur_ch].height = atoi(argv[i+1]); printf("height %d\n", pCtx->Cfg[cur_ch].height); } - else if(strcmp(argv[i], "-e") == 0) - { - pCtx->exp[cur_ch] = atoi(argv[i+1]); - printf("exp = %d\n", pCtx->exp[cur_ch]); - if(pCtx->exp[cur_ch] <= 0 || pCtx->exp[cur_ch] > 128) - { - printf("wrong exp = %d\n", pCtx->exp[cur_ch]); - return -1; - } - pCtx->exp[cur_ch] *= 8; - } - else if(strcmp(argv[i], "-ag") == 0) - { - pCtx->agc[cur_ch] = atoi(argv[i+1]); - printf("agc = %d\n", pCtx->agc[cur_ch]); - if(pCtx->agc[cur_ch] < 0 || pCtx->agc[cur_ch] > 232) - { - printf("wrong agc = %d\n", pCtx->agc[cur_ch]); - return -1; - } - } else if(strcmp(argv[i], "-fps") == 0) { pCtx->framerate[cur_ch] = atoi(argv[i+1]); @@ -2167,12 +2128,6 @@ int parse_cmd(int argc, char *argv[]) pCtx->Cfg[cur_ch].SliceQP = nqp; printf("sliceqp %d\n", nqp); } - else if (strcmp(argv[i],"-lossless") == 0 ) - { - int lossless = atoi(argv[i+1]); - pCtx->Cfg[cur_ch].lossless = lossless; - printf("lossless %d\n", lossless); - } else if (strcmp(argv[i],"-minqp") == 0 ) { int nqp = atoi(argv[i+1]); @@ -2240,9 +2195,9 @@ int parse_cmd(int argc, char *argv[]) printf("roi_parse_conf ok\n"); } } - else if(strcmp(argv[i], "-ae") == 0) + else if(strcmp(argv[i], "-disableAE") == 0) { - pCtx->ae_enable = atoi(argv[i+1]); + pCtx->ae_disable[cur_ch] = atoi(argv[i+1]); } else if(strcmp(argv[i], "-conf") == 0) { From 223b92d44058ee5bfb964c22f5403e8af17a3f1e Mon Sep 17 00:00:00 2001 From: longyiluo <102512220+longyiluo@users.noreply.github.com> Date: Thu, 11 Aug 2022 23:29:16 +0800 Subject: [PATCH 08/74] Encode parameters change (#289) Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- .../ffmpeg_canaan/0033-buildroot-ffmpeg.patch | 116 ++++++++++++++++++ package/venc_lib/src/enc_interface.h | 4 +- 2 files changed, 119 insertions(+), 1 deletion(-) create mode 100755 package/ffmpeg_canaan/0033-buildroot-ffmpeg.patch diff --git a/package/ffmpeg_canaan/0033-buildroot-ffmpeg.patch b/package/ffmpeg_canaan/0033-buildroot-ffmpeg.patch new file mode 100755 index 0000000..34bcf7e --- /dev/null +++ b/package/ffmpeg_canaan/0033-buildroot-ffmpeg.patch @@ -0,0 +1,116 @@ +Index: b/libavcodec/libk510_h264.c +=================================================================== +--- a/libavcodec/libk510_h264.c ++++ b/libavcodec/libk510_h264.c +@@ -55,7 +55,7 @@ typedef struct libk510_h264Context { + int idrFreq; + int profile; + int level; +- AVC_AspectRatio ar; ++ AVC_AspectRatio aratio; + int framesToEncode; + int out_pic; + int in_pic; +@@ -172,7 +172,7 @@ static av_cold int k510_h264_encode_init + Cfg.FreqIDR = pCtx->idrFreq; + Cfg.gopLen = pCtx->gop_size; + Cfg.FrameRate = pCtx->framerate; +- Cfg.AspectRatio = pCtx->ar; ++ Cfg.AspectRatio = pCtx->aratio; + Cfg.MinQP = 0;//from 0 to SliceQP + Cfg.MaxQP = 51;//from SliceQP to 51 + Cfg.roiCtrlMode = ROI_QP_TABLE_NONE; +@@ -194,6 +194,7 @@ static av_cold int k510_h264_encode_init + printf(" SliceQP : %d\n", Cfg.SliceQP); + printf(" bitrate : %d\n", Cfg.BitRate); + printf(" maxbitrate : %d\n", Cfg.MaxBitRate); ++ printf(" AspectRatio : %d\n", Cfg.AspectRatio); + pCtx->hEnc = VideoEncoder_Create(&Cfg); + + pCtx->pts = 0; +@@ -408,23 +409,25 @@ static const AVOption options[] = + //{ option name, description, offset in the context object, type default, min, max, flags, unit} + // ***** GOP options ****** + { "g", "Set gop size", OFFSET(gop_size), AV_OPT_TYPE_INT, {.i64 = 25}, 0, 1000, FLAGS }, +- { "b", "Set video bitrate", OFFSET(bit_rate), AV_OPT_TYPE_INT, {.i64 = 4000000}, 0, 100000000, FLAGS }, +- { "r", "Set video framerate", OFFSET(framerate), AV_OPT_TYPE_INT, {.i64 = 30}, 25, 60, FLAGS }, ++ { "b", "Set video bitrate", OFFSET(bit_rate), AV_OPT_TYPE_INT, {.i64 = 4000000}, 0, 20000000, FLAGS }, ++ { "r", "Set video framerate", OFFSET(framerate), AV_OPT_TYPE_INT, {.i64 = 30}, 30, 30, FLAGS }, + { "ch", "Set encode channel ", OFFSET(channel), AV_OPT_TYPE_INT, {.i64 = 0}, 0, (VENC_MAX_CHANNELS-1), FLAGS }, + { "idr_freq", "IDR frequency. -1=No IDRs", OFFSET(idrFreq), AV_OPT_TYPE_INT, {.i64 = 25 }, -1, 256, FLAGS }, + // ***** Rate Control options ****** +- { "qp", "Use constant QP for encoding.", OFFSET(cqp), AV_OPT_TYPE_INT, {.i64 = -1}, -1, 100, FLAGS }, +- { "maxrate", "Maximum bitrate. (0=ignore)", OFFSET(maxrate), AV_OPT_TYPE_INT, {.i64 = 0}, 0, 100000000, FLAGS }, ++ { "qp", "Use constant QP for encoding.", OFFSET(cqp), AV_OPT_TYPE_INT, {.i64 = -1}, -1, 51, FLAGS }, ++ { "maxrate", "Maximum bitrate. (0=ignore)", OFFSET(maxrate), AV_OPT_TYPE_INT, {.i64 = 0}, 0, 20000000, FLAGS }, + // ***** Input/Output options ****** + { "profile", "Set profile restrictions", OFFSET(profile), AV_OPT_TYPE_INT, {.i64 = AVC_HIGH}, AVC_C_BASELINE, AVC_HIGH, FLAGS, "profile_flags"}, +- { "baseline", "", 0, AV_OPT_TYPE_CONST, { .i64 = AVC_C_BASELINE }, 0, 0, FLAGS, "profile_flags" }, ++ { "baseline", "", 0, AV_OPT_TYPE_CONST, { .i64 = AVC_C_BASELINE }, 0, 0, FLAGS, "profile_flags" }, + { "main", "", 0, AV_OPT_TYPE_CONST, { .i64 = AVC_MAIN }, 0, 0, FLAGS, "profile_flags" }, + { "high", "", 0, AV_OPT_TYPE_CONST, { .i64 = AVC_HIGH }, 0, 0, FLAGS, "profile_flags" }, + { "level", "Specify level", OFFSET(level), AV_OPT_TYPE_INT, {.i64 = 42}, 10, 42, FLAGS, "level_flags"}, +- { "ar", "Set aspect ratio", OFFSET(ar), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_16_9, FLAGS, "ar_flags"}, ++ { "aratio", "Set aspect ratio", OFFSET(aratio), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_MAX, FLAGS, "ar_flags"}, + { "auto", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_AUTO }, 0, 0, FLAGS, "ar_flags" }, ++ { "1:1", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_1_1 }, 0, 0, FLAGS, "ar_flags" }, + { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "ar_flags" }, + { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "ar_flags" }, ++ { "none", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_NONE }, 0, 0, FLAGS, "ar_flags" }, + { "framesToEncode", "set the libk510_h264 framesToEncode", OFFSET(framesToEncode), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, INT_MAX, FLAGS }, + {NULL} + }; +Index: b/libavcodec/libk510_jpeg.c +=================================================================== +--- a/libavcodec/libk510_jpeg.c ++++ b/libavcodec/libk510_jpeg.c +@@ -129,16 +129,16 @@ static av_cold int k510_jpeg_encode_init + Cfg.height = avctx->height; + Cfg.profile = JPEG; + Cfg.FrameRate = pCtx->framerate; +- Cfg.AspectRatio = pCtx->ar; ++ Cfg.AspectRatio = ASPECT_RATIO_AUTO; + Cfg.rcMode = CONST_QP; + Cfg.SliceQP = pCtx->cqp; +- Cfg.BitRate = pCtx->bit_rate; +- Cfg.MaxBitRate = pCtx->maxrate; ++ Cfg.BitRate = 4000000; ++ Cfg.MaxBitRate = 4000000; + Cfg.level = 42; + Cfg.FreqIDR = 25; + Cfg.gopLen = 25; +- Cfg.MinQP = 0;//from 0 to SliceQP +- Cfg.MaxQP = 51;//from SliceQP to 51 ++ Cfg.MinQP = 0; ++ Cfg.MaxQP = 100; + Cfg.roiCtrlMode = ROI_QP_TABLE_NONE; + Cfg.encDblkCfg.disable_deblocking_filter_idc = 0; + Cfg.encDblkCfg.slice_beta_offset_div2 = 1; +@@ -151,11 +151,7 @@ static av_cold int k510_jpeg_encode_init + printf(" height : %d\n", Cfg.height); + printf(" profile : %d\n", Cfg.profile); + printf(" FrameRate : %d\n", Cfg.FrameRate); +- printf(" rcMode : %d\n", Cfg.rcMode); + printf(" SliceQP : %d\n", Cfg.SliceQP); +- printf(" bitrate : %d\n", Cfg.BitRate); +- printf(" maxbitrate : %d\n", Cfg.MaxBitRate); +- printf(" AspectRatio : %d\n", Cfg.AspectRatio); + + pCtx->hEnc = VideoEncoder_Create(&Cfg); + +@@ -308,14 +304,8 @@ static const AVOption options[] = + { + //{ option name, description, offset in the context object, type default, min, max, flags, unit} + { "qp", "Use constant QP for encoding.", OFFSET(cqp), AV_OPT_TYPE_INT, {.i64 = 25}, -1, 100, FLAGS }, +- { "r", "Set video framerate", OFFSET(framerate), AV_OPT_TYPE_INT, {.i64 = 30}, 25, 60, FLAGS }, +- { "b", "Set video bitrate", OFFSET(bit_rate), AV_OPT_TYPE_INT, {.i64 = 4000000}, 0, 100000000, FLAGS }, ++ { "r", "Set video framerate", OFFSET(framerate), AV_OPT_TYPE_INT, {.i64 = 30}, 30, 30, FLAGS }, + { "ch", "Set encode channel ", OFFSET(channel), AV_OPT_TYPE_INT, {.i64 = 0}, 0, (VENC_MAX_CHANNELS-1), FLAGS }, +- { "maxrate", "Maximum bitrate. (0=ignore)", OFFSET(maxrate), AV_OPT_TYPE_INT, {.i64 = 4000000}, 0, 100000000, FLAGS }, +- { "ar", "Set aspect ratio", OFFSET(ar), AV_OPT_TYPE_INT, {.i64 = ASPECT_RATIO_AUTO}, ASPECT_RATIO_AUTO, ASPECT_RATIO_16_9, FLAGS, "ar_flags"}, +- { "auto", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_AUTO }, 0, 0, FLAGS, "ar_flags" }, +- { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "ar_flags" }, +- { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "ar_flags" }, + {NULL} + }; + diff --git a/package/venc_lib/src/enc_interface.h b/package/venc_lib/src/enc_interface.h index 52e3cce..d74b1a2 100755 --- a/package/venc_lib/src/enc_interface.h +++ b/package/venc_lib/src/enc_interface.h @@ -69,9 +69,11 @@ typedef enum typedef enum { ASPECT_RATIO_AUTO, + ASPECT_RATIO_1_1, ASPECT_RATIO_4_3, ASPECT_RATIO_16_9, - ASPECT_RATIO_NONE + ASPECT_RATIO_NONE, + ASPECT_RATIO_MAX, } AVC_AspectRatio; typedef struct From 45f1859c82dd6edeb625a051f3c97b0b65bb97f6 Mon Sep 17 00:00:00 2001 From: xubaikun <101684791+xubaikun@users.noreply.github.com> Date: Mon, 15 Aug 2022 14:17:11 +0800 Subject: [PATCH 09/74] issue #286: 0023-enable-netlink-connector-protocol.patch (#287) Co-authored-by: xubaikun --- ...23-enable-netlink-connector-protocol.patch | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 package/patches/linux/0023-enable-netlink-connector-protocol.patch diff --git a/package/patches/linux/0023-enable-netlink-connector-protocol.patch b/package/patches/linux/0023-enable-netlink-connector-protocol.patch new file mode 100644 index 0000000..85d4913 --- /dev/null +++ b/package/patches/linux/0023-enable-netlink-connector-protocol.patch @@ -0,0 +1,27 @@ +From 2c87671e266454090d515d9963c2e78240410d90 Mon Sep 17 00:00:00 2001 +From: xubaikun +Date: Wed, 10 Aug 2022 10:52:03 +0800 +Subject: [PATCH] enable netlink connector protocol + +--- + arch/riscv/configs/k510_defconfig | 1 + + 1 file changed, 1 insertion(+) + mode change 100755 => 100644 arch/riscv/configs/k510_defconfig + +diff --git a/arch/riscv/configs/k510_defconfig b/arch/riscv/configs/k510_defconfig +old mode 100755 +new mode 100644 +index c3c549ed..42416469 +--- a/arch/riscv/configs/k510_defconfig ++++ b/arch/riscv/configs/k510_defconfig +@@ -56,6 +56,7 @@ CONFIG_RFKILL_GPIO=y + CONFIG_DEVTMPFS=y + CONFIG_DEVTMPFS_MOUNT=y + CONFIG_DMA_CMA=y ++CONFIG_CONNECTOR=y + CONFIG_MTD=y + CONFIG_MTD_BLOCK=y + CONFIG_FTL=y +-- +2.17.1 + From 8972072cd906d599bdd3244ee2b8554fc1be0c17 Mon Sep 17 00:00:00 2001 From: longyiluo <102512220+longyiluo@users.noreply.github.com> Date: Fri, 19 Aug 2022 11:28:25 +0800 Subject: [PATCH 10/74] Fix CAVLC encode mosaic screen (#294) * CAVLC flush cache issue * Jpeg flush cache for table * Remove unuseful param --- package/encode_app/src/main.cpp | 56 +++++++++--------- .../ffmpeg_canaan/0034-buildroot-ffmpeg.patch | 47 +++++++++++++++ package/venc_lib/src/enc_interface.h | 4 +- package/venc_lib/src/libvenc.so | Bin 386608 -> 386608 bytes 4 files changed, 76 insertions(+), 31 deletions(-) create mode 100755 package/ffmpeg_canaan/0034-buildroot-ffmpeg.patch diff --git a/package/encode_app/src/main.cpp b/package/encode_app/src/main.cpp index 7dcd08c..40e5e2f 100755 --- a/package/encode_app/src/main.cpp +++ b/package/encode_app/src/main.cpp @@ -1919,7 +1919,14 @@ int alloc_context(void *arg) pCtx->ae_disable = (uint32_t*)malloc(sizeof(uint32_t) * pCtx->ch_cnt); pCtx->out_framerate = (unsigned char*)malloc(sizeof(unsigned char) * pCtx->ch_cnt); - memset(pCtx->Cfg,0,sizeof(EncSettings)); + memset(pCtx->Cfg, 0, sizeof(EncSettings)*pCtx->ch_cnt); + + for(int i = 0; i < pCtx->ch_cnt; i++) + { + pCtx->Cfg[i].profile = (AVC_Profile)0xff; + pCtx->Cfg[i].rcMode = (RateCtrlMode)0xff; + pCtx->Cfg[i].AspectRatio = (AVC_AspectRatio)0xff; + } return 0; } @@ -2037,16 +2044,7 @@ int parse_cmd(int argc, char *argv[]) printf("Cannot open output file!\n"); return -1; } - pCtx->outfilename[cur_ch] = argv[i+1]; -#if 0 - char *ptr=strchr(pCtx->outfilename[cur_ch], '.'); - if(strcmp(ptr, ".jpg") == 0 || strcmp(ptr, ".mjpeg") == 0) - { - pCtx->Cfg[cur_ch].profile = JPEG; - pCtx->Cfg[cur_ch].rcMode = CONST_QP; - printf("JPEG encode\n"); - } -#endif + pCtx->outfilename[cur_ch] = argv[i+1]; } } else if(strcmp(argv[i], "-w") == 0) @@ -2103,7 +2101,7 @@ int parse_cmd(int argc, char *argv[]) else if (strcmp(argv[i],"-profile") == 0 ) { int nProfile = atoi(argv[i+1]); - if (nProfile > 2 || nProfile < 0) + if (nProfile > 3 || nProfile < 0) { printf("profile:%d error\n",nProfile); return -1; @@ -2282,27 +2280,27 @@ int main(int argc, char *argv[]) { pCtx->ch[i] = i; pCtx->Cfg[i].channel = i; - if(!pCtx->framerate[i]) pCtx->framerate[i] = 30; - if(!pCtx->out_framerate[i]) pCtx->out_framerate[i] = pCtx->framerate[i]; - if(!pCtx->Cfg[i].width) pCtx->Cfg[i].width = 1920; - if(!pCtx->Cfg[i].height) pCtx->Cfg[i].height = 1080; - if(!pCtx->Cfg[i].BitRate) pCtx->Cfg[i].BitRate = 4000000; - if(!pCtx->Cfg[i].MaxBitRate) pCtx->Cfg[i].MaxBitRate = 4000000; - if(!pCtx->Cfg[i].level) pCtx->Cfg[i].level = 42; - if(!pCtx->Cfg[i].profile) pCtx->Cfg[i].profile = AVC_HIGH; - if(!pCtx->Cfg[i].rcMode) pCtx->Cfg[i].rcMode = CBR; - if(!pCtx->Cfg[i].SliceQP) pCtx->Cfg[i].SliceQP = 25; - if(!pCtx->Cfg[i].FreqIDR) pCtx->Cfg[i].FreqIDR = 25; - if(!pCtx->Cfg[i].gopLen) pCtx->Cfg[i].gopLen = 25; - if(!pCtx->Cfg[i].AspectRatio) pCtx->Cfg[i].AspectRatio = ASPECT_RATIO_AUTO; - if(!pCtx->Cfg[i].MinQP) pCtx->Cfg[i].MinQP = 0;//from 0 to SliceQP - if(!pCtx->Cfg[i].MaxQP) pCtx->Cfg[i].MaxQP = 51;//from SliceQP to 51 - if(!pCtx->Cfg[i].roiCtrlMode) pCtx->Cfg[i].roiCtrlMode = ROI_QP_TABLE_NONE; + if(!pCtx->framerate[i]) pCtx->framerate[i] = 30; + if(!pCtx->out_framerate[i]) pCtx->out_framerate[i] = pCtx->framerate[i]; + if(!pCtx->Cfg[i].width) pCtx->Cfg[i].width = 1920; + if(!pCtx->Cfg[i].height) pCtx->Cfg[i].height = 1080; + if(!pCtx->Cfg[i].BitRate) pCtx->Cfg[i].BitRate = 4000000; + if(!pCtx->Cfg[i].MaxBitRate) pCtx->Cfg[i].MaxBitRate = 4000000; + if(!pCtx->Cfg[i].level) pCtx->Cfg[i].level = 42; + if(pCtx->Cfg[i].profile != 0xff) pCtx->Cfg[i].profile = AVC_HIGH; + if(pCtx->Cfg[i].rcMode != 0xff) pCtx->Cfg[i].rcMode = CBR; + if(!pCtx->Cfg[i].SliceQP) pCtx->Cfg[i].SliceQP = 25; + if(!pCtx->Cfg[i].FreqIDR) pCtx->Cfg[i].FreqIDR = 25; + if(!pCtx->Cfg[i].gopLen) pCtx->Cfg[i].gopLen = 25; + if(pCtx->Cfg[i].AspectRatio != 0xff) pCtx->Cfg[i].AspectRatio = ASPECT_RATIO_AUTO; + if(!pCtx->Cfg[i].MinQP) pCtx->Cfg[i].MinQP = 0;//from 0 to SliceQP + if(!pCtx->Cfg[i].MaxQP) pCtx->Cfg[i].MaxQP = 51;//from SliceQP to 51 + if(!pCtx->Cfg[i].roiCtrlMode) pCtx->Cfg[i].roiCtrlMode = ROI_QP_TABLE_NONE; pCtx->Cfg[i].encDblkCfg.disable_deblocking_filter_idc = 0; pCtx->Cfg[i].encDblkCfg.slice_beta_offset_div2 = 1; pCtx->Cfg[i].encDblkCfg.slice_alpha_c0_offset_div2 = 1; - pCtx->Cfg[i].entropyMode = ENTROPY_MODE_CAVLC; + pCtx->Cfg[i].entropyMode = ENTROPY_MODE_CABAC; pCtx->Cfg[i].sliceSplitCfg.bSplitEnable = false; diff --git a/package/ffmpeg_canaan/0034-buildroot-ffmpeg.patch b/package/ffmpeg_canaan/0034-buildroot-ffmpeg.patch new file mode 100755 index 0000000..f828290 --- /dev/null +++ b/package/ffmpeg_canaan/0034-buildroot-ffmpeg.patch @@ -0,0 +1,47 @@ +Index: b/libavcodec/libk510_h264.c +=================================================================== +--- a/libavcodec/libk510_h264.c ++++ b/libavcodec/libk510_h264.c +@@ -179,7 +179,7 @@ static av_cold int k510_h264_encode_init + Cfg.encDblkCfg.disable_deblocking_filter_idc = 0; + Cfg.encDblkCfg.slice_beta_offset_div2 = 1; + Cfg.encDblkCfg.slice_alpha_c0_offset_div2 = 1; +- Cfg.entropyMode = ENTROPY_MODE_CAVLC; ++ Cfg.entropyMode = ENTROPY_MODE_CABAC; + Cfg.sliceSplitCfg.bSplitEnable = false; + + printf("Encoder Settings:\n"); +@@ -428,7 +428,6 @@ static const AVOption options[] = + { "4:3", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_4_3 }, 0, 0, FLAGS, "ar_flags" }, + { "16:9", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_16_9 }, 0, 0, FLAGS, "ar_flags" }, + { "none", "", 0, AV_OPT_TYPE_CONST, { .i64 = ASPECT_RATIO_NONE }, 0, 0, FLAGS, "ar_flags" }, +- { "framesToEncode", "set the libk510_h264 framesToEncode", OFFSET(framesToEncode), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, INT_MAX, FLAGS }, + {NULL} + }; + +Index: b/libavcodec/libk510_jpeg.c +=================================================================== +--- a/libavcodec/libk510_jpeg.c ++++ b/libavcodec/libk510_jpeg.c +@@ -143,7 +143,7 @@ static av_cold int k510_jpeg_encode_init + Cfg.encDblkCfg.disable_deblocking_filter_idc = 0; + Cfg.encDblkCfg.slice_beta_offset_div2 = 1; + Cfg.encDblkCfg.slice_alpha_c0_offset_div2 = 1; +- Cfg.entropyMode = ENTROPY_MODE_CAVLC; ++ Cfg.entropyMode = ENTROPY_MODE_CABAC; + Cfg.sliceSplitCfg.bSplitEnable = false; + + printf("Encoder Settings:\n"); +Index: b/libavfilter/af_audio3a.c +=================================================================== +--- a/libavfilter/af_audio3a.c ++++ b/libavfilter/af_audio3a.c +@@ -143,7 +143,7 @@ typedef struct Audio3aContext { + #define AF AV_OPT_FLAG_AUDIO_PARAM|AV_OPT_FLAG_FILTERING_PARAM + + static const AVOption audio3a_options[] = { +- {"sample_rate", "set sample_rate", OFFSET(sample_rate), AV_OPT_TYPE_INT, {.i64 = 16000}, 1, INT_MAX, AF}, ++ {"sample_rate", "set sample_rate", OFFSET(sample_rate), AV_OPT_TYPE_INT, {.i64 = 16000}, 16000, 16000, AF}, + {"agc", "set agc mode", OFFSET(agc_mode), AV_OPT_TYPE_INT, {.i64 = AgcModeFixedDigital}, AgcModeUnchanged, AgcModeFixedDigital, AF, "agc_mode"}, + { "AgcModeUnchanged", "", 0, AV_OPT_TYPE_CONST, {.i64 = AgcModeUnchanged}, 0, 0, AF, "agc_mode"}, + { "AgcModeAdaptiveAnalog", "", 0, AV_OPT_TYPE_CONST, {.i64 = AgcModeAdaptiveAnalog}, 0, 0, AF, "agc_mode"}, diff --git a/package/venc_lib/src/enc_interface.h b/package/venc_lib/src/enc_interface.h index d74b1a2..da516d3 100755 --- a/package/venc_lib/src/enc_interface.h +++ b/package/venc_lib/src/enc_interface.h @@ -115,8 +115,8 @@ typedef struct typedef enum { - ENTROPY_MODE_CABAC = 0, - ENTROPY_MODE_CAVLC, + ENTROPY_MODE_CAVLC = 0, + ENTROPY_MODE_CABAC, ENTROPY_MODE_MAX, }EncEntropyMode; diff --git a/package/venc_lib/src/libvenc.so b/package/venc_lib/src/libvenc.so index b754ac1345da4da43e0ccaf33683cc1657d14c72..0aa203a2baa8080389d1857c56302a4eab140b4f 100755 GIT binary patch delta 74726 zcmZsD3tUu1`~R7*bc}uPEilr48c-KYKv@k)%Yv!(Rn0Nbs=ge%DzyJAUyJx;L&ph)y&ph+YGqaQ( zHkTbX7bbgb$ummq*|KPIzF+Kg{_^+dRziZhlVw^+4|71xx3XT-UH`u%<@c4OW|F5g zS{nv*=SM^@4-{xbPmbQvvVqPR&f5+Y=)4vjEz>pw&AesM%QFP}N&rWFwR1pE2+AV_ z`f)FgR%m`b!IdAU>?_b8EgWsG^#fYJiBpah=tIF(pf(Mt`$68ek3erl@wUZUNzYE5 zjfeit^UJL`+HjhW6r}WLW^-P?QzOrr1B|u2N0%I4jpOJHtuxTBM|s;|(e}I;>27U2 z(7C61k5vL~-<`Mh)fNG*+RxiMc_nFHGmbvcDuLb^`EU6j?#R)x+D)K+TJc83oH=Rs z0FG|cLV7{MH+kD3qTdD~rR&--pk);tbxG+jA*EO?8)$?tr<^L<`ulOpf!b!E+b(j{ zCI5Y0I66x^2Q+mLrwqaB&wWphHfnyo!Bwr`S)hkR+nriJpp%;Op{(a5q=bIF?O|;i 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zfu_XfR6lZLP?h6(wQQ#HdsN;pG1H3VLTlN#rWv{1+_H1mY+$UIJ5G$C2cw!j;6kq|vYad#l~X+7A$CO0Qp=GrNiSY2qrG zP~4MmtxS+Tl&X{`z5BhpC?l8a@0qR_n`}c%eZxSy*x&IKuQ$nOj(5G)_Gpw zcJrMsjfw}j%d2Jr=M&>KI$*3G2MdvA(yLZGnOY6h>X5{1{RUifEwaU38$QDI-!zX& z^tfT`C+!I3a38mF@uuZ{i8xh86_?J~pk2k<-y=?vz;(cB_nX{x<*$gRBzhe}z)7xZ z?U;AtA7+O)NGot4UY><=xR0B(TxL~QVS!>mtF0P|6v0+jvIW{{ae2R@R=SiFL90m` zRV$gdK(2-6sD)RQfS1?vBAY~4>nhFF?62iW5gw~lNaFPftY6k#kHFem%;hB8pqJVi zQVXqcGuI9`=zc?7AYF=+zhu>N>1)v)<_ixt73W@H#^Y%`pSVW?pTpcL;ExI1uT8cR zALk~+&Dd>}r!bf}=Z&i#UPOesa2c*G&Ch?a!bMUV3Vf*bNTeV(m3&-Y!F?#C8x7YAS;RO50LESO&Mok9 zn1>eF75e3C)WW*}Y6O1^&=SzYJ(8z* z|EZS$CB!Rh%tyD>mLr6;c^liG6XR5%93hlS;5HaZ;CO4Jk@8wIf@hGxm>Gq)p(%%Y zES*$p3AKXKsz&Nk47+X1>%{m~u;L*$hFe$8y4QRhmYCuxcD6IVmbg?RwW*mhU&grAukRw*_ zZ4hEn*oI4d`@Yw=g_eFw3hxQ6l-avOH_09Mgt7w{?ECgTp)b|oJ~MGVv~H36{d0~K wj)yK@?0)t Date: Mon, 22 Aug 2022 19:09:05 +0800 Subject: [PATCH 11/74] Fix some DS of isp output old pitcure (#295) * Merge isp jump drop from ds0 to all ds * Threshold cal Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- package/patches/linux/0024-isp-drop-buf.patch | 184 ++++++++++++++++++ 1 file changed, 184 insertions(+) create mode 100755 package/patches/linux/0024-isp-drop-buf.patch diff --git a/package/patches/linux/0024-isp-drop-buf.patch b/package/patches/linux/0024-isp-drop-buf.patch new file mode 100755 index 0000000..55763c3 --- /dev/null +++ b/package/patches/linux/0024-isp-drop-buf.patch @@ -0,0 +1,184 @@ +From 31c99a47c62123c0fb02d0830b76d27b90e86a6f Mon Sep 17 00:00:00 2001 +From: longyiluo +Date: Thu, 18 Aug 2022 16:15:09 +0800 +Subject: [PATCH] isp-drop-buf + +--- + .../platform/canaan-isp/isp_2k/isp_f2k.c | 19 +++++++++++++------ + .../platform/canaan-isp/isp_2k/isp_r2k.c | 19 +++++++++++++------ + .../media/platform/canaan-isp/k510isp_com.h | 4 ++-- + 3 files changed, 28 insertions(+), 14 deletions(-) + +diff --git a/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c b/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c +index 87a7fdfe..f743cc6b 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c ++++ b/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c +@@ -2861,14 +2861,14 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + + buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); + +- if(dsNum == DS0_VIDEO && f2k->profile.drop_threshold > 0LL && f2k->profile.buf_set_time != 0) ++ if(f2k->profile.drop_threshold > 0LL && f2k->profile.buf_set_time[dsNum] != 0) + { + unsigned long long delta; +- delta = get_usec() - f2k->profile.buf_set_time; ++ delta = get_usec() - f2k->profile.buf_set_time[dsNum]; + if(delta > f2k->profile.drop_threshold) + { + drop = 1; +- f2k->profile.drop_cnt++; ++ f2k->profile.drop_cnt[dsNum]++; + } + } + +@@ -2982,6 +2982,7 @@ static void f2k_isr_main_buffer(struct isp_f2k_device *f2k) + + video_buffer_next(f2k, MAIN_VIDEO); + ++ f2k->profile.buf_set_time[MAIN_VIDEO] = get_usec(); + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + + return buffer != NULL; +@@ -3006,7 +3007,7 @@ static void f2k_isr_out0_buffer(struct isp_f2k_device *f2k) + + video_buffer_next(f2k, DS0_VIDEO); + +- f2k->profile.buf_set_time = get_usec(); ++ f2k->profile.buf_set_time[DS0_VIDEO] = get_usec(); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + +@@ -3031,6 +3032,7 @@ static void f2k_isr_out1_buffer(struct isp_f2k_device *f2k) + } + + video_buffer_next(f2k, DS1_VIDEO); ++ f2k->profile.buf_set_time[DS1_VIDEO] = get_usec(); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + +@@ -3335,6 +3337,7 @@ static int f2k_set_stream(struct v4l2_subdev *sd, int enable) + struct k510_isp_device *isp = to_isp_device(f2k); + struct device *dev = to_device(f2k); + int ret; ++ int i; + dev_dbg(f2k->isp->dev,"%s:enable(0x%d)\n",__func__,enable); + + struct isp_cfg_info *isp_cfg = &f2k->isp_cfg; +@@ -3374,7 +3377,7 @@ static int f2k_set_stream(struct v4l2_subdev *sd, int enable) + + memset(&f2k->profile,0,sizeof(struct k510_isp_profile)); + if(isp_cfg->isp_ds_cfg.dsInSizeInfo.Width == 1920 && +- isp_cfg->isp_ds_cfg.dsInSizeInfo.Height == 1080) ++ isp_cfg->isp_ds_cfg.dsInSizeInfo.Height >= 1080) + { + f2k->profile.drop_threshold = 1000000LL/30 + DROP_THRESHOLD_GAP; + } +@@ -3405,7 +3408,11 @@ static int f2k_set_stream(struct v4l2_subdev *sd, int enable) + { + dev_info(f2k->isp->dev,"f2k interrupt: max duration %lld us, big_cnt %d\n", f2k->profile.max_int_duration, f2k->profile.big_dur_cnt); + dev_info(f2k->isp->dev,"f2k interrupt: max interval %lld us, big_cnt %d\n", f2k->profile.max_int_interval, f2k->profile.big_inter_cnt); +- dev_info(f2k->isp->dev,"f2k jump drop_cnt %d\n", f2k->profile.drop_cnt); ++ for(i=0; iprofile.drop_cnt[i] > 0) ++ dev_info(f2k->isp->dev,"f2k ds%d jump drop_cnt %d\n", i, f2k->profile.drop_cnt[i]); ++ } + } + dev_info(f2k->isp->dev,"f2k dmaErrCnt %d, no_buf_drop_cnt %d, total %d\n", f2k->profile.dmaErrCnt, f2k->profile.no_buf_drop_cnt, f2k->profile.pic_cnt); + break; +diff --git a/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c b/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c +index c7e73698..e878d5a8 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c ++++ b/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c +@@ -2479,14 +2479,14 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + + buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); + +- if(dsNum == DS0_VIDEO && r2k->profile.drop_threshold > 0LL && r2k->profile.buf_set_time != 0) ++ if(r2k->profile.drop_threshold > 0LL && r2k->profile.buf_set_time[dsNum] != 0) + { + unsigned long long delta; +- delta = get_usec() - r2k->profile.buf_set_time; ++ delta = get_usec() - r2k->profile.buf_set_time[dsNum]; + if(delta > r2k->profile.drop_threshold) + { + drop = 1; +- r2k->profile.drop_cnt++; ++ r2k->profile.drop_cnt[dsNum]++; + } + } + +@@ -2596,6 +2596,7 @@ static void r2k_isr_main_buffer(struct isp_r2k_device *r2k) + + video_buffer_next(r2k, MAIN_VIDEO); + ++ r2k->profile.buf_set_time[MAIN_VIDEO] = get_usec(); + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + + return buffer != NULL; +@@ -2617,7 +2618,7 @@ static void r2k_isr_out0_buffer(struct isp_r2k_device *r2k) + + video_buffer_next(r2k, DS0_VIDEO); + +- r2k->profile.buf_set_time = r2k->profile.buf_set_time; ++ r2k->profile.buf_set_time[DS0_VIDEO] = get_usec(); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + +@@ -2638,6 +2639,7 @@ static void r2k_isr_out1_buffer(struct isp_r2k_device *r2k) + } + + video_buffer_next(r2k, DS1_VIDEO); ++ r2k->profile.buf_set_time[DS1_VIDEO] = get_usec(); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + +@@ -2934,6 +2936,7 @@ static int r2k_set_stream(struct v4l2_subdev *sd, int enable) + struct k510_isp_device *isp = to_isp_device(r2k); + struct device *dev = to_device(r2k); + int ret; ++ int i; + dev_dbg(r2k->isp->dev,"%s:enable(0x%d)\n",__func__,enable); + + struct isp_cfg_info *isp_cfg = &r2k->isp_cfg; +@@ -2975,7 +2978,7 @@ static int r2k_set_stream(struct v4l2_subdev *sd, int enable) + + memset(&r2k->profile,0,sizeof(struct k510_isp_profile)); + if(isp_cfg->isp_ds_cfg.dsInSizeInfo.Width == 1920 && +- isp_cfg->isp_ds_cfg.dsInSizeInfo.Height == 1080) ++ isp_cfg->isp_ds_cfg.dsInSizeInfo.Height >= 1080) + { + r2k->profile.drop_threshold = 1000000LL/30 + DROP_THRESHOLD_GAP; + } +@@ -3008,7 +3011,11 @@ static int r2k_set_stream(struct v4l2_subdev *sd, int enable) + { + dev_info(r2k->isp->dev,"r2k interrupt: max duration %lld us, big_cnt %d\n", r2k->profile.max_int_duration, r2k->profile.big_dur_cnt); + dev_info(r2k->isp->dev,"r2k interrupt: max interval %lld us, big_cnt %d\n", r2k->profile.max_int_interval, r2k->profile.big_inter_cnt); +- dev_info(r2k->isp->dev,"r2k jump drop_cnt %d\n", r2k->profile.drop_cnt); ++ for(i=0; iprofile.drop_cnt[i] > 0) ++ dev_info(r2k->isp->dev,"r2k ds%d jump drop_cnt %d\n", i, r2k->profile.drop_cnt[i]); ++ } + } + dev_info(r2k->isp->dev,"r2k dmaErrCnt %d, no_buf_drop_cnt %d, total %d\n", r2k->profile.dmaErrCnt, r2k->profile.no_buf_drop_cnt, r2k->profile.pic_cnt); + break; +diff --git a/drivers/media/platform/canaan-isp/k510isp_com.h b/drivers/media/platform/canaan-isp/k510isp_com.h +index 96eb1ad5..ec9648fa 100755 +--- a/drivers/media/platform/canaan-isp/k510isp_com.h ++++ b/drivers/media/platform/canaan-isp/k510isp_com.h +@@ -479,9 +479,9 @@ struct k510_isp_profile { + unsigned long long cur_int_interval; + int big_dur_cnt; + int big_inter_cnt; +- unsigned long long buf_set_time; ++ unsigned long long buf_set_time[4]; + unsigned long long drop_threshold; +- int drop_cnt; ++ int drop_cnt[4]; + int no_buf_drop_cnt; + }; + +-- +2.17.1 + From 96ffac782fd44802abe0fc8023e61b82ad6b03b8 Mon Sep 17 00:00:00 2001 From: wycwyhwyq <5f20.6d9b@gmail.com> Date: Fri, 26 Aug 2022 13:33:39 +0800 Subject: [PATCH 12/74] Add get phys address ioctl to dma-buf (#297) --- ...dd-get-phys-address-ioctl-to-dma-buf.patch | 84 +++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 package/patches/linux/0025-Add-get-phys-address-ioctl-to-dma-buf.patch diff --git a/package/patches/linux/0025-Add-get-phys-address-ioctl-to-dma-buf.patch b/package/patches/linux/0025-Add-get-phys-address-ioctl-to-dma-buf.patch new file mode 100644 index 0000000..7cfc749 --- /dev/null +++ b/package/patches/linux/0025-Add-get-phys-address-ioctl-to-dma-buf.patch @@ -0,0 +1,84 @@ +From 87fea9bd776a68f26e40024e9256d67e9885de67 Mon Sep 17 00:00:00 2001 +From: wycwyhwyq <5f20.6d9b@gmail.com> +Date: Wed, 24 Aug 2022 10:42:28 +0800 +Subject: [PATCH] Add get phys address ioctl to dma-buf + +--- + drivers/dma-buf/dma-buf.c | 31 +++++++++++++++++++++++++++++++ + include/uapi/linux/dma-buf.h | 5 +++++ + 2 files changed, 36 insertions(+) + +diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c +index d78d5fc1..4d4b58b4 100644 +--- a/drivers/dma-buf/dma-buf.c ++++ b/drivers/dma-buf/dma-buf.c +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + + #include + +@@ -287,6 +288,36 @@ static long dma_buf_ioctl(struct file *file, + dmabuf = file->private_data; + + switch (cmd) { ++ case DMA_BUF_IOCTL_PHYS: { ++ struct dma_buf_attachment *attachment = NULL; ++ struct sg_table *sgt = NULL; ++ unsigned long phys = 0; ++ struct device dev; ++ ++ if (!dmabuf || IS_ERR(dmabuf)) { ++ return -EFAULT; ++ } ++ memset(&dev, 0, sizeof(dev)); ++ device_initialize(&dev); ++ dev.coherent_dma_mask = DMA_BIT_MASK(64); ++ dev.dma_mask = &dev.coherent_dma_mask; ++ arch_setup_dma_ops(&dev, 0, 0, NULL, false); ++ attachment = dma_buf_attach(dmabuf, &dev); ++ if (!attachment || IS_ERR(attachment)) { ++ return -EFAULT; ++ } ++ ++ sgt = dma_buf_map_attachment(attachment, DMA_BIDIRECTIONAL); ++ if (sgt && !IS_ERR(sgt)) { ++ phys = sg_dma_address(sgt->sgl); ++ dma_buf_unmap_attachment(attachment, sgt, ++ DMA_BIDIRECTIONAL); ++ } ++ dma_buf_detach(dmabuf, attachment); ++ if (copy_to_user((void __user *) arg, &phys, sizeof(phys))) ++ return -EFAULT; ++ return 0; ++ } + case DMA_BUF_IOCTL_SYNC: + if (copy_from_user(&sync, (void __user *) arg, sizeof(sync))) + return -EFAULT; +diff --git a/include/uapi/linux/dma-buf.h b/include/uapi/linux/dma-buf.h +index d75df521..514beecd 100644 +--- a/include/uapi/linux/dma-buf.h ++++ b/include/uapi/linux/dma-buf.h +@@ -27,6 +27,10 @@ struct dma_buf_sync { + __u64 flags; + }; + ++struct dma_buf_phys { ++ unsigned long phys; ++}; ++ + #define DMA_BUF_SYNC_READ (1 << 0) + #define DMA_BUF_SYNC_WRITE (2 << 0) + #define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE) +@@ -37,5 +41,6 @@ struct dma_buf_sync { + + #define DMA_BUF_BASE 'b' + #define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync) ++#define DMA_BUF_IOCTL_PHYS _IOW(DMA_BUF_BASE, 1, struct dma_buf_phys) + + #endif +-- +2.17.1 + From e117b064322ac1c11bee031c5c521dc99d4b03c7 Mon Sep 17 00:00:00 2001 From: gh-sxp <100889366+gh-sxp@users.noreply.github.com> Date: Mon, 29 Aug 2022 09:49:56 +0800 Subject: [PATCH 13/74] DAC output error, left and right channels reversed (#305) * test * test * ffmpeg pushes RTMP with error conversion failed * encod JPEG, QP exceeds 51 coredump * modify jpeg maxqp value * modify maxqp * DAC output error, left and right channels reversed Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- .../linux/0026-DAC-channel-reversed.patch | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 package/patches/linux/0026-DAC-channel-reversed.patch diff --git a/package/patches/linux/0026-DAC-channel-reversed.patch b/package/patches/linux/0026-DAC-channel-reversed.patch new file mode 100644 index 0000000..2f67112 --- /dev/null +++ b/package/patches/linux/0026-DAC-channel-reversed.patch @@ -0,0 +1,25 @@ +From f1cc881b652a0b003d7d447dd7e578667b87e4b0 Mon Sep 17 00:00:00 2001 +From: gh-sxp +Date: Sun, 28 Aug 2022 14:27:15 +0800 +Subject: [PATCH] modify nau8822 + +--- + sound/soc/codecs/nau8822.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/nau8822.c b/sound/soc/codecs/nau8822.c +index bb061740..0086a471 100644 +--- a/sound/soc/codecs/nau8822.c ++++ b/sound/soc/codecs/nau8822.c +@@ -40,7 +40,7 @@ static const struct reg_default nau8822_reg_defaults[] = { + { NAU8822_REG_POWER_MANAGEMENT_1, 0x0000 }, + { NAU8822_REG_POWER_MANAGEMENT_2, 0x0000 }, + { NAU8822_REG_POWER_MANAGEMENT_3, 0x0000 }, +- { NAU8822_REG_AUDIO_INTERFACE, 0x0050 }, ++ { NAU8822_REG_AUDIO_INTERFACE, 0x0054 }, + { NAU8822_REG_COMPANDING_CONTROL, 0x0000 }, + { NAU8822_REG_CLOCKING, 0x0140 }, + { NAU8822_REG_ADDITIONAL_CONTROL, 0x0000 }, +-- +2.36.1 + From 23129034fb44c8f8baf6a6dedec6cb5bcc8c59bc Mon Sep 17 00:00:00 2001 From: alex-GuoGuo <103399248+alex-GuoGuo@users.noreply.github.com> Date: Mon, 29 Aug 2022 15:48:03 +0800 Subject: [PATCH 14/74] add adaptive function, add sw ae, add anti-flicker (#299) Co-authored-by: alex-guo Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- package/ai/code/imx219_0.conf | 112 +- package/ai/code/imx219_1.conf | 120 +- package/ai/code/imx219_1080x1920_0.conf | 990 +-- package/encode_app/src/Makefile | 5 +- package/encode_app/src/imx219_0.conf | 96 +- package/encode_app/src/imx219_1.conf | 96 +- package/mediactl_lib/mediactl_lib.mk | 4 + .../mediactl_lib/src/3a_ctl/ae_cfg_param.h | 101 + package/mediactl_lib/src/3a_ctl/ae_ctl.h | 129 + package/mediactl_lib/src/Makefile | 6 +- .../src/adaptive/adaptive_isp_reg.h | 211 + .../src/adaptive/adaptive_params.h | 63 + .../src/adaptive/adaptive_setting.h | 336 + .../src/adaptive/adaptive_user_func.h | 52 + .../sensor_params/canaan_isp_struct.h | 434 ++ .../imx219/adaptive_imx219_f2k.h | 1000 +++ .../imx219/adaptive_imx219_r2k.h | 1000 +++ .../imx385/adaptive_imx385_f2k.h | 1000 +++ .../imx385/adaptive_imx385_r2k.h | 1000 +++ package/mediactl_lib/src/config/imx219_0.conf | 96 +- package/mediactl_lib/src/config/imx219_1.conf | 96 +- .../src/config/imx219_1080x1920_0.conf | 98 +- .../src/config/imx219_1080x1920_1.conf | 98 +- .../src/config/video_drm_1080x1920.conf | 30 +- .../src/config/video_drm_1080x1920_r2k.conf | 26 +- package/mediactl_lib/src/lib3actl.so | Bin 0 -> 39064 bytes package/mediactl_lib/src/libadaptive.so | Bin 0 -> 107280 bytes package/mediactl_lib/src/linux/k510isp.h | 20 +- package/mediactl_lib/src/media_ctl.c | 612 +- package/mediactl_lib/src/media_ctl.h | 23 +- package/mediactl_lib/src/v4l2_demo/Makefile | 2 +- .../mediactl_lib/src/v4l2_demo/media_ctl.h | 52 +- .../mediactl_lib/src/v4l2_demo/v4l2-demo.c | 224 +- package/mediactl_lib/src/v4l2_drm/Makefile | 2 +- package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc | 166 +- .../src/v4l2_drm_isptool/Makefile | 2 +- .../src/v4l2_drm_isptool/v4l2_drm_isptool.c | 309 +- package/mediactl_lib/src/v4l2_test/Makefile | 2 +- .../mediactl_lib/src/v4l2_test/v4l2_test.c | 64 +- ...e-Reg-W-R-ioctl-imx219-mdelay2udelay.patch | 6009 +++++++++++++++++ 40 files changed, 13117 insertions(+), 1569 deletions(-) create mode 100644 package/mediactl_lib/src/3a_ctl/ae_cfg_param.h create mode 100644 package/mediactl_lib/src/3a_ctl/ae_ctl.h create mode 100644 package/mediactl_lib/src/adaptive/adaptive_isp_reg.h create mode 100644 package/mediactl_lib/src/adaptive/adaptive_params.h create mode 100644 package/mediactl_lib/src/adaptive/adaptive_setting.h create mode 100644 package/mediactl_lib/src/adaptive/adaptive_user_func.h create mode 100644 package/mediactl_lib/src/adaptive/sensor_params/canaan_isp_struct.h create mode 100644 package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_f2k.h create mode 100644 package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_r2k.h create mode 100644 package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_f2k.h create mode 100644 package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_r2k.h create mode 100755 package/mediactl_lib/src/lib3actl.so create mode 100755 package/mediactl_lib/src/libadaptive.so create mode 100644 package/patches/linux/0025-add-ISP-Core-Reg-W-R-ioctl-imx219-mdelay2udelay.patch diff --git a/package/ai/code/imx219_0.conf b/package/ai/code/imx219_0.conf index 0df33d8..df76fb4 100644 --- a/package/ai/code/imx219_0.conf +++ b/package/ai/code/imx219_0.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -79,9 +79,9 @@ "itc_ttl_h" :3476, "itc_ttl_v" :1166, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -119,29 +119,29 @@ "ae_win_endh" :1919, "ae_win_endv" :1079, "ae_yobj" :90, - "ae_av_rg" :13, - "ae_l_ex_time" :1100, + "ae_av_rg" :8, + "ae_l_ex_time" :1000, "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, "ae_ex_value_max" :1162, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :512, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :281, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -213,12 +213,12 @@ "rgb2yuv_12":170, "rgb2yuv_20":58, "rgb2yuv_21":42, - "rgb2yuv_22":256 + "rgb2yuv_22":256 }, "ada":{ "gm_rgb_en" :1, "gm_yuv_en" :0, - "ada_en" :0, + "ada_en" :1, "ada_sbz_en" :0, "ada_ccr_en" :0, "ada_adp_en" :0, @@ -226,11 +226,11 @@ "ada_stat_mode_sel" :0, "ada_enh_mode_sel" :0, "ada_hist_max" :128, - "ada_ttl_max" :128, + "ada_ttl_max" :255, "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1919, - "ada_win_endv" :1079 + "ada_win_endv" :1079 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,15 +251,15 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, "nr2d_y_k" :64, - "nr2d_c_k" :255 + "nr2d_c_k" :1 }, "3dnr":{ "nr3d_en" :1, @@ -271,8 +271,8 @@ "nr3db_c_en" :1, "nr3dm_nr2d_y_en" :1, "nr3dm_nr2d_c_en" :1, - "core_3dnr_wb_en" :1, - "core_3dnr_wb_sel" :1, + "core_3dnr_wb_en" :0, + "core_3dnr_wb_sel" :0, "core_3dnr_adp_luma_en" :0, "core_3dnr_adp_chroma_en" :0, "nr3dp_thy" :64, @@ -285,10 +285,10 @@ "nr3dm_thy" :64, "nr3dm_min" :0, "nr3dm_thw0" :128, - "core_3dnr_chroma_intensity" :122, + "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,16 +299,16 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, - "shp_th1" :18, - "shp_th2" :256, + "shp_th1" :3840, + "shp_th2" :4095, "shp_gain" :64 }, "cc":{ - "enh_cc_en" :1, + "enh_cc_en" :0, "enh_adp_cc_en" :0 - } + } }, "post_ctl":{ "otc_ctl":{ @@ -318,19 +318,19 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, - "luma_gain":128 + "luma_gain":128 }, "strt":{ "strt_en" :1, - "strt_gain":255 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :960, "ldc_cv" :540, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1919, - "af_stat_win_v_end" :1079 + "af_stat_win_v_end" :1079 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} \ No newline at end of file diff --git a/package/ai/code/imx219_1.conf b/package/ai/code/imx219_1.conf index 33a5236..900cfd9 100644 --- a/package/ai/code/imx219_1.conf +++ b/package/ai/code/imx219_1.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -79,9 +79,9 @@ "itc_ttl_h" :3476, "itc_ttl_v" :1166, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -92,8 +92,8 @@ }, "blc":{ "blc_en" :1, - "blc_offset" :220, - "blc_ratio" :270 + "blc_offset" :240, + "blc_ratio" :272 }, "lsc":{ "lsc_en" :1, @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -118,30 +118,30 @@ "ae_win_sttv" :0, "ae_win_endh" :1919, "ae_win_endv" :1079, - "ae_yobj" :100, - "ae_av_rg" :14, - "ae_l_ex_time" :1100, + "ae_yobj" :90, + "ae_av_rg" :8, + "ae_l_ex_time" :1000, "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :2, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, "ae_ex_value_max" :1162, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :512, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :154, "awb_blue_min_value" :258, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -213,12 +213,12 @@ "rgb2yuv_12":170, "rgb2yuv_20":58, "rgb2yuv_21":42, - "rgb2yuv_22":256 + "rgb2yuv_22":256 }, "ada":{ "gm_rgb_en" :1, "gm_yuv_en" :0, - "ada_en" :0, + "ada_en" :1, "ada_sbz_en" :0, "ada_ccr_en" :0, "ada_adp_en" :0, @@ -226,11 +226,11 @@ "ada_stat_mode_sel" :0, "ada_enh_mode_sel" :0, "ada_hist_max" :128, - "ada_ttl_max" :128, + "ada_ttl_max" :255, "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1919, - "ada_win_endv" :1079 + "ada_win_endv" :1079 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,15 +251,15 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, "nr2d_y_k" :64, - "nr2d_c_k" :255 + "nr2d_c_k" :1 }, "3dnr":{ "nr3d_en" :1, @@ -271,8 +271,8 @@ "nr3db_c_en" :1, "nr3dm_nr2d_y_en" :1, "nr3dm_nr2d_c_en" :1, - "core_3dnr_wb_en" :1, - "core_3dnr_wb_sel" :1, + "core_3dnr_wb_en" :0, + "core_3dnr_wb_sel" :0, "core_3dnr_adp_luma_en" :0, "core_3dnr_adp_chroma_en" :0, "nr3dp_thy" :64, @@ -285,10 +285,10 @@ "nr3dm_thy" :64, "nr3dm_min" :0, "nr3dm_thw0" :128, - "core_3dnr_chroma_intensity" :144, + "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,16 +299,16 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, - "shp_th1" :18, - "shp_th2" :256, + "shp_th1" :3840, + "shp_th2" :4095, "shp_gain" :64 }, "cc":{ - "enh_cc_en" :1, + "enh_cc_en" :0, "enh_adp_cc_en" :0 - } + } }, "post_ctl":{ "otc_ctl":{ @@ -318,19 +318,19 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, - "luma_gain":128 + "luma_gain":128 }, "strt":{ "strt_en" :1, - "strt_gain":248 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :960, "ldc_cv" :540, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1919, - "af_stat_win_v_end" :1079 + "af_stat_win_v_end" :1079 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} diff --git a/package/ai/code/imx219_1080x1920_0.conf b/package/ai/code/imx219_1080x1920_0.conf index b9b9e3b..3aa0260 100644 --- a/package/ai/code/imx219_1080x1920_0.conf +++ b/package/ai/code/imx219_1080x1920_0.conf @@ -1,531 +1,531 @@ { - "isp_general": { - "isp_out_sel": 0, - "dvp_ch_mode": 1, - "hist_3a_out_en": 0, - "main_out": { - "out_img_format": 1, - "out_yuv_in_format": 0, - "out_yuv422_pxl_order": 0, - "out_pxl_width": 0, - "out_frame_buf_size": 2048 + "isp_general":{ + "isp_out_sel":0, + "dvp_ch_mode":1, + "hist_3a_out_en":0, + "main_out":{ + "out_img_format":1, + "out_yuv_in_format":0, + "out_yuv422_pxl_order":0, + "out_pxl_width":0, + "out_frame_buf_size":2048 }, - "out0": { - "ds0_out_img_format": 1, - "ds0_out_yuv_in_format": 0, - "ds0_out_yuv422_pxl_order": 0, - "ds0_out_pxl_width": 0, - "ds0_frame_buf_size": 2048 + "out0":{ + "ds0_out_img_format":1, + "ds0_out_yuv_in_format":0, + "ds0_out_yuv422_pxl_order":0, + "ds0_out_pxl_width":0, + "ds0_frame_buf_size":2048 }, - "out1": { - "ds1_out_img_format": 1, - "ds1_out_yuv_in_format": 0, - "ds1_out_yuv422_pxl_order": 0, - "ds1_out_pxl_width": 0, - "ds1_frame_buf_size": 2048 + "out1":{ + "ds1_out_img_format":1, + "ds1_out_yuv_in_format":0, + "ds1_out_yuv422_pxl_order":0, + "ds1_out_pxl_width":0, + "ds1_frame_buf_size":2048 }, - "out2": { - "ds2_out_img_format": 0, - "ds2_out_yuv_in_format": 0, - "ds2_out_yuv422_pxl_order": 0, - "ds2_out_pxl_width": 0, - "ds2_frame_buf_size": 2048 + "out2":{ + "ds2_out_img_format":0, + "ds2_out_yuv_in_format":0, + "ds2_out_yuv422_pxl_order":0, + "ds2_out_pxl_width":0, + "ds2_frame_buf_size":2048 }, - "wdr": { - "wdr_mode": 0, - "wdr_long_ch_mode": 0, - "wdr_long_l2_buf_en": 0, - "wdr_short_s1_buf_en": 0, - "wdr_dynamic_switch_en": 0, - "wdr_long_l2_buf_depth": 0, - "wdr_long_img_format": 0, - "wdr_long_yuv_in_format": 0, - "wdr_long_img_out_format": 0, - "wdr_long_yuv422_pxl_order": 0, - "wdr_long_pixel_width": 2, - "wdr_buf_base": 0, - "wdr_line_stride": 0, - "wdr_frame_buf_size": 0 - }, - "nr3d": { - "nr3d_en": 0, - "nr3d_fbcd_en": 0, - "nr3d_mv_out_en": 0, - "nr3d_y_img_format": 0, - "nr3d_y_yuv_in_format": 0, - "nr3d_y_img_out_format": 0, - "nr3d_y_yuv422_pxl_order": 0, - "nr3d_y_pixel_width": 2, - "nr3d_uv_img_format": 0, - "nr3d_uv_yuv_in_format": 0, - "nr3d_uv_mig_out_format": 0, - "nr3d_uv_yuv422_pxl_order": 0, - "nr3d_uv_pixel_width": 2, - "nr3d_frame_buf_size": 0 - }, - "ldc": { - "ldc_line_stride": 2048, - "ldc_frame_buf_size": 2048 - } + "wdr":{ + "wdr_mode":0, + "wdr_long_ch_mode":0, + "wdr_long_l2_buf_en":0, + "wdr_short_s1_buf_en":0, + "wdr_dynamic_switch_en":0, + "wdr_long_l2_buf_depth":0, + "wdr_long_img_format":0, + "wdr_long_yuv_in_format":0, + "wdr_long_img_out_format":0, + "wdr_long_yuv422_pxl_order":0, + "wdr_long_pixel_width":2, + "wdr_buf_base":0, + "wdr_line_stride":0, + "wdr_frame_buf_size":0 + }, + "nr3d":{ + "nr3d_en":0, + "nr3d_fbcd_en":0, + "nr3d_mv_out_en":0, + "nr3d_y_img_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, + "nr3d_y_yuv422_pxl_order":0, + "nr3d_y_pixel_width":2, + "nr3d_uv_img_format":0, + "nr3d_uv_yuv_in_format":0, + "nr3d_uv_mig_out_format":0, + "nr3d_uv_yuv422_pxl_order":0, + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 + }, + "ldc":{ + "ldc_line_stride":2048, + "ldc_frame_buf_size":2048 + } }, "isp_core": { "itc": { - "hsync_pol": 0, - "vsync_pol": 0, - "hsync_input_timing": 2, - "vsync_input_timing": 1, - "flip_ctl": 0, - "video_fmt_sl": 0, - "itc_ttl_h": 3476, - "itc_ttl_v": 1166, - "itc_stt_hr": 0, - "itc_stt_vr": 1 + "hsync_pol":0, + "vsync_pol":0, + "hsync_input_timing":2, + "vsync_input_timing":1, + "flip_ctl" :0, + "video_fmt_sl":0, + "itc_ttl_h" :3453, + "itc_ttl_v" :1977, + "itc_stt_hr" :0, + "itc_stt_vr" :1 }, "tpg": { - "tpg_en": 0, - "bayer_mode_sel": 3, - "motion_mode_sel": 0, - "tpg_sel": 9, - "wdr_l_mul_data": 0, - "wdr_m_mul_data": 0, - "wdr_s_mul_data": 0 + "tpg_en":0, + "bayer_mode_sel":3, + "motion_mode_sel":0, + "tpg_sel":9, + "wdr_l_mul_data":0, + "wdr_m_mul_data":0, + "wdr_s_mul_data":0 }, - "blc": { - "blc_en": 1, - "blc_offset": 220, - "blc_ratio": 270 + "blc":{ + "blc_en" :1, + "blc_offset" :240, + "blc_ratio" :272 }, - "lsc": { - "lsc_en": 1, - "lsc_h_center": 900, - "lsc_v_center": 580, - "lsc_r_ratio": 10, - "lsc_g_ratio": 6, - "lsc_b_ratio": 6, - "lsc_ir_ratio": 6 + "lsc":{ + "lsc_en" :1, + "lsc_h_center" :480, + "lsc_v_center" :1000, + "lsc_r_ratio" :10, + "lsc_g_ratio":6, + "lsc_b_ratio" :6, + "lsc_ir_ratio" :6 }, - "ae": { - "ae_as_en": 1, - "ae_ag_en": 1, - "ae_airis_en": 0, - "ae_enter_ls_sel": 0, - "ae_exit_ls_sel": 0, - "ae_win_mode_sel": 0, - "ae_back_light_mode_sel": 0, - "ae_day_change_en": 0, - "ae_day_change_sel": 0, - "ae_win_stth": 0, - "ae_win_sttv": 0, - "ae_win_endh": 1919, - "ae_win_endv": 1079, - "ae_yobj": 100, - "ae_av_rg": 14, - "ae_l_ex_time": 1100, - "ae_m_ex_time": 32, - "ae_s_ex_time": 32, - "ae_agc": 256, - "ae_ad_shuttle_freq": 2, - "ae_ad_gain_freq": 0, - "ae_adjust_step_max": 36, - "ae_ex_value_max": 1162, - "ae_ex_value_mid": 256, - "ae_ex_value_min": 1, - "ae_gain_value_max": 2304, - "ae_gain_value_mid": 512, - "ae_gain_value_min": 256, - "ae_dn_switch_ad_step_max": 512, - "ae_dn_switch_wait_time": 255, - "ape_max_diff": 12, - "ape_drv_signal_max": 3840, - "ape_coeff_distance": 0, - "ape_coeff_speed": 0, - "ape_coeff_acceleration": 0, - "ape_drv_manual_value": 4095, - "ape_damp_manual_value": 2048 + "ae":{ + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, + "ae_enter_ls_sel" :0, + "ae_exit_ls_sel" :0, + "ae_win_mode_sel" :0, + "ae_back_light_mode_sel" :0, + "ae_day_change_en" :0, + "ae_day_change_sel" :0, + "ae_win_stth" :0, + "ae_win_sttv" :0, + "ae_win_endh" :1079, + "ae_win_endv" :1919, + "ae_yobj" :90, + "ae_av_rg" :8, + "ae_l_ex_time" :1000, + "ae_m_ex_time" :32, + "ae_s_ex_time" :32, + "ae_agc" :256, + "ae_ad_shuttle_freq" :0, + "ae_ad_gain_freq" :0, + "ae_adjust_step_max":36, + "ae_ex_value_max" :1973, + "ae_ex_value_mid" :256, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, + "ae_gain_value_mid" :512, + "ae_gain_value_min" :256, + "ae_dn_switch_ad_step_max" :1000, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, + "ape_coeff_distance" :0, + "ape_coeff_speed" :0, + "ape_coeff_acceleration" :0, + "ape_drv_manual_value" :4095, + "ape_damp_manual_value" :2048 }, - "awb": { - "awb_d65_en": 1, - "awb_ccm_en": 1, - "awb_en": 1, - "awb_mode_sel": 1, - "awb_hist_mode_sel": 0, - "awb_veri_en": 0, - "awb_fb_en": 0, - "awb_value_save_en": 0, - "awb_ccm_adp_adjust_en": 0, - "awb_stab_en": 1, - "awb_d65_red_gain": 466, - "awb_d65_blue_gain": 382, - "ccm_rr": 260, - "ccm_rg": 3, - "ccm_rb": 1, - "ccm_gr": 25, - "ccm_gg": 296, - "ccm_gb": 15, - "ccm_br": 1, - "ccm_bg": 39, - "ccm_bb": 296, - "ccm_correct_coff": 256, - "awb_win_stth": 0, - "awb_win_sttv": 0, - "awb_win_endh": 1919, - "awb_win_endv": 1079, - "awb_correct_diff_th": 8, - "awb_color_changeres_time": 8, - "awb_historgram_th": 4, - "awb_red_gain_adjust": 256, - "awb_green_gain_adjust": 256, - "awb_blue_gain_adjust": 256, - "awb_red_max_value": 256, - "awb_blue_max_value": 423, - "awb_red_min_value": 154, - "awb_blue_min_value": 258, - "awb_red_obj_value": 256, - "awb_blue_obj_value": 256 + "awb":{ + "awb_d65_en" :1, + "awb_ccm_en" :1, + "awb_en" :1, + "awb_mode_sel" :1, + "awb_hist_mode_sel" :0, + "awb_veri_en" :0, + "awb_fb_en" :0, + "awb_value_save_en" :0, + "awb_ccm_adp_adjust_en" :0, + "awb_stab_en" :1, + "awb_d65_red_gain" :466, + "awb_d65_blue_gain" :382, + "ccm_rr" :259, + "ccm_rg" :2, + "ccm_rb" :1, + "ccm_gr" :37, + "ccm_gg" :310, + "ccm_gb" :17, + "ccm_br" :1, + "ccm_bg" :75, + "ccm_bb" :332, + "ccm_correct_coff" :256, + "awb_win_stth" :0, + "awb_win_sttv" :0, + "awb_win_endh" :1079, + "awb_win_endv" :1919, + "awb_correct_diff_th" :8, + "awb_color_changeres_time" :8, + "awb_historgram_th" :4, + "awb_red_gain_adjust" :256, + "awb_green_gain_adjust" :256, + "awb_blue_gain_adjust" :256, + "awb_red_max_value" :259, + "awb_blue_max_value" :388, + "awb_red_min_value" :176, + "awb_blue_min_value" :262, + "awb_red_obj_value" :256, + "awb_blue_obj_value" :256 }, - "wdr": { - "wdr_fusion_en": 0, - "wdr_frame_sel": 0, - "wdr_adp_adjust_en": 0, - "wdr_stab_en": 0, - "wdr_en": 0, - "wdr_ghost_remove_en": 0, - "wdr_3frame_out_mode": 0, - "wdr_mode_sel": 0, - "wdr_2frame_ex_ratio": 1, - "wdr_3frame_ex_ratio": 1, - "wdr_stat_img_sel": 0, - "wdr_ltm_data_sel": 1, - "wdr_tz_data_sel": 1, - "wdr_remove_purple_en": 0, - "wdr_over_ex_ratio_th1": 384, - "wdr_over_ex_ratio_th2": 32, - "wdr_fusion_ratio_th": 192, - "wdr_fusion_value1": 64, - "wdr_fusion_value2": 16 + "wdr":{ + "wdr_fusion_en" :0, + "wdr_frame_sel" :0, + "wdr_adp_adjust_en" :0, + "wdr_stab_en" :0, + "wdr_en" :0, + "wdr_ghost_remove_en" :0, + "wdr_3frame_out_mode" :0, + "wdr_mode_sel" :0, + "wdr_2frame_ex_ratio" :1, + "wdr_3frame_ex_ratio" :1, + "wdr_stat_img_sel" :0, + "wdr_ltm_data_sel" :1, + "wdr_tz_data_sel" :1, + "wdr_remove_purple_en" :0, + "wdr_over_ex_ratio_th1" :384, + "wdr_over_ex_ratio_th2" :32, + "wdr_fusion_ratio_th" :192, + "wdr_fusion_value1" :64, + "wdr_fusion_value2" :16 }, - "csc": { - "rgb2yuv_00": 153, - "rgb2yuv_01": 256, - "rgb2yuv_02": 86, - "rgb2yuv_10": 301, - "rgb2yuv_11": 214, - "rgb2yuv_12": 170, - "rgb2yuv_20": 58, - "rgb2yuv_21": 42, - "rgb2yuv_22": 256 + "csc":{ + "rgb2yuv_00":153, + "rgb2yuv_01":256, + "rgb2yuv_02":86, + "rgb2yuv_10":301, + "rgb2yuv_11":214, + "rgb2yuv_12":170, + "rgb2yuv_20":58, + "rgb2yuv_21":42, + "rgb2yuv_22":256 }, - "ada": { - "gm_rgb_en": 1, - "gm_yuv_en": 0, - "ada_en": 0, - "ada_sbz_en": 0, - "ada_ccr_en": 0, - "ada_adp_en": 0, - "ada_adp_ccr_en": 0, - "ada_stat_mode_sel": 0, - "ada_enh_mode_sel": 0, - "ada_hist_max": 128, - "ada_ttl_max": 128, - "ada_win_stth": 0, - "ada_win_sttv": 0, - "ada_win_endh": 1919, - "ada_win_endv": 1079 + "ada":{ + "gm_rgb_en" :1, + "gm_yuv_en" :0, + "ada_en" :1, + "ada_sbz_en" :0, + "ada_ccr_en" :0, + "ada_adp_en" :0, + "ada_adp_ccr_en" :0, + "ada_stat_mode_sel" :0, + "ada_enh_mode_sel" :0, + "ada_hist_max" :128, + "ada_ttl_max" :255, + "ada_win_stth" :0, + "ada_win_sttv" :0, + "ada_win_endh" :1079, + "ada_win_endv" :1919 }, - "rgb-ir": { - "raw_fmt": 0, - "rgbir_rct_en": 0, - "dfc_en": 0, - "rgbir_fs_en": 0, - "rgbir_ot_sl": 0, - "rgbir_fs_max": 256, - "dfc_krb": 0, - "dfc_ky": 0, - "dfc_th": 256, - "dfc_th_1": 256 + "rgb-ir":{ + "raw_fmt" :0, + "rgbir_rct_en" :0, + "dfc_en" :0, + "rgbir_fs_en" :0, + "rgbir_ot_sl" :0, + "rgbir_fs_max" :256, + "dfc_krb" :0, + "dfc_ky" :0, + "dfc_th" :256, + "dfc_th_1" :256 }, - "2dnr": { - "dpeak_en": 1, - "nr2d_raw_en": 1, - "nr2d_eg_en": 1, - "nr2d_jl_en": 1, - "nr2d_av_en": 1, - "nr2d_c_en": 1, - "dpeak_adp_en": 1, - "nr2d_raw_adp_en": 1, - "nr2d_y_adp_en": 1, - "nr2d_c_adp_en": 1, - "nr2d_raw_kl": 16, - "nr2d_jl_th": 511, - "nr2d_eg_k": 48, - "nr2d_y_k": 64, - "nr2d_c_k": 255 + "2dnr":{ + "dpeak_en" :1, + "nr2d_raw_en" :1, + "nr2d_eg_en" :1, + "nr2d_jl_en" :1, + "nr2d_av_en" :1, + "nr2d_c_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, + "nr2d_raw_kl" :16, + "nr2d_jl_th" :511, + "nr2d_eg_k" :48, + "nr2d_y_k" :64, + "nr2d_c_k" :1 }, - "3dnr": { - "nr3d_en": 1, - "nr3dp_y_en": 1, - "nr3dp_c_en": 1, - "nr3dm_y_en": 1, - "nr3dm_c_en": 1, - "nr3db_y_en": 1, - "nr3db_c_en": 1, - "nr3dm_nr2d_y_en": 1, - "nr3dm_nr2d_c_en": 1, - "core_3dnr_wb_en": 1, - "core_3dnr_wb_sel": 1, - "core_3dnr_adp_luma_en": 0, - "core_3dnr_adp_chroma_en": 0, - "nr3dp_thy": 64, - "nr3dp_thyp": 64, - "nr3dp_thcp": 64, - "nr3dm_mid_th": 128, - "nr3dm_mtp_th": 8, - "nr3dm_mtc_th": 128, - "nr3dm_ym_k": 60, - "nr3dm_thy": 64, - "nr3dm_min": 0, - "nr3dm_thw0": 128, - "core_3dnr_chroma_intensity": 144, - "nr3db_nr2d_eg_th": 64, - "nr3db_thyp": 64, - "nr3db_thcp": 32 + "3dnr":{ + "nr3d_en" :1, + "nr3dp_y_en" :1, + "nr3dp_c_en" :1, + "nr3dm_y_en" :1, + "nr3dm_c_en" :1, + "nr3db_y_en" :1, + "nr3db_c_en" :1, + "nr3dm_nr2d_y_en" :1, + "nr3dm_nr2d_c_en" :1, + "core_3dnr_wb_en" :0, + "core_3dnr_wb_sel" :0, + "core_3dnr_adp_luma_en" :0, + "core_3dnr_adp_chroma_en" :0, + "nr3dp_thy" :64, + "nr3dp_thyp" :64, + "nr3dp_thcp" :64, + "nr3dm_mid_th" :128, + "nr3dm_mtp_th" :8, + "nr3dm_mtc_th" :128, + "nr3dm_ym_k" :60, + "nr3dm_thy" :64, + "nr3dm_min" :0, + "nr3dm_thw0" :128, + "core_3dnr_chroma_intensity" :16, + "nr3db_nr2d_eg_th" :64, + "nr3db_thyp" :64, + "nr3db_thcp" :32 }, - "enh": { - "ltm": { - "enh_ltm_en": 1, - "enh_adp_ltm_en": 0, - "ltm_gain": 128, - "ltm_mm_th": 128 + "enh":{ + "ltm":{ + "enh_ltm_en" :1, + "enh_adp_ltm_en" :0, + "ltm_gain" :128, + "ltm_mm_th" :128 }, - "sharp": { - "enh_sharp_en": 1, - "enh_adp_sharp_en": 1, - "shp_core": 8, - "shp_th1": 18, - "shp_th2": 256, - "shp_gain": 64 + "sharp":{ + "enh_sharp_en" :1, + "enh_adp_sharp_en" :0, + "shp_core" :8, + "shp_th1" :3840, + "shp_th2" :4095, + "shp_gain" :64 }, - "cc": { - "enh_cc_en": 1, - "enh_adp_cc_en": 0 + "cc":{ + "enh_cc_en" :0, + "enh_adp_cc_en" :0 } }, - "post_ctl": { - "otc_ctl": { - "otc_en": 0, - "otc_yc_sl": 0, - "otc_uv_sl": 1, - "otc_hs_plt_sl": 0, - "otc_vs_plt_sl": 0, - "otc_stt_vr": 0, - "otc_stt_hr": 0 + "post_ctl":{ + "otc_ctl":{ + "otc_en" :0, + "otc_yc_sl" :0, + "otc_uv_sl" :1, + "otc_hs_plt_sl" :0, + "otc_vs_plt_sl" :0, + "otc_stt_vr" :0, + "otc_stt_hr" :0 }, - "ctrst": { - "ctrst_en": 1, - "ctrst_gain": 128 + "ctrst":{ + "ctrst_en" :1, + "ctrst_gain":128 }, - "luma": { - "luma_en": 1, - "luma_gain": 128 + "luma":{ + "luma_en" :1, + "luma_gain":128 }, - "strt": { - "strt_en": 1, - "strt_gain": 248 + "strt":{ + "strt_en" :1, + "strt_gain":250 } }, - "ldc": { - "ldc_en": 0, - "ldc_rct_en": 0, - "ldc_rq_frq": 128, - "ldc_stt_ln": 540, - "ldc_ch": 960, - "ldc_cv": 540, - "ldc_cr": 684, - "ldc_cz": 684 + "ldc":{ + "ldc_en" :0, + "ldc_rct_en" :0, + "ldc_rq_frq" :128, + "ldc_stt_ln" :540, + "ldc_ch" :480, + "ldc_cv" :1000, + "ldc_cr" :684, + "ldc_cz" :684 }, - "af": { - "af_stat_en": 1, - "af_stat_mode_sel": 0, - "af_stat_win_h_start": 0, - "af_stat_win_v_start": 0, - "af_stat_win_h_end": 1919, - "af_stat_win_v_end": 1079 + "af":{ + "af_stat_en" :1, + "af_stat_mode_sel" :0, + "af_stat_win_h_start":0, + "af_stat_win_v_start":0, + "af_stat_win_h_end" :1079, + "af_stat_win_v_end" :1919 } }, - "isp_post": { - "rgb2yuv": { - "osd_rgb2yuv_coeff00": 306, - "osd_rgb2yuv_coeff01": 601, - "osd_rgb2yuv_coeff02": 117, - "osd_rgb2yuv_coeff03": 0, - "osd_rgb2yuv_coeff10": 3920, - "osd_rgb2yuv_coeff11": 3749, - "osd_rgb2yuv_coeff12": 523, - "osd_rgb2yuv_coeff13": 128, - "osd_rgb2yuv_coeff20": 523, - "osd_rgb2yuv_coeff21": 3658, - "osd_rgb2yuv_coeff22": 4011, - "osd_rgb2yuv_coeff23": 128 - }, - "yuv2rgb": { - "out_yuv2rgb_coeff00": 1024, - "out_yuv2rgb_coeff01": 0, - "out_yuv2rgb_coeff02": 1441, - "out_yuv2rgb_coeff03": 3916, - "out_yuv2rgb_coeff10": 1024, - "out_yuv2rgb_coeff11": 3742, - "out_yuv2rgb_coeff12": 3362, - "out_yuv2rgb_coeff13": 136, - "out_yuv2rgb_coeff20": 1024, - "out_yuv2rgb_coeff21": 1822, - "out_yuv2rgb_coeff22": 0, - "out_yuv2rgb_coeff23": 3868 - }, - "ds0": { - "ds0_out_rgb_mode": 0, - "ds0_out_rgb_en": 0, - "ds0_out_yuv_mode": 0, - "ds0_out_uv_swap": 0, - "ds0_osd0": { - "ds0_osd0_enable": 0, - "ds0_osd0_type": 0, - "ds0_osd0_alpha_tpye": 0, - "ds0_osd0_vst": 0, - "ds0_osd0_hst": 0, - "ds0_osd0_vend": 0, - "ds0_osd0_hend": 0, - "ds0_osd0_dma_request_length": 0, - "ds0_osd0_dma_map": 0, - "ds0_osd0_rgb_rev": 0, - "ds0_osd0_global_alpha": 0, - "ds0_osd0_swap_64": 0, - "ds0_osd0_outstanding_num": 0, - "ds0_osd0_bd_limit_en": 0 - }, - "ds0_osd1": { - "ds0_osd1_enable": 0, - "ds0_osd1_type": 0, - "ds0_osd1_alpha_tpye": 0, - "ds0_osd1_vst": 0, - "ds0_osd1_hst": 0, - "ds0_osd1_vend": 0, - "ds0_osd1_hend": 0, - "ds0_osd1_dma_request_length": 0, - "ds0_osd1_dma_map": 0, - "ds0_osd1_rgb_rev": 0, - "ds0_osd1_global_alpha": 0, - "ds0_osd1_swap_64": 0, - "ds0_osd1_outstanding_num": 0, - "ds0_osd1_bd_limit_en": 0 - }, - "ds0_osd2": { - "ds0_osd2_enable": 0, - "ds0_osd2_type": 0, - "ds0_osd2_alpha_tpye": 0, - "ds0_osd2_vst": 0, - "ds0_osd2_hst": 0, - "ds0_osd2_vend": 0, - "ds0_osd2_hend": 0, - "ds0_osd2_dma_request_length": 0, - "ds0_osd2_dma_map": 0, - "ds0_osd2_rgb_rev": 0, - "ds0_osd2_global_alpha": 0, - "ds0_osd2_swap_64": 0, - "ds0_osd2_outstanding_num": 0, - "ds0_osd2_bd_limit_en": 0 - } + "isp_post":{ + "rgb2yuv":{ + "osd_rgb2yuv_coeff00":306, + "osd_rgb2yuv_coeff01":601, + "osd_rgb2yuv_coeff02":117, + "osd_rgb2yuv_coeff03":0, + "osd_rgb2yuv_coeff10":3920, + "osd_rgb2yuv_coeff11":3749, + "osd_rgb2yuv_coeff12":523, + "osd_rgb2yuv_coeff13":128, + "osd_rgb2yuv_coeff20":523, + "osd_rgb2yuv_coeff21":3658, + "osd_rgb2yuv_coeff22":4011, + "osd_rgb2yuv_coeff23":128 }, - "ds1": { - "ds1_out_rgb_mode": 0, - "ds1_out_rgb_en": 0, - "ds1_out_yuv_mode": 0, - "ds1_out_uv_swap": 0, - "ds1_osd0": { - "ds1_osd0_enable": 0, - "ds1_osd0_type": 0, - "ds1_osd0_alpha_tpye": 0, - "ds1_osd0_vst": 0, - "ds1_osd0_hst": 0, - "ds1_osd0_vend": 0, - "ds1_osd0_hend": 0, - "ds1_osd0_dma_request_length": 0, - "ds1_osd0_dma_map": 0, - "ds1_osd0_rgb_rev": 0, - "ds1_osd0_global_alpha": 0, - "ds1_osd0_swap_64": 0, - "ds1_osd0_outstanding_num": 0, - "ds1_osd0_bd_limit_en": 0 - }, - "ds1_osd1": { - "ds1_osd1_enable": 0, - "ds1_osd1_type": 0, - "ds1_osd1_alpha_tpye": 0, - "ds1_osd1_vst": 0, - "ds1_osd1_hst": 0, - "ds1_osd1_vend": 0, - "ds1_osd1_hend": 0, - "ds1_osd1_dma_request_length": 0, - "ds1_osd1_dma_map": 0, - "ds1_osd1_rgb_rev": 0, - "ds1_osd1_global_alpha": 0, - "ds1_osd1_swap_64": 0, - "ds1_osd1_outstanding_num": 0, - "ds1_osd1_bd_limit_en": 0 - }, - "ds1_osd2": { - "ds1_osd2_enable": 0, - "ds1_osd2_type": 0, - "ds1_osd2_alpha_tpye": 0, - "ds1_osd2_vst": 0, - "ds1_osd2_hst": 0, - "ds1_osd2_vend": 0, - "ds1_osd2_hend": 0, - "ds1_osd2_dma_request_length": 0, - "ds1_osd2_dma_map": 0, - "ds1_osd2_rgb_rev": 0, - "ds1_osd2_global_alpha": 0, - "ds1_osd2_swap_64": 0, - "ds1_osd2_outstanding_num": 0, - "ds1_osd2_bd_limit_en": 0 - } + "yuv2rgb":{ + "out_yuv2rgb_coeff00":1024, + "out_yuv2rgb_coeff01":0, + "out_yuv2rgb_coeff02":1441, + "out_yuv2rgb_coeff03":3916, + "out_yuv2rgb_coeff10":1024, + "out_yuv2rgb_coeff11":3742, + "out_yuv2rgb_coeff12":3362, + "out_yuv2rgb_coeff13":136, + "out_yuv2rgb_coeff20":1024, + "out_yuv2rgb_coeff21":1822, + "out_yuv2rgb_coeff22":0, + "out_yuv2rgb_coeff23":3868 }, - "ds2": { - "ds2_out_rgb_mode": 0, - "ds2_out_rgb_en": 1, - "ds2_out_yuv_mode": 0, - "ds2_out_uv_swap": 0, - "ds2_osd0": { - "ds2_osd0_enable": 0, - "ds2_osd0_type": 0, - "ds2_osd0_alpha_tpye": 0, - "ds2_osd0_vst": 0, - "ds2_osd0_hst": 0, - "ds2_osd0_vend": 0, - "ds2_osd0_hend": 0, - "ds2_osd0_dma_request_length": 0, - "ds2_osd0_dma_map": 0, - "ds2_osd0_rgb_rev": 0, - "ds2_osd0_global_alpha": 0, - "ds2_osd0_swap_64": 0, - "ds2_osd0_outstanding_num": 0, - "ds2_osd0_bd_limit_en": 0 - }, - "ds2_osd1": { - "ds2_osd1_enable": 0, - "ds2_osd1_type": 0, - "ds2_osd1_alpha_tpye": 0, - "ds2_osd1_vst": 0, - "ds2_osd1_hst": 0, - "ds2_osd1_vend": 0, - "ds2_osd1_hend": 0, - "ds2_osd1_dma_request_length": 0, - "ds2_osd1_dma_map": 0, - "ds2_osd1_rgb_rev": 0, - "ds2_osd1_global_alpha": 0, - "ds2_osd1_swap_64": 0, - "ds2_osd1_outstanding_num": 0, - "ds2_osd1_bd_limit_en": 0 - } - } + "ds0":{ + "ds0_out_rgb_mode":0, + "ds0_out_rgb_en":0, + "ds0_out_yuv_mode":0, + "ds0_out_uv_swap":0, + "ds0_osd0":{ + "ds0_osd0_enable":0, + "ds0_osd0_type":0, + "ds0_osd0_alpha_tpye":0, + "ds0_osd0_vst":0, + "ds0_osd0_hst":0, + "ds0_osd0_vend":0, + "ds0_osd0_hend":0, + "ds0_osd0_dma_request_length":0, + "ds0_osd0_dma_map":0, + "ds0_osd0_rgb_rev":0, + "ds0_osd0_global_alpha":0, + "ds0_osd0_swap_64":0, + "ds0_osd0_outstanding_num":0, + "ds0_osd0_bd_limit_en":0 + }, + "ds0_osd1":{ + "ds0_osd1_enable":0, + "ds0_osd1_type":0, + "ds0_osd1_alpha_tpye":0, + "ds0_osd1_vst":0, + "ds0_osd1_hst":0, + "ds0_osd1_vend":0, + "ds0_osd1_hend":0, + "ds0_osd1_dma_request_length":0, + "ds0_osd1_dma_map":0, + "ds0_osd1_rgb_rev":0, + "ds0_osd1_global_alpha":0, + "ds0_osd1_swap_64":0, + "ds0_osd1_outstanding_num":0, + "ds0_osd1_bd_limit_en":0 + }, + "ds0_osd2":{ + "ds0_osd2_enable":0, + "ds0_osd2_type":0, + "ds0_osd2_alpha_tpye":0, + "ds0_osd2_vst":0, + "ds0_osd2_hst":0, + "ds0_osd2_vend":0, + "ds0_osd2_hend":0, + "ds0_osd2_dma_request_length":0, + "ds0_osd2_dma_map":0, + "ds0_osd2_rgb_rev":0, + "ds0_osd2_global_alpha":0, + "ds0_osd2_swap_64":0, + "ds0_osd2_outstanding_num":0, + "ds0_osd2_bd_limit_en":0 + } + }, + "ds1":{ + "ds1_out_rgb_mode":0, + "ds1_out_rgb_en":0, + "ds1_out_yuv_mode":0, + "ds1_out_uv_swap":0, + "ds1_osd0":{ + "ds1_osd0_enable":0, + "ds1_osd0_type":0, + "ds1_osd0_alpha_tpye":0, + "ds1_osd0_vst":0, + "ds1_osd0_hst":0, + "ds1_osd0_vend":0, + "ds1_osd0_hend":0, + "ds1_osd0_dma_request_length":0, + "ds1_osd0_dma_map":0, + "ds1_osd0_rgb_rev":0, + "ds1_osd0_global_alpha":0, + "ds1_osd0_swap_64":0, + "ds1_osd0_outstanding_num":0, + "ds1_osd0_bd_limit_en":0 + }, + "ds1_osd1":{ + "ds1_osd1_enable":0, + "ds1_osd1_type":0, + "ds1_osd1_alpha_tpye":0, + "ds1_osd1_vst":0, + "ds1_osd1_hst":0, + "ds1_osd1_vend":0, + "ds1_osd1_hend":0, + "ds1_osd1_dma_request_length":0, + "ds1_osd1_dma_map":0, + "ds1_osd1_rgb_rev":0, + "ds1_osd1_global_alpha":0, + "ds1_osd1_swap_64":0, + "ds1_osd1_outstanding_num":0, + "ds1_osd1_bd_limit_en":0 + }, + "ds1_osd2":{ + "ds1_osd2_enable":0, + "ds1_osd2_type":0, + "ds1_osd2_alpha_tpye":0, + "ds1_osd2_vst":0, + "ds1_osd2_hst":0, + "ds1_osd2_vend":0, + "ds1_osd2_hend":0, + "ds1_osd2_dma_request_length":0, + "ds1_osd2_dma_map":0, + "ds1_osd2_rgb_rev":0, + "ds1_osd2_global_alpha":0, + "ds1_osd2_swap_64":0, + "ds1_osd2_outstanding_num":0, + "ds1_osd2_bd_limit_en":0 + } + }, + "ds2":{ + "ds2_out_rgb_mode":0, + "ds2_out_rgb_en":1, + "ds2_out_yuv_mode":0, + "ds2_out_uv_swap":0, + "ds2_osd0":{ + "ds2_osd0_enable":0, + "ds2_osd0_type":0, + "ds2_osd0_alpha_tpye":0, + "ds2_osd0_vst":0, + "ds2_osd0_hst":0, + "ds2_osd0_vend":0, + "ds2_osd0_hend":0, + "ds2_osd0_dma_request_length":0, + "ds2_osd0_dma_map":0, + "ds2_osd0_rgb_rev":0, + "ds2_osd0_global_alpha":0, + "ds2_osd0_swap_64":0, + "ds2_osd0_outstanding_num":0, + "ds2_osd0_bd_limit_en":0 + }, + "ds2_osd1":{ + "ds2_osd1_enable":0, + "ds2_osd1_type":0, + "ds2_osd1_alpha_tpye":0, + "ds2_osd1_vst":0, + "ds2_osd1_hst":0, + "ds2_osd1_vend":0, + "ds2_osd1_hend":0, + "ds2_osd1_dma_request_length":0, + "ds2_osd1_dma_map":0, + "ds2_osd1_rgb_rev":0, + "ds2_osd1_global_alpha":0, + "ds2_osd1_swap_64":0, + "ds2_osd1_outstanding_num":0, + "ds2_osd1_bd_limit_en":0 + } + } } -} \ No newline at end of file +} diff --git a/package/encode_app/src/Makefile b/package/encode_app/src/Makefile index 4cf6670..3c4532b 100644 --- a/package/encode_app/src/Makefile +++ b/package/encode_app/src/Makefile @@ -16,10 +16,9 @@ CFLAGS = \ OBJ ?= encode_app $(OBJ): main.cpp video_app.cc G711Codec.cpp - $(C++) $(CFLAGS) $^ -L ./ -Wl,-Bdynamic -lvenc -L ./ -Wl,-Bstatic -llive555 -L ./ -Wl,-Bdynamic -lmediactl -L ./ -Wl,-Bdynamic -lvideo -L ./ -Wl,-Bdynamic -lasound -lstdc++ -Wl,-rpath . -lpthread -g -o $@ - + $(C++) $(CFLAGS) $^ -L ./ -Wl,-Bdynamic -lvenc -L ./ -Wl,-Bstatic -llive555 -L ./ -Wl,-Bdynamic -lmediactl -ladaptive -l3actl -L ./ -Wl,-Bdynamic -lvideo -L ./ -Wl,-Bdynamic -lasound -lstdc++ -Wl,-rpath . -lpthread -g -o $@ + clean: rm -f *.o rm -f *.d rm -f $(OBJ) - diff --git a/package/encode_app/src/imx219_0.conf b/package/encode_app/src/imx219_0.conf index 9d05d58..d7fd323 100644 --- a/package/encode_app/src/imx219_0.conf +++ b/package/encode_app/src/imx219_0.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -79,9 +79,9 @@ "itc_ttl_h" :3476, "itc_ttl_v" :1166, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -92,7 +92,7 @@ }, "blc":{ "blc_en" :1, - "blc_offset" :240, + "blc_offset" :240, "blc_ratio" :272 }, "lsc":{ @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -124,24 +124,24 @@ "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, "ae_ex_value_max" :1162, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :512, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :262, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -213,7 +213,7 @@ "rgb2yuv_12":170, "rgb2yuv_20":58, "rgb2yuv_21":42, - "rgb2yuv_22":256 + "rgb2yuv_22":256 }, "ada":{ "gm_rgb_en" :1, @@ -230,7 +230,7 @@ "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1919, - "ada_win_endv" :1079 + "ada_win_endv" :1079 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,15 +251,15 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, "nr2d_y_k" :64, - "nr2d_c_k" :1 + "nr2d_c_k" :1 }, "3dnr":{ "nr3d_en" :1, @@ -288,7 +288,7 @@ "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,7 +299,7 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, "shp_th1" :3840, "shp_th2" :4095, @@ -308,7 +308,7 @@ "cc":{ "enh_cc_en" :0, "enh_adp_cc_en" :0 - } + } }, "post_ctl":{ "otc_ctl":{ @@ -318,19 +318,19 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, - "luma_gain":128 + "luma_gain":128 }, "strt":{ "strt_en" :1, - "strt_gain":250 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :960, "ldc_cv" :540, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1919, - "af_stat_win_v_end" :1079 + "af_stat_win_v_end" :1079 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} \ No newline at end of file diff --git a/package/encode_app/src/imx219_1.conf b/package/encode_app/src/imx219_1.conf index 9d05d58..793c067 100644 --- a/package/encode_app/src/imx219_1.conf +++ b/package/encode_app/src/imx219_1.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -79,9 +79,9 @@ "itc_ttl_h" :3476, "itc_ttl_v" :1166, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -92,7 +92,7 @@ }, "blc":{ "blc_en" :1, - "blc_offset" :240, + "blc_offset" :240, "blc_ratio" :272 }, "lsc":{ @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -124,24 +124,24 @@ "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, "ae_ex_value_max" :1162, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :512, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :262, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -213,7 +213,7 @@ "rgb2yuv_12":170, "rgb2yuv_20":58, "rgb2yuv_21":42, - "rgb2yuv_22":256 + "rgb2yuv_22":256 }, "ada":{ "gm_rgb_en" :1, @@ -230,7 +230,7 @@ "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1919, - "ada_win_endv" :1079 + "ada_win_endv" :1079 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,15 +251,15 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, "nr2d_y_k" :64, - "nr2d_c_k" :1 + "nr2d_c_k" :1 }, "3dnr":{ "nr3d_en" :1, @@ -288,7 +288,7 @@ "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,7 +299,7 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, "shp_th1" :3840, "shp_th2" :4095, @@ -308,7 +308,7 @@ "cc":{ "enh_cc_en" :0, "enh_adp_cc_en" :0 - } + } }, "post_ctl":{ "otc_ctl":{ @@ -318,19 +318,19 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, - "luma_gain":128 + "luma_gain":128 }, "strt":{ "strt_en" :1, - "strt_gain":250 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :960, "ldc_cv" :540, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1919, - "af_stat_win_v_end" :1079 + "af_stat_win_v_end" :1079 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} diff --git a/package/mediactl_lib/mediactl_lib.mk b/package/mediactl_lib/mediactl_lib.mk index a223ceb..30dd88e 100644 --- a/package/mediactl_lib/mediactl_lib.mk +++ b/package/mediactl_lib/mediactl_lib.mk @@ -19,12 +19,16 @@ endef define MEDIACTL_LIB_INSTALL_STAGING_CMDS cp -rf $(@D)/libmediactl.so $(STAGING_DIR)/lib64/lp64d/libmediactl.so + cp -rf $(@D)/lib3actl.so $(STAGING_DIR)/lib64/lp64d/lib3actl.so + cp -rf $(@D)/libadaptive.so $(STAGING_DIR)/lib64/lp64d/libadaptive.so cp -rf $(@D)/media_ctl.h $(STAGING_DIR)/usr/include cp -rf $(@D)/isp/cJSON.h $(STAGING_DIR)/usr/include endef define MEDIACTL_LIB_INSTALL_TARGET_CMDS $(INSTALL) -D -m 0755 $(@D)/libmediactl.so $(TARGET_DIR)/lib64/lp64d/libmediactl.so + $(INSTALL) -D -m 0755 $(@D)/lib3actl.so $(TARGET_DIR)/lib64/lp64d/lib3actl.so + $(INSTALL) -D -m 0755 $(@D)/libadaptive.so $(TARGET_DIR)/lib64/lp64d/libadaptive.so mkdir $(TARGET_DIR)/app/mediactl_lib/ -p #$(INSTALL) -D -m 0755 $(@D)/v4l2_demo/v4l2-demo $(TARGET_DIR)/app/mediactl_lib/ #$(INSTALL) -D -m 0755 $(@D)/v4l2_demo/*.conf $(TARGET_DIR)/app/mediactl_lib/ diff --git a/package/mediactl_lib/src/3a_ctl/ae_cfg_param.h b/package/mediactl_lib/src/3a_ctl/ae_cfg_param.h new file mode 100644 index 0000000..0a107f0 --- /dev/null +++ b/package/mediactl_lib/src/3a_ctl/ae_cfg_param.h @@ -0,0 +1,101 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __3A_AE_CTL_CFG_H__ +#define __3A_AE_CTL_CFG_H__ + +static AE_CTL_INIT_CFG_T ae_ctl_init_cfg_param_dual_imx219 = +{ + /* can modify */ + .bDualCameraSync = 1, + .nSingleSensorETDelayFrame = {1, 1}, // [0]: f2k, [1]: r2k + .nSingleSensorSetMode = {0, 0}, // [0]: f2k, [1]: r2k + .nDualSensorETDelayFrame = {1, 1}, // [0]: f2k, [1]: r2k + .nDualSensorSetMode = {1, 1}, // [0]: f2k, [1]: r2k + .nFrameRate = {30, 30}, // [0]: sensor0, [1]: sensor1 + /* do not change */ + .nAeSmoothSteps = 9, +}; + +static AE_CTL_INIT_CFG_T ae_ctl_init_cfg_param_dual_imx385 = +{ + /* can modify */ + .bDualCameraSync = 1, + .nSingleSensorETDelayFrame = {1, 1}, // [0]: f2k, [1]: r2k + .nSingleSensorSetMode = {0, 0}, // [0]: f2k, [1]: r2k + .nDualSensorETDelayFrame = {0, 0}, // [0]: f2k, [1]: r2k + .nDualSensorSetMode = {0, 0}, // [0]: f2k, [1]: r2k + .nFrameRate = {30, 30}, // [0]: sensor0, [1]: sensor1 + + /* do not change */ + .nAeSmoothSteps = 9, +}; + +/* different sensor type between sensor0 and sensor1 */ +// static AE_CTL_INIT_CFG_T ae_ctl_init_cfg_param_imx385_imx219 = +// { +// /* can modify */ +// .bDualCameraSync = 1, +// .nSingleSensorETDelayFrame = {1, 1}, // [0]: f2k, [1]: r2k +// .nSingleSensorSetMode = {0, 0}, // [0]: f2k, [1]: r2k +// .nDualSensorETDelayFrame = {0, 0}, // [0]: f2k, [1]: r2k +// .nDualSensorSetMode = {0, 0}, // [0]: f2k, [1]: r2k +// .nFrameRate = {30, 30}, // [0]: sensor0, [1]: sensor1 + +// /* do not change */ +// .nAeSmoothSteps = 9, +// }; + +AE_CTL_SENSOR_NAME_T ae_ctl_sensor_name[] = +{ + // dual imx219(default) + { + .cSensor0Name = "m00_f_imx219_0 0-0010", + .cSensor1Name = "m01_f_imx219_1 3-0010", + .tAeCtlInitCfg = &ae_ctl_init_cfg_param_dual_imx219, + }, + + // dual imx385 + { + .cSensor0Name = "m00_f_imx385_0 0-0010", + .cSensor1Name = "m00_f_imx385_0 3-0010", + .tAeCtlInitCfg = &ae_ctl_init_cfg_param_dual_imx385, + }, + + // // sensor0: imx385, sensor1: imx219 + // { + // .cSensor0Name = "m00_f_imx385_0 0-0010", + // .cSensor1Name = "m00_f_imx219_0 3-0010", + // .tAeCtlInitCfg = &ae_ctl_init_cfg_param_imx385_imx219, + // }, +}; + +AE_CTL_SENSOR_NAME_S_T ae_ctl_sensor_name_s = +{ + .nSize = sizeof(ae_ctl_sensor_name) / sizeof(AE_CTL_SENSOR_NAME_T), + .tAeCtlSensorName = ae_ctl_sensor_name, +}; + +#endif \ No newline at end of file diff --git a/package/mediactl_lib/src/3a_ctl/ae_ctl.h b/package/mediactl_lib/src/3a_ctl/ae_ctl.h new file mode 100644 index 0000000..302550b --- /dev/null +++ b/package/mediactl_lib/src/3a_ctl/ae_ctl.h @@ -0,0 +1,129 @@ +#ifndef __3A_AE_CTL_H__ +#define __3A_AE_CTL_H__ + +enum ae_ctl_isp_pipeline_e +{ + AE_CTL_ISP_F2K_PIPELINE, + AE_CTL_ISP_R2K_PIPELINE, + AE_CTL_ISP_TOF_PIPELINE +}; + +enum ISP_AE_Mode +{ + AE_Auto, + AE_Manual, +}; + +enum ISP_AE_Anti_Flicker_Mode +{ + Anti_flicker_50Hz_auto, + Anti_ficker_60Hz_auto, + Anti_flicker_50Hz_force, + Anti_flicker_60Hz_force, + Anti_flicker_None, +}; + +enum ISP_Backlight_Mode +{ + Normal, + Backlight_Compensation, + Stronglight_Suppression, +}; + +enum anti_flicker_scl_e +{ + ANTI_FLICKER_ALL_DSIABLE, + ANTI_FLICKER_F2K_ENABLE, + ANTI_FLICKER_R2K_ENABLE, + ANTI_FLICKER_ALL2K_ENABLE, +}; + +struct ISP_AE_Parameters { + enum ISP_AE_Mode AE_Mode; + enum ISP_AE_Anti_Flicker_Mode AE_AntiFlicker; //Anti-flicker mode + enum ISP_Backlight_Mode AE_Backlight; //Backlight mode + int target; //get from AE_YOBJ + int LockRange; //get from AE_AV_RG + int maxET; //get from AE_EXP_MAX + int maxGain; //get from AE_AGC_MAX + int minET; //get from AE_EXP_MIN + int minGain; //get from AE_AGC_MIN + int Lock_IntNum; //get from AE_LKIN_SL, AE_LKIN_SL = 0: F2K_Lock_IntNum = 32; AE_LKIN_SL = 1: F2K_Lock_IntNum = 64; + int Lock_OutNum; //get from AE_LKOT_SL, AE_LKOT_SL = 0: F2K_Lock_OutNum = 32; AE_LKOT_SL = 1: F2K_Lock_OutNum = 64; + + int ET_Current; //initial setting: get from AE_EXP_L + int Gain_Current; //initial setting: get from AE_AGC + int ET_New; + int Gain_New; + int Def_Gain; + unsigned long Max_Exposure_Value; // F2K_maxET*F2K_maxGain + unsigned long Min_Exposure_Value; //F2K_minET * F2K_minGain + unsigned long Old_Exposure_Value; // ET_Curren* Gain_Current + unsigned long New_Exposure_Value; //New_ET* New_Gain + unsigned int ET_Set; + unsigned int Gain_Set; + + int LockStatus; + int Process; //0：not in set AE process；1~ AESmoothSteps：in set AE process + int Change; //0: in the process of decrease the exposure value；1: in the process of increasing the exposure value + int FrameRate; //Frame rate + int FrameLines; //ET lines per frame + int AntiF_Lines; //Based ET lines for Anti_Flicker 50Hz/60Hz + int Anti_50Hz_Lines; // 1/100s ET lines + int Anti_60Hz_Lines; //1/120s ET lines + int ready_to_write_et; // need write exp time current frame + int ready_to_write_gain; // need write gain current frame +}; + +typedef struct { + int nExpTimeLines; + int nGain; +} AE_CTL_AE_STAT_T; + +typedef struct { + /* modify param */ + bool bDualCameraSync; + int nSingleSensorETDelayFrame[2]; + int nSingleSensorSetMode[2]; + int nDualSensorETDelayFrame[2]; + int nDualSensorSetMode[2]; + int nFrameRate[2]; + /* fix param */ + int nAeSmoothSteps; //将AE收敛分为9步完成,可设置, >=7 // internal + +} AE_CTL_INIT_CFG_T; + +typedef struct { + char * cSensor0Name; + char * cSensor1Name; + AE_CTL_INIT_CFG_T * tAeCtlInitCfg; +} AE_CTL_SENSOR_NAME_T; + +typedef struct { + int nSize; + AE_CTL_SENSOR_NAME_T * tAeCtlSensorName; +} AE_CTL_SENSOR_NAME_S_T; + +extern bool Sensor1_Sync; +extern int AESmoothSteps; //将AE收敛分为9步完成,可设置, >=7 +extern int ETDelayFrameNumber[2]; //Sensor ET设置生效所需帧数 +extern struct ISP_AE_Parameters AE_Para_Inf[2]; + +/* main functions */ +int Anti_Flicker_ETL(enum ae_ctl_isp_pipeline_e pipeline); +int Set_AE_Value(enum ae_ctl_isp_pipeline_e pipeline, struct media_entity * pipe, AE_CTL_AE_STAT_T * ae_stat_callback); + +/* user enable*/ +int anti_flicker_scl(int scl); + +/* user init */ +int ae_ctl_cfg_init(int pipeline_en_f2k, int pipeline_en_r2k, AE_CTL_SENSOR_NAME_S_T ae_ctl_sensor_name_s, char * sensor0_name, char * sensor1_name); +int ae_ctl_init(enum ae_ctl_isp_pipeline_e pipeline, struct isp_core_cfg_info isp_core_cfg); + +/* user functions */ +int ae_ctl_calc(enum ae_ctl_isp_pipeline_e pipeline, struct k510isp_ae_stats ae_stats, struct media_entity * pipe, AE_CTL_AE_STAT_T * ae_stat_callback); + +/* user get version */ +char * ae_ctl_get_version(); + +#endif \ No newline at end of file diff --git a/package/mediactl_lib/src/Makefile b/package/mediactl_lib/src/Makefile index 46bef81..37426be 100644 --- a/package/mediactl_lib/src/Makefile +++ b/package/mediactl_lib/src/Makefile @@ -16,10 +16,10 @@ CROSS_COMPILE = riscv64-linux- CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld -CCFLAGS=-g -Wall -lm -L ./ -O2 +CCFLAGS=-g -Wall -lm -L./ -Iadaptive -ladaptive -I3actl -l3actl -O2 ${TARGET}: ${OBJ} - ${LD} ${OBJ} -shared -o $@ + ${LD} ${OBJ} -L./ -ladaptive -l3actl -shared -o $@ @echo "Compile done." $(OBJ):%.o:%.c @@ -36,4 +36,4 @@ clean: @rm -f ${TARGET} @echo "Clean target files done." - @echo "Clean done." \ No newline at end of file + @echo "Clean done." diff --git a/package/mediactl_lib/src/adaptive/adaptive_isp_reg.h b/package/mediactl_lib/src/adaptive/adaptive_isp_reg.h new file mode 100644 index 0000000..1643d54 --- /dev/null +++ b/package/mediactl_lib/src/adaptive/adaptive_isp_reg.h @@ -0,0 +1,211 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ +#ifndef _ADAPTIVE_ISP_CORE_REG_H_ +#define _ADAPTIVE_ISP_CORE_REG_H_ + +//itc +#define ISP_CORE_ITC_CTL (0x0000) +#define ISP_CORE_ITC_TTL_V (0x0004) // * +#define ISP_CORE_ITC_TTL_H (0x0008) +#define ISP_CORE_IMAGE_V_START (0x000C) +#define ISP_CORE_IMAGE_H_START (0x0010) +#define ISP_CORE_IMAGE_ACTIVE_WIDTH (0x0014) +#define ISP_CORE_IMAGE_ACTIVE_HEIGHT (0x0018) +//tpg +#define ISP_CORE_TEST_CTL (0x001C) +//blc +#define ISP_CORE_BLC_CTL (0x0020) +#define ISP_CORE_BLC_OFFSET (0x0024) +#define ISP_CORE_BLC_RATIO (0x0028) +//lsc +#define ISP_CORE_LSC_CTL (0x002C) +#define ISP_CORE_LSC_H_CENTER (0x0030) +#define ISP_CORE_LSC_V_CENTER (0x0034) +#define ISP_CORE_LSC_R_RATIO (0x0038) +#define ISP_CORE_LSC_G_RATIO (0x003C) +#define ISP_CORE_LSC_B_RATIO (0x0040) +#define ISP_CORE_LSC_IR_RATIO (0x0044) +//ae +#define ISP_CORE_AE_CTL (0x0050) +#define ISP_CORE_AE_WIN_H_START (0x0054) +#define ISP_CORE_AE_WIN_V_START (0x0058) +#define ISP_CORE_AE_WIN_H_END (0x005C) +#define ISP_CORE_AE_WIN_V_END (0x0060) +#define ISP_CORE_AE_TAR_BR (0x0064) +#define ISP_CORE_AE_TAR_BR_RANGE (0x0068) +#define ISP_CORE_AE_L_EX_TIME (0x006C) +#define ISP_CORE_AE_M_EX_TIME (0x0070) +#define ISP_CORE_AE_S_EX_TIME (0x0074) +#define ISP_CORE_AE_AGC (0x0078) +#define ISP_CORE_AE_ADJUST_CTL (0x007C) +#define ISP_CORE_AE_ADJUST_STEP_MAX (0x0080) +#define ISP_CORE_AE_EX_VALUE_MAX (0x0084) +#define ISP_CORE_AE_EX_VALUE_MID (0x0088) +#define ISP_CORE_AE_EX_VALUE_MIN (0x008C) +#define ISP_CORE_AE_GAIN_MAX (0x0090) +#define ISP_CORE_AE_GAIN_MID (0x0094) +#define ISP_CORE_AE_GAIN_MIN (0x0098) +#define ISP_CORE_AE_DN_SWITCH_ADJUST_STEP_MAX (0x009C) +#define ISP_CORE_AE_DN_SWITCH_WAIT_TIME (0x00A0) + +#define ISP_CORE_APE_DIFF_MAX (0x00AC) +#define ISP_CORE_APE_DRV_SIGNAL_MAX (0x00B0) +#define ISP_CORE_APE_COEFF_DIS (0x00B4) +#define ISP_CORE_APE_COEFF_SPEED (0x00B8) +#define ISP_CORE_APE_COEFF_ACCE (0x00BC) +#define ISP_CORE_APE_DRV_MANUAL_VALUE (0x00C0) +#define ISP_CORE_APE_DAMP_MANUAL_VALUE (0x00C4) + +#define ISP_CORE_AE_VALUE_READY (0x00D4) +#define ISP_CORE_AE_LONG_CUR_EX (0x00D8) +#define ISP_CORE_AE_MID_CUR_EX (0x00DC) +#define ISP_CORE_AE_SHORT_CUR_EX (0x00E0) +#define ISP_CORE_AE_CUR_DIGITAL_GAIN (0x00E4) +#define ISP_CORE_AE_CUR_AVE_BRIGHTNESS (0x00E8) +#define ISP_CORE_AE_CUR_DN_STATUS (0x00EC) +#define ISP_CORE_AE_EX_STATUS (0x00F0) +#define ISP_CORE_AE_SUM (0x00F4) +#define ISP_CORE_AE_PIXEL_SUM (0x00F8) +//awb +#define ISP_CORE_AWB_CTL (0x0104) +#define ISP_CORE_AWB_D65_RED_GAIN (0x0108) +#define ISP_CORE_AWB_D65_BLUE_GAIN (0x010C) +#define ISP_CORE_CCM_RR_COFF (0x0110) +#define ISP_CORE_CCM_RG_COFF (0x0114) +#define ISP_CORE_CCM_RB_COFF (0x0118) +#define ISP_CORE_CCM_GR_COFF (0x011C) +#define ISP_CORE_CCM_GG_COFF (0x0120) +#define ISP_CORE_CCM_GB_COFF (0x0124) +#define ISP_CORE_CCM_BR_COFF (0x0128) +#define ISP_CORE_CCM_BG_COFF (0x012C) +#define ISP_CORE_CCM_BB_COFF (0x0130) +#define ISP_CORE_CCM_CORRECT_COFF (0x0134) +#define ISP_CORE_AWB_WIN_H_START (0x0138) +#define ISP_CORE_AWB_WIN_V_START (0x013C) +#define ISP_CORE_AWB_WIN_H_END (0x0140) +#define ISP_CORE_AWB_WIN_V_END (0x0144) +#define ISP_CORE_AWB_CORRECT_DIFF_TH (0x0148) +#define ISP_CORE_AWB_RES_TIME (0x014C) +#define ISP_CORE_AWB_HIST_TH (0x0150) +#define ISP_CORE_AWB_RED_GAIN_ADJUST (0x0154) +#define ISP_CORE_AWB_GREEN_GAIN_ADJUST (0x0158) +#define ISP_CORE_AWB_BLUE_GAIN_ADJUST (0x015C) +#define ISP_CORE_AWB_RED_MAX_VALUE (0x0160) +#define ISP_CORE_AWB_BLUE_MAX_VALUE (0x0164) +#define ISP_CORE_AWB_RED_MIN_VALUE (0x0168) +#define ISP_CORE_AWB_BLUE_MIN_VALUE (0x016C) +#define ISP_CORE_AWB_RED_OBJ_VALUE (0x0170) +#define ISP_CORE_AWB_BLUE_OBJ_VALUE (0x0174) +#define ISP_CORE_AWB_BLUE_HIST_VALUE (0x017C) +#define ISP_CORE_AWB_BLUE_HIST_PIXEL (0x0180) +#define ISP_CORE_AWB_RED_HIST_VALUE (0x0184) +#define ISP_CORE_AWB_RED_HIST_PIXEL (0x0188) +#define ISP_CORE_AWB_BYPASS_BLUE_HIST_VALUE (0x018C) +#define ISP_CORE_AWB_BYPASS_BLUE_HIST_PIXEL (0x0190) +#define ISP_CORE_AWB_BYPASS_RED_HIST_VALUE (0x0194) +#define ISP_CORE_AWB_BYPASS_RED_HIST_PIXEL (0x0198) +#define ISP_CORE_AWB_RED_VALUE (0x019C) +#define ISP_CORE_AWB_GREEN_VALUE (0x01A0) +#define ISP_CORE_AWB_BLUE_VALUE (0x01A4) +#define ISP_CORE_AWB_ORG_RED_VALUE (0x01A8) +#define ISP_CORE_AWB_ORG_GREEN_VALUE (0x01AC) +#define ISP_CORE_AWB_ORG_BLUE_VALUE (0x01B0) +//wdr +#define ISP_CORE_WDR_CTL (0x01B8) +#define ISP_CORE_WDR_OVER_EX_RATIO_TH1 (0x01BC) +#define ISP_CORE_WDR_OVER_EX_RATIO_TH2 (0x01C0) +#define ISP_CORE_WDR_FUSION_RATIO_TH (0x01C4) +#define ISP_CORE_WDR_FUSION_VALUE1 (0x01C8) +#define ISP_CORE_WDR_FUSION_VALUE2 (0x01CC) +//csc +#define ISP_CORE_CSC_R2Y_00 (0x01D8) +#define ISP_CORE_CSC_R2Y_01 (0x01DC) +#define ISP_CORE_CSC_R2Y_02 (0x01E0) +#define ISP_CORE_CSC_R2Y_10 (0x01E4) +#define ISP_CORE_CSC_R2Y_11 (0x01E8) +#define ISP_CORE_CSC_R2Y_12 (0x01EC) +#define ISP_CORE_CSC_R2Y_20 (0x01F0) +#define ISP_CORE_CSC_R2Y_21 (0x01F4) +#define ISP_CORE_CSC_R2Y_22 (0x01F8) +//ada +#define ISP_CORE_ADA_CTL (0x0204) +#define ISP_CORE_ADA_STAT_MAX_VALUE (0x0208) +#define ISP_CORE_ADA_AD_STREN_MAX_VALUE (0x020C) +#define ISP_CORE_ADA_WIN_H_START (0x0210) +#define ISP_CORE_ADA_WIN_V_START (0x0214) +#define ISP_CORE_ADA_WIN_H_END (0x0218) +#define ISP_CORE_ADA_WIN_V_END (0x021C) +//rgbir +#define ISP_CORE_RGBIR_CTL (0x0230) +#define ISP_CORE_RGBIR_RPC_MAX_VALUE (0x0234) +#define ISP_CORE_RGBIR_RPC_COLOR_COFF (0x0238) +#define ISP_CORE_RGBIR_RPC_LUMA_COFF (0x023C) +#define ISP_CORE_RGBIR_RPC_TH (0x0240) +#define ISP_CORE_RGBIR_RPC_TH1 (0x0244) +//2dnr +#define ISP_CORE_2DNR_CTL (0x0258) +#define ISP_CORE_2DNR_RAW_INTENSITY (0x025C) +#define ISP_CORE_2DNR_BAP_INTENSITY (0x0260) +#define ISP_CORE_2DNR_EDGE_INTENSITY (0x0264) +#define ISP_CORE_2DNR_LUMA_INTENSITY (0x0268) +#define ISP_CORE_2DNR_CHROMA_INTENSITY (0x026C) +//3dnr +#define ISP_CORE_3DNR_CTL (0x0278) +#define ISP_CORE_3DNR_PRE_LUMA_TH (0x027C) +#define ISP_CORE_3DNR_PRE_LUMA_INTENSITY (0x0280) +#define ISP_CORE_3DNR_PRE_CHROMA_INTENSITY (0x0284) +#define ISP_CORE_3DNR_MID_FILTER_TH (0x0288) +#define ISP_CORE_3DNR_PRE_MID_FILTER_TH (0x028C) +#define ISP_CORE_3DNR_CUR_FILTER_TH (0x0290) +#define ISP_CORE_3DNR_LOW_PASS_FILTER_TH (0x0294) +#define ISP_CORE_3DNR_LUMA_TH (0x0298) +#define ISP_CORE_3DNR_MIN_VALUE (0x029C) +#define ISP_CORE_3DNR_LUMA_INTENSITY (0x02A0) +#define ISP_CORE_3DNR_CHROMA_INTENSITY (0x02A4) +#define ISP_CORE_3DNR_POST_EDGE_TH (0x02A8) +#define ISP_CORE_3DNR_POST_LUMA_INTENSITY (0x02AC) +#define ISP_CORE_3DNR_POST_CHROMA_INTENSITY (0x02B0) +//enh +#define ISP_CORE_ENH_CTL (0x02BC) +#define ISP_CORE_LTM_GAIN (0x02C0) +#define ISP_CORE_LTM_TH (0x02C4) +#define ISP_CORE_ENH_NR_TH (0x02C8) +#define ISP_CORE_ENH_TH1 (0x02CC) +#define ISP_CORE_ENH_TH2 (0x02D0) +#define ISP_CORE_SHARP_GAIN (0x02D4) +//post +#define ISP_CORE_POST_CTL (0x02E4) +#define ISP_CORE_CONT_GAIN (0x02E8) +#define ISP_CORE_LUMA_GAIN (0x02EC) +#define ISP_CORE_SATU_GAIN (0x02F0) +//otc +#define ISP_CORE_OTC_STT_VR (0x02F4) +#define ISP_CORE_OTC_STT_HR (0x02F8) +#define ISP_CORE_OTC_HEIGHT (0x02FC) +#define ISP_CORE_OTC_WIDTH (0x0300) +//ldc +#define ISP_CORE_LDC_CTL (0x0304) +#define ISP_CORE_LDC_REQ_FREQ (0x0308) +#define ISP_CORE_LDC_H_CENTER_POS (0x030C) +#define ISP_CORE_LDC_V_CENTER_POS (0x0310) +#define ISP_CORE_LDC_RECTIFY_CR (0x0314) +#define ISP_CORE_LDC_RECTIFY_CZ (0x0318) +//ram table +#define ISP_CORE_RAM_WR_STATUS (0x0320) +#define ISP_CORE_RAM_RD_STATUS (0x0324) +#define ISP_CORE_RAM_READ_LOCK (0x0328) +//af +#define ISP_CORE_AF_CTL (0x0340) +#define ISP_CORE_AF_STAT_WIN_H_START (0x0344) +#define ISP_CORE_AF_STAT_WIN_V_START (0x0348) +#define ISP_CORE_AF_STAT_WIN_H_END (0x034C) +#define ISP_CORE_AF_STAT_WIN_V_END (0x0350) +#define ISP_CORE_AF_MID_FRQ_DATA (0x035C) +#define ISP_CORE_AF_HIGH_FRQ_DATA (0x0360) +#define ISP_CORE_AF_STAT_PIXEL_NUM (0x0364) +#define ISP_CORE_RGB_GAMMA_HEAD_ADDR (0x0400) +#endif /*_ISP_CORE_REG_H_*/ \ No newline at end of file diff --git a/package/mediactl_lib/src/adaptive/adaptive_params.h b/package/mediactl_lib/src/adaptive/adaptive_params.h new file mode 100644 index 0000000..62ea856 --- /dev/null +++ b/package/mediactl_lib/src/adaptive/adaptive_params.h @@ -0,0 +1,63 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _ADAPTIVE_PARAMS_SETTING_ +#define _ADAPTIVE_PARAMS_SETTING_ + +/* f2k adaptive param include */ +#include "sensor_params/imx219/adaptive_imx219_f2k.h" +#include "sensor_params/imx385/adaptive_imx385_f2k.h" + +/* r2k adaptive param include */ +#include "sensor_params/imx219/adaptive_imx219_r2k.h" +#include "sensor_params/imx385/adaptive_imx385_r2k.h" + +#include "adaptive_setting.h" + +/* user use different sensor will use corresponding param */ +ADAPTIVE_SENSOR_NAME_T adaptive_sensor_name[] = +{ + // imx219(default) + { + .cSensor0Name = "m00_f_imx219_0 0-0010", + .cSensor1Name = "m01_f_imx219_1 3-0010", + .tAdapIspParamF2k = &adap_imx219_f2k, + .tAdapIspParamR2k = &adap_imx219_r2k, + }, + // imx385 + { + .cSensor0Name = "m00_f_imx385_0 0-0010", + .cSensor1Name = "m00_f_imx385_0 3-0010", + .tAdapIspParamF2k = &adap_imx385_f2k, + .tAdapIspParamR2k = &adap_imx385_r2k, + }, +}; + +ADAPTIVE_SENSOR_NAME_S_T adaptive_sensor_name_s = +{ + .size = sizeof(adaptive_sensor_name) / sizeof(ADAPTIVE_SENSOR_NAME_T), + .tAdaptiveSensorName = adaptive_sensor_name, +}; +#endif \ No newline at end of file diff --git a/package/mediactl_lib/src/adaptive/adaptive_setting.h b/package/mediactl_lib/src/adaptive/adaptive_setting.h new file mode 100644 index 0000000..1793032 --- /dev/null +++ b/package/mediactl_lib/src/adaptive/adaptive_setting.h @@ -0,0 +1,336 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ADAPTIVE_SETTING_H__ +#define __ADAPTIVE_SETTING_H__ + +#define ADAPTIVE_WEIGHT_THRESHOLD 0.0 +#define ADAPTIVE_GAMMA_DAY 0 +#define ADAPTIVE_GAMMA_NIGHT 1 +#define ADAPTIVE_COLOR_TO_GREY 0 +#define ADAPTIVE_GREY_TO_COLOR 1 +#define ADAPTIVE_COLOR_GREY_USE_CSM 1 +#define ADAPTIVE_COLOR_GREY_USE_CCM 2 +#define ADAPTIVE_IR_CUT_DAY_TO_NIGHT 0 +#define ADAPTIVE_IR_CUT_NIGHT_TO_DAY 1 +#define ADAPTIVE_EXPOSURE_LINE_V 1979 +#define ADAPTIVE_ANTI_FLICKER_MODE_50Hz 1 +#define ADAPTIVE_ANTI_FLICKER_MODE_60Hz 2 +#define ADAPTIVE_ANTI_FLICKER_CORRECT_PRECENT 150 +#define ADAPTIVE_ANTI_FLICKER_50Hz_PERIOD (1000000/(50 * 2)) +#define ADAPTIVE_ANTI_FLICKER_60Hz_PERIOD (1000000/(60 * 2)) +#define ADAPTIVE_ANTI_FLICKER_FPS 30 +#define ADAPTIVE_UNIT_CONVERT 1000 +#define ADAPTIVE_ET_LINE_OFFSET_RATE 0.50 +#define ADAPTIVE_CORRECT_GAIN_OFFSET 384 +#define ADAPTIVE_GAIN_MAX_CORRECT_OFFSET 8 // 256 * 0.03 +#define ADAPTIVE_3A_SYNC_FOLLOW_SELECT 1 // need f2k & r2k sync stat is 1, 0: nothing 1 : follow f2k, 2 : follow r2k(can not work normaly, need fix ae_wren = 1) + +typedef struct _ADAPTIVE_USER_ATTR_ISP_CTL_T { + int nBlcEnable; // 0: disable, 1: enable + int nLscEnable; // 0: disable, 1: enable + int nAeEnable; // 0: all disable, 1: exp enable, 2: gain enable, 3: exp & gain enable, ... 16183: all enable + int nAwbEnable; // 0: all disbale, 1: d65 gain enable, 2: ccm enable, ... 527: +} ADAPTIVE_USER_ATTR_ISP_CTL_T; + +typedef struct _ADAPTIVE_USER_ATTR_LIMIT_T { + int nGainRange[2]; // gain range [0]: min, [1]: max + int nEtRange[2]; // et range [0]: min, [1]: max + int nCtScl; // color temperature +} ADAPTIVE_USER_ATTR_LIMIT_T; + +typedef struct _ADAPTIVE_USER_ATTR_WEIGHT_T { + int nSaturationCoeff; // saturation user coeff step1: 0 - 50, step2: 50 - 100 + int nBrightnessCoeff; // luma gain user coeff step: 0 - 100, default 50 + int nContrastCoeff; // contrast gain user coeff step: 0 - 100, default 50 + int nSharpnessCoeff; // sharpness gain user coeff step: 0 - 100, default 50, final val = 50 * adap_sharp + int n2dnrLevelCoeff; // 2dnr user coeff: step: 0 - 10, default 5 +} ADAPTIVE_USER_ATTR_WEIGHT_T; + +typedef struct _ADAP_USER_ATTR_PAGE_T +{ + int nAdaptiveUserAttrEnable; + ADAPTIVE_USER_ATTR_ISP_CTL_T tUserAttrIspCtl; + ADAPTIVE_USER_ATTR_LIMIT_T tUserAttrLimit; + ADAPTIVE_USER_ATTR_WEIGHT_T tUserAttrWeight; +} ADAPTIVE_ATTRIBUTE_PAGE_T; // Root Permission for whole adaptive function + +enum weight_mode_e +{ + AE_GAIN_WEIGHT, + AE_EV_WEIGHT, +}; + +enum ev_type_e +{ + EV_TYPE_GAMMA, + EV_TYPE_COLOR_GREY_SWITCH, + EV_TYPE_IR_CUT, +}; + +typedef struct +{ + // dynamic params + ADAPTIVE_ISP_CALC_PARAM_T isp_adap_param; + ADAPTIVE_ISP_3A_STAT_T isp_3a_stat; // will destory in the future + // fix params + ADAPTIVE_IMG_TIMING_CFG_T image_timing_cfg; + // correct result + ADAPTIVE_ISP_3A_STAT_T isp_3a_stat_correct; + // ex model value + ADAPTIVE_ISP_EX_MODEL_VAL_T isp_ex_val; + +} ADAPTIVE_INIT_PARAM_T; + +static struct k510isp_reg_val fixd_f2k_init_reg_list[6] = { + /* fix params */ + {ISP_CORE_ITC_TTL_V, 0x0}, // itc ttl v + {ISP_CORE_AE_EX_VALUE_MAX, 0x0}, // max exp lines + {ISP_CORE_AE_EX_VALUE_MIN, 0x0}, // min exp lines + {ISP_CORE_AE_GAIN_MAX, 0x0}, // max gain + {ISP_CORE_AE_GAIN_MIN, 0x0}, // min gain + {ISP_CORE_SATU_GAIN, 0x0}, // min gain +}; + +static struct k510isp_reg_val fixd_r2k_init_reg_list[6] = { + /* fix params */ + {ISP_CORE_ITC_TTL_V, 0x0}, // itc ttl v + {ISP_CORE_AE_EX_VALUE_MAX, 0x0}, // max exp lines + {ISP_CORE_AE_EX_VALUE_MIN, 0x0}, // min exp lines + {ISP_CORE_AE_GAIN_MAX, 0x0}, // max gain + {ISP_CORE_AE_GAIN_MIN, 0x0}, // min gain + {ISP_CORE_SATU_GAIN, 0x0}, // min gain +}; + +static struct k510isp_reg_val dynamic_f2k_reg_list[5] = { + + /* dynamic param */ + {ISP_CORE_AE_VALUE_READY, 0x0}, // ae ready to be writen to sensor + {ISP_CORE_AE_LONG_CUR_EX, 0x0}, // ae stat cur exposure time(lines) + {ISP_CORE_AE_CUR_DIGITAL_GAIN, 0x0}, // ae stat cur gain + {ISP_CORE_AWB_ORG_RED_VALUE, 0x0}, // awb stat red value + {ISP_CORE_AWB_ORG_BLUE_VALUE, 0x0}, // awb stat blue value +}; + +// static struct k510isp_reg_val dynamic_r2k_reg_list[5] = { + +// /* dynamic param */ +// {ISP_CORE_AE_VALUE_READY, 0x0}, // ae ready to be writen to sensor +// {ISP_CORE_AE_LONG_CUR_EX, 0x0}, // ae stat cur exposure time(lines) +// {ISP_CORE_AE_CUR_DIGITAL_GAIN, 0x0}, // ae stat cur gain +// {ISP_CORE_AWB_RED_VALUE, 0x0}, // awb stat red value +// {ISP_CORE_AWB_BLUE_VALUE, 0x0}, // awb stat blue value +// }; + +static struct k510isp_reg_val adaptive_apply_blc[] = { + + /* follow ae gain */ + + {ISP_CORE_BLC_OFFSET, 0x0}, // blc offset +}; + +static struct k510isp_reg_val adaptive_apply_lsc[] = { + + {ISP_CORE_LSC_R_RATIO, 0x0}, // lsc red ratio + {ISP_CORE_LSC_G_RATIO, 0x0}, // lsc green ratio + {ISP_CORE_LSC_B_RATIO, 0x0}, // lsc blue ratio +}; + +static struct k510isp_reg_val adaptive_apply_sharpness[] = { + + {ISP_CORE_ENH_NR_TH, 0x0}, // sharpness core + {ISP_CORE_SHARP_GAIN, 0x0}, // sharpness gain + {ISP_CORE_ENH_TH1, 0x0}, // sharpness threshold 1 + {ISP_CORE_ENH_TH2, 0x0}, // sharpness threshold 2 +}; + +static struct k510isp_reg_val adaptive_apply_ltm[] = { + + {ISP_CORE_LTM_GAIN, 0x0}, // ltm gain + {ISP_CORE_LTM_TH, 0x0}, // ltm threshold +}; + +static struct k510isp_reg_val adaptive_apply_2dnr[] = { + + {ISP_CORE_2DNR_RAW_INTENSITY, 0x0}, // 2dnr Raw Domain Intensity + {ISP_CORE_2DNR_BAP_INTENSITY, 0x0}, // 2dnr Adjacent Pix Intensity + {ISP_CORE_2DNR_EDGE_INTENSITY, 0x0}, // 2dnr Edge Intensity + {ISP_CORE_2DNR_LUMA_INTENSITY, 0x0}, // 2dnr Luma Intensit + {ISP_CORE_2DNR_CHROMA_INTENSITY, 0x0}, // 2dnr Chroma Intensity +}; + +static struct k510isp_reg_val adaptive_apply_3dnr[] = { + + {ISP_CORE_3DNR_PRE_LUMA_TH, 0x0}, // 3dnr Pre Luma Thres + {ISP_CORE_3DNR_PRE_LUMA_INTENSITY, 0x0}, // 3dnr Pre Luma Intensity + {ISP_CORE_3DNR_PRE_CHROMA_INTENSITY, 0x0}, // 3dnr Pre Chroma Intensity + {ISP_CORE_3DNR_MID_FILTER_TH, 0x0}, // 3dnr Main Middle Filter Thres + {ISP_CORE_3DNR_PRE_MID_FILTER_TH, 0x0}, // 3dnr Main Prev Frame Mid-Filter + {ISP_CORE_3DNR_CUR_FILTER_TH, 0x0}, // 3dnr Main Cur Frame Mid-Filter Thres + {ISP_CORE_3DNR_LOW_PASS_FILTER_TH, 0x0}, // 3dnr Main Low-Pass FilterVal + {ISP_CORE_3DNR_LUMA_TH, 0x0}, // 3dnr Main Luma Thres + {ISP_CORE_3DNR_MIN_VALUE, 0x0}, // 3dnr Main Minimum Val + {ISP_CORE_3DNR_LUMA_INTENSITY, 0x0}, // 3dnr Main Luma Intensity + {ISP_CORE_3DNR_CHROMA_INTENSITY, 0x0}, // 3dnr Main Chroma Intensity + {ISP_CORE_3DNR_POST_EDGE_TH, 0x0}, // 3dnr Post Edge Threshold + {ISP_CORE_3DNR_POST_LUMA_INTENSITY, 0x0}, // 3dnr Post Luma Intensity + {ISP_CORE_3DNR_POST_CHROMA_INTENSITY, 0x0}, // 3dnr Post Chroma Intensity +}; + +static struct k510isp_reg_val adaptive_apply_wdr[] = { + + {ISP_CORE_WDR_OVER_EX_RATIO_TH1, 0x0}, // wdr LghtTh1 + {ISP_CORE_WDR_OVER_EX_RATIO_TH2, 0x0}, // wdr LghtTh2 + {ISP_CORE_WDR_FUSION_RATIO_TH, 0x0}, // Fs_Th + {ISP_CORE_WDR_FUSION_VALUE1, 0x0}, // Fs_K1 + {ISP_CORE_WDR_FUSION_VALUE2, 0x0}, // Fs_K2 +}; + +/* follow exposure value */ + +static struct k510isp_reg_val adaptive_apply_ae_target[] = { + + {ISP_CORE_AE_TAR_BR, 0x0}, // ae YTarget + {ISP_CORE_AE_TAR_BR_RANGE, 0x0}, // ae YTarget Range +}; + +static struct k510isp_reg_val adaptive_apply_awb_range[] = { + + {ISP_CORE_AWB_RED_MIN_VALUE, 0x0}, // awb Rgain Min + {ISP_CORE_AWB_RED_MAX_VALUE, 0x0}, // awb Rgain Max + {ISP_CORE_AWB_BLUE_MIN_VALUE, 0x0}, // awb Bgain Min + {ISP_CORE_AWB_BLUE_MAX_VALUE, 0x0}, // awb Bgain Max +}; + +static struct k510isp_reg_val adaptive_apply_ccm[] = { + + {ISP_CORE_CCM_RR_COFF, 0x0}, // ccm Rr + {ISP_CORE_CCM_RG_COFF, 0x0}, // ccm Rg + {ISP_CORE_CCM_RB_COFF, 0x0}, // ccm Rb + {ISP_CORE_CCM_GR_COFF, 0x0}, // ccm Gr + {ISP_CORE_CCM_GG_COFF, 0x0}, // ccm Gg + {ISP_CORE_CCM_GB_COFF, 0x0}, // ccm Gb + {ISP_CORE_CCM_BR_COFF, 0x0}, // ccm Br + {ISP_CORE_CCM_BG_COFF, 0x0}, // ccm Bg + {ISP_CORE_CCM_BB_COFF, 0x0}, // ccm Bb +}; + +static struct k510isp_reg_val adaptive_apply_ex_model[] = { + + {ISP_CORE_CONT_GAIN, 0x0}, // contrast gain + {ISP_CORE_LUMA_GAIN, 0x0}, // luma gain +}; + +static struct k510isp_reg_val adaptive_apply_post_saturation[] = { + {ISP_CORE_SATU_GAIN, 0x0}, // post saturation +}; + +static struct k510isp_reg_val adaptive_apply_color2bw[] = { + + /* color2grey use saturation mode */ + + {ISP_CORE_SATU_GAIN, 0x0}, // post saturation +}; + +static struct k510isp_reg_val adaptive_apply_ada[] = { + + {ISP_CORE_ADA_STAT_MAX_VALUE, 0x0}, // + {ISP_CORE_ADA_AD_STREN_MAX_VALUE, 0x0}, // +}; + +enum adaptive_isp_pipeline_e +{ + ADAP_ISP_F2K_PIPELINE, + ADAP_ISP_R2K_PIPELINE, + ADAP_ISP_TOF_PIPELINE +}; + +// static struct k510isp_reg_val adaptive_apply_rgb_gamma_table = {0x0400, 0x0}; + +typedef struct { + char * cSensor0Name; + char * cSensor1Name; + ADAPTIVE_ISP_PIPELINE_PARAM_T * tAdapIspParamF2k; + ADAPTIVE_ISP_PIPELINE_PARAM_T * tAdapIspParamR2k; +} ADAPTIVE_SENSOR_NAME_T; + +typedef struct { + int size; + ADAPTIVE_SENSOR_NAME_T *tAdaptiveSensorName; +} ADAPTIVE_SENSOR_NAME_S_T; + +/* param check Range */ + +#define ADAPTIVE_PARAM_CHECK_BLC 4095 +#define ADAPTIVE_PARAM_CHECK_LSC 511 +#define ADAPTIVE_PARAM_CHECK_SHARPNESS_CORE_GAIN 255 +#define ADAPTIVE_PARAM_CHECK_SHARPNESS_TH 4095 +#define ADAPTIVE_PARAM_CHECK_LTM 255 +#define ADAPTIVE_PARAM_CHECK_2DNR_RAWKL 255 +#define ADAPTIVE_PARAM_CHECK_2DNR_JLTH 511 +#define ADAPTIVE_PARAM_CHECK_2DNR_EGK 1023 +#define ADAPTIVE_PARAM_CHECK_2DNR_YK 255 +#define ADAPTIVE_PARAM_CHECK_2DNR_CK 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DP_THY 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DP_THYP 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DP_THCP 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_MID_TH 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_MTP_TH 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_MTC_TH 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DM_YMK 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DM_THY 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DM_MIN 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DM_THW0 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_CHROMA_INTENSITY 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_EG_TH 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DB_THYP 255 +#define ADAPTIVE_PARAM_CHECK_3DNR_DB_THCP 255 +#define ADAPTIVE_PARAM_CHECK_WDR_LGHT_TH 4095 +#define ADAPTIVE_PARAM_CHECK_WDR_FS_TH 255 +#define ADAPTIVE_PARAM_CHECK_WDR_FS_KN 255 +#define ADAPTIVE_PARAM_CHECK_CCM_WB_GAIN 1023 +#define ADAPTIVE_PARAM_CHECK_CCM_RR_GG_BB 511 +#define ADAPTIVE_PARAM_CHECK_CCM_RG_RB_GR_GB_BR_BG 256 +#define ADAPTIVE_PARAM_CHECK_AWB 1023 +#define ADAPTIVE_PARAM_CHECK_IMX219_EXP_TIME 33333 +#define ADAPTIVE_PARAM_CHECK_IMX219_GAIN 4095 +/* param check error code */ +// TODO + +/* lots of init functions */ +int adaptive_setting_param_check(enum adaptive_isp_pipeline_e pipeline); +int adaptiet_convert_init(enum adaptive_isp_pipeline_e isp_pipeline, ADAPTIVE_IMG_TIMING_CFG_T image_timing_cfg); +int adaptive_calc_feture_init_from_reg(enum adaptive_isp_pipeline_e pipeline, struct media_entity * pipe); +int adaptive_param_flag_init(enum adaptive_isp_pipeline_e pipeline); +int adaptive_param_format_init(enum adaptive_isp_pipeline_e pipeline); + +/* main functions */ +int adaptive_user_attr_page_init(enum adaptive_isp_pipeline_e pipeline); +int adaptive_et_line_time_convert(enum adaptive_isp_pipeline_e isp_pipeline, int itc_ttl_v, float adap_exp_time); +int adaptive_select_moudel_apply(enum adaptive_isp_pipeline_e pipeline, struct media_entity * pipe, int adap_en, int size, struct k510isp_reg_val adap_param[]); +int adaptive_select_gamma_apply(enum adaptive_isp_pipeline_e pipeline, struct media_entity * pipe, int adap_en); +int adaptive_ex_param_apply(enum adaptive_isp_pipeline_e pipeline, struct media_entity * pipe); + +#endif \ No newline at end of file diff --git a/package/mediactl_lib/src/adaptive/adaptive_user_func.h b/package/mediactl_lib/src/adaptive/adaptive_user_func.h new file mode 100644 index 0000000..aec3a86 --- /dev/null +++ b/package/mediactl_lib/src/adaptive/adaptive_user_func.h @@ -0,0 +1,52 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ADAPTIVE_USER_FUNC_H__ +#define __ADAPTIVE_USER_FUNC_H__ + +#include "sensor_params/canaan_isp_struct.h" +#include "adaptive_isp_reg.h" +#include "adaptive_setting.h" + +/* user init */ +int adaptive_calc_feture_init(enum adaptive_isp_pipeline_e pipeline, ADAPTIVE_IMG_TIMING_CFG_T image_timing_cfg); +int adaptive_param_init(enum adaptive_isp_pipeline_e pipeline, ADAPTIVE_SENSOR_NAME_S_T adaptive_sensor_name_s, char * sensor_name); + +/* user functions */ +int adaptive_get_3a_stat(enum adaptive_isp_pipeline_e pipeline, struct media_entity * pipe); +int adaptive_setting_ctl(enum adaptive_isp_pipeline_e pipeline); +int adaptive_param_apply(enum adaptive_isp_pipeline_e pipeline, struct media_entity * pipe); + +/* user ex opeartion */ +int adaptive_ex_gt_update_flag(enum adaptive_isp_pipeline_e pipeline); +int adaptive_ex_gt_awb_apply_flag(enum adaptive_isp_pipeline_e pipeline); +int adaptive_ex_st_ev_apply_flag(enum adaptive_isp_pipeline_e pipeline, int flag); +int adaptive_ex_st_ae_apply(enum adaptive_isp_pipeline_e pipeline, int yeverage, int expl, int agco); +int adaptive_ex_st_update_flag(enum adaptive_isp_pipeline_e pipeline); + +/* user get version */ +char * adaptive_get_version(); + +#endif \ No newline at end of file diff --git a/package/mediactl_lib/src/adaptive/sensor_params/canaan_isp_struct.h b/package/mediactl_lib/src/adaptive/sensor_params/canaan_isp_struct.h new file mode 100644 index 0000000..748652a --- /dev/null +++ b/package/mediactl_lib/src/adaptive/sensor_params/canaan_isp_struct.h @@ -0,0 +1,434 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __CANAAN_ISP_STRUCT_H__ +#define __CANAAN_ISP_STRUCT_H__ + +#define ADAPTIVE_AE_ROUTE_STEPS 5 // real 5 +#define ADAPTIVE_GAIN_ROUTE_STEPS 5 // real 7 +#define ADAPTIVE_GAMMA_ROUTE_STEPS 2 +#define ADAPTIVE_CCM_TEMPERATURE_NUM 6 // real 6 +#define ADAPTIVE_IR_CUT_MODE_NUM 2 +#define ADAPTIVE_COLOR_GREY_SWITCH_MODE_NUM 2 +#define ADAPTIVE_GAMMA_CURVE_INDEX_NUM 256 +#define ADAPTIVE_ADA_ROUTE_STEPS 5 +#define ADAPTIVE_3A_SYNC_FOLLOW_DISABLE 0 +#define ADAPTIVE_3A_SYNC_FOLLOW_F2K 1 +#define ADAPTIVE_3A_SYNC_FOLLOW_R2K 2 +#define ADAPTIVE_AWB_RANGE_NUM 2 // real 2 +#define ADAPTIVE_CCM_COEFF_SATURATION_WEIGHT 512 +#define ADAPTIVE_CCM_COEFF_SATURATION_WEIGHT_HALF 256 + +/* AE */ + +typedef struct { + int nAeYTarget; + int nAeYTargetRange; +} _AE_CTL_PARAM_T; + +typedef struct { + int nExposureTime; /* 0 - 40000 us */ + int nExposureGain; /* 256 - 8192; 1x is 256 */ + _AE_CTL_PARAM_T tAeCtlParam; +} ISP_AE_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + int nAntiFlickerSelect; /* 0: Anti_Flicker_None; 1: Anti_Flicker_50Hz; 2: Anti_Flicker_60Hz */ + ISP_AE_PARAM_T tAeParam[ADAPTIVE_AE_ROUTE_STEPS]; +} ADAPTIVE_ISP_AE_PARAM_T; + +/* Gain Range */ + +typedef struct { + int nGain[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_AE_GAIN_PARAM_T; + +/* +* BLC +* follow ae gain +*/ + +typedef struct { + int nOffset; /* default 220 */ +} _BLC_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _BLC_CTL_PARAM_T tBlcCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_BLC_PARAM_T; + +/* +* LSC +* follow ae gain +*/ + +typedef struct { + int nLscRedRatio; + int nLscGreenRatio; + int nLscBlueRatio; +} _LSC_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _LSC_CTL_PARAM_T tLscCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_LSC_PARAM_T; + +/* +* SHARPNESS +* follow ae gain +*/ + +typedef struct { + int nSharpnessCore; + int nSharpnessThres[2]; /* [0]: threshold0 [1]: threshold1 */ + int nSharpnessGain; /* TBD */ +} _SHARPNESS_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _SHARPNESS_CTL_PARAM_T tSharpnessCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_SHARPNESS_PARAM_T; + +/* +* LTM +* follow ae gain +*/ + +typedef struct { + int nLtmGain; + int nLtmThres; +} _LTM_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _LTM_CTL_PARAM_T tLtmCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_LTM_PARAM_T; + +/* +* 2D NR +* follow ae gain +*/ + +typedef struct { + int nRawDomainIntensity; + int n2dAdjacentPixIntensity; + int n2dEdgeIntensity; + int n2dLumaIntensit; + int n2dChromaIntensity; +} _2D_DENOISE_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _2D_DENOISE_CTL_PARAM_T t2dNoiseCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_2D_DENOISE_PARAM_T; + +/* +* 3D NR +* follow ae gain +*/ + +typedef struct { + int nPre3dLumaThres; /* dp thy */ + int nPre3dLumaIntensity; /* dp thyp */ + int nPre3dChromaIntensity; /* dp thcp */ + int nMain3dMiddleFilterThres; /* */ + int nMain3dPrevFrameMidFilter; + int nMain3dCurFrameMidFilterThres; + int nMain3dLowPassFilterVal; + int nMain3dLumaThres; + int nMain3dMinimumVal; + int nMain3dLumaIntensity; /* dm thyp */ + int nMain3dChromaIntensity; /* dm thcp */ + int nPost3dEdgeThreshold; /* db theg */ + int nPost3dLumaIntensity; /* db thyp */ + int nPost3dChromaIntensity; /* db thcp */ +} _3D_DENOISE_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _3D_DENOISE_CTL_PARAM_T t3dNoiseCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_3D_DENOISE_PARAM_T; + +/* +* WDR +* follow ae gain +*/ + +typedef struct { + int nLghtTh[2]; /* Threshold of overexposure ratio [0] used for 3 frames mode; [1] used for 2 frames mode */ + int nFsTh; /* threshold of WDR fusion */ + int nFsK[2]; /* WDR image fusion handle value; [0] used for 3 frames mode; [1] used for 2 frames mode */ +} _WDR_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _WDR_CTL_PARAM_T tWdrCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_WDR_PARAM_T; + +/* +* CCM +* follow awb gain +*/ + +typedef struct { + int nCtCcm[3][3]; /* [0][0]: Rr [0][1]: Rg [0][2]: Rb; [1][0]: Gr [1][1]: Gg [1][2]: Gb; [2][0]: Br [2][0]: Bg [2][0]: Bb*/ +} _CCM_CTL_PARAM_T; + +typedef struct { + int nRGain; + int nBGain; + _CCM_CTL_PARAM_T tCcmCtlParam; +} ISP_CCM_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + ISP_CCM_PARAM_T tCcmParam[ADAPTIVE_CCM_TEMPERATURE_NUM]; +} ADAPTIVE_ISP_CCM_PARAM_T; + +/* +* AWB +* follow ae +*/ + +typedef struct { + int nRGain[2]; /* [0]: Min; [1]: Max */ + int nBGain[2]; /* [0]: Min; [1]: Max */ +} _AWB_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _AWB_CTL_PARAM_T tAwbCtlParam[ADAPTIVE_AE_ROUTE_STEPS]; +} ADAPTIVE_ISP_AWB_PARAM_T; + +/* +* GAMMA +* follow ae gain & exposure +*/ + +typedef struct { + int nGammaCurve[ADAPTIVE_GAMMA_CURVE_INDEX_NUM]; +} _GAMMA_CTL_PARAM_T; + +typedef struct { + int nEtGamma; + int nGainGamma; + _GAMMA_CTL_PARAM_T tGammaCtlParam; +} ISP_GAMMA_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + ISP_GAMMA_PARAM_T tGammaParam[ADAPTIVE_GAMMA_ROUTE_STEPS]; +} ADAPTIVE_ISP_GAMMA_PARAM_T; + +/* +* IR CUT +* follow ae gain & exposure +*/ + +typedef struct { + int nHoldTime; + int nIrCutMode; +} _IR_CUT_CTL_PARAM; + +typedef struct { + int nExposureTime; + int nGain; + _IR_CUT_CTL_PARAM tIrCutCtlParam; +} ISP_IR_CUT_PARAM_T; + +typedef struct { + int nAutoSwitchEnable; /* 0: disable 1: enable */ + ISP_IR_CUT_PARAM_T tIrCutParam[ADAPTIVE_IR_CUT_MODE_NUM]; +} ADAPTIVE_ISP_IR_CUT_PARAM_T; + +/* +* POST SATURATION +* follow ae gain +* need calc real saturation +*/ + +typedef struct { + int nSaturationCoeff; +} _POST_SATURATION_CTL_PARAM_T; + +typedef struct { + int nAdaptiveEnable; /* 0: disable 1: enable */ + _POST_SATURATION_CTL_PARAM_T tPostSaturationCtlParam[ADAPTIVE_GAIN_ROUTE_STEPS]; +} ADAPTIVE_ISP_POST_SATURATION_PARAM_T; + +/* +* COLOR BLACK WHITE MODE +* follow ae gain +*/ + +typedef struct { + int nSaturation; +} _COLOR_GREY_CTL_PARAM; + +typedef struct { + int nExposureTime; + int nGain; + _COLOR_GREY_CTL_PARAM tColorGreyCsmCtlParam; +} ISP_COLOR_GREY_SWITCH_PARAM_T; + +typedef struct { + int nAutoSwitchEnable; /* 0: disable 1: saturation convert mode */ + ISP_COLOR_GREY_SWITCH_PARAM_T tColorGreySwitchParam[ADAPTIVE_COLOR_GREY_SWITCH_MODE_NUM]; +} ADAPTIVE_ISP_COLOR_GREY_SWITCH_PARAM_T; + +/* +* ADA +* follow ae TO_CPU_Y_AV(gain & et max ae lock) +*/ + +typedef struct { + int nAdaHistMax; + int nAdaTtlMax; +} _ADA_CTL_PARAM; + +typedef struct { + int nAeYEverage; + _ADA_CTL_PARAM tAdaCtlParam; +} ISP_ADA_PARAM_T; + +typedef struct { + int nAdaptiveEnable; + ISP_ADA_PARAM_T tAdaParam[ADAPTIVE_ADA_ROUTE_STEPS]; +} ADAPTIVE_ISP_ADA_PARAM_T; + +typedef struct { + float nFps; + ADAPTIVE_ISP_AE_PARAM_T tAeParam; + ADAPTIVE_ISP_AE_GAIN_PARAM_T tAeGainParam; + ADAPTIVE_ISP_BLC_PARAM_T tBlcParam; + ADAPTIVE_ISP_LSC_PARAM_T tLscParam; + ADAPTIVE_ISP_SHARPNESS_PARAM_T tSharpnessParam; + ADAPTIVE_ISP_LTM_PARAM_T tLtm_param; + ADAPTIVE_ISP_2D_DENOISE_PARAM_T tNr2dParam; + ADAPTIVE_ISP_3D_DENOISE_PARAM_T tNr3dParam; + ADAPTIVE_ISP_WDR_PARAM_T tWdrParam; + ADAPTIVE_ISP_CCM_PARAM_T tCcmParam; + ADAPTIVE_ISP_AWB_PARAM_T tAwbParam; + ADAPTIVE_ISP_GAMMA_PARAM_T tGammaParam; + ADAPTIVE_ISP_IR_CUT_PARAM_T tIrCutParam; // TBD + ADAPTIVE_ISP_POST_SATURATION_PARAM_T tSaturationParam; + ADAPTIVE_ISP_COLOR_GREY_SWITCH_PARAM_T tColorGreySwitchParam; + ADAPTIVE_ISP_ADA_PARAM_T tAdaParam; +} ADAPTIVE_ISP_PIPELINE_PARAM_T; + +typedef struct { + int nAeExpApplyFlag; + int nAeGainApplyFlag; + int nAeEvApplyFlag; // will ctl follow ae model + int nAwbStatApplyFlag; // will ctl follow awb model + int nUpdateFlag; // will ctl all model +} _PARAM_APPLY_FLAG_T; + +typedef struct { + float fAeGainWeight0; // weight of left interval + float fAeGainWeight1; // weight of right interval + float fAeEvWeight0; // exposure time * gain weight + float fAeEvWeight1; // exposure time * gain weight + int nSaturationWeight; + int nAeGainRange0; // range of left interval + int nAeGainRange1; // range of right interval + int nGammaCurveSel; // gamma curve select + int nColorGreySel; // color2grey or grey2color + int nCtSel; // color temperature select + int nAeEvRange0; + int nAeEvRange1; + int nIrCutSwitchSel; + int nAdaSel; // ada param select +} ADAPTIVE_ISP_WEIGHT_PARAM_T; + +typedef struct { + _BLC_CTL_PARAM_T tBlcCtlParam; + _LSC_CTL_PARAM_T tLscCtlParam; + _SHARPNESS_CTL_PARAM_T tSharpnessCtlParam; + _LTM_CTL_PARAM_T tLtmCtlParam; + _2D_DENOISE_CTL_PARAM_T t2dNrCtlParam; + _3D_DENOISE_CTL_PARAM_T t3dNrCtlParam; + _WDR_CTL_PARAM_T tWdrCtlParam; + _GAMMA_CTL_PARAM_T tGammaCtlParam; + _CCM_CTL_PARAM_T tCcmCtlParam; + _AE_CTL_PARAM_T tAeCtlParam; + _AWB_CTL_PARAM_T tAwbCtlParam; + _COLOR_GREY_CTL_PARAM tColorGreyCtlParam; + _IR_CUT_CTL_PARAM tIrCutCtlParam; // TBD + _ADA_CTL_PARAM tAdaCtlParam; + _POST_SATURATION_CTL_PARAM_T tPostSatuartionCtlParam; + ADAPTIVE_ISP_WEIGHT_PARAM_T isp_weight; + _PARAM_APPLY_FLAG_T param_flag; +} ADAPTIVE_ISP_CALC_PARAM_T; + +typedef struct { + /* ae stat */ + int nAeExposureTime; + int nAeGain; + /* awb stat */ + int nAwbRgain; + int nAwbBgain; + + /* reserved */ + int nAeReadyWr; + int nAeYEverage; + int nReserved[2]; +} ADAPTIVE_ISP_3A_STAT_T; + +typedef struct { + // post + int nBrightnessVal; // luma gain step: 0 - 255, default 128 + int nContrastVal; // contrast gain coeff step: 0 - 255, default 128 + // 2dnr + int n2dnrWeightStep_f_rawk; // 0 - 5, max_adap_2dnr / (5 - 0) + int n2dnrWeightStep_f_ek; // 0 - 5, max_adap_2dnr / (5 - 0) + int n2dnrWeightStep_f_yk; // 0 - 5, max_adap_2dnr / (5 - 0) + int n2dnrWeightStep_p_rawk; // 6 - 10, (255 - max_adap_2dnr + 1) / (10 - 6 + 1) + int n2dnrWeightStep_p_ek; // 6 - 10, (255 - max_adap_2dnr + 1) / (10 - 6 + 1) + int n2dnrWeightStep_p_yk; // 6 - 10, (255 - max_adap_2dnr + 1) / (10 - 6 + 1) +} ADAPTIVE_ISP_EX_MODEL_VAL_T; + +typedef struct { + /* itc ttl v */ + int nItcTtlV; + + /* ae range */ + int nMaxExpLine; + int nMinExpLine; + int nMaxGain; + int nMinGain; + /* saturation */ + int nDefaultSaturation; + /* ccm coeff */ + int nRwgt; + int nGwgt; + int nBwgt; + /* ccm normalization */ + int nSaturationRatio; // Ratio = 100% * (n + 521) / 512, need calib for different sensor + int nCcmNl[2][3]; +} ADAPTIVE_IMG_TIMING_CFG_T; + +#endif \ No newline at end of file diff --git a/package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_f2k.h b/package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_f2k.h new file mode 100644 index 0000000..8f00f4b --- /dev/null +++ b/package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_f2k.h @@ -0,0 +1,1000 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ADAPTIVE_PARAMS_SETTING_IMX219_F2K_H__ +#define __ADAPTIVE_PARAMS_SETTING_IMX219_F2K_H__ + +#include "../canaan_isp_struct.h" + +static ADAPTIVE_ISP_PIPELINE_PARAM_T adap_imx219_f2k = + +{ + /* fps */ + 29.97, + { + /* AE Parameters */ + + // static ADAPTIVE_ISP_AE_PARAM_T ae_param = { + /* nAdaptiveEnable */ + 1, + /* nAntiFlickerSelect */ + 0, //0: disable 1: 50Hz 2: 60Hz + /* tAeParam */ + { + /* 0 */ + { + /* nExposureTime */ + 168, // 10000lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 1 */ + { + /* nExposureTime */ + 2630, // 2500lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 2 */ + { + /* nExposureTime */ + 12108, // 400lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 90, + /* AE_YTarget_Range */ + 13, + }, + }, + /* 3 */ + { + /* nExposureTime */ + 33333, // 100lux + /* nExposureGain */ + 1024, + { + /* nAeYTarget */ + 80, + /* AE_YTarget_Range */ + 11, + }, + }, + /* 4 */ + { + /* nExposureTime */ + 33333, + /* nExposureGain */ + 4095, + { + /* nAeYTarget */ + 72, + /* AE_YTarget_Range */ + 10, + }, + }, + }, + // }; + }, + + /* AE gain */ + + { + {256, 768, 1024, 2048, 4095}, + }, + + { + /* BLC Parameters */ + + // static ADAPTIVE_ISP_BLC_PARAM_T blc_param = { + /* nAdaptiveEnable */ + 1, + /* blc param */ + { + /* 0 */ + {240}, + /* 1 */ + {240}, + /* 2 */ + {240}, + /* 3 */ + {240}, + /* 4 */ + {240}, + }, + // }; + }, + + { + /* LSC Parameters */ + + // static ADAPTIVE_ISP_LSC_PARAM_T lsc_param = { + /* nAdaptiveEnable */ + 1, + /* lsc param */ + { + /* 0 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 1 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 2 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 3 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 4 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + }, + // }; + }, + + { + /* SHARPNESS Parameters */ + + // static ADAPTIVE_ISP_SHARPNESS_PARAM_T sharpness_param = { + /* nAdaptiveEnable */ + 1, + /* sharpness param */ + { + /* 0 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 1 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 2 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 56, + }, + /* 3 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 48, + }, + /* 4 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 40, + }, + }, + // }; + }, + + { + /* LTM Parameters */ + + // static ADAPTIVE_ISP_LTM_PARAM_T ltm_param = { + /* nAdaptiveEnable */ + 1, + { + /* 0 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 1 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 2 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 3 */ + { + /* nLtmGain */ + 100, + /* nLtmThres */ + 128, + }, + /* 4 */ + { + /* nLtmGain */ + 80, + /* nLtmThres */ + 128, + }, + }, + // }; + }, + + { + /* 2D NR Parameters */ + + // static ADAPTIVE_ISP_2D_DENOISE_PARAM_T nr2d_param = { + /* nAdaptiveEnable */ + 1, + /* 2dnr */ + { + /* 0 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensity */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 1 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 2 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 160, + }, + /* 3 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + /* 4 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + }, + // }; + }, + + { + /* 3D NR Parameters */ + + // static ADAPTIVE_ISP_3D_DENOISE_PARAM_T nr3d_param = { + /* nAdaptiveEnable */ + 1, + /* 3dnr */ + { + /* 0 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 1, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 1 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 2 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 3 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 4 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + }, + // }; + }, + + { + /* WDR Parameters */ + + // static ADAPTIVE_ISP_WDR_PARAM_T wdr_param = { + /* nAdaptiveEnable */ + 0, + /* wdr param */ + { + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 2 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 3 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 4 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + }, + // }; + }, + + { + /* CCM Parameters */ + + // static ADAPTIVE_ISP_CCM_PARAM_T ccm_param = { + /* nAdaptiveEnable */ + 1, + /* tCcmParam */ + { + /* A */ + { + /* nRGain */ + 162, + /* nBGain */ + 449, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {311, 49, 6}, + {62, 343, 26}, + {16, 142, 414}, + }, + }, + }, + /* U30 */ + { + /* nRGain */ + 156, + /* nBGain */ + 458, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {299, 39, 5}, + {56, 336, 24}, + {13, 126, 395}, + }, + }, + }, + /* U35 */ + { + /* nRGain */ + 176, + /* nBGain */ + 402, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {287, 28, 3}, + {50, 328, 22}, + {9, 111, 376}, + }, + }, + }, + /* TL84 */ + { + /* nRGain */ + 194, + /* nBGain */ + 360, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + /* D50 */ + { + /* nRGain */ + 234, + /* nBGain */ + 299, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {277, 19, 3}, + {45, 322, 20}, + {6, 98, 360}, + }, + }, + }, + /* D65 */ + { + /* nRGain */ + 257, + /* nBGain */ + 269, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + }, + // }; + }, + + { + /* AWB */ + + // static ADAPTIVE_ISP_AWB_PARAM_T awb_param = { + /* nAdaptiveEnable */ + 1, + /* awb param */ + { + /* 0 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 1 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 2 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 3 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 4 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + }, + // }; + }, + + { + + /* GAMMA Parameters */ + + // static ADAPTIVE_ISP_GAMMA_PARAM_T gamma_param = { + /* nAdaptiveEnable */ + 1, // if 1 affect ae stablization + /* tGammaParam */ + { + /* Day */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 512, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x000, 0xC05, 0x80B, 0x411, 0xC16, 0x01C, 0x421, 0x426, 0x02B, 0x82F, 0xC33, 0xC37, 0x83B, 0x03F, 0x442, 0x445, + 0x048, 0xC4A, 0x44D, 0xC4F, 0x052, 0x454, 0x856, 0x858, 0x85A, 0x85C, 0x85E, 0x860, 0x862, 0x864, 0x466, 0x068, + 0xC69, 0x86B, 0x46D, 0x06F, 0xC70, 0x872, 0x074, 0x875, 0x077, 0x878, 0x07A, 0x87B, 0x07D, 0x87E, 0xC7F, 0x081, + 0x482, 0x883, 0xC84, 0x086, 0x487, 0x888, 0xC89, 0x08B, 0x48C, 0x88D, 0x88E, 0x88F, 0x890, 0x891, 0x892, 0x893, + 0x894, 0x895, 0x896, 0x897, 0x898, 0x899, 0x89A, 0x89B, 0x89C, 0x89D, 0x89E, 0x49F, 0x0A0, 0xCA0, 0x8A1, 0x4A2, + 0x0A3, 0xCA3, 0x8A4, 0x4A5, 0x0A6, 0xCA6, 0x8A7, 0x4A8, 0x0A9, 0xCA9, 0x8AA, 0x4AB, 0x0AC, 0xCAC, 0x8AD, 0x4AE, + 0x0AF, 0xCAF, 0x8B0, 0x4B1, 0x0B2, 0xCB2, 0x8B3, 0x4B4, 0x0B5, 0xCB5, 0x4B6, 0xCB6, 0x4B7, 0xCB7, 0x4B8, 0xCB8, + 0x4B9, 0xCB9, 0x4BA, 0xCBA, 0x4BB, 0xCBB, 0x4BC, 0xCBC, 0x4BD, 0xCBD, 0x4BE, 0xCBE, 0x4BF, 0xCBF, 0x4C0, 0xCC0, + 0x4C1, 0xCC1, 0x4C2, 0xCC2, 0x4C3, 0xCC3, 0x4C4, 0xCC4, 0x4C5, 0xCC5, 0x4C6, 0xCC6, 0x4C7, 0xCC7, 0x4C8, 0xCC8, + 0x4C9, 0xCC9, 0x4CA, 0xCCA, 0x4CB, 0xCCB, 0x4CC, 0xCCC, 0x4CD, 0xCCD, 0x4CE, 0xCCE, 0x4CF, 0xCCF, 0x4D0, 0xCD0, + 0x4D1, 0xCD1, 0x4D2, 0xCD2, 0x4D3, 0xCD3, 0x4D4, 0xCD4, 0x4D5, 0xCD5, 0x4D6, 0xCD6, 0x4D7, 0xCD7, 0x4D8, 0xCD8, + 0x4D9, 0xCD9, 0x4DA, 0xCDA, 0x4DB, 0xCDB, 0x4DC, 0xCDC, 0x4DD, 0xCDD, 0x4DE, 0xCDE, 0x4DF, 0xCDF, 0x4E0, 0xCE0, + 0x4E1, 0xCE1, 0x4E2, 0xCE2, 0x4E3, 0xCE3, 0x4E4, 0xCE4, 0x4E5, 0xCE5, 0x4E6, 0xCE6, 0x4E7, 0xCE7, 0x4E8, 0xCE8, + 0x4E9, 0xCE9, 0x4EA, 0xCEA, 0x4EB, 0xCEB, 0x4EC, 0xCEC, 0x4ED, 0xCED, 0x4EE, 0xCEE, 0x4EF, 0xCEF, 0x4F0, 0xCF0, + 0x4F1, 0xCF1, 0x4F2, 0xCF2, 0x4F3, 0xCF3, 0x4F4, 0xCF4, 0x4F5, 0xCF5, 0x4F6, 0xCF6, 0x4F7, 0xCF7, 0x4F8, 0xCF8, + 0x4F9, 0xCF9, 0x4FA, 0xCFA, 0x4FB, 0xCFB, 0x4FC, 0xCFC, 0x4FD, 0xCFD, 0x4FE, 0xCFE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + /* Night */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 3072, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x001, 0x814, 0x41C, 0x022, 0xC26, 0xC2A, 0x82E, 0xC31, 0x035, 0xC37, 0x83A, 0x43D, 0xC3F, 0x042, 0x444, 0x846, + 0x848, 0x84A, 0x84C, 0x84E, 0x450, 0x052, 0xC53, 0x855, 0x457, 0x059, 0x85A, 0x05C, 0x85D, 0x05F, 0x860, 0x062, + 0x863, 0x065, 0x866, 0xC67, 0x069, 0x46A, 0x86B, 0xC6C, 0x06E, 0x46F, 0x870, 0xC71, 0x073, 0x474, 0x875, 0xC76, + 0x078, 0x479, 0x47A, 0x47B, 0x47C, 0x47D, 0x47E, 0x47F, 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, + 0x488, 0x489, 0x48A, 0x48B, 0x48C, 0x48D, 0x48E, 0x48F, 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0x497, + 0x098, 0xC98, 0x899, 0x49A, 0x09B, 0xC9B, 0x89C, 0x49D, 0x09E, 0xC9E, 0x89F, 0x4A0, 0x0A1, 0xCA1, 0x8A2, 0x4A3, + 0x0A4, 0xCA4, 0x8A5, 0x4A6, 0x0A7, 0xCA7, 0x8A8, 0x4A9, 0x0AA, 0xCAA, 0x8AB, 0x4AC, 0x0AD, 0xCAD, 0x8AE, 0x4AF, + 0x0B0, 0xCB0, 0x8B1, 0x4B2, 0x0B3, 0xCB3, 0x8B4, 0x4B5, 0x0B6, 0xCB6, 0x8B7, 0x4B8, 0x0B9, 0xCB9, 0x8BA, 0x4BB, + 0x0BC, 0xCBC, 0x8BD, 0x4BE, 0x0BF, 0xCBF, 0x8C0, 0x4C1, 0x0C2, 0xCC2, 0x8C3, 0x4C4, 0x0C5, 0xCC5, 0x8C6, 0x4C7, + 0x0C8, 0xCC8, 0x8C9, 0x4CA, 0x0CB, 0x8CB, 0x0CC, 0x8CC, 0x0CD, 0x8CD, 0x0CE, 0x8CE, 0x0CF, 0x8CF, 0x0D0, 0x8D0, + 0x0D1, 0x8D1, 0x0D2, 0x8D2, 0x0D3, 0x8D3, 0x0D4, 0x8D4, 0x0D5, 0x8D5, 0x0D6, 0x8D6, 0x0D7, 0x8D7, 0x0D8, 0x8D8, + 0x0D9, 0x8D9, 0x0DA, 0x8DA, 0x0DB, 0x8DB, 0x0DC, 0x8DC, 0x0DD, 0x8DD, 0x0DE, 0x8DE, 0x0DF, 0x8DF, 0x0E0, 0x8E0, + 0x0E1, 0x8E1, 0x0E2, 0x8E2, 0x0E3, 0x8E3, 0x0E4, 0x8E4, 0x0E5, 0x8E5, 0x0E6, 0x8E6, 0x0E7, 0x8E7, 0x0E8, 0x8E8, + 0x0E9, 0x8E9, 0x0EA, 0x8EA, 0x0EB, 0x8EB, 0x0EC, 0x8EC, 0x0ED, 0x8ED, 0x0EE, 0x8EE, 0x0EF, 0x8EF, 0x0F0, 0x8F0, + 0x0F1, 0x8F1, 0x0F2, 0x8F2, 0x0F3, 0x8F3, 0x0F4, 0x8F4, 0x0F5, 0x8F5, 0x0F6, 0x8F6, 0x0F7, 0x8F7, 0x0F8, 0x8F8, + 0x0F9, 0x8F9, 0x0FA, 0x8FA, 0x0FB, 0x8FB, 0x0FC, 0x8FC, 0x0FD, 0x8FD, 0x0FE, 0x8FE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + }, + // }; + }, + + { + // static ADAPTIVE_ISP_IR_CUT_PARAM_T ir_cut_param = { + /* nAutoSwitchEnable */ + 1, + /* tIrCutParam */ + { + /* Day2Night */ + { + /* nExposureTime */ + 30000, + /* nGain */ + 512, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 2, + /* nIrCutMode TBD? */ + 1, + }, + }, + /* Night2Day */ + { + /* nExposureTime */ + 20000, + /* nGain */ + 256, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 6, + /* nIrCutMode TBD? */ + 0, + }, + }, + }, + // }; + }, + + { + /* POST SATURATION Parameters */ + + // static ADAPTIVE_ISP_POST_SATURATION_PARAM_T saturation_param = { + /* nAdaptiveEnable */ + 1, + /* post saturation param */ + { + /* 0 */ + {100}, + /* 1 */ + {100}, + /* 2 */ + {100}, + /* 3 */ + {100}, + /* 4 */ + {90}, + }, + // }; + }, + + { + /* Color Black White Mode Parameters */ + + // static ADAPTIVE_ISP_COLOR_GREY_SWI2CH_PARAM_T color_grey_switch_param = { + /* nAutoSwitchEnable */ + 1, // use csm mode + /* tColorGreySwitchParam */ + { + /* Color2BW */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 4095, + /* tColorGreyCsmCtlParam*/ + {0}, + }, + /* BW2Color */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 1536, + /* tColorGreyCsmCtlParam*/ + {255}, + }, + }, + // }; + }, + + { + /* ADA Parameters */ + + // static ADAPTIVE_ISP_ADA_PARAM_T ada_param = { + /* nAdaptiveEnable */ + 1, // 1: enable, 0: disable + /* tAdaParam */ + { + /* 0 */ + { + /* nAeYEverage */ + 60, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 255, + }, + }, + /* 1 */ + { + /* nAeYEverage */ + 50, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 200, + }, + }, + /* 2 */ + { + /* nAeYEverage */ + 40, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 128, + }, + }, + /* 3 */ + { + /* nAeYEverage */ + 30, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 100, + }, + }, + /* 4 */ + { + /* nAeYEverage */ + 20, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 90, + }, + }, + }, + // }; + }, +}; + +#endif diff --git a/package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_r2k.h b/package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_r2k.h new file mode 100644 index 0000000..5747033 --- /dev/null +++ b/package/mediactl_lib/src/adaptive/sensor_params/imx219/adaptive_imx219_r2k.h @@ -0,0 +1,1000 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ADAPTIVE_PARAMS_SETTING_IMX219_R2K_H__ +#define __ADAPTIVE_PARAMS_SETTING_IMX219_R2K_H__ + +#include "../canaan_isp_struct.h" + +static ADAPTIVE_ISP_PIPELINE_PARAM_T adap_imx219_r2k = + +{ + /* fps */ + 29.97, + { + /* AE Parameters */ + + // static ADAPTIVE_ISP_AE_PARAM_T ae_param = { + /* nAdaptiveEnable */ + 1, + /* nAntiFlickerSelect */ + 0, //0: disable 1: 50Hz 2: 60Hz + /* tAeParam */ + { + /* 0 */ + { + /* nExposureTime */ + 168, // 10000lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 1 */ + { + /* nExposureTime */ + 2630, // 2500lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 2 */ + { + /* nExposureTime */ + 12108, // 400lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 90, + /* AE_YTarget_Range */ + 13, + }, + }, + /* 3 */ + { + /* nExposureTime */ + 33333, // 100lux + /* nExposureGain */ + 1024, + { + /* nAeYTarget */ + 80, + /* AE_YTarget_Range */ + 11, + }, + }, + /* 4 */ + { + /* nExposureTime */ + 33333, + /* nExposureGain */ + 4095, + { + /* nAeYTarget */ + 72, + /* AE_YTarget_Range */ + 10, + }, + }, + }, + // }; + }, + + /* AE gain */ + + { + {256, 768, 1024, 2048, 2304}, + }, + + { + /* BLC Parameters */ + + // static ADAPTIVE_ISP_BLC_PARAM_T blc_param = { + /* nAdaptiveEnable */ + 1, + /* blc param */ + { + /* 0 */ + {240}, + /* 1 */ + {240}, + /* 2 */ + {240}, + /* 3 */ + {240}, + /* 4 */ + {240}, + }, + // }; + }, + + { + /* LSC Parameters */ + + // static ADAPTIVE_ISP_LSC_PARAM_T lsc_param = { + /* nAdaptiveEnable */ + 1, + /* lsc param */ + { + /* 0 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 1 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 2 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 3 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 4 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + }, + // }; + }, + + { + /* SHARPNESS Parameters */ + + // static ADAPTIVE_ISP_SHARPNESS_PARAM_T sharpness_param = { + /* nAdaptiveEnable */ + 1, + /* sharpness param */ + { + /* 0 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 1 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 2 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 56, + }, + /* 3 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 48, + }, + /* 4 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 40, + }, + }, + // }; + }, + + { + /* LTM Parameters */ + + // static ADAPTIVE_ISP_LTM_PARAM_T ltm_param = { + /* nAdaptiveEnable */ + 1, + { + /* 0 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 1 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 2 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 3 */ + { + /* nLtmGain */ + 100, + /* nLtmThres */ + 128, + }, + /* 4 */ + { + /* nLtmGain */ + 80, + /* nLtmThres */ + 128, + }, + }, + // }; + }, + + { + /* 2D NR Parameters */ + + // static ADAPTIVE_ISP_2D_DENOISE_PARAM_T nr2d_param = { + /* nAdaptiveEnable */ + 1, + /* 2dnr */ + { + /* 0 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensity */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 1 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 2 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 160, + }, + /* 3 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + /* 4 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + }, + // }; + }, + + { + /* 3D NR Parameters */ + + // static ADAPTIVE_ISP_3D_DENOISE_PARAM_T nr3d_param = { + /* nAdaptiveEnable */ + 1, + /* 3dnr */ + { + /* 0 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 1, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 1 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 2 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 3 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 4 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + }, + // }; + }, + + { + /* WDR Parameters */ + + // static ADAPTIVE_ISP_WDR_PARAM_T wdr_param = { + /* nAdaptiveEnable */ + 0, + /* wdr param */ + { + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 2 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 3 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 4 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + }, + // }; + }, + + { + /* CCM Parameters */ + + // static ADAPTIVE_ISP_CCM_PARAM_T ccm_param = { + /* nAdaptiveEnable */ + 1, + /* tCcmParam */ + { + /* A */ + { + /* nRGain */ + 162, + /* nBGain */ + 449, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {311, 49, 6}, + {62, 343, 26}, + {16, 142, 414}, + }, + }, + }, + /* U30 */ + { + /* nRGain */ + 156, + /* nBGain */ + 458, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {299, 39, 5}, + {56, 336, 24}, + {13, 126, 395}, + }, + }, + }, + /* U35 */ + { + /* nRGain */ + 176, + /* nBGain */ + 402, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {287, 28, 3}, + {50, 328, 22}, + {9, 111, 376}, + }, + }, + }, + /* TL84 */ + { + /* nRGain */ + 194, + /* nBGain */ + 360, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + /* D50 */ + { + /* nRGain */ + 234, + /* nBGain */ + 299, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {277, 19, 3}, + {45, 322, 20}, + {6, 98, 360}, + }, + }, + }, + /* D65 */ + { + /* nRGain */ + 257, + /* nBGain */ + 269, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + }, + // }; + }, + + { + /* AWB */ + + // static ADAPTIVE_ISP_AWB_PARAM_T awb_param = { + /* nAdaptiveEnable */ + 1, + /* awb param */ + { + /* 0 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 1 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 2 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 3 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 4 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + }, + // }; + }, + + { + + /* GAMMA Parameters */ + + // static ADAPTIVE_ISP_GAMMA_PARAM_T gamma_param = { + /* nAdaptiveEnable */ + 1, // if 1 affect ae stablization + /* tGammaParam */ + { + /* Day */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 512, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x000, 0xC05, 0x80B, 0x411, 0xC16, 0x01C, 0x421, 0x426, 0x02B, 0x82F, 0xC33, 0xC37, 0x83B, 0x03F, 0x442, 0x445, + 0x048, 0xC4A, 0x44D, 0xC4F, 0x052, 0x454, 0x856, 0x858, 0x85A, 0x85C, 0x85E, 0x860, 0x862, 0x864, 0x466, 0x068, + 0xC69, 0x86B, 0x46D, 0x06F, 0xC70, 0x872, 0x074, 0x875, 0x077, 0x878, 0x07A, 0x87B, 0x07D, 0x87E, 0xC7F, 0x081, + 0x482, 0x883, 0xC84, 0x086, 0x487, 0x888, 0xC89, 0x08B, 0x48C, 0x88D, 0x88E, 0x88F, 0x890, 0x891, 0x892, 0x893, + 0x894, 0x895, 0x896, 0x897, 0x898, 0x899, 0x89A, 0x89B, 0x89C, 0x89D, 0x89E, 0x49F, 0x0A0, 0xCA0, 0x8A1, 0x4A2, + 0x0A3, 0xCA3, 0x8A4, 0x4A5, 0x0A6, 0xCA6, 0x8A7, 0x4A8, 0x0A9, 0xCA9, 0x8AA, 0x4AB, 0x0AC, 0xCAC, 0x8AD, 0x4AE, + 0x0AF, 0xCAF, 0x8B0, 0x4B1, 0x0B2, 0xCB2, 0x8B3, 0x4B4, 0x0B5, 0xCB5, 0x4B6, 0xCB6, 0x4B7, 0xCB7, 0x4B8, 0xCB8, + 0x4B9, 0xCB9, 0x4BA, 0xCBA, 0x4BB, 0xCBB, 0x4BC, 0xCBC, 0x4BD, 0xCBD, 0x4BE, 0xCBE, 0x4BF, 0xCBF, 0x4C0, 0xCC0, + 0x4C1, 0xCC1, 0x4C2, 0xCC2, 0x4C3, 0xCC3, 0x4C4, 0xCC4, 0x4C5, 0xCC5, 0x4C6, 0xCC6, 0x4C7, 0xCC7, 0x4C8, 0xCC8, + 0x4C9, 0xCC9, 0x4CA, 0xCCA, 0x4CB, 0xCCB, 0x4CC, 0xCCC, 0x4CD, 0xCCD, 0x4CE, 0xCCE, 0x4CF, 0xCCF, 0x4D0, 0xCD0, + 0x4D1, 0xCD1, 0x4D2, 0xCD2, 0x4D3, 0xCD3, 0x4D4, 0xCD4, 0x4D5, 0xCD5, 0x4D6, 0xCD6, 0x4D7, 0xCD7, 0x4D8, 0xCD8, + 0x4D9, 0xCD9, 0x4DA, 0xCDA, 0x4DB, 0xCDB, 0x4DC, 0xCDC, 0x4DD, 0xCDD, 0x4DE, 0xCDE, 0x4DF, 0xCDF, 0x4E0, 0xCE0, + 0x4E1, 0xCE1, 0x4E2, 0xCE2, 0x4E3, 0xCE3, 0x4E4, 0xCE4, 0x4E5, 0xCE5, 0x4E6, 0xCE6, 0x4E7, 0xCE7, 0x4E8, 0xCE8, + 0x4E9, 0xCE9, 0x4EA, 0xCEA, 0x4EB, 0xCEB, 0x4EC, 0xCEC, 0x4ED, 0xCED, 0x4EE, 0xCEE, 0x4EF, 0xCEF, 0x4F0, 0xCF0, + 0x4F1, 0xCF1, 0x4F2, 0xCF2, 0x4F3, 0xCF3, 0x4F4, 0xCF4, 0x4F5, 0xCF5, 0x4F6, 0xCF6, 0x4F7, 0xCF7, 0x4F8, 0xCF8, + 0x4F9, 0xCF9, 0x4FA, 0xCFA, 0x4FB, 0xCFB, 0x4FC, 0xCFC, 0x4FD, 0xCFD, 0x4FE, 0xCFE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + /* Night */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 3072, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x001, 0x814, 0x41C, 0x022, 0xC26, 0xC2A, 0x82E, 0xC31, 0x035, 0xC37, 0x83A, 0x43D, 0xC3F, 0x042, 0x444, 0x846, + 0x848, 0x84A, 0x84C, 0x84E, 0x450, 0x052, 0xC53, 0x855, 0x457, 0x059, 0x85A, 0x05C, 0x85D, 0x05F, 0x860, 0x062, + 0x863, 0x065, 0x866, 0xC67, 0x069, 0x46A, 0x86B, 0xC6C, 0x06E, 0x46F, 0x870, 0xC71, 0x073, 0x474, 0x875, 0xC76, + 0x078, 0x479, 0x47A, 0x47B, 0x47C, 0x47D, 0x47E, 0x47F, 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, + 0x488, 0x489, 0x48A, 0x48B, 0x48C, 0x48D, 0x48E, 0x48F, 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0x497, + 0x098, 0xC98, 0x899, 0x49A, 0x09B, 0xC9B, 0x89C, 0x49D, 0x09E, 0xC9E, 0x89F, 0x4A0, 0x0A1, 0xCA1, 0x8A2, 0x4A3, + 0x0A4, 0xCA4, 0x8A5, 0x4A6, 0x0A7, 0xCA7, 0x8A8, 0x4A9, 0x0AA, 0xCAA, 0x8AB, 0x4AC, 0x0AD, 0xCAD, 0x8AE, 0x4AF, + 0x0B0, 0xCB0, 0x8B1, 0x4B2, 0x0B3, 0xCB3, 0x8B4, 0x4B5, 0x0B6, 0xCB6, 0x8B7, 0x4B8, 0x0B9, 0xCB9, 0x8BA, 0x4BB, + 0x0BC, 0xCBC, 0x8BD, 0x4BE, 0x0BF, 0xCBF, 0x8C0, 0x4C1, 0x0C2, 0xCC2, 0x8C3, 0x4C4, 0x0C5, 0xCC5, 0x8C6, 0x4C7, + 0x0C8, 0xCC8, 0x8C9, 0x4CA, 0x0CB, 0x8CB, 0x0CC, 0x8CC, 0x0CD, 0x8CD, 0x0CE, 0x8CE, 0x0CF, 0x8CF, 0x0D0, 0x8D0, + 0x0D1, 0x8D1, 0x0D2, 0x8D2, 0x0D3, 0x8D3, 0x0D4, 0x8D4, 0x0D5, 0x8D5, 0x0D6, 0x8D6, 0x0D7, 0x8D7, 0x0D8, 0x8D8, + 0x0D9, 0x8D9, 0x0DA, 0x8DA, 0x0DB, 0x8DB, 0x0DC, 0x8DC, 0x0DD, 0x8DD, 0x0DE, 0x8DE, 0x0DF, 0x8DF, 0x0E0, 0x8E0, + 0x0E1, 0x8E1, 0x0E2, 0x8E2, 0x0E3, 0x8E3, 0x0E4, 0x8E4, 0x0E5, 0x8E5, 0x0E6, 0x8E6, 0x0E7, 0x8E7, 0x0E8, 0x8E8, + 0x0E9, 0x8E9, 0x0EA, 0x8EA, 0x0EB, 0x8EB, 0x0EC, 0x8EC, 0x0ED, 0x8ED, 0x0EE, 0x8EE, 0x0EF, 0x8EF, 0x0F0, 0x8F0, + 0x0F1, 0x8F1, 0x0F2, 0x8F2, 0x0F3, 0x8F3, 0x0F4, 0x8F4, 0x0F5, 0x8F5, 0x0F6, 0x8F6, 0x0F7, 0x8F7, 0x0F8, 0x8F8, + 0x0F9, 0x8F9, 0x0FA, 0x8FA, 0x0FB, 0x8FB, 0x0FC, 0x8FC, 0x0FD, 0x8FD, 0x0FE, 0x8FE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + }, + // }; + }, + + { + // static ADAPTIVE_ISP_IR_CUT_PARAM_T ir_cut_param = { + /* nAutoSwitchEnable */ + 1, + /* tIrCutParam */ + { + /* Day2Night */ + { + /* nExposureTime */ + 30000, + /* nGain */ + 512, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 2, + /* nIrCutMode TBD? */ + 1, + }, + }, + /* Night2Day */ + { + /* nExposureTime */ + 20000, + /* nGain */ + 256, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 6, + /* nIrCutMode TBD? */ + 0, + }, + }, + }, + // }; + }, + + { + /* POST SATURATION Parameters */ + + // static ADAPTIVE_ISP_POST_SATURATION_PARAM_T saturation_param = { + /* nAdaptiveEnable */ + 1, + /* post saturation param */ + { + /* 0 */ + {100}, + /* 1 */ + {100}, + /* 2 */ + {100}, + /* 3 */ + {100}, + /* 4 */ + {100}, + }, + // }; + }, + + { + /* Color Black White Mode Parameters */ + + // static ADAPTIVE_ISP_COLOR_GREY_SWI2CH_PARAM_T color_grey_switch_param = { + /* nAutoSwitchEnable */ + 1, // use csm mode + /* tColorGreySwitchParam */ + { + /* Color2BW */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 4095, + /* tColorGreyCsmCtlParam*/ + {0}, + }, + /* BW2Color */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 1536, + /* tColorGreyCsmCtlParam*/ + {255}, + }, + }, + // }; + }, + + { + /* ADA Parameters */ + + // static ADAPTIVE_ISP_ADA_PARAM_T ada_param = { + /* nAdaptiveEnable */ + 1, // 1: enable, 0: disable + /* tAdaParam */ + { + /* 0 */ + { + /* nAeYEverage */ + 60, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 255, + }, + }, + /* 1 */ + { + /* nAeYEverage */ + 50, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 200, + }, + }, + /* 2 */ + { + /* nAeYEverage */ + 40, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 128, + }, + }, + /* 3 */ + { + /* nAeYEverage */ + 30, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 100, + }, + }, + /* 4 */ + { + /* nAeYEverage */ + 20, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 90, + }, + }, + }, + // }; + }, +}; + +#endif diff --git a/package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_f2k.h b/package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_f2k.h new file mode 100644 index 0000000..9d836c8 --- /dev/null +++ b/package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_f2k.h @@ -0,0 +1,1000 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ADAPTIVE_PARAMS_SETTING_IMX385_F2K_H__ +#define __ADAPTIVE_PARAMS_SETTING_IMX385_F2K_H__ + +#include "../canaan_isp_struct.h" + +static ADAPTIVE_ISP_PIPELINE_PARAM_T adap_imx385_f2k = + +{ + /* fps */ + 29.97, + { + /* AE Parameters */ + + // static ADAPTIVE_ISP_AE_PARAM_T ae_param = { + /* nAdaptiveEnable */ + 1, + /* nAntiFlickerSelect */ + 0, //0: disable 1: 50Hz 2: 60Hz + /* tAeParam */ + { + /* 0 */ + { + /* nExposureTime */ + 168, // 10000lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 1 */ + { + /* nExposureTime */ + 2630, // 2500lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 2 */ + { + /* nExposureTime */ + 12108, // 400lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 90, + /* AE_YTarget_Range */ + 13, + }, + }, + /* 3 */ + { + /* nExposureTime */ + 33333, // 100lux + /* nExposureGain */ + 1024, + { + /* nAeYTarget */ + 80, + /* AE_YTarget_Range */ + 11, + }, + }, + /* 4 */ + { + /* nExposureTime */ + 33333, + /* nExposureGain */ + 4095, + { + /* nAeYTarget */ + 72, + /* AE_YTarget_Range */ + 10, + }, + }, + }, + // }; + }, + + /* AE gain */ + + { + {256, 768, 1024, 2048, 4095}, + }, + + { + /* BLC Parameters */ + + // static ADAPTIVE_ISP_BLC_PARAM_T blc_param = { + /* nAdaptiveEnable */ + 1, + /* blc param */ + { + /* 0 */ + {240}, + /* 1 */ + {240}, + /* 2 */ + {240}, + /* 3 */ + {240}, + /* 4 */ + {240}, + }, + // }; + }, + + { + /* LSC Parameters */ + + // static ADAPTIVE_ISP_LSC_PARAM_T lsc_param = { + /* nAdaptiveEnable */ + 1, + /* lsc param */ + { + /* 0 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 1 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 2 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 3 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 4 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + }, + // }; + }, + + { + /* SHARPNESS Parameters */ + + // static ADAPTIVE_ISP_SHARPNESS_PARAM_T sharpness_param = { + /* nAdaptiveEnable */ + 1, + /* sharpness param */ + { + /* 0 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 1 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 2 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 56, + }, + /* 3 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 48, + }, + /* 4 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 40, + }, + }, + // }; + }, + + { + /* LTM Parameters */ + + // static ADAPTIVE_ISP_LTM_PARAM_T ltm_param = { + /* nAdaptiveEnable */ + 1, + { + /* 0 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 1 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 2 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 3 */ + { + /* nLtmGain */ + 100, + /* nLtmThres */ + 128, + }, + /* 4 */ + { + /* nLtmGain */ + 80, + /* nLtmThres */ + 128, + }, + }, + // }; + }, + + { + /* 2D NR Parameters */ + + // static ADAPTIVE_ISP_2D_DENOISE_PARAM_T nr2d_param = { + /* nAdaptiveEnable */ + 1, + /* 2dnr */ + { + /* 0 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensity */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 1 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 2 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 160, + }, + /* 3 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + /* 4 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + }, + // }; + }, + + { + /* 3D NR Parameters */ + + // static ADAPTIVE_ISP_3D_DENOISE_PARAM_T nr3d_param = { + /* nAdaptiveEnable */ + 1, + /* 3dnr */ + { + /* 0 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 1, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 1 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 2 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 3 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 4 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + }, + // }; + }, + + { + /* WDR Parameters */ + + // static ADAPTIVE_ISP_WDR_PARAM_T wdr_param = { + /* nAdaptiveEnable */ + 0, + /* wdr param */ + { + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 2 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 3 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 4 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + }, + // }; + }, + + { + /* CCM Parameters */ + + // static ADAPTIVE_ISP_CCM_PARAM_T ccm_param = { + /* nAdaptiveEnable */ + 1, + /* tCcmParam */ + { + /* A */ + { + /* nRGain */ + 162, + /* nBGain */ + 449, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {311, 49, 6}, + {62, 343, 26}, + {16, 142, 414}, + }, + }, + }, + /* U30 */ + { + /* nRGain */ + 156, + /* nBGain */ + 458, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {299, 39, 5}, + {56, 336, 24}, + {13, 126, 395}, + }, + }, + }, + /* U35 */ + { + /* nRGain */ + 176, + /* nBGain */ + 402, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {287, 28, 3}, + {50, 328, 22}, + {9, 111, 376}, + }, + }, + }, + /* TL84 */ + { + /* nRGain */ + 194, + /* nBGain */ + 360, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + /* D50 */ + { + /* nRGain */ + 234, + /* nBGain */ + 299, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {277, 19, 3}, + {45, 322, 20}, + {6, 98, 360}, + }, + }, + }, + /* D65 */ + { + /* nRGain */ + 257, + /* nBGain */ + 269, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + }, + // }; + }, + + { + /* AWB */ + + // static ADAPTIVE_ISP_AWB_PARAM_T awb_param = { + /* nAdaptiveEnable */ + 1, + /* awb param */ + { + /* 0 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 1 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 2 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 3 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 4 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + }, + // }; + }, + + { + + /* GAMMA Parameters */ + + // static ADAPTIVE_ISP_GAMMA_PARAM_T gamma_param = { + /* nAdaptiveEnable */ + 1, // if 1 affect ae stablization + /* tGammaParam */ + { + /* Day */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 512, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x000, 0xC05, 0x80B, 0x411, 0xC16, 0x01C, 0x421, 0x426, 0x02B, 0x82F, 0xC33, 0xC37, 0x83B, 0x03F, 0x442, 0x445, + 0x048, 0xC4A, 0x44D, 0xC4F, 0x052, 0x454, 0x856, 0x858, 0x85A, 0x85C, 0x85E, 0x860, 0x862, 0x864, 0x466, 0x068, + 0xC69, 0x86B, 0x46D, 0x06F, 0xC70, 0x872, 0x074, 0x875, 0x077, 0x878, 0x07A, 0x87B, 0x07D, 0x87E, 0xC7F, 0x081, + 0x482, 0x883, 0xC84, 0x086, 0x487, 0x888, 0xC89, 0x08B, 0x48C, 0x88D, 0x88E, 0x88F, 0x890, 0x891, 0x892, 0x893, + 0x894, 0x895, 0x896, 0x897, 0x898, 0x899, 0x89A, 0x89B, 0x89C, 0x89D, 0x89E, 0x49F, 0x0A0, 0xCA0, 0x8A1, 0x4A2, + 0x0A3, 0xCA3, 0x8A4, 0x4A5, 0x0A6, 0xCA6, 0x8A7, 0x4A8, 0x0A9, 0xCA9, 0x8AA, 0x4AB, 0x0AC, 0xCAC, 0x8AD, 0x4AE, + 0x0AF, 0xCAF, 0x8B0, 0x4B1, 0x0B2, 0xCB2, 0x8B3, 0x4B4, 0x0B5, 0xCB5, 0x4B6, 0xCB6, 0x4B7, 0xCB7, 0x4B8, 0xCB8, + 0x4B9, 0xCB9, 0x4BA, 0xCBA, 0x4BB, 0xCBB, 0x4BC, 0xCBC, 0x4BD, 0xCBD, 0x4BE, 0xCBE, 0x4BF, 0xCBF, 0x4C0, 0xCC0, + 0x4C1, 0xCC1, 0x4C2, 0xCC2, 0x4C3, 0xCC3, 0x4C4, 0xCC4, 0x4C5, 0xCC5, 0x4C6, 0xCC6, 0x4C7, 0xCC7, 0x4C8, 0xCC8, + 0x4C9, 0xCC9, 0x4CA, 0xCCA, 0x4CB, 0xCCB, 0x4CC, 0xCCC, 0x4CD, 0xCCD, 0x4CE, 0xCCE, 0x4CF, 0xCCF, 0x4D0, 0xCD0, + 0x4D1, 0xCD1, 0x4D2, 0xCD2, 0x4D3, 0xCD3, 0x4D4, 0xCD4, 0x4D5, 0xCD5, 0x4D6, 0xCD6, 0x4D7, 0xCD7, 0x4D8, 0xCD8, + 0x4D9, 0xCD9, 0x4DA, 0xCDA, 0x4DB, 0xCDB, 0x4DC, 0xCDC, 0x4DD, 0xCDD, 0x4DE, 0xCDE, 0x4DF, 0xCDF, 0x4E0, 0xCE0, + 0x4E1, 0xCE1, 0x4E2, 0xCE2, 0x4E3, 0xCE3, 0x4E4, 0xCE4, 0x4E5, 0xCE5, 0x4E6, 0xCE6, 0x4E7, 0xCE7, 0x4E8, 0xCE8, + 0x4E9, 0xCE9, 0x4EA, 0xCEA, 0x4EB, 0xCEB, 0x4EC, 0xCEC, 0x4ED, 0xCED, 0x4EE, 0xCEE, 0x4EF, 0xCEF, 0x4F0, 0xCF0, + 0x4F1, 0xCF1, 0x4F2, 0xCF2, 0x4F3, 0xCF3, 0x4F4, 0xCF4, 0x4F5, 0xCF5, 0x4F6, 0xCF6, 0x4F7, 0xCF7, 0x4F8, 0xCF8, + 0x4F9, 0xCF9, 0x4FA, 0xCFA, 0x4FB, 0xCFB, 0x4FC, 0xCFC, 0x4FD, 0xCFD, 0x4FE, 0xCFE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + /* Night */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 3072, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x001, 0x814, 0x41C, 0x022, 0xC26, 0xC2A, 0x82E, 0xC31, 0x035, 0xC37, 0x83A, 0x43D, 0xC3F, 0x042, 0x444, 0x846, + 0x848, 0x84A, 0x84C, 0x84E, 0x450, 0x052, 0xC53, 0x855, 0x457, 0x059, 0x85A, 0x05C, 0x85D, 0x05F, 0x860, 0x062, + 0x863, 0x065, 0x866, 0xC67, 0x069, 0x46A, 0x86B, 0xC6C, 0x06E, 0x46F, 0x870, 0xC71, 0x073, 0x474, 0x875, 0xC76, + 0x078, 0x479, 0x47A, 0x47B, 0x47C, 0x47D, 0x47E, 0x47F, 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, + 0x488, 0x489, 0x48A, 0x48B, 0x48C, 0x48D, 0x48E, 0x48F, 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0x497, + 0x098, 0xC98, 0x899, 0x49A, 0x09B, 0xC9B, 0x89C, 0x49D, 0x09E, 0xC9E, 0x89F, 0x4A0, 0x0A1, 0xCA1, 0x8A2, 0x4A3, + 0x0A4, 0xCA4, 0x8A5, 0x4A6, 0x0A7, 0xCA7, 0x8A8, 0x4A9, 0x0AA, 0xCAA, 0x8AB, 0x4AC, 0x0AD, 0xCAD, 0x8AE, 0x4AF, + 0x0B0, 0xCB0, 0x8B1, 0x4B2, 0x0B3, 0xCB3, 0x8B4, 0x4B5, 0x0B6, 0xCB6, 0x8B7, 0x4B8, 0x0B9, 0xCB9, 0x8BA, 0x4BB, + 0x0BC, 0xCBC, 0x8BD, 0x4BE, 0x0BF, 0xCBF, 0x8C0, 0x4C1, 0x0C2, 0xCC2, 0x8C3, 0x4C4, 0x0C5, 0xCC5, 0x8C6, 0x4C7, + 0x0C8, 0xCC8, 0x8C9, 0x4CA, 0x0CB, 0x8CB, 0x0CC, 0x8CC, 0x0CD, 0x8CD, 0x0CE, 0x8CE, 0x0CF, 0x8CF, 0x0D0, 0x8D0, + 0x0D1, 0x8D1, 0x0D2, 0x8D2, 0x0D3, 0x8D3, 0x0D4, 0x8D4, 0x0D5, 0x8D5, 0x0D6, 0x8D6, 0x0D7, 0x8D7, 0x0D8, 0x8D8, + 0x0D9, 0x8D9, 0x0DA, 0x8DA, 0x0DB, 0x8DB, 0x0DC, 0x8DC, 0x0DD, 0x8DD, 0x0DE, 0x8DE, 0x0DF, 0x8DF, 0x0E0, 0x8E0, + 0x0E1, 0x8E1, 0x0E2, 0x8E2, 0x0E3, 0x8E3, 0x0E4, 0x8E4, 0x0E5, 0x8E5, 0x0E6, 0x8E6, 0x0E7, 0x8E7, 0x0E8, 0x8E8, + 0x0E9, 0x8E9, 0x0EA, 0x8EA, 0x0EB, 0x8EB, 0x0EC, 0x8EC, 0x0ED, 0x8ED, 0x0EE, 0x8EE, 0x0EF, 0x8EF, 0x0F0, 0x8F0, + 0x0F1, 0x8F1, 0x0F2, 0x8F2, 0x0F3, 0x8F3, 0x0F4, 0x8F4, 0x0F5, 0x8F5, 0x0F6, 0x8F6, 0x0F7, 0x8F7, 0x0F8, 0x8F8, + 0x0F9, 0x8F9, 0x0FA, 0x8FA, 0x0FB, 0x8FB, 0x0FC, 0x8FC, 0x0FD, 0x8FD, 0x0FE, 0x8FE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + }, + // }; + }, + + { + // static ADAPTIVE_ISP_IR_CUT_PARAM_T ir_cut_param = { + /* nAutoSwitchEnable */ + 1, + /* tIrCutParam */ + { + /* Day2Night */ + { + /* nExposureTime */ + 30000, + /* nGain */ + 512, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 2, + /* nIrCutMode TBD? */ + 1, + }, + }, + /* Night2Day */ + { + /* nExposureTime */ + 20000, + /* nGain */ + 256, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 6, + /* nIrCutMode TBD? */ + 0, + }, + }, + }, + // }; + }, + + { + /* POST SATURATION Parameters */ + + // static ADAPTIVE_ISP_POST_SATURATION_PARAM_T saturation_param = { + /* nAdaptiveEnable */ + 1, + /* post saturation param */ + { + /* 0 */ + {100}, + /* 1 */ + {100}, + /* 2 */ + {100}, + /* 3 */ + {100}, + /* 4 */ + {100}, + }, + // }; + }, + + { + /* Color Black White Mode Parameters */ + + // static ADAPTIVE_ISP_COLOR_GREY_SWI2CH_PARAM_T color_grey_switch_param = { + /* nAutoSwitchEnable */ + 1, // use csm mode + /* tColorGreySwitchParam */ + { + /* Color2BW */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 3072, + /* tColorGreyCsmCtlParam*/ + {0}, + }, + /* BW2Color */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 1536, + /* tColorGreyCsmCtlParam*/ + {255}, + }, + }, + // }; + }, + + { + /* ADA Parameters */ + + // static ADAPTIVE_ISP_ADA_PARAM_T ada_param = { + /* nAdaptiveEnable */ + 1, // 1: enable, 0: disable + /* tAdaParam */ + { + /* 0 */ + { + /* nAeYEverage */ + 60, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 255, + }, + }, + /* 1 */ + { + /* nAeYEverage */ + 50, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 200, + }, + }, + /* 2 */ + { + /* nAeYEverage */ + 40, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 128, + }, + }, + /* 3 */ + { + /* nAeYEverage */ + 30, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 100, + }, + }, + /* 4 */ + { + /* nAeYEverage */ + 20, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 90, + }, + }, + }, + // }; + }, +}; + +#endif diff --git a/package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_r2k.h b/package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_r2k.h new file mode 100644 index 0000000..3196d1a --- /dev/null +++ b/package/mediactl_lib/src/adaptive/sensor_params/imx385/adaptive_imx385_r2k.h @@ -0,0 +1,1000 @@ +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ADAPTIVE_PARAMS_SETTING_IMX385_R2K_H__ +#define __ADAPTIVE_PARAMS_SETTING_IMX385_R2K_H__ + +#include "../canaan_isp_struct.h" + +static ADAPTIVE_ISP_PIPELINE_PARAM_T adap_imx385_r2k = + +{ + /* fps */ + 29.97, + { + /* AE Parameters */ + + // static ADAPTIVE_ISP_AE_PARAM_T ae_param = { + /* nAdaptiveEnable */ + 1, + /* nAntiFlickerSelect */ + 0, //0: disable 1: 50Hz 2: 60Hz + /* tAeParam */ + { + /* 0 */ + { + /* nExposureTime */ + 168, // 10000lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 1 */ + { + /* nExposureTime */ + 2630, // 2500lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 100, + /* nAeYTargetRange */ + 14, + }, + }, + /* 2 */ + { + /* nExposureTime */ + 12108, // 400lux + /* nExposureGain */ + 512, + /* ae ctl */ + { + /* nAeYTarget */ + 90, + /* AE_YTarget_Range */ + 13, + }, + }, + /* 3 */ + { + /* nExposureTime */ + 33333, // 100lux + /* nExposureGain */ + 1024, + { + /* nAeYTarget */ + 80, + /* AE_YTarget_Range */ + 11, + }, + }, + /* 4 */ + { + /* nExposureTime */ + 33333, + /* nExposureGain */ + 4095, + { + /* nAeYTarget */ + 72, + /* AE_YTarget_Range */ + 10, + }, + }, + }, + // }; + }, + + /* AE gain */ + + { + {256, 768, 1024, 2048, 2304}, + }, + + { + /* BLC Parameters */ + + // static ADAPTIVE_ISP_BLC_PARAM_T blc_param = { + /* nAdaptiveEnable */ + 1, + /* blc param */ + { + /* 0 */ + {240}, + /* 1 */ + {240}, + /* 2 */ + {240}, + /* 3 */ + {240}, + /* 4 */ + {240}, + }, + // }; + }, + + { + /* LSC Parameters */ + + // static ADAPTIVE_ISP_LSC_PARAM_T lsc_param = { + /* nAdaptiveEnable */ + 1, + /* lsc param */ + { + /* 0 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 1 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 2 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 3 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + /* 4 */ + { + /* nLscRedRatio */ + 10, + /* nLscGreenRatio */ + 6, + /* nLscBlueRatio */ + 6, + }, + }, + // }; + }, + + { + /* SHARPNESS Parameters */ + + // static ADAPTIVE_ISP_SHARPNESS_PARAM_T sharpness_param = { + /* nAdaptiveEnable */ + 1, + /* sharpness param */ + { + /* 0 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 1 */ + { + /* nSharpnessCore */ + 4, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 64, + }, + /* 2 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 56, + }, + /* 3 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 48, + }, + /* 4 */ + { + /* nSharpnessCore */ + 8, + /* nSharpnessThres[2]; [0]: thres1 [1]: thres2 */ + {3840, 4095}, + /* nSharpnessGain */ + 40, + }, + }, + // }; + }, + + { + /* LTM Parameters */ + + // static ADAPTIVE_ISP_LTM_PARAM_T ltm_param = { + /* nAdaptiveEnable */ + 1, + { + /* 0 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 1 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 2 */ + { + /* nLtmGain */ + 128, + /* nLtmThres */ + 128, + }, + /* 3 */ + { + /* nLtmGain */ + 100, + /* nLtmThres */ + 128, + }, + /* 4 */ + { + /* nLtmGain */ + 80, + /* nLtmThres */ + 128, + }, + }, + // }; + }, + + { + /* 2D NR Parameters */ + + // static ADAPTIVE_ISP_2D_DENOISE_PARAM_T nr2d_param = { + /* nAdaptiveEnable */ + 1, + /* 2dnr */ + { + /* 0 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensity */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 1 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 1, + }, + /* 2 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 160, + }, + /* 3 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + /* 4 */ + { + /* nRawDomainIntensity */ + 16, + /* n2dAdjacentPixIntensity */ + 511, + /* n2dEdgeIntensity */ + 48, + /* n2dLumaIntensit */ + 64, + /* n2dChromaIntensity */ + 255, + }, + }, + // }; + }, + + { + /* 3D NR Parameters */ + + // static ADAPTIVE_ISP_3D_DENOISE_PARAM_T nr3d_param = { + /* nAdaptiveEnable */ + 1, + /* 3dnr */ + { + /* 0 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 1, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 1 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 2 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 3 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + + /* 4 */ + { + /* nPre3dLumaThres */ + 64, + /* nPre3dLumaIntensity */ + 64, + /* nPre3dChromaIntensity */ + 64, + /* nMain3dMiddleFilterThres */ + 128, + /* nMain3dPrevFrameMidFilter */ + 8, + /* nMain3dCurFrameMidFilterThres */ + 128, + /* nMain3dLowPassFilterVal */ + 60, + /* nMain3dLumaThres */ + 64, + /* nMain3dMinimumVal */ + 0, + /* nMain3dLumaIntensity */ + 128, + /* nMain3dChromaIntensity */ + 16, + /* nPost3dEdgeThreshold */ + 64, + /* nPost3dLumaIntensity */ + 64, + /* nPost3dChromaIntensity */ + 32, + }, + }, + // }; + }, + + { + /* WDR Parameters */ + + // static ADAPTIVE_ISP_WDR_PARAM_T wdr_param = { + /* nAdaptiveEnable */ + 0, + /* wdr param */ + { + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 0 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 2 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 3 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + /* 4 */ + { + /* nLghtTh[2] */ + {384, 32}, + /* nFsTh */ + 192, + /* nFsK */ + {0, 0}, + }, + }, + // }; + }, + + { + /* CCM Parameters */ + + // static ADAPTIVE_ISP_CCM_PARAM_T ccm_param = { + /* nAdaptiveEnable */ + 1, + /* tCcmParam */ + { + /* A */ + { + /* nRGain */ + 162, + /* nBGain */ + 449, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {311, 49, 6}, + {62, 343, 26}, + {16, 142, 414}, + }, + }, + }, + /* U30 */ + { + /* nRGain */ + 156, + /* nBGain */ + 458, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {299, 39, 5}, + {56, 336, 24}, + {13, 126, 395}, + }, + }, + }, + /* U35 */ + { + /* nRGain */ + 176, + /* nBGain */ + 402, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {287, 28, 3}, + {50, 328, 22}, + {9, 111, 376}, + }, + }, + }, + /* TL84 */ + { + /* nRGain */ + 194, + /* nBGain */ + 360, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + /* D50 */ + { + /* nRGain */ + 234, + /* nBGain */ + 299, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {277, 19, 3}, + {45, 322, 20}, + {6, 98, 360}, + }, + }, + }, + /* D65 */ + { + /* nRGain */ + 257, + /* nBGain */ + 269, + /* tCcmCtlParam */ + { + /* nCtCcm[3][3] */ + { + {259, 2, 1}, + {37, 310, 17}, + {1, 75, 332}, + }, + }, + }, + }, + // }; + }, + + { + /* AWB */ + + // static ADAPTIVE_ISP_AWB_PARAM_T awb_param = { + /* nAdaptiveEnable */ + 1, + /* awb param */ + { + /* 0 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 1 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 2 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {162, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 449}, + }, + /* 3 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + /* 4 */ + { + /* nRGain[2]; [0]: Min [1]: Max */ + {194, 257}, + /* nBGain[2]; [0]: Min [1]: Max */ + {269, 360}, + }, + }, + // }; + }, + + { + + /* GAMMA Parameters */ + + // static ADAPTIVE_ISP_GAMMA_PARAM_T gamma_param = { + /* nAdaptiveEnable */ + 1, // if 1 affect ae stablization + /* tGammaParam */ + { + /* Day */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 512, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x000, 0xC05, 0x80B, 0x411, 0xC16, 0x01C, 0x421, 0x426, 0x02B, 0x82F, 0xC33, 0xC37, 0x83B, 0x03F, 0x442, 0x445, + 0x048, 0xC4A, 0x44D, 0xC4F, 0x052, 0x454, 0x856, 0x858, 0x85A, 0x85C, 0x85E, 0x860, 0x862, 0x864, 0x466, 0x068, + 0xC69, 0x86B, 0x46D, 0x06F, 0xC70, 0x872, 0x074, 0x875, 0x077, 0x878, 0x07A, 0x87B, 0x07D, 0x87E, 0xC7F, 0x081, + 0x482, 0x883, 0xC84, 0x086, 0x487, 0x888, 0xC89, 0x08B, 0x48C, 0x88D, 0x88E, 0x88F, 0x890, 0x891, 0x892, 0x893, + 0x894, 0x895, 0x896, 0x897, 0x898, 0x899, 0x89A, 0x89B, 0x89C, 0x89D, 0x89E, 0x49F, 0x0A0, 0xCA0, 0x8A1, 0x4A2, + 0x0A3, 0xCA3, 0x8A4, 0x4A5, 0x0A6, 0xCA6, 0x8A7, 0x4A8, 0x0A9, 0xCA9, 0x8AA, 0x4AB, 0x0AC, 0xCAC, 0x8AD, 0x4AE, + 0x0AF, 0xCAF, 0x8B0, 0x4B1, 0x0B2, 0xCB2, 0x8B3, 0x4B4, 0x0B5, 0xCB5, 0x4B6, 0xCB6, 0x4B7, 0xCB7, 0x4B8, 0xCB8, + 0x4B9, 0xCB9, 0x4BA, 0xCBA, 0x4BB, 0xCBB, 0x4BC, 0xCBC, 0x4BD, 0xCBD, 0x4BE, 0xCBE, 0x4BF, 0xCBF, 0x4C0, 0xCC0, + 0x4C1, 0xCC1, 0x4C2, 0xCC2, 0x4C3, 0xCC3, 0x4C4, 0xCC4, 0x4C5, 0xCC5, 0x4C6, 0xCC6, 0x4C7, 0xCC7, 0x4C8, 0xCC8, + 0x4C9, 0xCC9, 0x4CA, 0xCCA, 0x4CB, 0xCCB, 0x4CC, 0xCCC, 0x4CD, 0xCCD, 0x4CE, 0xCCE, 0x4CF, 0xCCF, 0x4D0, 0xCD0, + 0x4D1, 0xCD1, 0x4D2, 0xCD2, 0x4D3, 0xCD3, 0x4D4, 0xCD4, 0x4D5, 0xCD5, 0x4D6, 0xCD6, 0x4D7, 0xCD7, 0x4D8, 0xCD8, + 0x4D9, 0xCD9, 0x4DA, 0xCDA, 0x4DB, 0xCDB, 0x4DC, 0xCDC, 0x4DD, 0xCDD, 0x4DE, 0xCDE, 0x4DF, 0xCDF, 0x4E0, 0xCE0, + 0x4E1, 0xCE1, 0x4E2, 0xCE2, 0x4E3, 0xCE3, 0x4E4, 0xCE4, 0x4E5, 0xCE5, 0x4E6, 0xCE6, 0x4E7, 0xCE7, 0x4E8, 0xCE8, + 0x4E9, 0xCE9, 0x4EA, 0xCEA, 0x4EB, 0xCEB, 0x4EC, 0xCEC, 0x4ED, 0xCED, 0x4EE, 0xCEE, 0x4EF, 0xCEF, 0x4F0, 0xCF0, + 0x4F1, 0xCF1, 0x4F2, 0xCF2, 0x4F3, 0xCF3, 0x4F4, 0xCF4, 0x4F5, 0xCF5, 0x4F6, 0xCF6, 0x4F7, 0xCF7, 0x4F8, 0xCF8, + 0x4F9, 0xCF9, 0x4FA, 0xCFA, 0x4FB, 0xCFB, 0x4FC, 0xCFC, 0x4FD, 0xCFD, 0x4FE, 0xCFE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + /* Night */ + { + /* nEtGamma */ + 33333, + /* nGainGamma */ + 3072, + /* tGammaCtlParam */ + { + /* nGammaCurve */ + { + 0x001, 0x814, 0x41C, 0x022, 0xC26, 0xC2A, 0x82E, 0xC31, 0x035, 0xC37, 0x83A, 0x43D, 0xC3F, 0x042, 0x444, 0x846, + 0x848, 0x84A, 0x84C, 0x84E, 0x450, 0x052, 0xC53, 0x855, 0x457, 0x059, 0x85A, 0x05C, 0x85D, 0x05F, 0x860, 0x062, + 0x863, 0x065, 0x866, 0xC67, 0x069, 0x46A, 0x86B, 0xC6C, 0x06E, 0x46F, 0x870, 0xC71, 0x073, 0x474, 0x875, 0xC76, + 0x078, 0x479, 0x47A, 0x47B, 0x47C, 0x47D, 0x47E, 0x47F, 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, + 0x488, 0x489, 0x48A, 0x48B, 0x48C, 0x48D, 0x48E, 0x48F, 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0x497, + 0x098, 0xC98, 0x899, 0x49A, 0x09B, 0xC9B, 0x89C, 0x49D, 0x09E, 0xC9E, 0x89F, 0x4A0, 0x0A1, 0xCA1, 0x8A2, 0x4A3, + 0x0A4, 0xCA4, 0x8A5, 0x4A6, 0x0A7, 0xCA7, 0x8A8, 0x4A9, 0x0AA, 0xCAA, 0x8AB, 0x4AC, 0x0AD, 0xCAD, 0x8AE, 0x4AF, + 0x0B0, 0xCB0, 0x8B1, 0x4B2, 0x0B3, 0xCB3, 0x8B4, 0x4B5, 0x0B6, 0xCB6, 0x8B7, 0x4B8, 0x0B9, 0xCB9, 0x8BA, 0x4BB, + 0x0BC, 0xCBC, 0x8BD, 0x4BE, 0x0BF, 0xCBF, 0x8C0, 0x4C1, 0x0C2, 0xCC2, 0x8C3, 0x4C4, 0x0C5, 0xCC5, 0x8C6, 0x4C7, + 0x0C8, 0xCC8, 0x8C9, 0x4CA, 0x0CB, 0x8CB, 0x0CC, 0x8CC, 0x0CD, 0x8CD, 0x0CE, 0x8CE, 0x0CF, 0x8CF, 0x0D0, 0x8D0, + 0x0D1, 0x8D1, 0x0D2, 0x8D2, 0x0D3, 0x8D3, 0x0D4, 0x8D4, 0x0D5, 0x8D5, 0x0D6, 0x8D6, 0x0D7, 0x8D7, 0x0D8, 0x8D8, + 0x0D9, 0x8D9, 0x0DA, 0x8DA, 0x0DB, 0x8DB, 0x0DC, 0x8DC, 0x0DD, 0x8DD, 0x0DE, 0x8DE, 0x0DF, 0x8DF, 0x0E0, 0x8E0, + 0x0E1, 0x8E1, 0x0E2, 0x8E2, 0x0E3, 0x8E3, 0x0E4, 0x8E4, 0x0E5, 0x8E5, 0x0E6, 0x8E6, 0x0E7, 0x8E7, 0x0E8, 0x8E8, + 0x0E9, 0x8E9, 0x0EA, 0x8EA, 0x0EB, 0x8EB, 0x0EC, 0x8EC, 0x0ED, 0x8ED, 0x0EE, 0x8EE, 0x0EF, 0x8EF, 0x0F0, 0x8F0, + 0x0F1, 0x8F1, 0x0F2, 0x8F2, 0x0F3, 0x8F3, 0x0F4, 0x8F4, 0x0F5, 0x8F5, 0x0F6, 0x8F6, 0x0F7, 0x8F7, 0x0F8, 0x8F8, + 0x0F9, 0x8F9, 0x0FA, 0x8FA, 0x0FB, 0x8FB, 0x0FC, 0x8FC, 0x0FD, 0x8FD, 0x0FE, 0x8FE, 0x0FF, 0x4FF, 0x8FF, 0xCFF, + }, + }, + }, + }, + // }; + }, + + { + // static ADAPTIVE_ISP_IR_CUT_PARAM_T ir_cut_param = { + /* nAutoSwitchEnable */ + 1, + /* tIrCutParam */ + { + /* Day2Night */ + { + /* nExposureTime */ + 30000, + /* nGain */ + 512, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 2, + /* nIrCutMode TBD? */ + 1, + }, + }, + /* Night2Day */ + { + /* nExposureTime */ + 20000, + /* nGain */ + 256, + /* tIrCutCtlParam */ + { + /* nHoldTime */ + 6, + /* nIrCutMode TBD? */ + 0, + }, + }, + }, + // }; + }, + + { + /* POST SATURATION Parameters */ + + // static ADAPTIVE_ISP_POST_SATURATION_PARAM_T saturation_param = { + /* nAdaptiveEnable */ + 1, + /* post saturation param */ + { + /* 0 */ + {100}, + /* 1 */ + {100}, + /* 2 */ + {100}, + /* 3 */ + {100}, + /* 4 */ + {100}, + }, + // }; + }, + + { + /* Color Black White Mode Parameters */ + + // static ADAPTIVE_ISP_COLOR_GREY_SWI2CH_PARAM_T color_grey_switch_param = { + /* nAutoSwitchEnable */ + 1, // use csm mode + /* tColorGreySwitchParam */ + { + /* Color2BW */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 3072, + /* tColorGreyCsmCtlParam*/ + {0}, + }, + /* BW2Color */ + { + /* nExposureTime */ + 33333, + /* nGain */ + 1536, + /* tColorGreyCsmCtlParam*/ + {255}, + }, + }, + // }; + }, + + { + /* ADA Parameters */ + + // static ADAPTIVE_ISP_ADA_PARAM_T ada_param = { + /* nAdaptiveEnable */ + 1, // 1: enable, 0: disable + /* tAdaParam */ + { + /* 0 */ + { + /* nAeYEverage */ + 60, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 255, + }, + }, + /* 1 */ + { + /* nAeYEverage */ + 50, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 200, + }, + }, + /* 2 */ + { + /* nAeYEverage */ + 40, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 128, + }, + }, + /* 3 */ + { + /* nAeYEverage */ + 30, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 100, + }, + }, + /* 4 */ + { + /* nAeYEverage */ + 20, + /* tAdaCtlParam */ + { + /* nAdaHistMax */ + 128, + /* nAdaTtlMax */ + 90, + }, + }, + }, + // }; + }, +}; + +#endif diff --git a/package/mediactl_lib/src/config/imx219_0.conf b/package/mediactl_lib/src/config/imx219_0.conf index 9d05d58..793c067 100644 --- a/package/mediactl_lib/src/config/imx219_0.conf +++ b/package/mediactl_lib/src/config/imx219_0.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -79,9 +79,9 @@ "itc_ttl_h" :3476, "itc_ttl_v" :1166, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -92,7 +92,7 @@ }, "blc":{ "blc_en" :1, - "blc_offset" :240, + "blc_offset" :240, "blc_ratio" :272 }, "lsc":{ @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -124,24 +124,24 @@ "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, "ae_ex_value_max" :1162, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :512, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :262, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -213,7 +213,7 @@ "rgb2yuv_12":170, "rgb2yuv_20":58, "rgb2yuv_21":42, - "rgb2yuv_22":256 + "rgb2yuv_22":256 }, "ada":{ "gm_rgb_en" :1, @@ -230,7 +230,7 @@ "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1919, - "ada_win_endv" :1079 + "ada_win_endv" :1079 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,15 +251,15 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, "nr2d_y_k" :64, - "nr2d_c_k" :1 + "nr2d_c_k" :1 }, "3dnr":{ "nr3d_en" :1, @@ -288,7 +288,7 @@ "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,7 +299,7 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, "shp_th1" :3840, "shp_th2" :4095, @@ -308,7 +308,7 @@ "cc":{ "enh_cc_en" :0, "enh_adp_cc_en" :0 - } + } }, "post_ctl":{ "otc_ctl":{ @@ -318,19 +318,19 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, - "luma_gain":128 + "luma_gain":128 }, "strt":{ "strt_en" :1, - "strt_gain":250 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :960, "ldc_cv" :540, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1919, - "af_stat_win_v_end" :1079 + "af_stat_win_v_end" :1079 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} diff --git a/package/mediactl_lib/src/config/imx219_1.conf b/package/mediactl_lib/src/config/imx219_1.conf index 9d05d58..793c067 100644 --- a/package/mediactl_lib/src/config/imx219_1.conf +++ b/package/mediactl_lib/src/config/imx219_1.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -79,9 +79,9 @@ "itc_ttl_h" :3476, "itc_ttl_v" :1166, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -92,7 +92,7 @@ }, "blc":{ "blc_en" :1, - "blc_offset" :240, + "blc_offset" :240, "blc_ratio" :272 }, "lsc":{ @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -124,24 +124,24 @@ "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, "ae_ex_value_max" :1162, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :512, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :262, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -213,7 +213,7 @@ "rgb2yuv_12":170, "rgb2yuv_20":58, "rgb2yuv_21":42, - "rgb2yuv_22":256 + "rgb2yuv_22":256 }, "ada":{ "gm_rgb_en" :1, @@ -230,7 +230,7 @@ "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1919, - "ada_win_endv" :1079 + "ada_win_endv" :1079 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,15 +251,15 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, "nr2d_y_k" :64, - "nr2d_c_k" :1 + "nr2d_c_k" :1 }, "3dnr":{ "nr3d_en" :1, @@ -288,7 +288,7 @@ "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,7 +299,7 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, "shp_th1" :3840, "shp_th2" :4095, @@ -308,7 +308,7 @@ "cc":{ "enh_cc_en" :0, "enh_adp_cc_en" :0 - } + } }, "post_ctl":{ "otc_ctl":{ @@ -318,19 +318,19 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, - "luma_gain":128 + "luma_gain":128 }, "strt":{ "strt_en" :1, - "strt_gain":250 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :960, "ldc_cv" :540, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1919, - "af_stat_win_v_end" :1079 + "af_stat_win_v_end" :1079 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} diff --git a/package/mediactl_lib/src/config/imx219_1080x1920_0.conf b/package/mediactl_lib/src/config/imx219_1080x1920_0.conf index 72a92ba..dd62ed7 100644 --- a/package/mediactl_lib/src/config/imx219_1080x1920_0.conf +++ b/package/mediactl_lib/src/config/imx219_1080x1920_0.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -77,11 +77,11 @@ "flip_ctl" :0, "video_fmt_sl":0, "itc_ttl_h" :3453, - "itc_ttl_v" :1979, + "itc_ttl_v" :1977, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -91,8 +91,8 @@ "wdr_s_mul_data":0 }, "blc":{ - "blc_en" :1, - "blc_offset" :240, + "blc_en" :1, + "blc_offset" :240, "blc_ratio" :272 }, "lsc":{ @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -124,24 +124,24 @@ "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, - "ae_ex_value_max" :1975, + "ae_ex_value_max" :1973, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :1000, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :262, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -230,7 +230,7 @@ "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1079, - "ada_win_endv" :1919 + "ada_win_endv" :1919 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,10 +251,10 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, @@ -288,7 +288,7 @@ "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,7 +299,7 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, "shp_th1" :3840, "shp_th2" :4095, @@ -307,8 +307,8 @@ }, "cc":{ "enh_cc_en" :0, - "enh_adp_cc_en" :0 - } + "enh_adp_cc_en" :0 + } }, "post_ctl":{ "otc_ctl":{ @@ -318,11 +318,11 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, @@ -330,7 +330,7 @@ }, "strt":{ "strt_en" :1, - "strt_gain":250 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :480, "ldc_cv" :1000, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1079, - "af_stat_win_v_end" :1919 + "af_stat_win_v_end" :1919 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} diff --git a/package/mediactl_lib/src/config/imx219_1080x1920_1.conf b/package/mediactl_lib/src/config/imx219_1080x1920_1.conf index 72a92ba..dd62ed7 100644 --- a/package/mediactl_lib/src/config/imx219_1080x1920_1.conf +++ b/package/mediactl_lib/src/config/imx219_1080x1920_1.conf @@ -1,5 +1,5 @@ { - "isp_general":{ + "isp_general":{ "isp_out_sel":0, "dvp_ch_mode":1, "hist_3a_out_en":0, @@ -33,7 +33,7 @@ }, "wdr":{ "wdr_mode":0, - "wdr_long_ch_mode":0, + "wdr_long_ch_mode":0, "wdr_long_l2_buf_en":0, "wdr_short_s1_buf_en":0, "wdr_dynamic_switch_en":0, @@ -43,8 +43,8 @@ "wdr_long_img_out_format":0, "wdr_long_yuv422_pxl_order":0, "wdr_long_pixel_width":2, - "wdr_buf_base":0, - "wdr_line_stride":0, + "wdr_buf_base":0, + "wdr_line_stride":0, "wdr_frame_buf_size":0 }, "nr3d":{ @@ -52,23 +52,23 @@ "nr3d_fbcd_en":0, "nr3d_mv_out_en":0, "nr3d_y_img_format":0, - "nr3d_y_yuv_in_format":0, - "nr3d_y_img_out_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, "nr3d_y_yuv422_pxl_order":0, "nr3d_y_pixel_width":2, "nr3d_uv_img_format":0, - "nr3d_uv_yuv_in_format":0, + "nr3d_uv_yuv_in_format":0, "nr3d_uv_mig_out_format":0, "nr3d_uv_yuv422_pxl_order":0, - "nr3d_uv_pixel_width":2, - "nr3d_frame_buf_size":0 + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 }, "ldc":{ "ldc_line_stride":2048, "ldc_frame_buf_size":2048 } }, - "isp_core": { + "isp_core": { "itc": { "hsync_pol":0, "vsync_pol":0, @@ -77,11 +77,11 @@ "flip_ctl" :0, "video_fmt_sl":0, "itc_ttl_h" :3453, - "itc_ttl_v" :1979, + "itc_ttl_v" :1977, "itc_stt_hr" :0, - "itc_stt_vr" :1 + "itc_stt_vr" :1 }, - "tpg": { + "tpg": { "tpg_en":0, "bayer_mode_sel":3, "motion_mode_sel":0, @@ -91,8 +91,8 @@ "wdr_s_mul_data":0 }, "blc":{ - "blc_en" :1, - "blc_offset" :240, + "blc_en" :1, + "blc_offset" :240, "blc_ratio" :272 }, "lsc":{ @@ -102,12 +102,12 @@ "lsc_r_ratio" :10, "lsc_g_ratio":6, "lsc_b_ratio" :6, - "lsc_ir_ratio" :6 + "lsc_ir_ratio" :6 }, "ae":{ - "ae_as_en" :1, - "ae_ag_en" :1, - "ae_airis_en" :0, + "ae_as_en" :0, + "ae_ag_en" :0, + "ae_airis_en" :0, "ae_enter_ls_sel" :0, "ae_exit_ls_sel" :0, "ae_win_mode_sel" :0, @@ -124,24 +124,24 @@ "ae_m_ex_time" :32, "ae_s_ex_time" :32, "ae_agc" :256, - "ae_ad_shuttle_freq" :1, + "ae_ad_shuttle_freq" :0, "ae_ad_gain_freq" :0, "ae_adjust_step_max":36, - "ae_ex_value_max" :1975, + "ae_ex_value_max" :1973, "ae_ex_value_mid" :256, - "ae_ex_value_min" :1, - "ae_gain_value_max" :2304, + "ae_ex_value_min" :1, + "ae_gain_value_max" :4095, "ae_gain_value_mid" :512, "ae_gain_value_min" :256, "ae_dn_switch_ad_step_max" :1000, - "ae_dn_switch_wait_time" :255, - "ape_max_diff" :12, - "ape_drv_signal_max" :3840, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, "ape_coeff_distance" :0, "ape_coeff_speed" :0, "ape_coeff_acceleration" :0, "ape_drv_manual_value" :4095, - "ape_damp_manual_value" :2048 + "ape_damp_manual_value" :2048 }, "awb":{ "awb_d65_en" :1, @@ -181,7 +181,7 @@ "awb_red_min_value" :176, "awb_blue_min_value" :262, "awb_red_obj_value" :256, - "awb_blue_obj_value" :256 + "awb_blue_obj_value" :256 }, "wdr":{ "wdr_fusion_en" :0, @@ -191,18 +191,18 @@ "wdr_en" :0, "wdr_ghost_remove_en" :0, "wdr_3frame_out_mode" :0, - "wdr_mode_sel" :0, + "wdr_mode_sel" :0, "wdr_2frame_ex_ratio" :1, "wdr_3frame_ex_ratio" :1, "wdr_stat_img_sel" :0, "wdr_ltm_data_sel" :1, "wdr_tz_data_sel" :1, - "wdr_remove_purple_en" :0, + "wdr_remove_purple_en" :0, "wdr_over_ex_ratio_th1" :384, "wdr_over_ex_ratio_th2" :32, "wdr_fusion_ratio_th" :192, "wdr_fusion_value1" :64, - "wdr_fusion_value2" :16 + "wdr_fusion_value2" :16 }, "csc":{ "rgb2yuv_00":153, @@ -230,7 +230,7 @@ "ada_win_stth" :0, "ada_win_sttv" :0, "ada_win_endh" :1079, - "ada_win_endv" :1919 + "ada_win_endv" :1919 }, "rgb-ir":{ "raw_fmt" :0, @@ -242,7 +242,7 @@ "dfc_krb" :0, "dfc_ky" :0, "dfc_th" :256, - "dfc_th_1" :256 + "dfc_th_1" :256 }, "2dnr":{ "dpeak_en" :1, @@ -251,10 +251,10 @@ "nr2d_jl_en" :1, "nr2d_av_en" :1, "nr2d_c_en" :1, - "dpeak_adp_en" :1, - "nr2d_raw_adp_en":1, - "nr2d_y_adp_en" :1, - "nr2d_c_adp_en" :1, + "dpeak_adp_en" :0, + "nr2d_raw_adp_en":0, + "nr2d_y_adp_en" :0, + "nr2d_c_adp_en" :0, "nr2d_raw_kl" :16, "nr2d_jl_th" :511, "nr2d_eg_k" :48, @@ -288,7 +288,7 @@ "core_3dnr_chroma_intensity" :16, "nr3db_nr2d_eg_th" :64, "nr3db_thyp" :64, - "nr3db_thcp" :32 + "nr3db_thcp" :32 }, "enh":{ "ltm":{ @@ -299,7 +299,7 @@ }, "sharp":{ "enh_sharp_en" :1, - "enh_adp_sharp_en" :1, + "enh_adp_sharp_en" :0, "shp_core" :8, "shp_th1" :3840, "shp_th2" :4095, @@ -307,8 +307,8 @@ }, "cc":{ "enh_cc_en" :0, - "enh_adp_cc_en" :0 - } + "enh_adp_cc_en" :0 + } }, "post_ctl":{ "otc_ctl":{ @@ -318,11 +318,11 @@ "otc_hs_plt_sl" :0, "otc_vs_plt_sl" :0, "otc_stt_vr" :0, - "otc_stt_hr" :0 + "otc_stt_hr" :0 }, "ctrst":{ "ctrst_en" :1, - "ctrst_gain":128 + "ctrst_gain":128 }, "luma":{ "luma_en" :1, @@ -330,7 +330,7 @@ }, "strt":{ "strt_en" :1, - "strt_gain":250 + "strt_gain":250 } }, "ldc":{ @@ -341,7 +341,7 @@ "ldc_ch" :480, "ldc_cv" :1000, "ldc_cr" :684, - "ldc_cz" :684 + "ldc_cz" :684 }, "af":{ "af_stat_en" :1, @@ -349,7 +349,7 @@ "af_stat_win_h_start":0, "af_stat_win_v_start":0, "af_stat_win_h_end" :1079, - "af_stat_win_v_end" :1919 + "af_stat_win_v_end" :1919 } }, "isp_post":{ @@ -365,7 +365,7 @@ "osd_rgb2yuv_coeff20":523, "osd_rgb2yuv_coeff21":3658, "osd_rgb2yuv_coeff22":4011, - "osd_rgb2yuv_coeff23":128 + "osd_rgb2yuv_coeff23":128 }, "yuv2rgb":{ "out_yuv2rgb_coeff00":1024, @@ -379,7 +379,7 @@ "out_yuv2rgb_coeff20":1024, "out_yuv2rgb_coeff21":1822, "out_yuv2rgb_coeff22":0, - "out_yuv2rgb_coeff23":3868 + "out_yuv2rgb_coeff23":3868 }, "ds0":{ "ds0_out_rgb_mode":0, @@ -528,4 +528,4 @@ } } } -} \ No newline at end of file +} diff --git a/package/mediactl_lib/src/config/video_drm_1080x1920.conf b/package/mediactl_lib/src/config/video_drm_1080x1920.conf index f3b86d4..a04d394 100644 --- a/package/mediactl_lib/src/config/video_drm_1080x1920.conf +++ b/package/mediactl_lib/src/config/video_drm_1080x1920.conf @@ -1,5 +1,5 @@ { - "sensor0":{ + "sensor0":{ "sensor0_name":"m00_f_imx219_0 0-0010", "sensor0_cfg_file":"imx219_1080x1920_0.conf", "sensor0_total_size":{ @@ -36,7 +36,7 @@ "video5_out_format":1, "video5_pitch":320 } - }, + }, "sensor1":{ "sensor1_name":"m01_f_imx219_1 3-0010", "sensor1_cfg_file":"imx219_1.conf", @@ -130,7 +130,7 @@ "sensor2_isp_pipeline":2 }, "vi_pipe00":{ - "p00_win_mode_en":1, + "p00_win_mode_en":1, "p00_input_ch_sel":1, "p00_ch_mode_sel":1, "p00_pixel_type":0, @@ -159,7 +159,7 @@ "p00_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_pipe01":{ - "p01_win_mode_en":1, + "p01_win_mode_en":1, "p01_input_ch_sel":1, "p01_ch_mode_sel":1, "p01_pixel_type":0, @@ -180,7 +180,7 @@ "p01_tpg_w_en":0, "p01_tpg_r_en":0, "p01_total_width":3453, - "p01_total_height":1979, + "p01_total_height":1977, "p01_in_width":1920, "p01_in_height":1080, "p01_w_st_width":0, @@ -199,7 +199,7 @@ "p01_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_pipe02":{ - "p02_win_mode_en":1, + "p02_win_mode_en":1, "p02_input_ch_sel":1, "p02_ch_mode_sel":1, "p02_pixel_type":0, @@ -219,8 +219,8 @@ "p02_isp_field_pol":1, "p02_tpg_w_en":0, "p02_tpg_r_en":0, - "p02_total_width":3457, - "p02_total_height":1969, + "p02_total_width":3453, + "p02_total_height":1977, "p02_in_width":1920, "p02_in_height":1080, "p02_w_st_width":0, @@ -239,7 +239,7 @@ "p02_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_pipe10":{ - "p10_win_mode_en":1, + "p10_win_mode_en":1, "p10_input_ch_sel":1, "p10_ch_mode_sel":1, "p10_pixel_type":0, @@ -259,8 +259,8 @@ "p10_isp_field_pol":1, "p10_tpg_w_en":0, "p10_tpg_r_en":0, - "p10_total_width":3457, - "p10_total_height":1969, + "p10_total_width":3453, + "p10_total_height":1977, "p10_in_width":1920, "p10_in_height":1080, "p10_w_st_width":0, @@ -279,7 +279,7 @@ "p10_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_dvp00":{ - "dvp00_win_mode_en":1, + "dvp00_win_mode_en":1, "dvp00_input_ch_sel":1, "dvp00_ch_mode_sel":1, "dvp00_pixel_type":0, @@ -299,8 +299,8 @@ "dvp00_isp_field_pol":1, "dvp00_tpg_w_en":0, "dvp00_tpg_r_en":0, - "dvp00_total_width":3457, - "dvp00_total_height":1969, + "dvp00_total_width":3453, + "dvp00_total_height":1977, "dvp00_in_width":1920, "dvp00_in_height":1080, "dvp00_w_st_width":0, @@ -319,4 +319,4 @@ "dvp00_vi_pipe_tpg_tof_frm_stride":66432 } } -} +} diff --git a/package/mediactl_lib/src/config/video_drm_1080x1920_r2k.conf b/package/mediactl_lib/src/config/video_drm_1080x1920_r2k.conf index 7066146..7723a8f 100644 --- a/package/mediactl_lib/src/config/video_drm_1080x1920_r2k.conf +++ b/package/mediactl_lib/src/config/video_drm_1080x1920_r2k.conf @@ -1,5 +1,5 @@ { - "sensor0":{ + "sensor0":{ "sensor0_name":"m00_f_imx219_0 0-0010", "sensor0_cfg_file":"imx219_0.conf", "sensor0_total_size":{ @@ -36,13 +36,13 @@ "video5_out_format":1, "video5_pitch":320 } - }, + }, "sensor1":{ "sensor1_name":"m01_f_imx219_1 3-0010", "sensor1_cfg_file":"imx219_1080x1920_1.conf", "sensor1_total_size":{ "sensor1_total_width":3453, - "sensor1_total_height":1979 + "sensor1_total_height":1977 }, "sensor1_active_size":{ "sensor1_active_width":1080, @@ -130,7 +130,7 @@ "sensor2_isp_pipeline":2 }, "vi_pipe00":{ - "p00_win_mode_en":1, + "p00_win_mode_en":1, "p00_input_ch_sel":1, "p00_ch_mode_sel":1, "p00_pixel_type":0, @@ -159,7 +159,7 @@ "p00_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_pipe01":{ - "p01_win_mode_en":1, + "p01_win_mode_en":1, "p01_input_ch_sel":1, "p01_ch_mode_sel":1, "p01_pixel_type":0, @@ -180,7 +180,7 @@ "p01_tpg_w_en":0, "p01_tpg_r_en":0, "p01_total_width":3453, - "p01_total_height":1979, + "p01_total_height":1977, "p01_in_width":1080, "p01_in_height":1920, "p01_w_st_width":0, @@ -199,7 +199,7 @@ "p01_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_pipe02":{ - "p02_win_mode_en":1, + "p02_win_mode_en":1, "p02_input_ch_sel":1, "p02_ch_mode_sel":1, "p02_pixel_type":0, @@ -220,7 +220,7 @@ "p02_tpg_w_en":0, "p02_tpg_r_en":0, "p02_total_width":3453, - "p02_total_height":1979, + "p02_total_height":1977, "p02_in_width":1080, "p02_in_height":1920, "p02_w_st_width":0, @@ -239,7 +239,7 @@ "p02_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_pipe10":{ - "p10_win_mode_en":1, + "p10_win_mode_en":1, "p10_input_ch_sel":1, "p10_ch_mode_sel":1, "p10_pixel_type":0, @@ -260,7 +260,7 @@ "p10_tpg_w_en":0, "p10_tpg_r_en":0, "p10_total_width":3453, - "p10_total_height":1979, + "p10_total_height":1977, "p10_in_width":1080, "p10_in_height":1920, "p10_w_st_width":0, @@ -279,7 +279,7 @@ "p10_vi_pipe_tpg_tof_frm_stride":66432 }, "vi_dvp00":{ - "dvp00_win_mode_en":1, + "dvp00_win_mode_en":1, "dvp00_input_ch_sel":1, "dvp00_ch_mode_sel":1, "dvp00_pixel_type":0, @@ -300,7 +300,7 @@ "dvp00_tpg_w_en":0, "dvp00_tpg_r_en":0, "dvp00_total_width":3453, - "dvp00_total_height":1979, + "dvp00_total_height":1977, "dvp00_in_width":1920, "dvp00_in_height":1080, "dvp00_w_st_width":0, @@ -319,4 +319,4 @@ "dvp00_vi_pipe_tpg_tof_frm_stride":66432 } } -} +} diff --git a/package/mediactl_lib/src/lib3actl.so b/package/mediactl_lib/src/lib3actl.so new file mode 100755 index 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VIDIOC_K510ISP_F2K_REMAP_OUT1_CFG \ _IOWR('V', BASE_VIDIOC_PRIVATE + 7,struct isp_remap_cfg_info) #define VIDIOC_K510ISP_F2K_FBCD_CFG \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 8,struct isp_remap_cfg_info) + _IOWR('V', BASE_VIDIOC_PRIVATE + 8,struct isp_remap_cfg_info) #define VIDIOC_K510ISP_R2K_WRAP_CFG \ _IOWR('V', BASE_VIDIOC_PRIVATE + 9,struct isp_wrap_cfg_info) #define VIDIOC_K510ISP_R2K_CORE_CFG \ @@ -114,7 +114,7 @@ #define VIDIOC_K510ISP_F2K_CORE_CFG_GET \ _IOWR('V', BASE_VIDIOC_PRIVATE + 36,struct isp_core_cfg_info) #define VIDIOC_K510ISP_R2K_CORE_CFG_GET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 37,struct isp_core_cfg_info) + _IOWR('V', BASE_VIDIOC_PRIVATE + 37,struct isp_core_cfg_info) #define VIDIOC_K510ISP_SYSCTL_RST_CSI \ _IOWR('V', BASE_VIDIOC_PRIVATE + 38,unsigned long) #define VIDIOC_K510ISP_SYSCTL_RST_VI \ @@ -123,18 +123,14 @@ _IOWR('V', BASE_VIDIOC_PRIVATE + 40,unsigned long) #define VIDIOC_K510ISP_SYSCTL_RST_R2K \ _IOWR('V', BASE_VIDIOC_PRIVATE + 41,unsigned long) -#define VIDIOC_K510ISP_F2K_AWB_VAL_GET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 42, struct k510isp_awb_sync_info) -#define VIDIOC_K510ISP_R2K_AWB_VAL_SET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 43, struct k510isp_awb_sync_info) #define VIDIOC_K510ISP_F2K_CORE_REG_SET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 44, struct k510isp_reg_val) + _IOWR('V', BASE_VIDIOC_PRIVATE + 42, struct k510isp_reg_val) #define VIDIOC_K510ISP_F2K_CORE_REG_GET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 45, struct k510isp_reg_val) + _IOWR('V', BASE_VIDIOC_PRIVATE + 43, struct k510isp_reg_val) #define VIDIOC_K510ISP_R2K_CORE_REG_SET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 46, struct k510isp_reg_val) + _IOWR('V', BASE_VIDIOC_PRIVATE + 44, struct k510isp_reg_val) #define VIDIOC_K510ISP_R2K_CORE_REG_GET \ - _IOWR('V', BASE_VIDIOC_PRIVATE + 47, struct k510isp_reg_val) + _IOWR('V', BASE_VIDIOC_PRIVATE + 45, struct k510isp_reg_val) // /* * Events @@ -197,7 +193,7 @@ struct k510isp_awb_sync_info { struct k510isp_awb_stats{ // __u32 bfb_pos;//Blue hist value of AWB in feedback mode - __u32 bfb_pot;//Blue hist pixels of AWB in feedback mode + __u32 bfb_pot;//Blue hist pixels of AWB in feedback mode __u32 rfb_pos;//Red hist value of AWB in feedback mode __u32 rfb_pot;//Red hist pixels of AWB in feedback mode // @@ -315,4 +311,4 @@ struct k510isp_reg_val { __u32 reg_addr; __u32 reg_value; }; -#endif \ No newline at end of file +#endif diff --git a/package/mediactl_lib/src/media_ctl.c b/package/mediactl_lib/src/media_ctl.c index 0cd0b9d..272f2eb 100644 --- a/package/mediactl_lib/src/media_ctl.c +++ b/package/mediactl_lib/src/media_ctl.c @@ -59,6 +59,11 @@ #include "linux/k510isp.h" #include "isp/json_parse.h" +#include "adaptive/adaptive_user_func.h" +#include "adaptive/adaptive_params.h" +#include "3a_ctl/ae_ctl.h" +#include "3a_ctl/ae_cfg_param.h" + #define MEDIA_DEVICE "/dev/media0" #define ENTITY_DPHY "K510 ISP DPHY" #define ENTITY_CSI2 "K510 ISP CSI2" @@ -66,7 +71,7 @@ #define ENTITY_F2K "K510 ISP F2K" #define ENTITY_R2K "K510 ISP R2K" -// share memory +// share memory struct share_memory_alloc_align_args { uint32_t size; uint32_t alignment; @@ -85,11 +90,24 @@ int fd_mem_map = -1; #define SHARE_MEMORY_DEV "/dev/k510-share-memory" #define MAP_MEMORY_DEV "/dev/mem" int *virtual_addr[MEMORY_TEST_BLOCK_NUM]= {0}; -bool DualCamera_Sync = TRUE; -bool Sensor1_Sync = FALSE; -bool Awb_Sync_Init = TRUE; +// bool DualCamera_Sync = TRUE; +// bool Sensor1_Sync = FALSE; +// bool Awb_Sync_Init = TRUE; + +/* hw/sw ae scl */ +bool ae_hw_set_f2k = FALSE; +bool ae_hw_set_r2k = FALSE; +typedef int (* __mediactl_pfunc)(enum isp_pipeline_e); +__mediactl_pfunc mediactl_all_set_ae = mediactl_sw_set_ae; +/* ae ctl */ +extern bool Sensor1_Sync; +extern int AESmoothSteps; //将AE收敛分为9步完成,可设置, >=7 +extern int ETDelayFrameNumber[2]; //Sensor ET设置生效所需帧数 +extern struct ISP_AE_Parameters AE_Para_Inf[2]; +/* adaptive */ +bool adaptive_enable_scl = TRUE; struct share_memory_alloc_align_args allocAlignMem[MEMORY_TEST_BLOCK_NUM] = {0}; // @@ -104,8 +122,8 @@ enum isp_pipeline struct video_entity_info_s{ unsigned int used; char video_entity_name[50]; - struct image_size_s video_size; - unsigned int video_out_format; + struct image_size_s video_size; + unsigned int video_out_format; }; struct isp_pipeline_s{ @@ -139,14 +157,14 @@ struct v4l_isp_device v4l_isp; *************************************************************************/ /** * @brief Construct a new isp entity init object - * - * @param isp + * + * @param isp */ static int isp_entity_init(struct v4l_isp_device *isp) { - struct media_entity *entity; + struct media_entity *entity; unsigned int i; - /* + /* * Start by locating the three entities. The output video node is * located by looking for a devnode connected to the VI. */ @@ -200,10 +218,10 @@ static int isp_entity_init(struct v4l_isp_device *isp) return 0; } /** - * @brief - * - * @param isp - * @return int + * @brief + * + * @param isp + * @return int */ static int isp_f2k_video_init(struct v4l_isp_device *isp) { @@ -211,7 +229,7 @@ static int isp_f2k_video_init(struct v4l_isp_device *isp) unsigned int i; unsigned int j; - struct isp_pipeline_s *isp_pipeline = &isp->isp_pipeline[ISP_F2K]; + struct isp_pipeline_s *isp_pipeline = &isp->isp_pipeline[ISP_F2K]; for(j = 0;j<4;j++) { //printf("%s:%d,%s\n",__func__,isp_pipeline->video_entity_info[j].used,isp_pipeline->video_entity_info[j].video_entity_name); @@ -226,7 +244,7 @@ static int isp_f2k_video_init(struct v4l_isp_device *isp) //printf("%s:video entity (0x%x):locate entities OK!\n",__func__,isp->video[j+2]); //F2K - for (i = 0; i < isp->f2k->info.links+1; ++i) { + for (i = 0; i < isp->f2k->info.links+1; ++i) { //printf("links[%d]:0x%x,sink:0x%x,source:0x%x\n",i,isp->f2k->links[i],isp->f2k->links[i].sink,isp->f2k->links[i].source); entity = isp->f2k->links[i].sink->entity; //printf("%s:%d,media_entity_type:0x%x,0x%x\n",__func__,i,media_entity_type(entity),entity); @@ -237,8 +255,8 @@ static int isp_f2k_video_init(struct v4l_isp_device *isp) { printf("%s:entity(0x%x)isp->video(0x%x)\n",__func__,entity,isp->video[j+2]); break; - } - } + } + } } if (i == isp->f2k->info.links+1) { //2 @@ -252,10 +270,10 @@ static int isp_f2k_video_init(struct v4l_isp_device *isp) return 0; } /** - * @brief - * - * @param isp - * @return int + * @brief + * + * @param isp + * @return int */ static int isp_r2k_video_init(struct v4l_isp_device *isp) { @@ -263,7 +281,7 @@ static int isp_r2k_video_init(struct v4l_isp_device *isp) unsigned int i; unsigned int j; - struct isp_pipeline_s *isp_pipeline = &isp->isp_pipeline[ISP_R2K]; + struct isp_pipeline_s *isp_pipeline = &isp->isp_pipeline[ISP_R2K]; for(j = 0;j<4;j++) { if(isp_pipeline->video_entity_info[j].used == 1) @@ -277,7 +295,7 @@ static int isp_r2k_video_init(struct v4l_isp_device *isp) //printf("%s:video entity (0x%x):locate entities OK!\n",__func__,isp->video[j+6]); //R2K - for (i = 0; i < isp->r2k->info.links+1; ++i) { + for (i = 0; i < isp->r2k->info.links+1; ++i) { //printf("links[%d]:0x%x,sink:0x%x,source:0x%x\n",i,isp->r2k->links[i],isp->r2k->links[i].sink,isp->r2k->links[i].source); entity = isp->r2k->links[i].sink->entity; //printf("%s:%d,media_entity_type:0x%x,0x%x\n",__func__,i,media_entity_type(entity),entity); @@ -288,8 +306,8 @@ static int isp_r2k_video_init(struct v4l_isp_device *isp) { printf("%s:entity(0x%x)isp->video(0x%x)\n",__func__,entity,isp->video[j+6]); break; - } - } + } + } } if (i == isp->r2k->info.links+1) { //2 @@ -304,10 +322,10 @@ static int isp_r2k_video_init(struct v4l_isp_device *isp) return 0; } /** - * @brief - * - * @param isp - * @return int + * @brief + * + * @param isp + * @return int */ static int isp_setup_link(struct v4l_isp_device *isp) { @@ -319,7 +337,7 @@ static int isp_setup_link(struct v4l_isp_device *isp) &isp->vi->pads[VI_PAD_SINK_CSI0], MEDIA_LNK_FL_ENABLED); if (ret < 0) { printf("%s error: unable to setup csi2 -> vi link.\n",__func__); - return ret; + return ret; } //printf("isp->csi2->pads[CSI2_PAD_SOURCE1] =0x%x,&isp->vi->pads[VI_PAD_SINK_CSI1] =0x%x\n\n",&isp->csi2->pads[CSI2_PAD_SOURCE0],&isp->vi->pads[VI_PAD_SINK_CSI0]); @@ -327,7 +345,7 @@ static int isp_setup_link(struct v4l_isp_device *isp) &isp->vi->pads[VI_PAD_SINK_CSI1], MEDIA_LNK_FL_ENABLED); if (ret < 0) { printf("%s error: unable to setup csi2 -> vi link.\n",__func__); - return ret; + return ret; } //printf("%s:isp->sensor0->pads[0] =0x%x,&isp->csi2->pads[CSI2_PAD_SINK0] =0x%x\n",__func__,&isp->sensor0->pads[0],&isp->csi2->pads[CSI2_PAD_SINK0]); @@ -337,7 +355,7 @@ static int isp_setup_link(struct v4l_isp_device *isp) &isp->csi2->pads[CSI2_PAD_SINK0], MEDIA_LNK_FL_ENABLED); if (ret < 0) { printf("%s error: unable to setup sensor0 -> csi2 link.\n",__func__); - return ret; + return ret; } //printf("isp->vi->pads[VI_PAD_SOURCE_F2K] =0x%x,&isp->f2k->pads[ISP_F2K_PAD_SINK] =0x%x\n\n",&isp->vi->pads[VI_PAD_SOURCE_F2K],&isp->f2k->pads[ISP_F2K_PAD_SINK]); @@ -345,7 +363,7 @@ static int isp_setup_link(struct v4l_isp_device *isp) &isp->f2k->pads[ISP_F2K_PAD_SINK], MEDIA_LNK_FL_ENABLED); if (ret < 0) { printf("%s error: unable to setup vi -> f2k link.\n",__func__); - return ret; + return ret; } } @@ -356,7 +374,7 @@ static int isp_setup_link(struct v4l_isp_device *isp) &isp->csi2->pads[CSI2_PAD_SINK1], MEDIA_LNK_FL_ENABLED); if (ret < 0) { printf("%s error: unable to setup sensor1 -> csi2 link.\n",__func__); - return ret; + return ret; } //printf("isp->vi->pads[VI_PAD_SOURCE_R2K] =0x%x,&isp->r2k->pads[ISP_R2K_PAD_SINK] =0x%x\n\n",&isp->vi->pads[VI_PAD_SOURCE_R2K],&isp->r2k->pads[ISP_R2K_PAD_SINK]); @@ -364,17 +382,17 @@ static int isp_setup_link(struct v4l_isp_device *isp) &isp->r2k->pads[ISP_R2K_PAD_SINK], MEDIA_LNK_FL_ENABLED); if (ret < 0) { printf("%s error: unable to setup vi -> r2k link.\n",__func__); - return ret; + return ret; } } return 0; } /** - * @brief - * - * @param isp - * @param source_pad - * @return int + * @brief + * + * @param isp + * @param source_pad + * @return int */ static int isp_f2k_video_link(struct v4l_isp_device *isp) { @@ -385,7 +403,7 @@ static int isp_f2k_video_link(struct v4l_isp_device *isp) for(i = 0; i< 4; i++) { if(isp_pipeline->video_entity_info[i].used == 1) - { + { ret = media_setup_link(isp->mdev, &isp->f2k->pads[ISP_F2K_PAD_MAIN_SOURCE + i], &isp->video[i+2]->pads[0], MEDIA_LNK_FL_ENABLED); if (ret < 0) { @@ -398,11 +416,11 @@ static int isp_f2k_video_link(struct v4l_isp_device *isp) return 0; } /** - * @brief - * - * @param isp - * @param source_pad - * @return int + * @brief + * + * @param isp + * @param source_pad + * @return int */ static int isp_r2k_video_link(struct v4l_isp_device *isp) { @@ -413,7 +431,7 @@ static int isp_r2k_video_link(struct v4l_isp_device *isp) for(i = 0; i< 4; i++) { if(isp_pipeline->video_entity_info[i].used == 1) - { + { ret = media_setup_link(isp->mdev, &isp->r2k->pads[ISP_R2K_PAD_MAIN_SOURCE + i], &isp->video[i+6]->pads[0], MEDIA_LNK_FL_ENABLED); if (ret < 0) { @@ -426,10 +444,10 @@ static int isp_r2k_video_link(struct v4l_isp_device *isp) return 0; } /** - * @brief - * - * @param isp - * @return int + * @brief + * + * @param isp + * @return int * Configure formats. Retrieve the default format at the sensor output * and propagate it through the pipeline. As the VI will not perform * any cropping we can just apply the same format on all pads. @@ -501,7 +519,7 @@ static int isp_f2k_set_format(struct v4l_isp_device *isp) return ret; } //printf("%s:v4l2_subdev_set_format vi(s) width:(%d),height:(%d)\n",__func__,isp_pipeline->format_in.width,isp_pipeline->format_in.height); - + ret = v4l2_subdev_set_format(isp->vi, &isp_pipeline->format_in, VI_PAD_SOURCE_F2K, V4L2_SUBDEV_FORMAT_ACTIVE); @@ -510,7 +528,7 @@ static int isp_f2k_set_format(struct v4l_isp_device *isp) isp->vi->info.name, 1); return ret; } - //printf("%s:v4l2_subdev_set_format vi(s1) width:(%d),height:(%d)\n",__func__,isp_pipeline->format_in.width,isp_pipeline->format_in.height); + //printf("%s:v4l2_subdev_set_format vi(s1) width:(%d),height:(%d)\n",__func__,isp_pipeline->format_in.width,isp_pipeline->format_in.height); //isp_pipeline->format_in.code =MEDIA_BUS_FMT_SRGGB12_1X12;//MEDIA_BUS_FMT_SRGGB10_1X10; @@ -558,14 +576,14 @@ static int isp_f2k_set_format(struct v4l_isp_device *isp) } } } - + return 0; } /** - * @brief - * - * @param isp - * @return int + * @brief + * + * @param isp + * @return int */ static int isp_r2k_set_format(struct v4l_isp_device *isp) { @@ -585,7 +603,7 @@ static int isp_r2k_set_format(struct v4l_isp_device *isp) memcpy(&isp_pipeline->format_in,&format,sizeof(struct v4l2_mbus_framefmt)); isp_pipeline->format_in.width = isp_pipeline->sensor_size.width;//ACTIVE_WIDTH;//1080; - isp_pipeline->format_in.height = isp_pipeline->sensor_size.height;//ACTIVE_HEIGHT;//1920 + isp_pipeline->format_in.height = isp_pipeline->sensor_size.height;//ACTIVE_HEIGHT;//1920 ret = v4l2_subdev_set_format(isp->sensor1, &isp_pipeline->format_in, 0, V4L2_SUBDEV_FORMAT_ACTIVE); if (ret < 0) { @@ -649,7 +667,7 @@ static int isp_r2k_set_format(struct v4l_isp_device *isp) { isp_pipeline->format_out.width = isp_pipeline->video_entity_info[i].video_size.width;//VIDEO_WIDTH;//1080; isp_pipeline->format_out.height = isp_pipeline->video_entity_info[i].video_size.height;//VIDEO_HEIGHT;//720; - + if( isp_pipeline->video_entity_info[i].video_out_format == 1) { isp_pipeline->format_out.code = MEDIA_BUS_FMT_Y12_1X12; //MEDIA_BUS_FMT_UYVY8_1_5X8,MEDIA_BUS_FMT_VYUY8_1_5X8,MEDIA_BUS_FMT_YUYV8_1_5X8,MEDIA_BUS_FMT_YVYU8_1_5X8 @@ -673,62 +691,15 @@ static int isp_r2k_set_format(struct v4l_isp_device *isp) } } } - + return 0; } -#define ISP_CORE_AWB_CTL (0x0104) -#define ISP_CORE_AWB_HANDLE_MODE (0x03f7) -#define ISP_CORE_AWB_HANDLE_MODE_CHECK (0x0008) - /** * @brief * - */ -static int isp_awb_sync_init() -{ - int ret; - struct k510isp_reg_val r2k_awb_reg_val,r2k_awb_reg_val_write; - struct media_entity *pipe_f2k,*pipe_r2k; - pipe_r2k = v4l_isp.r2k; - - r2k_awb_reg_val.reg_addr = ISP_CORE_AWB_CTL; - r2k_awb_reg_val.reg_value = 0x0000; - - ret = v4l2_subdev_open(pipe_r2k); - if (ret < 0) - return ret; - // get r2k awb ctl value - ret = ioctl(pipe_r2k->fd,VIDIOC_K510ISP_R2K_CORE_REG_GET,&r2k_awb_reg_val); - if (ret < 0) - { - printf("%s: ioctl(VIDIOC_K510ISP_R2K_CORE_REG_GET) failed ret(%d)\n", __func__,ret); - v4l2_subdev_close(pipe_r2k); - return ret; - } - // check r2k is handle mode or not, if auto mode then set to handle mode - if ((r2k_awb_reg_val.reg_value & ISP_CORE_AWB_HANDLE_MODE_CHECK) == ISP_CORE_AWB_HANDLE_MODE_CHECK) - { - r2k_awb_reg_val_write.reg_addr = ISP_CORE_AWB_CTL; - r2k_awb_reg_val_write.reg_value = r2k_awb_reg_val.reg_value & ISP_CORE_AWB_HANDLE_MODE; - ret = ioctl(pipe_r2k->fd,VIDIOC_K510ISP_R2K_CORE_REG_SET,&r2k_awb_reg_val_write); - if (ret < 0) - { - printf("%s: ioctl(VIDIOC_K510ISP_R2K_CORE_REG_SET) failed ret(%d)\n", __func__, - ret); - v4l2_subdev_close(pipe_r2k); - return ret; - } - } - v4l2_subdev_close(pipe_r2k); - return 0; -} - -/** - * @brief - * - * @param isp - * @return int + * @param isp + * @return int */ static int isp_pipeline_setup(struct v4l_isp_device *isp) { @@ -766,19 +737,13 @@ static int isp_pipeline_setup(struct v4l_isp_device *isp) isp_r2k_set_format(isp); } - - if((isp->isp_pipeline[ISP_F2K].pipeline_en == 1)&&(isp->isp_pipeline[ISP_R2K].pipeline_en == 1)&&(DualCamera_Sync == TRUE)) - { - Sensor1_Sync = TRUE; - } - return 0; } /** - * @brief - * - * @param isp_pipeline - * @param isp_cfg + * @brief + * + * @param isp_pipeline + * @param isp_cfg */ void pipline_cfg(struct isp_pipeline_s *isp_pipeline,struct sensor_info *sensor) { @@ -788,7 +753,7 @@ void pipline_cfg(struct isp_pipeline_s *isp_pipeline,struct sensor_info *sensor) isp_pipeline->sensor_size.width = isp_core_cfg->itcInfo.itc_size.width; isp_pipeline->sensor_size.height = isp_core_cfg->itcInfo.itc_size.height; // - isp_pipeline->format_in.width = isp_pipeline->sensor_size.width; + isp_pipeline->format_in.width = isp_pipeline->sensor_size.width; isp_pipeline->format_in.height = isp_pipeline->sensor_size.height; // isp_pipeline->video_entity_info[0].used = isp_wrap_cfg->mainInfo.main_out_en; @@ -825,8 +790,8 @@ void pipline_cfg(struct isp_pipeline_s *isp_pipeline,struct sensor_info *sensor) } } /** - * @brief - * + * @brief + * */ static int isp_share_memory_alloc(void) { @@ -863,8 +828,8 @@ static int isp_share_memory_alloc(void) return 0; } /** - * @brief - * + * @brief + * */ static void isp_share_memory_free(void) { @@ -882,13 +847,13 @@ static void isp_share_memory_free(void) close(fd_share_memory); } -#if 0 +#if 0 int mediactl_all_set_ae(enum isp_pipeline_e pipeline) { int ret; struct k510isp_ae_stats ae_stats; struct media_entity *pipe; - + if(ISP_F2K_PIPELINE == pipeline) { pipe = v4l_isp.f2k; @@ -923,9 +888,9 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) { printf("%s: ioctl(VIDIOC_S_CTRL-V4L2_CID_GAIN)failed ret(%d)\n", __func__, ret); - v4l2_subdev_close(sensor0); + v4l2_subdev_close(sensor0); return ret; - } + } control_s.id = V4L2_CID_GAIN; control_s.value = ae_stats.ae_agco; @@ -936,7 +901,7 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) ret); v4l2_subdev_close(sensor0); return ret; - } + } v4l2_subdev_close(sensor0); } } @@ -977,7 +942,7 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) ret); v4l2_subdev_close(sensor1); return ret; - } + } control_s.id = V4L2_CID_GAIN; control_s.value = ae_stats.ae_agco; @@ -988,23 +953,28 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) ret); v4l2_subdev_close(sensor1); return ret; - } + } v4l2_subdev_close(sensor1); } } - + return 0; } #else -int mediactl_all_set_ae(enum isp_pipeline_e pipeline) +// original func: mediactl_all_set_ae(enum isp_pipeline_e pipeline) +int mediactl_hw_set_ae(enum isp_pipeline_e pipeline) { int ret; struct k510isp_ae_stats ae_stats; struct media_entity *pipe; - + if(ISP_F2K_PIPELINE == pipeline) { pipe = v4l_isp.f2k; + if(ae_hw_set_f2k) + { + ae_enable_set(pipeline, pipe); + } ret = v4l2_subdev_open(pipe); if (ret < 0) return ret; @@ -1021,9 +991,17 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) //printf("%s:ae_wren(%d),ae_expl(%d),ae_agco(%d)\n",__func__,ae_stats.ae_wren,ae_stats.ae_expl,ae_stats.ae_agco); v4l2_subdev_close(pipe); + adaptive_get_3a_stat(pipeline, pipe); // no change static int expl = 0, agco = 0; if (expl == ae_stats.ae_expl && agco == ae_stats.ae_agco) { + if(adaptive_ex_gt_update_flag(pipeline) == 1) + { + adaptive_ex_st_ae_apply(pipeline, ae_stats.y_av, expl, agco); + adaptive_param_flag_init(pipeline); + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } return ret; } else { expl = ae_stats.ae_expl; @@ -1058,11 +1036,21 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) return ret; } v4l2_subdev_close(sensor0); + if(adaptive_enable_scl) + { + adaptive_ex_st_ae_apply(pipeline, ae_stats.y_av, expl, agco); + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } } if(ISP_R2K_PIPELINE == pipeline) { pipe = v4l_isp.r2k; + if(ae_hw_set_r2k) + { + ae_enable_set(pipeline, pipe); + } ret = v4l2_subdev_open(pipe); if (ret < 0) return ret; @@ -1079,12 +1067,12 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) //printf("%s:ae_wren(%d),ae_expl(%d),ae_agco(%d)\n",__func__,ae_stats.ae_wren,ae_stats.ae_expl,ae_stats.ae_agco); v4l2_subdev_close(pipe); - static int expl = 0, agco = 0; - if (expl == ae_stats.ae_expl && agco == ae_stats.ae_agco) { + static int expl_1 = 0, agco_1 = 0; + if (expl_1 == ae_stats.ae_expl && agco_1 == ae_stats.ae_agco) { return ret; } else { - expl = ae_stats.ae_expl; - agco = ae_stats.ae_agco; + expl_1 = ae_stats.ae_expl; + agco_1 = ae_stats.ae_agco; } struct media_entity *sensor1 = v4l_isp.sensor1; @@ -1115,8 +1103,101 @@ int mediactl_all_set_ae(enum isp_pipeline_e pipeline) return ret; } v4l2_subdev_close(sensor1); + if(adaptive_enable_scl) + { + adaptive_ex_st_ae_apply(pipeline, ae_stats.y_av, expl_1, agco_1); + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } } - + return 0; +} + +/** + * @brief + * + */ +int mediactl_sw_set_ae(enum isp_pipeline_e pipeline) +{ + int ret; + struct media_entity *pipe; + if(pipeline == ISP_F2K_PIPELINE) + { + pipe = v4l_isp.f2k; + } + else if(pipeline == ISP_R2K_PIPELINE) + { + pipe = v4l_isp.r2k; + } + ret = sw_ae_value_set(pipeline, pipe); + if(!adaptive_enable_scl) + { + // adaptive will not apply + return 0; + } + + int total_frame_num = AESmoothSteps + ETDelayFrameNumber[pipeline]; + adaptive_get_3a_stat(pipeline, pipe); + if(AE_Para_Inf[pipeline].Process == total_frame_num && pipeline == ISP_F2K_PIPELINE) + { + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } + else if((AE_Para_Inf[ISP_R2K_PIPELINE].Process == total_frame_num) && \ + ((Sensor1_Sync == FALSE) || ((Sensor1_Sync == TRUE) && \ + (AE_Para_Inf[ISP_F2K_PIPELINE].Process == total_frame_num)))) + { + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } + else if(adaptive_ex_gt_update_flag(pipeline) == 1) + { + adaptive_param_flag_init(pipeline); + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } + else + { + adaptive_ex_st_ev_apply_flag(pipeline, 0); + if(adaptive_ex_gt_awb_apply_flag(pipeline) == 1) + { + adaptive_setting_ctl(pipeline); + adaptive_param_apply(pipeline, pipe); + } + adaptive_ex_st_ev_apply_flag(pipeline, 1); + } + return ret; +} + +/* sw ae */ +int sw_ae_value_set(enum isp_pipeline_e pipeline, struct media_entity *pipe) +{ + int ret,i,j; + struct k510isp_ae_stats ae_stats; + AE_CTL_AE_STAT_T ae_ctl_callback; + struct media_entity *sensor_n; + ret = v4l2_subdev_open(pipe); + if (ret < 0) + return ret; + if(ISP_F2K_PIPELINE == pipeline) + { + ioctl(pipe->fd,VIDIOC_K510ISP_F2K_AE_STAT_REQ, &ae_stats); + v4l2_subdev_close(pipe); + sensor_n = v4l_isp.sensor0; + } + else if(ISP_R2K_PIPELINE == pipeline) + { + if(Sensor1_Sync == FALSE) + { + ioctl(pipe->fd,VIDIOC_K510ISP_R2K_AE_STAT_REQ, &ae_stats); + v4l2_subdev_close(pipe); + } + sensor_n = v4l_isp.sensor1; + } + // sw ae apply + ae_ctl_calc(pipeline, ae_stats, sensor_n, &ae_ctl_callback); + // send ae param to adaptive func + adaptive_ex_st_ae_apply(pipeline, ae_stats.y_av, ae_ctl_callback.nExpTimeLines, ae_ctl_callback.nGain); return 0; } @@ -1134,8 +1215,8 @@ void mediactl_disable_ae(enum isp_pipeline_e pipeline) { /** - * @brief - * + * @brief + * */ #define F2K_AE_DEVICE "/dev/f2k-ae" @@ -1232,7 +1313,7 @@ void run_all_ae_video(void *info) else { ret = mediactl_set_ae_sync(ISP_F2K_PIPELINE); - ret = mediactl_set_awb_sync(ISP_F2K_PIPELINE); + ret = mediactl_set_awb_sync(ISP_F2K_PIPELINE); } #else @@ -1243,7 +1324,7 @@ void run_all_ae_video(void *info) mediactl_all_set_ae(ISP_F2K_PIPELINE); mediactl_all_set_ae(ISP_R2K_PIPELINE); } - + i ++; if(i == 4) { @@ -1253,24 +1334,103 @@ void run_all_ae_video(void *info) //usleep(3950); // mediactl_all_set_ae(ISP_R2K_PIPELINE); // mediactl_all_set_ae(ISP_F2K_PIPELINE); - + #endif #endif - + /* EAGAIN - continue select loop. */ } //printf("%s: camera %d fd(%d) mainloop end ret(%d)!\n", __func__,camera_seq,fd,ret); } +int anti_flicker_init(int scl) +{ + anti_flicker_scl(scl); + return 0; +} + +int ae_select_init(int scl) +{ + switch (scl) + { + case AE_SELECT_SW_MODE: + mediactl_all_set_ae = mediactl_sw_set_ae; + break; + case AE_SELECT_HW_MODE: + mediactl_all_set_ae = mediactl_hw_set_ae; + ae_hw_set_f2k = TRUE; + ae_hw_set_r2k = TRUE; + break; + default: + mediactl_all_set_ae = mediactl_sw_set_ae; + break; + } +} + +int adaptive_enable(int scl) +{ + switch (scl) + { + case ADAPTIVE_SELECT_DISABLE: + adaptive_enable_scl = FALSE; + break; + case ADAPTIVE_SELECT_ENABLE: + adaptive_enable_scl = TRUE; + default: + adaptive_enable_scl = TRUE; + break; + } +} + +int ae_enable_set(enum isp_pipeline_e pipeline, struct media_entity * pipe) +{ + // enable normal ae will use + int ret; + static struct k510isp_reg_val ae_set_reg[] = { + {0x0050, 3}, // ae enable + {0x007c, 1}, // ae adjust + {0x0258, 1023}, // 2dnr adp enable + {0x02bc, 19}, // sharpness adp enable + }; + int reg_val_size = sizeof(struct k510isp_reg_val); + int size = sizeof(ae_set_reg) / reg_val_size; + /* f2k */ + ret = v4l2_subdev_open(pipe); + if (ret < 0) + { + return ret; + } + for(int i = 0; i < size; i++) + { + if(pipeline == ADAP_ISP_F2K_PIPELINE) + { + ret = ioctl(pipe->fd,VIDIOC_K510ISP_F2K_CORE_REG_SET, &ae_set_reg[i]); + ae_hw_set_f2k = FALSE; + } + else if(pipeline = ADAP_ISP_R2K_PIPELINE) + { + ret = ioctl(pipe->fd,VIDIOC_K510ISP_R2K_CORE_REG_SET, &ae_set_reg[i]); + ae_hw_set_r2k = FALSE; + } + if (ret < 0) + { + printf("%s: ioctl(VIDIOC_K510ISP_[F2K or R2K]_CORE_REG_SET) failed ret(%d) with %d\n", __func__,ret, i); + v4l2_subdev_close(pipe); + return ret; + } + } + v4l2_subdev_close(pipe); +} + pthread_t isp_f2k_ae, isp_r2k_ae, isp_all_ae; int mediactl_init(char *video_cfg_file,struct video_info *dev_info) { int ret; struct isp_csi2_info mipi_csi2; - struct vi_cfg_info vi_cfg; + struct vi_cfg_info vi_cfg; memset(&v4l_isp, 0, sizeof v4l_isp); struct isp_pipeline_s *isp_pipeline = NULL; struct sensor_info sensor0; @@ -1303,7 +1463,7 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) dofile_isp(f2k_cfg_file,&sensor0); isp_pipeline = &v4l_isp.isp_pipeline[ISP_F2K]; - + // sprintf(&isp_pipeline->sensor_name[0],"%s",&sensor0.sensor_name[0]); pipline_cfg(isp_pipeline,&sensor0); @@ -1330,6 +1490,17 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) //print_csi2_info(&mipi_csi2); //print_vi_info(&vi_cfg); //print_isp_info(&f2k_isp_cfg); + /* ae ctl */ + ae_ctl_init(ISP_F2K_PIPELINE, sensor0.isp_cfg.isp_core_cfg); + // adap img timing init + ADAPTIVE_IMG_TIMING_CFG_T adaptive_img_timing; + adaptive_img_timing.nItcTtlV = AE_Para_Inf[ISP_F2K].FrameLines; + adaptive_img_timing.nMaxExpLine = AE_Para_Inf[ISP_F2K].maxET; + adaptive_img_timing.nMinExpLine = AE_Para_Inf[ISP_F2K].minET; + adaptive_img_timing.nMaxGain = AE_Para_Inf[ISP_F2K].maxGain; + adaptive_img_timing.nMinGain = AE_Para_Inf[ISP_F2K].minGain; + adaptive_img_timing.nDefaultSaturation = sensor0.isp_cfg.isp_core_cfg.postInfo.satu_ad_intensity; + adaptive_calc_feture_init(ISP_F2K, adaptive_img_timing); } if(r2k_cfg_file != NULL) @@ -1352,6 +1523,17 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) sprintf(&isp_pipeline->video_entity_info[1].video_entity_name[0],"%s","CANAAN K510 ISP R2K_DS0 output"); sprintf(&isp_pipeline->video_entity_info[2].video_entity_name[0],"%s","CANAAN K510 ISP R2K_DS1 output"); sprintf(&isp_pipeline->video_entity_info[3].video_entity_name[0],"%s","CANAAN K510 ISP R2K_DS2 output"); + /* ae ctl */ + ae_ctl_init(ISP_R2K, sensor1.isp_cfg.isp_core_cfg); + // adap img timing init + ADAPTIVE_IMG_TIMING_CFG_T adaptive_img_timing; + adaptive_img_timing.nItcTtlV = AE_Para_Inf[ISP_R2K].FrameLines; + adaptive_img_timing.nMaxExpLine = AE_Para_Inf[ISP_R2K].maxET; + adaptive_img_timing.nMinExpLine = AE_Para_Inf[ISP_R2K].minET; + adaptive_img_timing.nMaxGain = AE_Para_Inf[ISP_R2K].maxGain; + adaptive_img_timing.nMinGain = AE_Para_Inf[ISP_R2K].minGain; + adaptive_img_timing.nDefaultSaturation = sensor1.isp_cfg.isp_core_cfg.postInfo.satu_ad_intensity; + adaptive_calc_feture_init(ISP_R2K, adaptive_img_timing); } } else @@ -1368,7 +1550,7 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) if (v4l_isp.mdev == NULL) { printf("%s error: unable to open media device %s\n", __func__,MEDIA_DEVICE); return -1; - } + } // ret = isp_pipeline_setup(&v4l_isp); if (ret < 0) { @@ -1395,7 +1577,7 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) return -1; } - ret = sysctl_rst_r2k(v4l_isp.r2k); + ret = sysctl_rst_r2k(v4l_isp.r2k); if (ret < 0) { printf("%s:error: unable to sysctl_rst_r2k %d\n",__func__,ret); return -1; @@ -1412,6 +1594,13 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) printf("%s:error: unable to f2k cfg video %d\n",__func__,ret); return -1; } + + adaptive_param_init(ISP_F2K_PIPELINE, adaptive_sensor_name_s, sensor0.sensor_name); + + if (ret < 0) { + printf("%s:error: unable to init f2k adaptive %d\n",__func__,ret); + return -1; + } } if( v4l_isp.isp_pipeline[ISP_R2K].pipeline_en == 1 ) @@ -1420,8 +1609,17 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) if (ret < 0) { printf("%s:error: unable to r2k cfg video %d\n",__func__,ret); return -1; - } + } + + adaptive_param_init(ISP_R2K_PIPELINE, adaptive_sensor_name_s, sensor1.sensor_name); + + if (ret < 0) { + printf("%s:error: unable to init r2k adaptive %d\n",__func__,ret); + return -1; + } } + // ae ctl + ae_ctl_cfg_init(v4l_isp.isp_pipeline[ISP_F2K].pipeline_en, v4l_isp.isp_pipeline[ISP_R2K].pipeline_en, ae_ctl_sensor_name_s,sensor0.sensor_name, sensor1.sensor_name); // printf("%s:total_size.width(0x%x),total_size.height(0x%x)\n",__func__,vi_cfg.vi_pipe_cfg[0].total_size.width,vi_cfg.vi_pipe_cfg[0].total_size.height); // @@ -1457,8 +1655,8 @@ int mediactl_init(char *video_cfg_file,struct video_info *dev_info) return 0; } /** - * @brief - * + * @brief + * */ int mediactl_set_ae(enum isp_pipeline_e pipeline) { @@ -1490,10 +1688,10 @@ int mediactl_set_ae_single(enum isp_pipeline_e pipeline) static unsigned int ET_sensor1 = 0; static unsigned int Gain_sensor0 = 0; static unsigned int Gain_sensor1 = 0; - + if(ISP_F2K_PIPELINE == pipeline) { - + pipe = v4l_isp.f2k; ret = v4l2_subdev_open(pipe); if (ret < 0) @@ -1507,7 +1705,7 @@ int mediactl_set_ae_single(enum isp_pipeline_e pipeline) v4l2_subdev_close(pipe); return ret; } - + //printf("%s:ae_wren(%d),ae_expl(%d),ae_agco(%d)\n",__func__,ae_stats.ae_wren,ae_stats.ae_expl,ae_stats.ae_agco); v4l2_subdev_close(pipe); // @@ -1519,7 +1717,7 @@ int mediactl_set_ae_single(enum isp_pipeline_e pipeline) return ret; struct v4l2_control control_s; - + if (ae_stats.ae_expl != ET_sensor0) { control_s.id = V4L2_CID_EXPOSURE; @@ -1583,7 +1781,7 @@ int mediactl_set_ae_single(enum isp_pipeline_e pipeline) if (ae_stats.ae_expl != ET_sensor1) { - + control_s.id = V4L2_CID_EXPOSURE; control_s.value = ae_stats.ae_expl; ret = ioctl(sensor1->fd,VIDIOC_S_CTRL,&control_s); @@ -1596,7 +1794,7 @@ int mediactl_set_ae_single(enum isp_pipeline_e pipeline) } ET_sensor1 = control_s.value; } - + if(ae_stats.ae_agco != Gain_sensor1) { control_s.id = V4L2_CID_GAIN; @@ -1608,13 +1806,13 @@ int mediactl_set_ae_single(enum isp_pipeline_e pipeline) ret); v4l2_subdev_close(sensor1); return ret; - } + } Gain_sensor1 = control_s.value; } v4l2_subdev_close(sensor1); } } - + return 0; } @@ -1651,7 +1849,7 @@ int mediactl_set_ae_sync(enum isp_pipeline_e pipeline) ret = v4l2_subdev_open(sensor0); if (ret < 0) return ret; - + //sensor1 struct media_entity *sensor1 = v4l_isp.sensor1; ret = v4l2_subdev_open(sensor1); @@ -1659,8 +1857,8 @@ int mediactl_set_ae_sync(enum isp_pipeline_e pipeline) return ret; struct v4l2_control control_s; - - //Set ET + + //Set ET if(ae_stats.ae_expl != ET_current) { control_s.id = V4L2_CID_EXPOSURE; @@ -1672,8 +1870,8 @@ int mediactl_set_ae_sync(enum isp_pipeline_e pipeline) ret); v4l2_subdev_close(sensor1); return ret; - } - + } + ret = ioctl(sensor0->fd,VIDIOC_S_CTRL,&control_s); if (ret < 0) { @@ -1704,76 +1902,21 @@ int mediactl_set_ae_sync(enum isp_pipeline_e pipeline) ret); v4l2_subdev_close(sensor0); return ret; - } + } Gain_current = control_s.value; } v4l2_subdev_close(sensor1); - v4l2_subdev_close(sensor0); + v4l2_subdev_close(sensor0); } } - - return 0; -} -int mediactl_set_awb_sync(enum isp_pipeline_e pipeline) -{ - int ret; - struct k510isp_awb_sync_info awb_sync_info; - static unsigned int awb_prev_frame_rgain = 0,awb_prev_frame_bgain = 0; - struct media_entity *pipe_f2k,*pipe_r2k; - pipe_f2k = v4l_isp.f2k; - pipe_r2k = v4l_isp.r2k; - - if(Awb_Sync_Init) - { - isp_awb_sync_init(); - Awb_Sync_Init = FALSE; - } - - if(ISP_F2K_PIPELINE == pipeline) - { - // get f2k awb ctl mode auto or handle - ret = v4l2_subdev_open(pipe_f2k); - if (ret < 0) - return ret; - - ret = v4l2_subdev_open(pipe_r2k); - if (ret < 0) - return ret; - - // get f2k AWB GAIN VALUE - ret = ioctl(pipe_f2k->fd,VIDIOC_K510ISP_F2K_AWB_VAL_GET,&awb_sync_info); - if (ret < 0) - { - printf("%s: ioctl(VIDIOC_K510ISP_F2K_AWB_VAL_GET) failed ret(%d)\n", __func__,ret); - v4l2_subdev_close(pipe_f2k); - return ret; - } - - // if value change set f2k AWB GAIN VALUE to r2k - if ((awb_sync_info.awb_ar != awb_prev_frame_rgain) || (awb_sync_info.awb_ab != awb_prev_frame_bgain)) - { - if (ret < 0) - return ret; - ret = ioctl(pipe_r2k->fd,VIDIOC_K510ISP_R2K_AWB_VAL_SET,&awb_sync_info); - if (ret < 0) - { - printf("%s: ioctl(VIDIOC_K510ISP_R2K_AWB_VAL_SET) failed ret(%d)\n", __func__,ret); - v4l2_subdev_close(pipe_r2k); - return ret; - } - } - awb_prev_frame_rgain = awb_sync_info.awb_ar; - awb_prev_frame_bgain = awb_sync_info.awb_ab; - v4l2_subdev_close(pipe_f2k); - v4l2_subdev_close(pipe_r2k); - } return 0; } + /** - * @brief - * + * @brief + * */ void mediactl_exit(void) { @@ -1785,10 +1928,10 @@ void mediactl_exit(void) media_close(v4l_isp.mdev); } /* - pthread_kill(isp_f2k_ae, SIGALRM); + pthread_kill(isp_f2k_ae, SIGALRM); pthread_join(isp_f2k_ae, NULL); - pthread_kill(isp_r2k_ae, SIGALRM); + pthread_kill(isp_r2k_ae, SIGALRM); pthread_join(isp_r2k_ae, NULL); */ // @@ -1798,10 +1941,10 @@ void mediactl_exit(void) system("echo 3 > /proc/sys/vm/drop_caches"); } /** - * @brief - * - * @param addr - * @return unsigned int + * @brief + * + * @param addr + * @return unsigned int */ unsigned int ISPRegRead(unsigned int addr) @@ -1845,6 +1988,3 @@ unsigned int ISPRegWrite(unsigned int addr, unsigned int value) pclose(fp); return 1; } - - - diff --git a/package/mediactl_lib/src/media_ctl.h b/package/mediactl_lib/src/media_ctl.h index 693547c..3a38072 100644 --- a/package/mediactl_lib/src/media_ctl.h +++ b/package/mediactl_lib/src/media_ctl.h @@ -25,7 +25,7 @@ #ifndef __MEDIACTL_H__ #define __MEDIACTL_H__ -#ifdef __cplusplus +#ifdef __cplusplus extern "C"{ #endif @@ -78,6 +78,18 @@ struct video_info unsigned int video_out_format[4]; }; +enum ae_select_e +{ + AE_SELECT_SW_MODE, + AE_SELECT_HW_MODE, +}; + +enum adaptive_enable_select_e +{ + ADAPTIVE_SELECT_DISABLE, + ADAPTIVE_SELECT_ENABLE, +}; + int mediactl_init(char *video_cfg_file,struct video_info *dev_info); void mediactl_exit(void); void mediactl_disable_ae(enum isp_pipeline_e pipeline); @@ -85,9 +97,16 @@ int mediactl_set_ae(enum isp_pipeline_e pipeline); int mediactl_set_ae_single(enum isp_pipeline_e pipeline); int mediactl_set_ae_sync(enum isp_pipeline_e pipeline); int mediactl_set_awb_sync(enum isp_pipeline_e pipeline); +int mediactl_sw_set_ae(enum isp_pipeline_e pipeline); +int mediactl_hw_set_ae(enum isp_pipeline_e pipeline); + +int adaptive_enable(int scl); +int ae_select_init(int scl); +int anti_flicker_init(int scl); +int ae_enable_set(enum isp_pipeline_e pipeline, struct media_entity * pipe); unsigned int mediactl_get_isp_modules(enum isp_pipeline_e pipeline,enum isp_modules module); #ifdef __cplusplus -} +} #endif #endif /*__MEDIACTL_H__*/ diff --git a/package/mediactl_lib/src/v4l2_demo/Makefile b/package/mediactl_lib/src/v4l2_demo/Makefile index a3e6c7d..c623880 100644 --- a/package/mediactl_lib/src/v4l2_demo/Makefile +++ b/package/mediactl_lib/src/v4l2_demo/Makefile @@ -8,7 +8,7 @@ OBJS = v4l2-demo.c v4l2.c TARGET = v4l2-demo all: - ${CC} ${OBJS} -I../ -L../ -lpthread -lmediactl -lstdc++ -o ${TARGET} + ${CC} ${OBJS} -I../ -L../ -lpthread -lmediactl -ladaptive -l3actl -lstdc++ -o ${TARGET} @echo "Compile done." clean: @rm -f *o ${TARGET} diff --git a/package/mediactl_lib/src/v4l2_demo/media_ctl.h b/package/mediactl_lib/src/v4l2_demo/media_ctl.h index 3e7c69c..8721305 100644 --- a/package/mediactl_lib/src/v4l2_demo/media_ctl.h +++ b/package/mediactl_lib/src/v4l2_demo/media_ctl.h @@ -1,31 +1,31 @@ -/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef __MEDIACTL_H__ #define __MEDIACTL_H__ -#ifdef __cplusplus +#ifdef __cplusplus extern "C"{ #endif @@ -78,9 +78,11 @@ struct video_info int mediactl_init(char *video_cfg_file,struct video_info *dev_info); void mediactl_exit(void); +int anti_flicker_init(int scl); +int ae_select_init(int scl); int mediactl_set_ae(enum isp_pipeline_e pipeline); unsigned int mediactl_get_isp_modules(enum isp_pipeline_e pipeline,enum isp_modules module); #ifdef __cplusplus -} +} #endif #endif /*__MEDIACTL_H__*/ diff --git a/package/mediactl_lib/src/v4l2_demo/v4l2-demo.c b/package/mediactl_lib/src/v4l2_demo/v4l2-demo.c index 8b9ff23..2216814 100644 --- a/package/mediactl_lib/src/v4l2_demo/v4l2-demo.c +++ b/package/mediactl_lib/src/v4l2_demo/v4l2-demo.c @@ -1,26 +1,26 @@ -/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include @@ -50,11 +50,11 @@ #include "media_ctl.h" #include "v4l2.h" -#define TOTAL_WIDTH 3448 //0x0d78 +#define TOTAL_WIDTH 3448 //0x0d78 #define TOTAL_HEIGHT 2200 //0x0898 -#define ACTIVE_WIDTH 1920 //1080 +#define ACTIVE_WIDTH 1920 //1080 #define ACTIVE_HEIGHT 1080 //1920 -#define VIDEO_WIDTH 1920 //1080 +#define VIDEO_WIDTH 1920 //1080 #define VIDEO_HEIGHT 1080 //1920 #define BUFFERS_COUNT 4 @@ -73,10 +73,10 @@ static pthread_cond_t cond = PTHREAD_COND_INITIALIZER; * *************************************************************************/ /** - * @brief - * - * @param vdev - * @return int + * @brief + * + * @param vdev + * @return int */ static int video_setup(struct v4l2_device *vdev,struct v4l2_pix_format *format) { @@ -109,10 +109,10 @@ static int video_setup(struct v4l2_device *vdev,struct v4l2_pix_format *format) return 0; } /** - * @brief - * - * @param vdev - * @return int + * @brief + * + * @param vdev + * @return int */ static int video_start(struct v4l2_device *vdev) { @@ -128,7 +128,7 @@ static int video_start(struct v4l2_device *vdev) if (ret < 0) { printf("error: unable to queue buffer %u\n", i); return -errno; - } + } } /* Start video streaming. */ @@ -142,10 +142,10 @@ static int video_start(struct v4l2_device *vdev) return 0; } /** - * @brief - * - * @param vdev - * @return int + * @brief + * + * @param vdev + * @return int */ static int video_stop(struct v4l2_device *vdev) { @@ -162,9 +162,9 @@ static int video_stop(struct v4l2_device *vdev) return 0; } /** - * @brief - * - * @param vdev + * @brief + * + * @param vdev */ static void video_cleanup(struct v4l2_device *vdev) { @@ -183,12 +183,12 @@ static void sigint_handler(int signal __attribute__((__unused__))) { /* Set the done flag to true when the user presses CTRL-C to interrupt * the main loop. - */ + */ done = true; } /** - * @brief - * + * @brief + * */ int img_cnt[8] = {0}; static int process_yuv_image(struct v4l2_device *vdev,char *video_name,struct v4l2_pix_format *format,unsigned int video_num) @@ -210,12 +210,12 @@ static int process_yuv_image(struct v4l2_device *vdev,char *video_name,struct v4 printf("warning: error in dequeued buffer, skipping\n"); return 0; } - + if(img_cnt[video_num] < 20) - { + { sprintf(filename,"./%s_%dx%d_nv12_%d.yuv",&video_name[5],((width+15)/16*16),height,img_cnt[video_num]); printf("%s:%s\n",__func__,filename); - FILE *fd = fopen(filename, "wb"); + FILE *fd = fopen(filename, "wb"); if(fd == NULL) { printf("open %s failure, errno %d\n",filename,errno); @@ -242,13 +242,13 @@ static int process_yuv_image(struct v4l2_device *vdev,char *video_name,struct v4 return 0; } /** - * @brief - * - * @param vdev - * @param video_name - * @param format - * @param video_num - * @return int + * @brief + * + * @param vdev + * @param video_name + * @param format + * @param video_num + * @return int */ static int process_rgb_image(struct v4l2_device *vdev,char *video_name,struct v4l2_pix_format *format,unsigned int video_num) { @@ -280,7 +280,7 @@ static int process_rgb_image(struct v4l2_device *vdev,char *video_name,struct v4 { sprintf(filename,"./%s_%dx%d_%d.argb",&video_name[5],((width+15)/16*16),height,img_cnt[video_num]); printf("%s:%s\n",__func__,filename); - fd = fopen(filename, "wb"); + fd = fopen(filename, "wb"); if(fd == NULL) { printf("open %s failure, errno %d\n",filename,errno); @@ -299,7 +299,7 @@ static int process_rgb_image(struct v4l2_device *vdev,char *video_name,struct v4 { sprintf(filename,"./%s_%dx%d_%d.rgb",&video_name[5],((width+15)/16*16),height,img_cnt[video_num]); printf("%s:%s\n",__func__,filename); - fd = fopen(filename, "wb"); + fd = fopen(filename, "wb"); if(fd == NULL) { printf("open %s failure, errno %d\n",filename,errno); @@ -314,7 +314,7 @@ static int process_rgb_image(struct v4l2_device *vdev,char *video_name,struct v4 return ret; } fclose(fd); - } + } } img_cnt[video_num]++; @@ -329,7 +329,7 @@ static int process_rgb_image(struct v4l2_device *vdev,char *video_name,struct v4 return 0; } /***************************************************************************** - * + * *****************************************************************************/ static char *video_cfg_file = NULL; static int verbose = 0; @@ -343,23 +343,29 @@ static void usage(FILE *fp, int argc, char **argv) "-h | --help Print this message\n" "-f | --video_cfg_file video_cfg_filename [%s]\n" "-v | --verbose Verbose output\n" + "-a | --anti-clicker-enable (0: all disable | 1: f 2k enable | 2: r 2k enable | 3: f&r 2k enable)\n" + "-x | --ae sw/hw select (default 0: sw ae | 1: hw ae)\n" + "-l | --adaptive enable (0: disable | 1: enable, default: enable)\n" "", argv[0],video_cfg_file); } -static const char short_options[] = "hf:v";// 短选项 ：表示带参数 +static const char short_options[] = "hf:va:x:l:";// 短选项 ：表示带参数 static const struct option //长选项 long_options[] = { { "video_cfg_file", required_argument, NULL, 'f' }, { "help", no_argument, NULL, 'h' }, { "verbose", no_argument, NULL, 'v' }, + { "anfi-flicker-enable", required_argument, NULL, 'a' }, + { "ae-select", required_argument, NULL, 'x' }, + { "adaptive", required_argument, NULL, 'l' }, { 0, 0, 0, 0 } }; /** - * @brief - * - * @param s + * @brief + * + * @param s */ static void errno_exit(const char *s) { @@ -367,22 +373,22 @@ static void errno_exit(const char *s) exit(EXIT_FAILURE); } /** - * @brief - * - * @param signo + * @brief + * + * @param signo */ -void sighand(int signo) -{ - pthread_t tid = pthread_self(); - - printf("Thread %lu in signal handler/n", tid); - return; +void sighand(int signo) +{ + pthread_t tid = pthread_self(); + + printf("Thread %lu in signal handler/n", tid); + return; } /** - * @brief - * - * @param info - * @return void* + * @brief + * + * @param info + * @return void* */ void *run_f2k_video(void *info) { @@ -406,7 +412,7 @@ void *run_f2k_video(void *info) if(dev_info->enable[i] == 1) { pthread_mutex_lock(&mutex); - vdev[i] = v4l2_open(dev_info->video_name[i]); + vdev[i] = v4l2_open(dev_info->video_name[i]); if (vdev[i] == NULL) { printf("error: unable to open video capture device %s\n", dev_info->video_name[i]); @@ -416,7 +422,7 @@ void *run_f2k_video(void *info) printf("%s:vdev->fd %d\n",__func__,vdev[i]->fd); memset(&format[i], 0, sizeof(struct v4l2_pix_format)); format[i].width = dev_info->video_width[i];//width; - format[i].height = dev_info->video_height[i];//height; + format[i].height = dev_info->video_height[i];//height; // if(dev_info->video_out_format[i] == 1) { @@ -455,7 +461,7 @@ void *run_f2k_video(void *info) */ FD_SET(vdev[i]->fd, &fds); if(vdev[i]->fd > maxfd ) maxfd = vdev[i]->fd; - printf("%s:maxfd(%d)vdev[i]->fd(%d)\n",__func__,maxfd,vdev[i]->fd); + printf("%s:maxfd(%d)vdev[i]->fd(%d)\n",__func__,maxfd,vdev[i]->fd); } } // @@ -515,7 +521,7 @@ void *run_f2k_video(void *info) pthread_mutex_lock(&mutex); process_rgb_image(vdev[3],dev_info->video_name[3],&format[3],3); pthread_mutex_unlock(&mutex); - } + } } count++; @@ -555,10 +561,10 @@ void *run_f2k_video(void *info) } } /** - * @brief - * - * @param info - * @return void* + * @brief + * + * @param info + * @return void* */ void *run_r2k_video(void *info) { @@ -582,18 +588,18 @@ void *run_r2k_video(void *info) if(dev_info->enable[i] == 1) { pthread_mutex_lock(&mutex); - vdev[i] = v4l2_open(dev_info->video_name[i]); + vdev[i] = v4l2_open(dev_info->video_name[i]); if (vdev[i] == NULL) { printf("error: unable to open video capture device %s\n", dev_info->video_name[i]); - pthread_mutex_unlock(&mutex); + pthread_mutex_unlock(&mutex); goto cleanup_r2k; } printf("%s:vdev->fd %d\n",__func__,vdev[i]->fd); //c = getchar(); memset(&format[i], 0, sizeof(struct v4l2_pix_format)); format[i].width = dev_info->video_width[i];//width; - format[i].height = dev_info->video_height[i];//height; + format[i].height = dev_info->video_height[i];//height; // if(dev_info->video_out_format[i] == 1) { @@ -632,7 +638,7 @@ void *run_r2k_video(void *info) * set, to be used by select() in the main loop. */ FD_SET(vdev[i]->fd, &fds); - if(vdev[i]->fd > maxfd ) maxfd = vdev[i]->fd; + if(vdev[i]->fd > maxfd ) maxfd = vdev[i]->fd; } } // @@ -691,7 +697,7 @@ void *run_r2k_video(void *info) pthread_mutex_lock(&mutex); process_rgb_image(vdev[3],dev_info->video_name[3],&format[3],7); pthread_mutex_unlock(&mutex); - } + } } count++; } @@ -732,11 +738,11 @@ void *run_r2k_video(void *info) } } /** - * @brief - * - * @param argc - * @param argv - * @return int + * @brief + * + * @param argc + * @param argv + * @return int */ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unused__))) { @@ -766,7 +772,15 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu case 'v': verbose = 1; break; - + case 'a': + anti_flicker_init(atoi(optarg)); + break; + case 'x': + ae_select_init(atoi(optarg)); + break; + case 'l': + adaptive_enable(atoi(optarg)); + break; default: usage(stderr, argc, argv); exit(EXIT_FAILURE); @@ -781,15 +795,15 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu mediactl_init(video_cfg_file,&dev_info[0]); // - memset(&actions, 0, sizeof(actions)); - sigemptyset(&actions.sa_mask); /* 将参数set信号集初始化并清空 */ - actions.sa_flags = 0; - actions.sa_handler = sighand; - /* 设置SIGALRM的处理函数 */ - sigaction(SIGALRM,&actions,NULL); + memset(&actions, 0, sizeof(actions)); + sigemptyset(&actions.sa_mask); /* 将参数set信号集初始化并清空 */ + actions.sa_flags = 0; + actions.sa_handler = sighand; + /* 设置SIGALRM的处理函数 */ + sigaction(SIGALRM,&actions,NULL); if(dev_info[0].video_used == 1) - { + { pthread_create(&f2k_pid,NULL,run_f2k_video,(void *)&dev_info[0]); } @@ -809,11 +823,11 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu pthread_kill(r2k_pid, SIGALRM); } - printf("Wait for masked and unmasked threads to complete\n"); + printf("Wait for masked and unmasked threads to complete\n"); if( dev_info[0].video_used == 1) { pthread_join(f2k_pid, NULL); - } + } if( dev_info[1].video_used == 1) { @@ -822,4 +836,4 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu mediactl_exit(); printf("Main completed/n"); return exit_code; -} \ No newline at end of file +} diff --git a/package/mediactl_lib/src/v4l2_drm/Makefile b/package/mediactl_lib/src/v4l2_drm/Makefile index a746c22..569c408 100644 --- a/package/mediactl_lib/src/v4l2_drm/Makefile +++ b/package/mediactl_lib/src/v4l2_drm/Makefile @@ -5,7 +5,7 @@ TARGET = v4l2_drm.out OBJS = v4l2_drm.cc drm/k510_drm.c all: - ${CC} ${OBJS} -I. -I../ -L. -L../ -fpermissive -Idrm -ldrm -lmediactl -lpthread -lstdc++ -g -o ${TARGET} + ${CC} ${OBJS} -I. -I../ -L. -L../ -fpermissive -Idrm -ldrm -lmediactl -ladaptive -l3actl -lpthread -lstdc++ -g -o ${TARGET} @echo "Compile done." clean: @rm -f *.o ${TARGET} diff --git a/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc b/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc index 54031b4..708c00b 100644 --- a/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc +++ b/package/mediactl_lib/src/v4l2_drm/v4l2_drm.cc @@ -155,9 +155,9 @@ int readframe(int fd, struct v4l2_buffer* vbuf) { } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int stop_capturing(struct camera_info *camera) { @@ -168,23 +168,23 @@ static int stop_capturing(struct camera_info *camera) pthread_mutex_lock(&mutex); if(fd) { - type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + type = V4L2_BUF_TYPE_VIDEO_CAPTURE; if (-1 == xioctl(fd, VIDIOC_STREAMOFF, &type)) { pthread_mutex_unlock(&mutex); // errno_exit("VIDIOC_STREAMOFF"); printf("%s:VIDIOC_STREAMOFF failed!\n",__func__); return -1; - } + } } pthread_mutex_unlock(&mutex); printf("%s: end!\n", __func__); return 0; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int start_capturing(struct camera_info *camera) { @@ -199,7 +199,7 @@ static int start_capturing(struct camera_info *camera) pr_debug("\tn_buffers: %d\n", n_buffers); - for (i = 0; i < n_buffers; ++i) { + for (i = 0; i < n_buffers; ++i) { struct v4l2_buffer buf; pr_debug("\ti: %d\n", i); @@ -227,15 +227,15 @@ static int start_capturing(struct camera_info *camera) { //errno_exit("VIDIOC_STREAMON"); return -1; - } + } pr_debug("After STREAMON\n"); return 0; } /** - * @brief - * - * @param camera - * @param drm_bufs + * @brief + * + * @param camera + * @param drm_bufs */ static void uninit_device(struct camera_info *camera,struct drm_buffer *drm_bufs) { @@ -251,16 +251,16 @@ static void uninit_device(struct camera_info *camera,struct drm_buffer *drm_bufs pthread_mutex_unlock(&mutex); } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int init_mmap(struct camera_info *camera,struct drm_buffer *drm_bufs) //（3） { struct v4l2_requestbuffers req; int fd = camera->fd; - struct buffer *buffers; - unsigned int n_buffers; + struct buffer *buffers; + unsigned int n_buffers; char dev_name[50]; pr_debug("%s: called!\n", __func__); sprintf(&dev_name[0],"%s",&camera->video_name[0]); @@ -316,10 +316,10 @@ static int init_mmap(struct camera_info *camera,struct drm_buffer *drm_bufs) // return ret; } /** - * @brief - * - * @param camera - * @param drm_bufs + * @brief + * + * @param camera + * @param drm_bufs */ static int init_device(struct camera_info *camera,struct drm_buffer *drm_bufs) //static表示次函数只能在本文件中调用 { @@ -388,8 +388,8 @@ static int init_device(struct camera_info *camera,struct drm_buffer *drm_bufs) / if (-1 == xioctl(fd, VIDIOC_S_FMT, &fmt)) { //errno_exit("VIDIOC_S_FMT"); - return -errno; - } + return -errno; + } /* Note VIDIOC_S_FMT may change width and height. */ /* Buggy driver paranoia. */ @@ -405,9 +405,9 @@ static int init_device(struct camera_info *camera,struct drm_buffer *drm_bufs) / return ret; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static void close_device(struct camera_info *camera) { @@ -420,32 +420,32 @@ static void close_device(struct camera_info *camera) { pthread_mutex_unlock(&mutex); errno_exit("close"); - } - camera->fd = -1; + } + camera->fd = -1; } #if 0 if(drm_dev.fd &&(drm_dev.camera_num == 1) ) { - drm_exit(); - } + drm_exit(); + } else { drm_dev.camera_num--; - } + } #endif - pthread_mutex_unlock(&mutex); + pthread_mutex_unlock(&mutex); } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static void open_device(struct camera_info *camera)// { struct stat st; int fd; char dev_name[50]; - sprintf(&dev_name[0],"%s",&camera->video_name[0]); + sprintf(&dev_name[0],"%s",&camera->video_name[0]); printf("%s: dev_name %s called!\n", __func__,&dev_name[0]);//_func_表示此时在那个函数里面 if (-1 == stat(dev_name, &st)) {//获取文件信息 @@ -470,11 +470,11 @@ static void open_device(struct camera_info *camera)// printf("%s:fd (%d) open\n",__func__,fd); } /** - * @brief - * - * @param fp - * @param argc - * @param argv + * @brief + * + * @param fp + * @param argc + * @param argv */ static void usage(FILE *fp, int argc, char **argv) { @@ -487,11 +487,14 @@ static void usage(FILE *fp, int argc, char **argv) "-v | --verbose Verbose output\n" "-s | --single[(0|1),[,width*height[,x*y]]] display sensor (0|1)\n" "-d | --double[width*height,x*y,width*height,x*y] display double sensor\n" + "-a | --anti-clicker-enable (0: all disable | 1: f 2k enable | 2: r 2k enable | 3: f&r 2k enable)\n" + "-x | --ae-select sw/hw select (default 0: sw ae | 1: hw ae)\n" + "-l | --adaptive enable (0: disable | 1: enable, default: enable)\n" "", argv[0], video_cfg_file); } -static const char short_options[] = "f:e:hvs::d::";// 短选项 ：表示带参数 +static const char short_options[] = "f:e:hvs::d::s:a:x:l:";// 短选项 ：表示带参数 static const struct option //长选项 long_options[] = { @@ -501,6 +504,9 @@ long_options[] = { { "verbose", no_argument, NULL, 'v' }, { "single", optional_argument, NULL, 's' }, { "double", optional_argument, NULL, 'd' }, + { "anfi-flicker-enable", required_argument, NULL, 'a' }, + { "ae-select", required_argument, NULL, 'x' }, + { "adaptive", required_argument, NULL, 'l' }, { 0, 0, 0, 0 } }; @@ -514,16 +520,16 @@ static void sigint_handler(int signal __attribute__((__unused__))) } /** - * @brief - * - * @param signo + * @brief + * + * @param signo */ -void sighand(int signo) -{ - pthread_t tid = pthread_self(); - - printf("Thread %lu in signal handler/n", tid); - return; +void sighand(int signo) +{ + pthread_t tid = pthread_self(); + + printf("Thread %lu in signal handler/n", tid); + return; } int init_isp(struct camera_info *camera) { @@ -550,8 +556,8 @@ void deinit_isp(struct camera_info *camera) { close_device(camera); } /** - * @brief - * + * @brief + * */ static void cfg_noc_prior(void) { @@ -784,11 +790,11 @@ int video_resolution_adaptation(void) } /** - * @brief - * - * @param __attribute__ - * @param __attribute__ - * @return int + * @brief + * + * @param __attribute__ + * @param __attribute__ + * @return int */ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unused__))) { @@ -814,7 +820,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu switch (c) { case 0: /* getopt_long() flag */ break; - case 'e': + case 'e': isp_ae_status = atol(optarg);//dev_name = ; break; @@ -865,7 +871,15 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu video_in_cfg[1].force |= OFFSET_FORCE; } break; - + case 'a': + anti_flicker_init(atoi(optarg)); + break; + case 'x': + ae_select_init(atoi(optarg)); + break; + case 'l': + adaptive_enable(atoi(optarg)); + break; default: usage(stderr, argc, argv); exit(EXIT_FAILURE); @@ -886,12 +900,12 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu signal(SIGINT, sigint_handler); signal(SIGTERM, sigint_handler); // - memset(&actions, 0, sizeof(actions)); - sigemptyset(&actions.sa_mask); /* 将参数set信号集初始化并清空 */ - actions.sa_flags = 0; - actions.sa_handler = sighand; - /* 设置SIGALRM的处理函数 */ - sigaction(SIGALRM,&actions,NULL); + memset(&actions, 0, sizeof(actions)); + sigemptyset(&actions.sa_mask); /* 将参数set信号集初始化并清空 */ + actions.sa_flags = 0; + actions.sa_handler = sighand; + /* 设置SIGALRM的处理函数 */ + sigaction(SIGALRM,&actions,NULL); // cfg_noc_prior(); // get screen resolution @@ -923,7 +937,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu camera[0].buffer_start = 0; camera_num++; } - } + } } // printf("%s:dev_info[1].video_used(%d)\n",__func__,dev_info[1].video_used); @@ -939,7 +953,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu camera[1].buffer_start = BUFFERS_COUNT; camera_num++; } - } + } } printf("%s:size[0].width is %d size[0].height is %d,size[1].width is %d size[1].height is %d,camera_num(%d)\n",__func__,camera[0].size.width,camera[0].size.height,camera[1].size.width,camera[1].size.height,camera_num); @@ -960,7 +974,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu size[0].src_offset_w = 0; size[0].src_offset_h = 0; size[0].crtc_offset_w = 0; - size[0].crtc_offset_h = 200; + size[0].crtc_offset_h = 200; size[1].src_offset_w = 0; size[1].src_offset_h = 0; size[1].crtc_offset_w = 0; @@ -1139,8 +1153,8 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu printf("Flush fail\n"); goto cleanup; } - } - else if(dev_info[0].video_used) { + } + else if(dev_info[0].video_used) { if (drm_dmabuf_set_plane(&drm_dev.drm_bufs[vbuf[1][0].index])) { printf("Flush fail\n"); goto cleanup; @@ -1269,8 +1283,8 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu printf("Flush fail\n"); break; } - } - else if(dev_info[0].video_used) { + } + else if(dev_info[0].video_used) { if (drm_dmabuf_set_plane(&drm_dev.drm_bufs[vbuf[vbuf_ptr[0]][0].index])) { printf("Flush fail\n"); break; @@ -1290,7 +1304,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu cleanup: if(drm_dev.fd) { fprintf(stderr, "drm_exit\n"); - drm_exit(); + drm_exit(); } if(dev_info[0].video_used) { deinit_isp(&camera[0]); diff --git a/package/mediactl_lib/src/v4l2_drm_isptool/Makefile b/package/mediactl_lib/src/v4l2_drm_isptool/Makefile index d25d98d..9655304 100644 --- a/package/mediactl_lib/src/v4l2_drm_isptool/Makefile +++ b/package/mediactl_lib/src/v4l2_drm_isptool/Makefile @@ -5,7 +5,7 @@ TARGET = v4l2_drm_isptool.out OBJS = v4l2_drm_isptool.c ../v4l2_drm/drm/k510_drm.c ../v4l2_drm/sequeue.c all: - ${CC} ${OBJS} -I../v4l2_drm/ -I../ -L. -L../ -I../v4l2_drm/drm -ldrm -lmediactl -lpthread -lstdc++ -o ${TARGET} + ${CC} ${OBJS} -I../v4l2_drm/ -I../ -L. -L../ -I../v4l2_drm/drm -ldrm -lmediactl -ladaptive -l3actl -lpthread -lstdc++ -o ${TARGET} @echo "Compile done." clean: @rm -f *.o ${TARGET} diff --git a/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c b/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c index 1fe1f80..2fe5f3c 100644 --- a/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c +++ b/package/mediactl_lib/src/v4l2_drm_isptool/v4l2_drm_isptool.c @@ -122,10 +122,10 @@ static int xioctl(int fh, int request, void *arg) return r; } /** - * @brief - * - * @param camera - * @return int + * @brief + * + * @param camera + * @return int */ static int read_frame(struct camera_info *camera,unsigned int camera_seq) { @@ -138,17 +138,17 @@ static int read_frame(struct camera_info *camera,unsigned int camera_seq) CLEAR(buf); buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; buf.memory = V4L2_MEMORY_DMABUF;//drm //V4L2_MEMORY_MMAP; - + pthread_mutex_lock(&mutex); if (-1 == xioctl(fd, VIDIOC_DQBUF, &buf)) { pthread_mutex_unlock(&mutex); printf("%s: DQBUFERR!\n", __func__); switch (errno) { - case EAGAIN: + case EAGAIN: { printf("%s: DQBUFERR! EAGAIN ret(%d)\n", __func__,EAGAIN); return 0; - } + } case EIO: printf("%s: DQBUFERR! EIO ret(%d)\n", __func__,EIO); /* Could ignore EIO, see spec. */ @@ -171,7 +171,7 @@ static int read_frame(struct camera_info *camera,unsigned int camera_seq) { mediactl_set_ae(ISP_F2K_PIPELINE); } - + struct drm_buffer *fbuf; static struct v4l2_buffer old_buffer; @@ -199,7 +199,7 @@ static int read_frame(struct camera_info *camera,unsigned int camera_seq) printf("%s:camera (%d) VIDIOC_QBUF failed!\n",__func__,camera_seq); //errno_exit("VIDIOC_QBUF"); return -1; - } + } } pthread_mutex_unlock(&mutex); @@ -213,10 +213,10 @@ static int read_frame(struct camera_info *camera,unsigned int camera_seq) return 0; } /** - * @brief - * - * @param camera - * @return int + * @brief + * + * @param camera + * @return int */ static int read_frame1(struct camera_info *camera,unsigned int camera_seq) { @@ -225,7 +225,7 @@ static int read_frame1(struct camera_info *camera,unsigned int camera_seq) int fd = camera->fd; unsigned int n_buffers = camera->n_buffers; - //printf("%s: called!\n", __func__); + //printf("%s: called!\n", __func__); CLEAR(buf); buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; buf.memory = V4L2_MEMORY_DMABUF;//drm //V4L2_MEMORY_MMAP; @@ -235,11 +235,11 @@ static int read_frame1(struct camera_info *camera,unsigned int camera_seq) pthread_mutex_unlock(&mutex); printf("%s: DQBUFERR!\n", __func__); switch (errno) { - case EAGAIN: + case EAGAIN: { printf("%s: DQBUFERR! EAGAIN ret(%d)\n", __func__,EAGAIN); return 0; - } + } case EIO: printf("%s: DQBUFERR! EIO ret(%d)\n", __func__,EIO); /* Could ignore EIO, see spec. */ @@ -289,7 +289,7 @@ static int read_frame1(struct camera_info *camera,unsigned int camera_seq) printf("%s:camera (%d) VIDIOC_QBUF failed!\n",__func__,camera_seq); //errno_exit("VIDIOC_QBUF"); return -1; - } + } } pthread_mutex_unlock(&mutex); @@ -303,12 +303,12 @@ static int read_frame1(struct camera_info *camera,unsigned int camera_seq) return 0; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int mainloop(struct camera_info *camera,unsigned int camera_seq) -{ +{ int fd = camera->fd; fd_set fds; struct timeval tv; @@ -317,21 +317,21 @@ static int mainloop(struct camera_info *camera,unsigned int camera_seq) struct drm_buffer *fbuf = &drm_dev.drm_bufs[0]; printf("%s: camera %d fd(%d) mainloop called!\n", __func__,camera_seq,fd); - + for(int i= 0;i < BUFFERS_COUNT;i++) { fbuf[i].width = camera->size.width; - fbuf[i].height = camera->size.height; + fbuf[i].height = camera->size.height; } FD_ZERO(&fds); FD_SET(fd, &fds); - while (!done) { + while (!done) { /* Timeout. */ tv.tv_sec = 2; tv.tv_usec = 0; - r = select(fd + 1, &fds, NULL, NULL, &tv); + r = select(fd + 1, &fds, NULL, NULL, &tv); if (-1 == r) { if (EINTR == errno) continue; @@ -357,20 +357,20 @@ static int mainloop(struct camera_info *camera,unsigned int camera_seq) printf("%s:camera%d read_frame failed\n",__func__,camera_seq); //done = true; break; - } - + } + /* EAGAIN - continue select loop. */ } //printf("%s: camera %d fd(%d) mainloop end ret(%d)!\n", __func__,camera_seq,fd,ret); return ret; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int mainloop1(struct camera_info *camera,unsigned int camera_seq) -{ +{ int fd = camera->fd; fd_set fds; struct timeval tv; @@ -379,21 +379,21 @@ static int mainloop1(struct camera_info *camera,unsigned int camera_seq) struct drm_buffer *fbuf = &drm_dev.drm_bufs[BUFFERS_COUNT]; printf("%s: camera %d fd(%d) mainloop1 called!\n", __func__,camera_seq,fd); - + for(int i= 0;i < BUFFERS_COUNT;i++) { fbuf[i].width = camera->size.width; - fbuf[i].height = camera->size.height; + fbuf[i].height = camera->size.height; } FD_ZERO(&fds); FD_SET(fd, &fds); - while (!done) { + while (!done) { /* Timeout. */ tv.tv_sec = 2; tv.tv_usec = 0; - r = select(fd + 1, &fds, NULL, NULL, &tv); + r = select(fd + 1, &fds, NULL, NULL, &tv); if (-1 == r) { if (EINTR == errno) continue; @@ -419,7 +419,7 @@ static int mainloop1(struct camera_info *camera,unsigned int camera_seq) { printf("%s:camera%d read_frame failed \n",__func__,camera_seq); break; - } + } /* EAGAIN - continue select loop. */ } @@ -428,9 +428,9 @@ static int mainloop1(struct camera_info *camera,unsigned int camera_seq) return ret; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int stop_capturing(struct camera_info *camera) { @@ -441,23 +441,23 @@ static int stop_capturing(struct camera_info *camera) pthread_mutex_lock(&mutex); if(fd) { - type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + type = V4L2_BUF_TYPE_VIDEO_CAPTURE; if (-1 == xioctl(fd, VIDIOC_STREAMOFF, &type)) { pthread_mutex_unlock(&mutex); // errno_exit("VIDIOC_STREAMOFF"); printf("%s:VIDIOC_STREAMOFF failed!\n",__func__); return -1; - } + } } pthread_mutex_unlock(&mutex); printf("%s: end!\n", __func__); return 0; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int start_capturing(struct camera_info *camera) { @@ -472,7 +472,7 @@ static int start_capturing(struct camera_info *camera) pr_debug("\tn_buffers: %d\n", n_buffers); - for (i = 0; i < n_buffers; ++i) { + for (i = 0; i < n_buffers; ++i) { struct v4l2_buffer buf; pr_debug("\ti: %d\n", i); @@ -500,15 +500,15 @@ static int start_capturing(struct camera_info *camera) { //errno_exit("VIDIOC_STREAMON"); return -1; - } + } pr_debug("After STREAMON\n"); return 0; } /** - * @brief - * - * @param camera - * @param drm_bufs + * @brief + * + * @param camera + * @param drm_bufs */ static void uninit_device(struct camera_info *camera,struct drm_buffer *drm_bufs) { @@ -524,16 +524,16 @@ static void uninit_device(struct camera_info *camera,struct drm_buffer *drm_bufs pthread_mutex_unlock(&mutex); } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static int init_mmap(struct camera_info *camera,struct drm_buffer *drm_bufs) //（3） { struct v4l2_requestbuffers req; int fd = camera->fd; - struct buffer *buffers; - unsigned int n_buffers; + struct buffer *buffers; + unsigned int n_buffers; char dev_name[50]; pr_debug("%s: called!\n", __func__); sprintf(&dev_name[0],"%s",&camera->video_name[0]); @@ -589,10 +589,10 @@ static int init_mmap(struct camera_info *camera,struct drm_buffer *drm_bufs) // return ret; } /** - * @brief - * - * @param camera - * @param drm_bufs + * @brief + * + * @param camera + * @param drm_bufs */ static int init_device(struct camera_info *camera,struct drm_buffer *drm_bufs) //static表示次函数只能在本文件中调用 { @@ -661,8 +661,8 @@ static int init_device(struct camera_info *camera,struct drm_buffer *drm_bufs) / if (-1 == xioctl(fd, VIDIOC_S_FMT, &fmt)) { //errno_exit("VIDIOC_S_FMT"); - return -errno; - } + return -errno; + } /* Note VIDIOC_S_FMT may change width and height. */ /* Buggy driver paranoia. */ @@ -678,9 +678,9 @@ static int init_device(struct camera_info *camera,struct drm_buffer *drm_bufs) / return ret; } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static void close_device(struct camera_info *camera) { @@ -693,32 +693,32 @@ static void close_device(struct camera_info *camera) { pthread_mutex_unlock(&mutex); errno_exit("close"); - } - camera->fd = -1; + } + camera->fd = -1; } #if 0 if(drm_dev.fd &&(drm_dev.camera_num == 1) ) { - drm_exit(); - } + drm_exit(); + } else { drm_dev.camera_num--; - } + } #endif - pthread_mutex_unlock(&mutex); + pthread_mutex_unlock(&mutex); } /** - * @brief - * - * @param camera + * @brief + * + * @param camera */ static void open_device(struct camera_info *camera)// { struct stat st; int fd; char dev_name[50]; - sprintf(&dev_name[0],"%s",&camera->video_name[0]); + sprintf(&dev_name[0],"%s",&camera->video_name[0]); printf("%s: dev_name %s called!\n", __func__,&dev_name[0]);//_func_表示此时在那个函数里面 if (-1 == stat(dev_name, &st)) {//获取文件信息 @@ -743,11 +743,11 @@ static void open_device(struct camera_info *camera)// printf("%s:fd (%d) open\n",__func__,fd); } /** - * @brief - * - * @param fp - * @param argc - * @param argv + * @brief + * + * @param fp + * @param argc + * @param argv */ static void usage(FILE *fp, int argc, char **argv) { @@ -759,17 +759,22 @@ static void usage(FILE *fp, int argc, char **argv) "-e | --ae config 0 close all, 1 open f-2k ae, 2 open r-2k ae, 3 open all\n" "-h | --help Print this message\n" "-v | --verbose Verbose output\n" + "-a | --anti-clicker-enable (0: all disable | 1: f 2k enable | 2: r 2k enable | 3: f&r 2k enable)\n" + "-x | --ae sw/hw select (default 0: sw ae | 1: hw ae)\n" + "-l | --adaptive enable (0: disable | 1: enable, default: enable)\n" "", argv[0], video_cfg_file); } -static const char short_options[] = "f:hv";// 短选项 ：表示带参数 +static const char short_options[] = "f:hva:x:l:";// 短选项 ：表示带参数 static const struct option //长选项 long_options[] = { { "device_cfg name", required_argument, NULL, 'f' }, { "help", no_argument, NULL, 'h' }, { "verbose", no_argument, NULL, 'v' }, + { "ae-select", required_argument, NULL, 'x' }, + { "adaptive", required_argument, NULL, 'l' }, { 0, 0, 0, 0 } }; @@ -783,23 +788,23 @@ static void sigint_handler(int signal __attribute__((__unused__))) } /** - * @brief - * - * @param signo + * @brief + * + * @param signo */ -void sighand(int signo) -{ - pthread_t tid = pthread_self(); - - printf("Thread %lu in signal handler/n", tid); - return; +void sighand(int signo) +{ + pthread_t tid = pthread_self(); + + printf("Thread %lu in signal handler/n", tid); + return; } /** - * @brief - * - * @param info - * @return void* + * @brief + * + * @param info + * @return void* */ void *run_f2k_video(void *info) { @@ -820,15 +825,15 @@ void *run_f2k_video(void *info) { pthread_mutex_unlock(&mutex); goto f2k_cleanup; - } - pthread_mutex_unlock(&mutex); + } + pthread_mutex_unlock(&mutex); // ret = mainloop(camera,0); if(ret <0 ) { printf("%s:mainloop failed!\n",__func__); goto f2k_cleanup; - } + } // f2k_cleanup: stop_capturing(camera); @@ -839,10 +844,10 @@ void *run_f2k_video(void *info) } /** - * @brief - * - * @param info - * @return void* + * @brief + * + * @param info + * @return void* */ void *run_r2k_video(void *info) { @@ -863,15 +868,15 @@ void *run_r2k_video(void *info) { pthread_mutex_unlock(&mutex); goto r2k_cleanup; - } - pthread_mutex_unlock(&mutex); + } + pthread_mutex_unlock(&mutex); // ret = mainloop1(camera,1); if(ret <0 ) { printf("%s:mainloop1 failed!\n",__func__); goto r2k_cleanup; - } + } // r2k_cleanup: stop_capturing(camera); @@ -880,8 +885,8 @@ void *run_r2k_video(void *info) close_device(camera); } /** - * @brief - * + * @brief + * */ static void cfg_noc_prior(void) { @@ -897,9 +902,9 @@ static void cfg_noc_prior(void) } /** - * @brief - * - * @return void* + * @brief + * + * @return void* */ void *drm_show(void *info) { @@ -918,20 +923,20 @@ void *drm_show(void *info) { if((EmptySequeue(f2k_queue) == 0)&&(EmptySequeue(r2k_queue)== 0)) { - DeQueue(f2k_queue,&index); + DeQueue(f2k_queue,&index); DeQueue(r2k_queue,&index1); - //printf("%s:index(%d) index1(%d)\n",__func__,index,index1); + //printf("%s:index(%d) index1(%d)\n",__func__,index,index1); fbuf = &drm_dev.drm_bufs[index]; fbuf2 = &drm_dev.drm_bufs[index1+BUFFERS_COUNT]; if (drm_dmabuf_set_2plane(fbuf,fbuf2)) { printf("Flush fail\n"); break; - } - break; - } + } + break; + } } - } + } else if(dev_info[0].video_used == 1) { while(!done) @@ -939,15 +944,15 @@ void *drm_show(void *info) if(EmptySequeue(f2k_queue) == 0) { - DeQueue(f2k_queue,&index); + DeQueue(f2k_queue,&index); //printf("%s:index(%d)\n",__func__,index); fbuf = &drm_dev.drm_bufs[index]; if (drm_dmabuf_set_plane(fbuf)) { printf("Flush fail\n"); break; } - break; - } + break; + } } } else if(dev_info[1].video_used == 1) @@ -956,24 +961,24 @@ void *drm_show(void *info) { if(EmptySequeue(r2k_queue) == 0) { - DeQueue(r2k_queue,&index); + DeQueue(r2k_queue,&index); //printf("%s:index(%d)\n",__func__,index); fbuf = &drm_dev.drm_bufs[index]; if (drm_dmabuf_set_plane(fbuf)) { printf("Flush fail\n"); break; - } - break; - } - } - } + } + break; + } + } + } } // #if 0 if(drm_dev.fd) { printf("%s:drm_destory_dumb!\n",__func__); - for(int i = 0; i < BUFFERS_COUNT*BUFFERS_NUM; i++) { + for(int i = 0; i < BUFFERS_COUNT*BUFFERS_NUM; i++) { drm_destory_dumb(&drm_dev.drm_bufs[i]); } } @@ -994,7 +999,7 @@ void *drm_show(void *info) } /** * @brief Spawn isp-tuningd - * + * * @return int pid of child process */ static pid_t spawn_isp_tuningd (int* pipe_fd_ptr) { @@ -1023,11 +1028,11 @@ static pid_t spawn_isp_tuningd (int* pipe_fd_ptr) { } } /** - * @brief - * - * @param __attribute__ - * @param __attribute__ - * @return int + * @brief + * + * @param __attribute__ + * @param __attribute__ + * @return int */ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unused__))) { @@ -1063,7 +1068,15 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu case 'v': verbose = 1; break; - + case 'a': + anti_flicker_init(atoi(optarg)); + break; + case 'x': + ae_select_init(atoi(optarg)); + break; + case 'l': + adaptive_enable(atoi(optarg)); + break; default: usage(stderr, argc, argv); exit(EXIT_FAILURE); @@ -1077,12 +1090,12 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu signal(SIGTERM,sigint_handler); child_pid = spawn_isp_tuningd(&pipe_fd); // - memset(&actions, 0, sizeof(actions)); - sigemptyset(&actions.sa_mask); /* 将参数set信号集初始化并清空 */ - actions.sa_flags = 0; - actions.sa_handler = sighand; - /* 设置SIGALRM的处理函数 */ - sigaction(SIGALRM,&actions,NULL); + memset(&actions, 0, sizeof(actions)); + sigemptyset(&actions.sa_mask); /* 将参数set信号集初始化并清空 */ + actions.sa_flags = 0; + actions.sa_handler = sighand; + /* 设置SIGALRM的处理函数 */ + sigaction(SIGALRM,&actions,NULL); // cfg_noc_prior(); //media @@ -1101,7 +1114,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu camera[0].buffer_start = 0; camera_num++; } - } + } } // printf("%s:dev_info[1].video_used(%d)\n",__func__,dev_info[1].video_used); @@ -1117,7 +1130,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu camera[1].buffer_start = BUFFERS_COUNT; camera_num++; } - } + } } // if(( 0 == dev_info[0].video_used ) && ( 1 == dev_info[1].video_used )) @@ -1129,7 +1142,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu struct drm_size size[2]; size[0].width = 1080; - size[0].height = 1920; + size[0].height = 1920; size[1].width = 1080; size[1].height = 1920; @@ -1138,7 +1151,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu size[0].src_offset_w = 0; size[0].src_offset_h = 200; size[0].crtc_offset_w = 0; - size[0].crtc_offset_h = 200; + size[0].crtc_offset_h = 200; size[1].src_offset_w = 0; size[1].src_offset_h = 1000; size[1].crtc_offset_w = 0; @@ -1149,12 +1162,12 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu size[0].src_offset_w = 0; size[0].src_offset_h = 0; size[0].crtc_offset_w = 0; - size[0].crtc_offset_h = 0; + size[0].crtc_offset_h = 0; size[1].src_offset_w = 0; size[1].src_offset_h = 0; size[1].crtc_offset_w = 0; size[1].crtc_offset_h = 0; - } + } drm_reset(); drm_init(&size[0]); //drm init @@ -1165,7 +1178,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu r2k_queue = CreateEmptySequeue(); // if(dev_info[0].video_used == 1) - { + { pthread_create(&f2k_pid,NULL,run_f2k_video,(void *)&camera[0]); } // @@ -1187,11 +1200,11 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu } pthread_kill(drm_pid, SIGALRM); - printf("Wait for masked and unmasked threads to complete\n"); + printf("Wait for masked and unmasked threads to complete\n"); if( dev_info[0].video_used == 1) { pthread_join(f2k_pid, NULL); - } + } if( dev_info[1].video_used == 1) { @@ -1205,8 +1218,8 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu if(drm_dev.fd) { printf("%s:drm_exit\n",__func__); - drm_exit(); - } + drm_exit(); + } mediactl_exit(); fprintf(stderr, "\n"); return 0; diff --git a/package/mediactl_lib/src/v4l2_test/Makefile b/package/mediactl_lib/src/v4l2_test/Makefile index e1badf7..fc00bec 100644 --- a/package/mediactl_lib/src/v4l2_test/Makefile +++ b/package/mediactl_lib/src/v4l2_test/Makefile @@ -5,7 +5,7 @@ TARGET = v4l2_test.out OBJS = v4l2_test.c all: - ${CC} ${OBJS} -I. -L../ -lmediactl -lpthread -lstdc++ -o ${TARGET} + ${CC} ${OBJS} -I. -L../ -lmediactl -lpthread -ladaptive -l3actl -lstdc++ -o ${TARGET} @echo "Compile done." clean: @rm -f *.o ${TARGET} diff --git a/package/mediactl_lib/src/v4l2_test/v4l2_test.c b/package/mediactl_lib/src/v4l2_test/v4l2_test.c index ff969ee..c55312e 100644 --- a/package/mediactl_lib/src/v4l2_test/v4l2_test.c +++ b/package/mediactl_lib/src/v4l2_test/v4l2_test.c @@ -1,26 +1,26 @@ -/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* v4l2_test */ #include @@ -621,11 +621,14 @@ static void usage(FILE *fp, int argc, char **argv) "-c | --count Number of frames to grab [%i]\n" "-v | --verbose Verbose output\n" "-O | --output file Output file full path[%s]\n" + "-a | --anti-clicker-enable (0: all disable | 1: f 2k enable | 2: r 2k enable | 3: f&r 2k enable)\n" + "-x | --ae sw/hw select (default 0: sw ae | 1: hw ae)\n" + "-l | --adaptive enable (0: disable | 1: enable, default: enable)\n" "", argv[0], dev_name, frame_count, video_name); } -static const char short_options[] = "d:hmruofc:vO:";// 短选项 ：表示带参数 +static const char short_options[] = "d:hmruofc:vO:a:x:l:";// 短选项 ：表示带参数 static const struct option //长选项 long_options[] = { @@ -639,6 +642,9 @@ long_options[] = { { "count", required_argument, NULL, 'c' }, { "verbose", no_argument, NULL, 'v' }, { "ouput file", required_argument, NULL, 'O' }, + { "anfi-flicker-enable", required_argument, NULL, 'a' }, + { "ae-select", required_argument, NULL, 'x' }, + { "adaptive", required_argument, NULL, 'l' }, { 0, 0, 0, 0 } }; @@ -659,7 +665,7 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu { dev_name = "/dev/video3"; unsigned int width = FORCED_WIDTH; - unsigned int height = FORCED_HEIGHT; + unsigned int height = FORCED_HEIGHT; struct video_info dev_info[2]; for (;;) { @@ -717,6 +723,12 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu case 'O': video_name = optarg; break; + case 'a': + anti_flicker_init(atoi(optarg)); + break; + case 'l': + adaptive_enable(atoi(optarg)); + break; default: usage(stderr, argc, argv); exit(EXIT_FAILURE); @@ -771,4 +783,4 @@ int main(int argc __attribute__((__unused__)), char *argv[] __attribute__((__unu mediactl_exit(); fprintf(stderr, "\n"); return 0; -} +} diff --git a/package/patches/linux/0025-add-ISP-Core-Reg-W-R-ioctl-imx219-mdelay2udelay.patch b/package/patches/linux/0025-add-ISP-Core-Reg-W-R-ioctl-imx219-mdelay2udelay.patch new file mode 100644 index 0000000..5159dbd --- /dev/null +++ b/package/patches/linux/0025-add-ISP-Core-Reg-W-R-ioctl-imx219-mdelay2udelay.patch @@ -0,0 +1,6009 @@ +From f12828fc6ee8bc3af4489d285b395705f70b772e Mon Sep 17 00:00:00 2001 +From: alex-guo +Date: Tue, 23 Aug 2022 23:26:38 +0800 +Subject: [PATCH] add ISP Core Reg W-R ioctl imx219 mdelay2udelay + +--- + .../canaan-isp/isp_2k/core/isp_core_drv.h | 471 +++---- + .../canaan-isp/isp_2k/core/isp_core_reg.h | 47 +- + .../canaan-isp/isp_2k/core/isp_f2k_core_drv.c | 152 ++- + .../canaan-isp/isp_2k/core/isp_r2k_core_drv.c | 120 +- + .../platform/canaan-isp/isp_2k/isp_f2k.c | 1115 +++++++++-------- + .../platform/canaan-isp/isp_2k/isp_r2k.c | 1071 ++++++++-------- + include/uapi/linux/k510isp.h | 16 +- + 7 files changed, 1565 insertions(+), 1427 deletions(-) + +diff --git a/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_drv.h b/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_drv.h +index 45dfc599..60a23d66 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_drv.h ++++ b/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_drv.h +@@ -12,146 +12,146 @@ + + typedef struct _ISP_CORE_ITC_CTL_S + { +- unsigned int hsync_pol; +- unsigned int vsync_pol; +- unsigned int hsync_input_timing; ++ unsigned int hsync_pol; ++ unsigned int vsync_pol; ++ unsigned int hsync_input_timing; + unsigned int vsync_input_timing; +- +- unsigned int mirror_ctl; +- unsigned int video_format_ctl; +- ++ ++ unsigned int mirror_ctl; ++ unsigned int video_format_ctl; ++ + } ISP_CORE_ITC_CTL_S; + + typedef struct _ISP_CORE_IMAGE_ATTR_S + { +- unsigned int image_height; +- unsigned int image_width; +- unsigned int image_v_start; +- unsigned int image_h_start; +- unsigned int image_active_width; +- unsigned int image_active_height; ++ unsigned int image_height; ++ unsigned int image_width; ++ unsigned int image_v_start; ++ unsigned int image_h_start; ++ unsigned int image_active_width; ++ unsigned int image_active_height; + } ISP_CORE_IMAGE_ATTR_S; + + typedef struct _ISP_CORE_TEST_CTL_S + { +- unsigned int bayer_mode_sel; +- unsigned int motion_mode_sel; ++ unsigned int bayer_mode_sel; ++ unsigned int motion_mode_sel; + unsigned int test_pattern_sel; + unsigned int test_pattern_en; +- +- unsigned int wdr_l_mul_data; +- unsigned int wdr_m_mul_data; +- unsigned int wdr_s_mul_data; +- ++ ++ unsigned int wdr_l_mul_data; ++ unsigned int wdr_m_mul_data; ++ unsigned int wdr_s_mul_data; ++ + } ISP_CORE_TEST_CTL_S; + + typedef struct _ISP_CORE_BLC_CTL_S + { +- unsigned int blc_en; +- unsigned int blc_offset; +- unsigned int blc_ratio; ++ unsigned int blc_en; ++ unsigned int blc_offset; ++ unsigned int blc_ratio; + } ISP_CORE_BLC_CTL_S; + + typedef struct _ISP_CORE_LSC_CTL_S + { +- unsigned int lsc_en; +- unsigned int lsc_h_center; +- unsigned int lsc_v_center; ++ unsigned int lsc_en; ++ unsigned int lsc_h_center; ++ unsigned int lsc_v_center; + unsigned int lsc_red_ratio; +- +- unsigned int lsc_green_ratio; +- unsigned int lsc_blue_ratio; +- unsigned int lsc_ir_ratio; ++ ++ unsigned int lsc_green_ratio; ++ unsigned int lsc_blue_ratio; ++ unsigned int lsc_ir_ratio; + } ISP_CORE_LSC_CTL_S; + + typedef struct _ISP_CORE_AE_CTL_S + { +- unsigned int ae_as_en; +- unsigned int ae_ag_en; +- unsigned int ae_airis_en; ++ unsigned int ae_as_en; ++ unsigned int ae_ag_en; ++ unsigned int ae_airis_en; + unsigned int ae_enter_ls_sel; +- +- unsigned int ae_exit_ls_sel; +- unsigned int ae_win_mode_sel; ++ ++ unsigned int ae_exit_ls_sel; ++ unsigned int ae_win_mode_sel; + unsigned int ae_back_light_mode_sel; +- unsigned int ae_day_change_en; +- unsigned int ae_day_change_sel; +- ++ unsigned int ae_day_change_en; ++ unsigned int ae_day_change_sel; ++ + unsigned int ae_win_h_start; + unsigned int ae_win_v_start; +- unsigned int ae_win_h_end; +- unsigned int ae_win_v_end; +- +- unsigned int ae_tar_bright; ++ unsigned int ae_win_h_end; ++ unsigned int ae_win_v_end; ++ ++ unsigned int ae_tar_bright; + unsigned int ae_tar_bright_range; +- ++ + unsigned int ae_l_ex_time; + unsigned int ae_m_ex_time; + unsigned int ae_s_ex_time; +- +- unsigned int ae_agc; ++ ++ unsigned int ae_agc; + unsigned int ae_ad_shuttle_freq; + unsigned int ae_ad_gain_freq; +- ++ + unsigned int ae_adjust_step_max; +- +- unsigned int ae_ex_value_max; +- unsigned int ae_ex_value_mid; +- unsigned int ae_ex_value_min; + +- unsigned int ae_gain_value_max; ++ unsigned int ae_ex_value_max; ++ unsigned int ae_ex_value_mid; ++ unsigned int ae_ex_value_min; ++ ++ unsigned int ae_gain_value_max; + unsigned int ae_gain_value_mid; + unsigned int ae_gain_value_min; +- ++ + unsigned int ae_dn_switch_ad_step_max; + unsigned int ae_dn_switch_wait_time; + unsigned int ape_max_diff; +- +- unsigned int ape_drv_signal_max; +- +- unsigned int ape_coeff_distance; +- unsigned int ape_coeff_speed; ++ ++ unsigned int ape_drv_signal_max; ++ ++ unsigned int ape_coeff_distance; ++ unsigned int ape_coeff_speed; + unsigned int ape_coeff_acceleration; +- +- unsigned int ape_drv_manual_value; +- unsigned int ape_damp_manual_value; ++ ++ unsigned int ape_drv_manual_value; ++ unsigned int ape_damp_manual_value; + } ISP_CORE_AE_CTL_S; + + typedef struct _ISP_CORE_AE_STS_S +-{ ++{ + unsigned int ae_value_ready; +- unsigned int ae_long_cur_ex; +- unsigned int ae_mid_cur_ex; +- unsigned int ae_short_cur_ex; +- unsigned int ae_digital_gain; +- +- unsigned int ave_brightness; ++ unsigned int ae_long_cur_ex; ++ unsigned int ae_mid_cur_ex; ++ unsigned int ae_short_cur_ex; ++ unsigned int ae_digital_gain; ++ ++ unsigned int ave_brightness; + unsigned int ae_day_night_status; +- unsigned int ae_ex_status; +- +- unsigned int ae_sum; ++ unsigned int ae_ex_status; ++ ++ unsigned int ae_sum; + unsigned int ae_pixel_sum; + } ISP_CORE_AE_STS_S; + + typedef struct _ISP_CORE_AWB_CTL_S + { +- unsigned int awb_d65_en; +- unsigned int awb_ccm_en; +- unsigned int awb_en; ++ unsigned int awb_d65_en; ++ unsigned int awb_ccm_en; ++ unsigned int awb_en; + unsigned int awb_mode_sel; +- ++ + unsigned int awb_hist_mode_sel; +- unsigned int awb_veri_en; ++ unsigned int awb_veri_en; + unsigned int awb_fb_en; + unsigned int awb_value_save_en; +- ++ + unsigned int awb_ccm_adp_adjust_en; +- unsigned int awb_stab_en; ++ unsigned int awb_stab_en; + unsigned int awb_d65_red_gain; +- ++ + unsigned int awb_d65_blue_gain; + unsigned int ccm_rr_coff; +- ++ + unsigned int ccm_rg_coff; + unsigned int ccm_rb_coff; + unsigned int ccm_gr_coff; +@@ -159,26 +159,26 @@ typedef struct _ISP_CORE_AWB_CTL_S + unsigned int ccm_gb_coff; + unsigned int ccm_br_coff; + unsigned int ccm_bg_coff; +- +- unsigned int ccm_bb_coff; ++ ++ unsigned int ccm_bb_coff; + unsigned int ccm_correct_coff; +- ++ + unsigned int awb_win_h_start; + unsigned int awb_win_v_start; +- unsigned int awb_win_h_end; +- unsigned int awb_win_v_end; +- +- unsigned int awb_correct_diff_th; ++ unsigned int awb_win_h_end; ++ unsigned int awb_win_v_end; ++ ++ unsigned int awb_correct_diff_th; + unsigned int awb_color_changeres_time; + unsigned int awb_historgram_th; +- +- unsigned int awb_red_gain_adjust; +- unsigned int awb_green_gain_adjust; +- unsigned int awb_blue_gain_adjust; ++ ++ unsigned int awb_red_gain_adjust; ++ unsigned int awb_green_gain_adjust; ++ unsigned int awb_blue_gain_adjust; + unsigned int awb_red_max_value; +- unsigned int awb_blue_max_value; +- unsigned int awb_red_min_value; +- ++ unsigned int awb_blue_max_value; ++ unsigned int awb_red_min_value; ++ + unsigned int awb_blue_min_value; + unsigned int awb_red_obj_value; + unsigned int awb_blue_obj_value; +@@ -188,50 +188,50 @@ typedef struct _ISP_CORE_AWB_STS_S + { + unsigned int awb_blue_hist_value; + unsigned int awb_blue_hist_pixel; +- +- unsigned int awb_red_hist_value; +- unsigned int awb_red_hist_pixel; ++ ++ unsigned int awb_red_hist_value; ++ unsigned int awb_red_hist_pixel; + unsigned int awb_bypass_blue_hist_value; +- ++ + unsigned int awb_bypass_blue_hist_pixel; +- unsigned int awb_bypass_red_hist_value; ++ unsigned int awb_bypass_red_hist_value; + unsigned int awb_bypass_red_hist_pixel; +- ++ + unsigned int awb_red_value; + unsigned int awb_green_value; +- +- unsigned int awb_blue_value; +- unsigned int awb_org_image_red_value; +- ++ ++ unsigned int awb_blue_value; ++ unsigned int awb_org_image_red_value; ++ + unsigned int awb_org_image_green_value; + unsigned int awb_org_image_blue_value; + } ISP_CORE_AWB_STS_S; + + typedef struct _ISP_CORE_WDR_CTL_S + { +- unsigned int wdr_fusion_en; +- unsigned int wdr_frame_sel; +- unsigned int wdr_adp_adjust_en; ++ unsigned int wdr_fusion_en; ++ unsigned int wdr_frame_sel; ++ unsigned int wdr_adp_adjust_en; + unsigned int wdr_stab_en; +- +- unsigned int wdr_en; +- unsigned int wdr_ghost_remove_en; ++ ++ unsigned int wdr_en; ++ unsigned int wdr_ghost_remove_en; + unsigned int wdr_3frame_out_mode; + unsigned int wdr_mode_sel; +- ++ + unsigned int wdr_2frame_ex_ratio; +- unsigned int wdr_3frame_ex_ratio; +- unsigned int wdr_stat_img_sel; ++ unsigned int wdr_3frame_ex_ratio; ++ unsigned int wdr_stat_img_sel; + unsigned int wdr_ltm_data_sel; +- ++ + unsigned int wdr_tz_data_sel; + unsigned int wdr_remove_purple_en; + unsigned int wdr_over_ex_ratio_th1; +- ++ + unsigned int wdr_over_ex_ratio_th2; + unsigned int wdr_fusion_ratio_th; +- +- unsigned int wdr_fusion_value1; ++ ++ unsigned int wdr_fusion_value1; + unsigned int wdr_fusion_value2; + }ISP_CORE_WDR_CTL_S; + +@@ -250,57 +250,57 @@ typedef struct _ISP_CORE_CSC_CTL_S + + typedef struct _ISP_CORE_ADA_CTL_S + { +- unsigned int ada_rgb_gamma_en; +- unsigned int ada_yuv_gamma_en; +- unsigned int ada_adjust_en; ++ unsigned int ada_rgb_gamma_en; ++ unsigned int ada_yuv_gamma_en; ++ unsigned int ada_adjust_en; + unsigned int ada_img_stab_en; +- +- unsigned int ada_ccr_en; +- unsigned int ada_adp_en; +- unsigned int ada_adp_ccr_en; ++ ++ unsigned int ada_ccr_en; ++ unsigned int ada_adp_en; ++ unsigned int ada_adp_ccr_en; + unsigned int ada_stat_mode_sel; +- ++ + unsigned int ada_enh_mode_sel; +- unsigned int ada_stat_max_value; ++ unsigned int ada_stat_max_value; + unsigned int ada_ad_stren_max_value; +- ++ + unsigned int ada_win_h_start; + unsigned int ada_win_v_start; +- unsigned int ada_win_h_end; +- unsigned int ada_win_v_end; ++ unsigned int ada_win_h_end; ++ unsigned int ada_win_v_end; + + } ISP_CORE_ADA_CTL_S; + + typedef struct _ISP_CORE_RGBIR_CTL_S + { +- unsigned int rgbir_en; +- unsigned int rgbir_rtf_en; +- unsigned int rgbir_rpc_en; ++ unsigned int rgbir_en; ++ unsigned int rgbir_rtf_en; ++ unsigned int rgbir_rpc_en; + unsigned int rgbir_fusion_en; +- ++ + unsigned int rgbir_output_sel; +- +- unsigned int rgbir_rpc_max_value; ++ ++ unsigned int rgbir_rpc_max_value; + unsigned int rgbir_rpc_color_coff; +- unsigned int rgbir_rpc_luma_coff; +- +- unsigned int rgbir_rpc_th; +- unsigned int rgbir_rpc_th1; ++ unsigned int rgbir_rpc_luma_coff; ++ ++ unsigned int rgbir_rpc_th; ++ unsigned int rgbir_rpc_th1; + } ISP_CORE_RGBIR_CTL_S; + + typedef struct _ISP_CORE_2DNR_CTL_S + { +- unsigned int core_2dnr_pcf_en; +- unsigned int core_2dnr_raw_en; +- unsigned int core_2dnr_edge_en; +- unsigned int core_2dnr_bap_en; +- +- unsigned int core_2dnr_luma_en; +- unsigned int core_2dnr_chroma_en; +- unsigned int core_2dnr_pcf_adp_en; +- unsigned int core_2dnr_raw_adp_en; +- +- unsigned int core_2dnr_luma_adp_en; ++ unsigned int core_2dnr_pcf_en; ++ unsigned int core_2dnr_raw_en; ++ unsigned int core_2dnr_edge_en; ++ unsigned int core_2dnr_bap_en; ++ ++ unsigned int core_2dnr_luma_en; ++ unsigned int core_2dnr_chroma_en; ++ unsigned int core_2dnr_pcf_adp_en; ++ unsigned int core_2dnr_raw_adp_en; ++ ++ unsigned int core_2dnr_luma_adp_en; + unsigned int core_2dnr_chroma_adp_en; + unsigned int core_2dnr_raw_intensity; + unsigned int core_2dnr_bap_intensity; +@@ -312,67 +312,67 @@ typedef struct _ISP_CORE_2DNR_CTL_S + + typedef struct _ISP_CORE_3DNR_CTL_S + { +- unsigned int core_3dnr_en; +- unsigned int core_3dnr_pre_luma_en; +- unsigned int core_3dnr_pre_chroma_en; ++ unsigned int core_3dnr_en; ++ unsigned int core_3dnr_pre_luma_en; ++ unsigned int core_3dnr_pre_chroma_en; + unsigned int core_3dnr_main_luma_en; +- ++ + unsigned int core_3dnr_main_chroma_en; +- unsigned int core_3dnr_post_luma_en; ++ unsigned int core_3dnr_post_luma_en; + unsigned int core_3dnr_post_chroma_en; + unsigned int core_3dnr_2d_luma_en; +- +- unsigned int core_3dnr_2d_chroma_en; +- unsigned int core_3dnr_wb_en; ++ ++ unsigned int core_3dnr_2d_chroma_en; ++ unsigned int core_3dnr_wb_en; + unsigned int core_3dnr_wb_sel; + unsigned int core_3dnr_adp_luma_en; +- ++ + unsigned int core_3dnr_adp_chroma_en; +- unsigned int core_3dnr_pre_luma_th; +- unsigned int core_3dnr_pre_luma_intensity; ++ unsigned int core_3dnr_pre_luma_th; ++ unsigned int core_3dnr_pre_luma_intensity; + unsigned int core_3dnr_pre_chroma_intensity; +- ++ + unsigned int core_3dnr_mid_filter_th; +- unsigned int core_3dnr_pre_mid_filter_th; +- unsigned int core_3dnr_cur_mid_filter_th; ++ unsigned int core_3dnr_pre_mid_filter_th; ++ unsigned int core_3dnr_cur_mid_filter_th; + unsigned int core_3dnr_low_pass_filter_th; +- unsigned int core_3dnr_luma_th; ++ unsigned int core_3dnr_luma_th; + unsigned int core_3dnr_min_value; + unsigned int core_3dnr_luma_intensity; +- +- unsigned int core_3dnr_chroma_intensity; +- unsigned int core_3dnr_post_edge_th; +- unsigned int core_3dnr_post_luma_intensity; ++ ++ unsigned int core_3dnr_chroma_intensity; ++ unsigned int core_3dnr_post_edge_th; ++ unsigned int core_3dnr_post_luma_intensity; + unsigned int core_3dnr_post_chroma_intensity; + + } ISP_CORE_3DNR_CTL_S; + + typedef struct _ISP_CORE_ENH_CTL_S + { +- unsigned int enh_ltm_en; +- unsigned int enh_sharp_en; +- unsigned int enh_cc_en; ++ unsigned int enh_ltm_en; ++ unsigned int enh_sharp_en; ++ unsigned int enh_cc_en; + unsigned int enh_adp_ltm_en; +- +- unsigned int enh_adp_sharp_en; +- unsigned int enh_adp_cc_en; +- unsigned int ltm_gain; +- unsigned int ltm_th; +- +- unsigned int enh_nr_th; ++ ++ unsigned int enh_adp_sharp_en; ++ unsigned int enh_adp_cc_en; ++ unsigned int ltm_gain; ++ unsigned int ltm_th; ++ ++ unsigned int enh_nr_th; + unsigned int enh_th1; + unsigned int enh_th2; +- unsigned int sharp_gain; ++ unsigned int sharp_gain; + } ISP_CORE_ENH_CTL_S; + + typedef struct _ISP_CORE_POST_CTL_S +-{ +- unsigned int post_cont_ad_en; +- unsigned int post_luma_ad_en; +- unsigned int post_satu_ad_en; +-// unsigned int post_otc_en; ++{ ++ unsigned int post_cont_ad_en; ++ unsigned int post_luma_ad_en; ++ unsigned int post_satu_ad_en; ++// unsigned int post_otc_en; + unsigned int cont_ad_intensity; +- ++ + unsigned int luma_ad_intensity; + unsigned int satu_ad_intensity; + +@@ -380,50 +380,50 @@ typedef struct _ISP_CORE_POST_CTL_S + + typedef struct _ISP_CORE_OTC_CTL_S + { +- unsigned int post_otc_en; +- unsigned int otc_yc_sel; +- unsigned int otc_uv_format_sel; +- unsigned int otc_hsync_pol_sel; ++ unsigned int post_otc_en; ++ unsigned int otc_yc_sel; ++ unsigned int otc_uv_format_sel; ++ unsigned int otc_hsync_pol_sel; + unsigned int otc_vsync_pol_sel; +- +- unsigned int otc_stt_vr; +- unsigned int otc_stt_hr; +- unsigned int otc_height; +- unsigned int otc_width; ++ ++ unsigned int otc_stt_vr; ++ unsigned int otc_stt_hr; ++ unsigned int otc_height; ++ unsigned int otc_width; + } ISP_CORE_OTC_CTL_S; + + typedef struct _ISP_CORE_LDC_CTL_S + { +- unsigned int ldc_en; +- unsigned int ldc_arith_en; +- unsigned int ldc_req_freq; +- ++ unsigned int ldc_en; ++ unsigned int ldc_arith_en; ++ unsigned int ldc_req_freq; ++ + unsigned int ldc_stt_ln; + unsigned int ldc_h_center_pos; +- ++ + unsigned int ldc_v_center_pos; +- unsigned int ldc_rectify_cr; +- +- unsigned int ldc_rectify_cz; ++ unsigned int ldc_rectify_cr; ++ ++ unsigned int ldc_rectify_cz; + } ISP_CORE_LDC_CTL_S; + + typedef struct _ISP_CORE_AF_CTL_S + { +- unsigned int af_stat_en; +- unsigned int af_stat_mode_sel; ++ unsigned int af_stat_en; ++ unsigned int af_stat_mode_sel; + +- unsigned int af_stat_win_h_start; +- unsigned int af_stat_win_v_start; +- unsigned int af_stat_win_h_end; +- unsigned int af_stat_win_v_end; ++ unsigned int af_stat_win_h_start; ++ unsigned int af_stat_win_v_start; ++ unsigned int af_stat_win_h_end; ++ unsigned int af_stat_win_v_end; + + } ISP_CORE_AF_CTL_S; + + typedef struct _ISP_CORE_AF_STS_S +-{ +- unsigned int af_mid_frq_data; +- unsigned int af_high_frq_data; +- unsigned int af_stat_pixel_num; ++{ ++ unsigned int af_mid_frq_data; ++ unsigned int af_high_frq_data; ++ unsigned int af_stat_pixel_num; + } ISP_CORE_AF_STS_S; + + typedef struct _ISP_CORE_RAM_WR_STATUS_S +@@ -431,29 +431,29 @@ typedef struct _ISP_CORE_RAM_WR_STATUS_S + unsigned int gamma_grb_table_cfg; + unsigned int gamma_yuv_table_cfg; + +- unsigned int wdr_l3_table_cfg; +- unsigned int wdr_m3_table_cfg; +- unsigned int wdr_s3_table_cfg; ++ unsigned int wdr_l3_table_cfg; ++ unsigned int wdr_m3_table_cfg; ++ unsigned int wdr_s3_table_cfg; ++ ++ unsigned int wdr_l2_table_cfg; ++ unsigned int wdr_s2_table_cfg; + +- unsigned int wdr_l2_table_cfg; +- unsigned int wdr_s2_table_cfg; +- + } ISP_CORE_RAM_WR_STATUS_S; + + typedef struct _ISP_CORE_RAM_RD_STATUS_S + { +- unsigned int gamma_grb_table; +- unsigned int gamma_yuv_table; +- unsigned int wdr_l3_table; ++ unsigned int gamma_grb_table; ++ unsigned int gamma_yuv_table; ++ unsigned int wdr_l3_table; + unsigned int wdr_m3_table; +- +- unsigned int wdr_s3_table; +- unsigned int wdr_l2_table; +- unsigned int wdr_s2_table; ++ ++ unsigned int wdr_s3_table; ++ unsigned int wdr_l2_table; ++ unsigned int wdr_s2_table; + unsigned int ram_ready_status; +- ++ + unsigned int hist_ready_status; +- unsigned int ram_ready_lock; ++ unsigned int ram_ready_lock; + } ISP_CORE_RAM_RD_STATUS_S; + + typedef struct _ISP_CORE_ATRR_S +@@ -475,13 +475,20 @@ typedef struct _ISP_CORE_ATRR_S + ISP_CORE_3DNR_CTL_S st3dnrCtl; + ISP_CORE_ENH_CTL_S stEnhCtl; + ISP_CORE_POST_CTL_S stPostCtl; +- ISP_CORE_OTC_CTL_S stOtcCtl; ++ ISP_CORE_OTC_CTL_S stOtcCtl; + ISP_CORE_LDC_CTL_S stLdcCtl; + ISP_CORE_RAM_WR_STATUS_S stRamWrStatus; + ISP_CORE_RAM_RD_STATUS_S stRamRdStatus; + ISP_CORE_AF_CTL_S stAfCtl; + ISP_CORE_AF_STS_S stAfSts; + } ISP_CORE_ATRR_S; ++ ++typedef struct _ISP_CORE_REG_VAL_S ++{ ++ unsigned int reg_addr; ++ unsigned int reg_value; ++}ISP_CORE_REG_VAL_S; ++ + /* + *F2K + */ +@@ -508,11 +515,13 @@ int Isp_Drv_F2k_Core_SetOtcCtl(struct k510_isp_device *isp,ISP_CORE_OTC_CTL_S *p + int Isp_Drv_F2k_Core_SetLdcCtl(struct k510_isp_device *isp,ISP_CORE_LDC_CTL_S *pstLdcCtl); + int Isp_Drv_F2k_Core_SetAfCtl(struct k510_isp_device *isp,ISP_CORE_AF_CTL_S *pstAfCtl); + int Isp_Drv_F2k_Core_SetRamWrStatus(struct k510_isp_device *isp,unsigned int data); ++int Isp_Drv_F2k_Core_SetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal); + // + int Isp_Drv_F2k_Core_GetAeSts(struct k510_isp_device *isp,ISP_CORE_AE_STS_S *pAeSts); + int Isp_Drv_F2k_Core_GetAwbSts(struct k510_isp_device *isp,ISP_CORE_AWB_STS_S *pAwbSts); + int Isp_Drv_F2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgtAfSts); + int Isp_Drv_F2k_Core_GetRamRdStatus(struct k510_isp_device *isp); ++int Isp_Drv_F2k_Core_GetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal); + /* + *R2K + */ +@@ -537,10 +546,12 @@ int Isp_Drv_R2k_Core_SetOtcCtl(struct k510_isp_device *isp,ISP_CORE_OTC_CTL_S *p + int Isp_Drv_R2k_Core_SetLdcCtl(struct k510_isp_device *isp,ISP_CORE_LDC_CTL_S *pstLdcCtl); + int Isp_Drv_R2k_Core_SetAfCtl(struct k510_isp_device *isp,ISP_CORE_AF_CTL_S *pstAfCtl); + int Isp_Drv_R2k_Core_SetRamWrStatus(struct k510_isp_device *isp,unsigned int data); ++int Isp_Drv_R2k_Core_SetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal); + // + int Isp_Drv_R2k_Core_GetAeSts(struct k510_isp_device *isp,ISP_CORE_AE_STS_S *pAeSts); + int Isp_Drv_R2k_Core_GetAwbSts(struct k510_isp_device *isp,ISP_CORE_AWB_STS_S *pAwbSts); + int Isp_Drv_R2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgtAfSts); + int Isp_Drv_R2k_Core_GetRamRdStatus(struct k510_isp_device *isp); ++int Isp_Drv_R2k_Core_GetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal); + +-#endif /*_ISP_CORE_DRV_H_*/ +\ No newline at end of file ++#endif /*_ISP_CORE_DRV_H_*/ +diff --git a/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_reg.h b/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_reg.h +index b70d20af..d536c981 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_reg.h ++++ b/drivers/media/platform/canaan-isp/isp_2k/core/isp_core_reg.h +@@ -100,7 +100,7 @@ union U_ISP_CORE_IMAGE_ACTIVE_HEIGHT + } ; + /* + * Test Pattern Control +-*/ ++*/ + union U_ISP_CORE_TEST_CTL + { + /* Define the struct bits */ +@@ -158,7 +158,7 @@ union U_ISP_CORE_BLC_RATIO + unsigned int u32; + } ; + /* +-* Lens Shading Correction ++* Lens Shading Correction + */ + union U_ISP_CORE_LSC_CTL + { +@@ -244,7 +244,7 @@ union U_ISP_CORE_LSC_IR_RATIO + unsigned int u32; + } ; + /* +-*AUTO Exposure/Gain ++*AUTO Exposure/Gain + */ + union U_ISP_CORE_AE_CTL + { +@@ -1438,7 +1438,7 @@ union U_ISP_CORE_CSC_R2Y_22 + } ; + /* + *ADA +-*/ ++*/ + union U_ISP_CORE_ADA_CTL + { + /* Define the struct bits */ +@@ -1692,7 +1692,7 @@ union U_ISP_CORE_2DNR_CHROMA_INTENSITY + unsigned int u32; + } ; + /* +-* 3D Noise Reduction ++* 3D Noise Reduction + */ + union U_ISP_CORE_3DNR_CTL + { +@@ -2083,7 +2083,7 @@ union U_ISP_CORE_OTC_WIDTH + unsigned int u32; + } ; + /* +-* LDC Control ++* LDC Control + */ + union U_ISP_CORE_LDC_CTL + { +@@ -2159,7 +2159,7 @@ union U_ISP_CORE_LDC_RECTIFY_CZ + unsigned int u32; + } ; + /* +-* ISP Table Control ++* ISP Table Control + */ + union U_ISP_CORE_RAM_WR_STATUS + { +@@ -2310,6 +2310,28 @@ union U_ISP_CORE_AF_STAT_PIXEL_NUM + unsigned int u32; + } ; + ++union U_ISP_CORE_REG_CFG_ADDR ++{ ++ /* Define the struct bits */ ++ struct ++ { ++ unsigned int reg_value : 32 ; /* [31 ..0 ] */ ++ } bits; /* Define an unsigned member */ ++ ++ unsigned int u32; ++} ; ++ ++union U_ISP_CORE_REG_CFG_VALUE ++{ ++ /* Define the struct bits */ ++ struct ++ { ++ unsigned int reg_value : 32 ; /* [31 ..0 ] */ ++ } bits; /* Define an unsigned member */ ++ ++ unsigned int u32; ++} ; ++ + //itc + #define ISP_CORE_ITC_CTL (0x0000) + #define ISP_CORE_IMAGE_HEIGHT (0x0004) +@@ -2318,13 +2340,13 @@ union U_ISP_CORE_AF_STAT_PIXEL_NUM + #define ISP_CORE_IMAGE_H_START (0x0010) + #define ISP_CORE_IMAGE_ACTIVE_WIDTH (0x0014) + #define ISP_CORE_IMAGE_ACTIVE_HEIGHT (0x0018) +-//tpg ++//tpg + #define ISP_CORE_TEST_CTL (0x001C) +-//blc ++//blc + #define ISP_CORE_BLC_CTL (0x0020) + #define ISP_CORE_BLC_OFFSET (0x0024) + #define ISP_CORE_BLC_RATIO (0x0028) +-//lsc ++//lsc + #define ISP_CORE_LSC_CTL (0x002C) + #define ISP_CORE_LSC_H_CENTER (0x0030) + #define ISP_CORE_LSC_V_CENTER (0x0034) +@@ -2332,7 +2354,7 @@ union U_ISP_CORE_AF_STAT_PIXEL_NUM + #define ISP_CORE_LSC_G_RATIO (0x003C) + #define ISP_CORE_LSC_B_RATIO (0x0040) + #define ISP_CORE_LSC_IR_RATIO (0x0044) +-//ae ++//ae + #define ISP_CORE_AE_CTL (0x0050) + #define ISP_CORE_AE_WIN_H_START (0x0054) + #define ISP_CORE_AE_WIN_V_START (0x0058) +@@ -2485,7 +2507,7 @@ union U_ISP_CORE_AF_STAT_PIXEL_NUM + #define ISP_CORE_CONT_GAIN (0x02E8) + #define ISP_CORE_LUMA_GAIN (0x02EC) + #define ISP_CORE_SATU_GAIN (0x02F0) +-//otc ++//otc + #define ISP_CORE_OTC_STT_VR (0x02F4) + #define ISP_CORE_OTC_STT_HR (0x02F8) + #define ISP_CORE_OTC_HEIGHT (0x02FC) +@@ -2512,4 +2534,3 @@ union U_ISP_CORE_AF_STAT_PIXEL_NUM + #define ISP_CORE_AF_STAT_PIXEL_NUM (0x0364) + + #endif /*_ISP_CORE_REG_H_*/ +- +diff --git a/drivers/media/platform/canaan-isp/isp_2k/core/isp_f2k_core_drv.c b/drivers/media/platform/canaan-isp/isp_2k/core/isp_f2k_core_drv.c +index 8e351db0..1d11f161 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/core/isp_f2k_core_drv.c ++++ b/drivers/media/platform/canaan-isp/isp_2k/core/isp_f2k_core_drv.c +@@ -9,7 +9,7 @@ + #include "isp_core_drv.h" + #include "isp_core_reg.h" + /* +-* Image Timing Control ++* Image Timing Control + */ + int Isp_Drv_F2k_Core_SetItcCtl(struct k510_isp_device *isp,ISP_CORE_ITC_CTL_S *pstItcCtl) + { +@@ -22,7 +22,7 @@ int Isp_Drv_F2k_Core_SetItcCtl(struct k510_isp_device *isp,ISP_CORE_ITC_CTL_S *p + stData.bits.vsync_input_timing = pstItcCtl->vsync_input_timing; + stData.bits.mirror_ctl = pstItcCtl->mirror_ctl; + stData.bits.video_format_ctl = pstItcCtl->video_format_ctl; +- ++ + isp_reg_writel(isp,stData.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_ITC_CTL); + return 0; + } +@@ -31,7 +31,7 @@ int Isp_Drv_F2k_Core_SetItcCtl(struct k510_isp_device *isp,ISP_CORE_ITC_CTL_S *p + */ + int Isp_Drv_F2k_Core_SetImageAttr(struct k510_isp_device *isp,ISP_CORE_IMAGE_ATTR_S *pstImgAttr) + { +- ++ + + union U_ISP_CORE_IMAGE_HEIGHT stHeight; + stHeight.u32 = 0; +@@ -69,7 +69,7 @@ int Isp_Drv_F2k_Core_SetImageAttr(struct k510_isp_device *isp,ISP_CORE_IMAGE_ATT + */ + int Isp_Drv_F2k_Core_SetTestCtl(struct k510_isp_device *isp,ISP_CORE_TEST_CTL_S *pstTestCtl) + { +- ++ + union U_ISP_CORE_TEST_CTL stData; + stData.u32 = 0; + stData.bits.bayer_mode_sel = pstTestCtl->bayer_mode_sel; +@@ -86,8 +86,8 @@ int Isp_Drv_F2k_Core_SetTestCtl(struct k510_isp_device *isp,ISP_CORE_TEST_CTL_S + *Black Level Correction + */ + int Isp_Drv_F2k_Core_SetBlcCtl(struct k510_isp_device *isp,ISP_CORE_BLC_CTL_S *pstBlcCtl) +-{ +- ++{ ++ + union U_ISP_CORE_BLC_CTL stBlcCtl; + stBlcCtl.u32 = 0; + stBlcCtl.bits.blc_en = pstBlcCtl->blc_en; +@@ -109,7 +109,7 @@ int Isp_Drv_F2k_Core_SetBlcCtl(struct k510_isp_device *isp,ISP_CORE_BLC_CTL_S *p + */ + int Isp_Drv_F2k_Core_SetLscCtl(struct k510_isp_device *isp,ISP_CORE_LSC_CTL_S *pstLscCtl) + { +- ++ + union U_ISP_CORE_LSC_CTL stlscCtl; + stlscCtl.u32 = 0; + stlscCtl.bits.lsc_en = pstLscCtl->lsc_en; +@@ -148,11 +148,11 @@ int Isp_Drv_F2k_Core_SetLscCtl(struct k510_isp_device *isp,ISP_CORE_LSC_CTL_S *p + return 0; + } + /* +-*AUTO Exposure/Gain ++*AUTO Exposure/Gain + */ + int Isp_Drv_F2k_Core_SetAeCtl(struct k510_isp_device *isp,ISP_CORE_AE_CTL_S *pstAeCtl) +-{ +- ++{ ++ + union U_ISP_CORE_AE_CTL stAeCtl; + stAeCtl.u32 = 0; + stAeCtl.bits.ae_as_en = pstAeCtl->ae_as_en; +@@ -266,7 +266,7 @@ int Isp_Drv_F2k_Core_SetAeCtl(struct k510_isp_device *isp,ISP_CORE_AE_CTL_S *pst + stDnWaitTime.u32 = 0; + stDnWaitTime.bits.ae_dn_switch_wait_time = pstAeCtl->ae_dn_switch_wait_time; + isp_reg_writel(isp,stDnWaitTime.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AE_DN_SWITCH_WAIT_TIME); +- ++ + union U_ISP_CORE_APE_DIFF_MAX stApeDiffMax; + stApeDiffMax.u32 = 0; + stApeDiffMax.bits.ape_max_diff = pstAeCtl->ape_max_diff; +@@ -300,42 +300,42 @@ int Isp_Drv_F2k_Core_SetAeCtl(struct k510_isp_device *isp,ISP_CORE_AE_CTL_S *pst + union U_ISP_CORE_APE_DAMP_MANUAL_VALUE stDampManValue; + stDampManValue.u32 = 0; + stDampManValue.bits.ape_damp_manual_value = pstAeCtl->ape_damp_manual_value; +- isp_reg_writel(isp,stDampManValue.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_APE_DAMP_MANUAL_VALUE); ++ isp_reg_writel(isp,stDampManValue.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_APE_DAMP_MANUAL_VALUE); + return 0; + } + /** +- * @brief +- * +- * @return int ++ * @brief ++ * ++ * @return int + */ + int Isp_Drv_F2k_Core_GetAeLongCurEx(struct k510_isp_device *isp) + { + int data; +- ++ + + data = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_AE_LONG_CUR_EX); + + return data; + } + /** +- * @brief +- * +- * @return int ++ * @brief ++ * ++ * @return int + */ + int Isp_Drv_F2k_Core_GetAeCurDigitalGain(struct k510_isp_device *isp) + { + int data; +- ++ + + data = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_AE_CUR_DIGITAL_GAIN); + + return data; + } + /** +- * @brief +- * +- * @param pAeSts +- * @return int ++ * @brief ++ * ++ * @param pAeSts ++ * @return int + */ + int Isp_Drv_F2k_Core_GetAeSts(struct k510_isp_device *isp,ISP_CORE_AE_STS_S *pAeSts) + { +@@ -379,15 +379,15 @@ int Isp_Drv_F2k_Core_GetAeSts(struct k510_isp_device *isp,ISP_CORE_AE_STS_S *pAe + union U_ISP_CORE_AE_PIXEL_SUM gtAePixelSum; + gtAePixelSum.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_AE_PIXEL_SUM); + pAeSts->ae_mid_cur_ex = gtAePixelSum.u32; +- ++ + return 0; +-} ++} + /* + *AWB + */ + int Isp_Drv_F2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *pstAwbCtl) + { +- ++ + union U_ISP_CORE_AWB_CTL stAwbCtl; + stAwbCtl.u32 = 0; + stAwbCtl.bits.awb_d65_en = pstAwbCtl->awb_d65_en; +@@ -411,7 +411,7 @@ int Isp_Drv_F2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + stD65BlueGain.u32 = 0; + stD65BlueGain.bits.awb_d65_blue_gain = pstAwbCtl->awb_d65_blue_gain; + isp_reg_writel(isp,stD65BlueGain.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AWB_D65_BLUE_GAIN); +- ++ + union U_ISP_CORE_CCM_RR_COFF stRrCoff; + stRrCoff.u32 = 0; + stRrCoff.bits.ccm_rr_coff = pstAwbCtl->ccm_rr_coff; +@@ -456,7 +456,7 @@ int Isp_Drv_F2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + stBbCoff.u32 = 0; + stBbCoff.bits.ccm_bb_coff = pstAwbCtl->ccm_bb_coff; + isp_reg_writel(isp,stBbCoff.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_CCM_BB_COFF); +- ++ + union U_ISP_CORE_CCM_CORRECT_COFF stCorrCoff; + stCorrCoff.u32 = 0; + stCorrCoff.bits.ccm_correct_coff = pstAwbCtl->ccm_correct_coff; +@@ -491,7 +491,7 @@ int Isp_Drv_F2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + stResTime.u32 = 0; + stResTime.bits.awb_color_changeres_time = pstAwbCtl->awb_color_changeres_time; + isp_reg_writel(isp, stResTime.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AWB_RES_TIME); +- ++ + union U_ISP_CORE_AWB_HIST_TH stHistTh; + stHistTh.u32 = 0; + stHistTh.bits.awb_historgram_th = pstAwbCtl->awb_historgram_th; +@@ -530,7 +530,7 @@ int Isp_Drv_F2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + union U_ISP_CORE_AWB_BLUE_MIN_VALUE stBlueMinValue; + stBlueMinValue.u32 = 0; + stBlueMinValue.bits.awb_blue_min_value = pstAwbCtl->awb_blue_min_value; +- isp_reg_writel(isp, stBlueMinValue.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AWB_BLUE_MIN_VALUE); ++ isp_reg_writel(isp, stBlueMinValue.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AWB_BLUE_MIN_VALUE); + + union U_ISP_CORE_AWB_RED_OBJ_VALUE stRedObjValue; + stRedObjValue.u32 = 0; +@@ -547,7 +547,7 @@ int Isp_Drv_F2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + + int Isp_Drv_F2k_Core_GetAwbSts(struct k510_isp_device *isp,ISP_CORE_AWB_STS_S *pAwbSts) + { +- ++ + union U_ISP_CORE_AWB_BLUE_HIST_VALUE gtAwbBHistVal; + gtAwbBHistVal.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_AWB_BLUE_HIST_VALUE); + pAwbSts->awb_blue_hist_value = gtAwbBHistVal.u32; +@@ -611,7 +611,7 @@ int Isp_Drv_F2k_Core_GetAwbSts(struct k510_isp_device *isp,ISP_CORE_AWB_STS_S *p + */ + int Isp_Drv_F2k_Core_SetCscCtl(struct k510_isp_device *isp,ISP_CORE_CSC_CTL_S *pstCscCtl) + { +- ++ + union U_ISP_CORE_CSC_R2Y_00 st00; + st00.u32 = 0; + st00.bits.csc_r2y_00 = pstCscCtl->csc_r2y_00; +@@ -663,7 +663,7 @@ int Isp_Drv_F2k_Core_SetCscCtl(struct k510_isp_device *isp,ISP_CORE_CSC_CTL_S *p + */ + int Isp_Drv_F2k_Core_SetWdrCtl(struct k510_isp_device *isp,ISP_CORE_WDR_CTL_S *pstWdrCtl) + { +- ++ + union U_ISP_CORE_WDR_CTL stWdrCtl; + stWdrCtl.u32 = 0; + stWdrCtl.bits.wdr_fusion_en = pstWdrCtl->wdr_fusion_en; +@@ -705,15 +705,15 @@ int Isp_Drv_F2k_Core_SetWdrCtl(struct k510_isp_device *isp,ISP_CORE_WDR_CTL_S *p + union U_ISP_CORE_WDR_FUSION_VALUE2 stFusionValue2; + stFusionValue2.u32 = 0; + stFusionValue2.bits.wdr_fusion_value2 = pstWdrCtl->wdr_fusion_value2; +- isp_reg_writel(isp,stFusionValue2.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_WDR_FUSION_VALUE2); ++ isp_reg_writel(isp,stFusionValue2.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_WDR_FUSION_VALUE2); + return 0; + } + /* + *ADA + */ + int Isp_Drv_F2k_Core_SetAdaCtl(struct k510_isp_device *isp,ISP_CORE_ADA_CTL_S *pstAdaCtl) +-{ +- ++{ ++ + union U_ISP_CORE_ADA_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.ada_rgb_gamma_en = pstAdaCtl->ada_rgb_gamma_en; +@@ -762,8 +762,8 @@ int Isp_Drv_F2k_Core_SetAdaCtl(struct k510_isp_device *isp,ISP_CORE_ADA_CTL_S *p + *rgbir + */ + int Isp_Drv_F2k_Core_SetRgbIrCtl(struct k510_isp_device *isp,ISP_CORE_RGBIR_CTL_S *pstRgbIrCtl) +-{ +- ++{ ++ + union U_ISP_CORE_RGBIR_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.rgbir_en = pstRgbIrCtl->rgbir_en; +@@ -801,11 +801,11 @@ int Isp_Drv_F2k_Core_SetRgbIrCtl(struct k510_isp_device *isp,ISP_CORE_RGBIR_CTL_ + return 0; + } + /* +-* 2D Noise Reduction ++* 2D Noise Reduction + */ + int Isp_Drv_F2k_Core_Set2DnrCtl(struct k510_isp_device *isp,ISP_CORE_2DNR_CTL_S *pst2DnrCtl) + { +- ++ + union U_ISP_CORE_2DNR_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.core_2dnr_pcf_en = pst2DnrCtl->core_2dnr_pcf_en; +@@ -848,11 +848,11 @@ int Isp_Drv_F2k_Core_Set2DnrCtl(struct k510_isp_device *isp,ISP_CORE_2DNR_CTL_S + return 0; + } + /* +-* 3D Noise Reduction ++* 3D Noise Reduction + */ + int Isp_Drv_F2k_Core_Set3DnrCtl(struct k510_isp_device *isp,ISP_CORE_3DNR_CTL_S *pst3DnrCtl) +-{ +- ++{ ++ + union U_ISP_CORE_3DNR_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.core_3dnr_en = pst3DnrCtl->core_3dnr_en; +@@ -947,7 +947,7 @@ int Isp_Drv_F2k_Core_Set3DnrCtl(struct k510_isp_device *isp,ISP_CORE_3DNR_CTL_S + */ + int Isp_Drv_F2k_Core_SetEnhLtmCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S *pstEnhCtl) + { +- ++ + union U_ISP_CORE_ENH_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_ENH_CTL); + stCtl.bits.enh_ltm_en = pstEnhCtl->enh_ltm_en; +@@ -968,7 +968,7 @@ int Isp_Drv_F2k_Core_SetEnhLtmCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S + + int Isp_Drv_F2k_Core_SetEnhCCCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S *pstEnhCtl) + { +- ++ + + union U_ISP_CORE_ENH_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_ENH_CTL); +@@ -996,7 +996,7 @@ int Isp_Drv_F2k_Core_SetEnhCCCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S + int Isp_Drv_F2k_Core_SetEnhSharpenCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S *pstEnhCtl) + { + +- ++ + union U_ISP_CORE_ENH_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_ENH_CTL); + stCtl.bits.enh_sharp_en = pstEnhCtl->enh_sharp_en; +@@ -1010,12 +1010,12 @@ int Isp_Drv_F2k_Core_SetEnhSharpenCtl(struct k510_isp_device *isp,ISP_CORE_ENH_C + return 0; + } + /* +-* POST Control ++* POST Control + */ + int Isp_Drv_F2k_Core_SetPostContCtl(struct k510_isp_device *isp,ISP_CORE_POST_CTL_S *pstPostCtl) + { + +- ++ + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_POST_CTL); + stCtl.bits.post_cont_ad_en = pstPostCtl->post_cont_ad_en; +@@ -1030,7 +1030,7 @@ int Isp_Drv_F2k_Core_SetPostContCtl(struct k510_isp_device *isp,ISP_CORE_POST_CT + + int Isp_Drv_F2k_Core_SetPostLumaCtl(struct k510_isp_device *isp,ISP_CORE_POST_CTL_S *pstPostCtl) + { +- ++ + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_POST_CTL); + stCtl.bits.post_luma_ad_en = pstPostCtl->post_luma_ad_en; +@@ -1045,7 +1045,7 @@ int Isp_Drv_F2k_Core_SetPostLumaCtl(struct k510_isp_device *isp,ISP_CORE_POST_CT + + int Isp_Drv_F2k_Core_SetPostSatuCtl(struct k510_isp_device *isp,ISP_CORE_POST_CTL_S *pstPostCtl) + { +- ++ + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_POST_CTL); + stCtl.bits.post_satu_ad_en = pstPostCtl->post_satu_ad_en; +@@ -1058,14 +1058,14 @@ int Isp_Drv_F2k_Core_SetPostSatuCtl(struct k510_isp_device *isp,ISP_CORE_POST_CT + return 0; + } + /* +-* OTC ++* OTC + */ + int Isp_Drv_F2k_Core_SetOtcCtl(struct k510_isp_device *isp,ISP_CORE_OTC_CTL_S *pstOtcCtl) + { +- ++ + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_POST_CTL); +- stCtl.bits.post_otc_en = pstOtcCtl->post_otc_en; ++ stCtl.bits.post_otc_en = pstOtcCtl->post_otc_en; + stCtl.bits.otc_yc_sel = pstOtcCtl->otc_yc_sel; + stCtl.bits.otc_uv_format_sel = pstOtcCtl->otc_uv_format_sel; + stCtl.bits.otc_hsync_pol_sel = pstOtcCtl->otc_hsync_pol_sel; +@@ -1098,7 +1098,7 @@ int Isp_Drv_F2k_Core_SetOtcCtl(struct k510_isp_device *isp,ISP_CORE_OTC_CTL_S *p + */ + int Isp_Drv_F2k_Core_SetLdcCtl(struct k510_isp_device *isp,ISP_CORE_LDC_CTL_S *pstLdcCtl) + { +- ++ + union U_ISP_CORE_LDC_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.ldc_en = pstLdcCtl->ldc_en; +@@ -1137,7 +1137,7 @@ int Isp_Drv_F2k_Core_SetLdcCtl(struct k510_isp_device *isp,ISP_CORE_LDC_CTL_S *p + */ + int Isp_Drv_F2k_Core_SetAfCtl(struct k510_isp_device *isp,ISP_CORE_AF_CTL_S *pstAfCtl) + { +- ++ + union U_ISP_CORE_AF_CTL stAfCtl; + stAfCtl.u32 = 0; + stAfCtl.bits.af_stat_en = pstAfCtl->af_stat_en; +@@ -1156,16 +1156,16 @@ int Isp_Drv_F2k_Core_SetAfCtl(struct k510_isp_device *isp,ISP_CORE_AF_CTL_S *pst + + union U_ISP_CORE_AF_STAT_WIN_H_END stAfWinHEnd; + stAfWinHEnd.u32 = 0; +- stAfWinHEnd.bits.af_stat_win_h_end = pstAfCtl->af_stat_win_h_end; ++ stAfWinHEnd.bits.af_stat_win_h_end = pstAfCtl->af_stat_win_h_end; + isp_reg_writel(isp,stAfWinHEnd.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AF_STAT_WIN_H_END); + + union U_ISP_CORE_AF_STAT_WIN_V_END stAfWinVEnd; + stAfWinVEnd.u32 = 0; +- stAfWinVEnd.bits.af_stat_win_v_end = pstAfCtl->af_stat_win_v_end; ++ stAfWinVEnd.bits.af_stat_win_v_end = pstAfCtl->af_stat_win_v_end; + isp_reg_writel(isp,stAfWinVEnd.u32,ISP_IOMEM_F2K_CORE,ISP_CORE_AF_STAT_WIN_V_END); + + return 0; +-} ++} + + int Isp_Drv_F2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgtAfSts) + { +@@ -1180,15 +1180,15 @@ int Isp_Drv_F2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgt + pgtAfSts->af_high_frq_data = gtAfHighFrqData.u32; + + union U_ISP_CORE_AF_STAT_PIXEL_NUM gtAfStatPixelNum; +- gtAfStatPixelNum.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_AF_STAT_PIXEL_NUM); ++ gtAfStatPixelNum.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_AF_STAT_PIXEL_NUM); + pgtAfSts->af_stat_pixel_num = gtAfStatPixelNum.u32; + return 0; + } + + int Isp_Drv_F2k_Core_SetRamWrStatus(struct k510_isp_device *isp,unsigned int data) + { +- +- ++ ++ + isp_reg_writel(isp,data,ISP_IOMEM_F2K_CORE,ISP_CORE_RAM_WR_STATUS); + + return 0; +@@ -1196,9 +1196,33 @@ int Isp_Drv_F2k_Core_SetRamWrStatus(struct k510_isp_device *isp,unsigned int dat + + int Isp_Drv_F2k_Core_GetRamRdStatus(struct k510_isp_device *isp) + { +- +- ++ ++ + int isp_ram_ready = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,ISP_CORE_RAM_RD_STATUS); + + return isp_ram_ready; ++} ++ ++/* ++*F2K Reg Opt ++*/ ++ ++int Isp_Drv_F2k_Core_SetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal) ++{ ++ union U_ISP_CORE_REG_CFG_ADDR stRegAddr; ++ union U_ISP_CORE_REG_CFG_VALUE stRegVal; ++ stRegAddr.u32 = pRegVal->reg_addr; ++ stRegVal.u32 = pRegVal->reg_value; ++ isp_reg_writel(isp,stRegVal.u32,ISP_IOMEM_F2K_CORE,stRegAddr.u32); ++ return 0; ++} ++ ++int Isp_Drv_F2k_Core_GetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal) ++{ ++ union U_ISP_CORE_REG_CFG_ADDR gtRegAddr; ++ union U_ISP_CORE_REG_CFG_VALUE gtRegVal; ++ gtRegAddr.u32 = pRegVal->reg_addr; ++ gtRegVal.u32 = isp_reg_readl(isp,ISP_IOMEM_F2K_CORE,gtRegAddr.u32); ++ pRegVal->reg_value = gtRegVal.u32; ++ return 0; + } +\ No newline at end of file +diff --git a/drivers/media/platform/canaan-isp/isp_2k/core/isp_r2k_core_drv.c b/drivers/media/platform/canaan-isp/isp_2k/core/isp_r2k_core_drv.c +index b98649f5..0d47e3a6 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/core/isp_r2k_core_drv.c ++++ b/drivers/media/platform/canaan-isp/isp_2k/core/isp_r2k_core_drv.c +@@ -8,7 +8,7 @@ + #include "isp_core_drv.h" + #include "isp_core_reg.h" + /* +-* Image Timing Control ++* Image Timing Control + */ + int Isp_Drv_R2k_Core_SetItcCtl(struct k510_isp_device *isp,ISP_CORE_ITC_CTL_S *pstItcCtl) + { +@@ -21,7 +21,7 @@ int Isp_Drv_R2k_Core_SetItcCtl(struct k510_isp_device *isp,ISP_CORE_ITC_CTL_S *p + stData.bits.vsync_input_timing = pstItcCtl->vsync_input_timing; + stData.bits.mirror_ctl = pstItcCtl->mirror_ctl; + stData.bits.video_format_ctl = pstItcCtl->video_format_ctl; +- ++ + isp_reg_writel(isp,stData.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_ITC_CTL); + return 0; + } +@@ -30,7 +30,7 @@ int Isp_Drv_R2k_Core_SetItcCtl(struct k510_isp_device *isp,ISP_CORE_ITC_CTL_S *p + */ + int Isp_Drv_R2k_Core_SetImageAttr(struct k510_isp_device *isp,ISP_CORE_IMAGE_ATTR_S *pstImgAttr) + { +- ++ + union U_ISP_CORE_IMAGE_HEIGHT stHeight; + stHeight.u32 = 0; + stHeight.bits.image_height = pstImgAttr->image_height; +@@ -67,7 +67,7 @@ int Isp_Drv_R2k_Core_SetImageAttr(struct k510_isp_device *isp,ISP_CORE_IMAGE_ATT + */ + int Isp_Drv_R2k_Core_SetTestCtl(struct k510_isp_device *isp,ISP_CORE_TEST_CTL_S *pstTestCtl) + { +- ++ + union U_ISP_CORE_TEST_CTL stData; + stData.u32 = 0; + stData.bits.bayer_mode_sel = pstTestCtl->bayer_mode_sel; +@@ -84,8 +84,8 @@ int Isp_Drv_R2k_Core_SetTestCtl(struct k510_isp_device *isp,ISP_CORE_TEST_CTL_S + *Black Level Correction + */ + int Isp_Drv_R2k_Core_SetBlcCtl(struct k510_isp_device *isp,ISP_CORE_BLC_CTL_S *pstBlcCtl) +-{ +- ++{ ++ + union U_ISP_CORE_BLC_CTL stBlcCtl; + stBlcCtl.u32 = 0; + stBlcCtl.bits.blc_en = pstBlcCtl->blc_en; +@@ -107,7 +107,7 @@ int Isp_Drv_R2k_Core_SetBlcCtl(struct k510_isp_device *isp,ISP_CORE_BLC_CTL_S *p + */ + int Isp_Drv_R2k_Core_SetLscCtl(struct k510_isp_device *isp,ISP_CORE_LSC_CTL_S *pstLscCtl) + { +- ++ + union U_ISP_CORE_LSC_CTL stlscCtl; + stlscCtl.u32 = 0; + stlscCtl.bits.lsc_en = pstLscCtl->lsc_en; +@@ -146,11 +146,11 @@ int Isp_Drv_R2k_Core_SetLscCtl(struct k510_isp_device *isp,ISP_CORE_LSC_CTL_S *p + return 0; + } + /* +-*AUTO Exposure/Gain ++*AUTO Exposure/Gain + */ + int Isp_Drv_R2k_Core_SetAeCtl(struct k510_isp_device *isp,ISP_CORE_AE_CTL_S *pstAeCtl) +-{ +- ++{ ++ + union U_ISP_CORE_AE_CTL stAeCtl; + stAeCtl.u32 = 0; + stAeCtl.bits.ae_as_en = pstAeCtl->ae_as_en; +@@ -264,7 +264,7 @@ int Isp_Drv_R2k_Core_SetAeCtl(struct k510_isp_device *isp,ISP_CORE_AE_CTL_S *pst + stDnWaitTime.u32 = 0; + stDnWaitTime.bits.ae_dn_switch_wait_time = pstAeCtl->ae_dn_switch_wait_time; + isp_reg_writel(isp,stDnWaitTime.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AE_DN_SWITCH_WAIT_TIME); +- ++ + union U_ISP_CORE_APE_DIFF_MAX stApeDiffMax; + stApeDiffMax.u32 = 0; + stApeDiffMax.bits.ape_max_diff = pstAeCtl->ape_max_diff; +@@ -298,13 +298,13 @@ int Isp_Drv_R2k_Core_SetAeCtl(struct k510_isp_device *isp,ISP_CORE_AE_CTL_S *pst + union U_ISP_CORE_APE_DAMP_MANUAL_VALUE stDampManValue; + stDampManValue.u32 = 0; + stDampManValue.bits.ape_damp_manual_value = pstAeCtl->ape_damp_manual_value; +- isp_reg_writel(isp,stDampManValue.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_APE_DAMP_MANUAL_VALUE); ++ isp_reg_writel(isp,stDampManValue.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_APE_DAMP_MANUAL_VALUE); + return 0; + } + /** +- * @brief +- * +- * @return int ++ * @brief ++ * ++ * @return int + */ + int Isp_Drv_R2k_Core_GetAeLongCurEx(struct k510_isp_device *isp) + { +@@ -314,9 +314,9 @@ int Isp_Drv_R2k_Core_GetAeLongCurEx(struct k510_isp_device *isp) + return data; + } + /** +- * @brief +- * +- * @return int ++ * @brief ++ * ++ * @return int + */ + int Isp_Drv_R2k_Core_GetAeCurDigitalGain(struct k510_isp_device *isp) + { +@@ -326,10 +326,10 @@ int Isp_Drv_R2k_Core_GetAeCurDigitalGain(struct k510_isp_device *isp) + return data; + } + /** +- * @brief +- * +- * @param pAeSts +- * @return int ++ * @brief ++ * ++ * @param pAeSts ++ * @return int + */ + int Isp_Drv_R2k_Core_GetAeSts(struct k510_isp_device *isp,ISP_CORE_AE_STS_S *pAeSts) + { +@@ -373,9 +373,9 @@ int Isp_Drv_R2k_Core_GetAeSts(struct k510_isp_device *isp,ISP_CORE_AE_STS_S *pAe + union U_ISP_CORE_AE_PIXEL_SUM gtAePixelSum; + gtAePixelSum.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_AE_PIXEL_SUM); + pAeSts->ae_mid_cur_ex = gtAePixelSum.u32; +- ++ + return 0; +-} ++} + /* + *AWB + */ +@@ -406,7 +406,7 @@ int Isp_Drv_R2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + stD65BlueGain.u32 = 0; + stD65BlueGain.bits.awb_d65_blue_gain = pstAwbCtl->awb_d65_blue_gain; + isp_reg_writel(isp,stD65BlueGain.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AWB_D65_BLUE_GAIN); +- ++ + union U_ISP_CORE_CCM_RR_COFF stRrCoff; + stRrCoff.u32 = 0; + stRrCoff.bits.ccm_rr_coff = pstAwbCtl->ccm_rr_coff; +@@ -451,7 +451,7 @@ int Isp_Drv_R2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + stBbCoff.u32 = 0; + stBbCoff.bits.ccm_bb_coff = pstAwbCtl->ccm_bb_coff; + isp_reg_writel(isp,stBbCoff.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_CCM_BB_COFF); +- ++ + union U_ISP_CORE_CCM_CORRECT_COFF stCorrCoff; + stCorrCoff.u32 = 0; + stCorrCoff.bits.ccm_correct_coff = pstAwbCtl->ccm_correct_coff; +@@ -486,7 +486,7 @@ int Isp_Drv_R2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + stResTime.u32 = 0; + stResTime.bits.awb_color_changeres_time = pstAwbCtl->awb_color_changeres_time; + isp_reg_writel(isp, stResTime.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AWB_RES_TIME); +- ++ + union U_ISP_CORE_AWB_HIST_TH stHistTh; + stHistTh.u32 = 0; + stHistTh.bits.awb_historgram_th = pstAwbCtl->awb_historgram_th; +@@ -525,7 +525,7 @@ int Isp_Drv_R2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + union U_ISP_CORE_AWB_BLUE_MIN_VALUE stBlueMinValue; + stBlueMinValue.u32 = 0; + stBlueMinValue.bits.awb_blue_min_value = pstAwbCtl->awb_blue_min_value; +- isp_reg_writel(isp, stBlueMinValue.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AWB_BLUE_MIN_VALUE); ++ isp_reg_writel(isp, stBlueMinValue.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AWB_BLUE_MIN_VALUE); + + union U_ISP_CORE_AWB_RED_OBJ_VALUE stRedObjValue; + stRedObjValue.u32 = 0; +@@ -542,7 +542,7 @@ int Isp_Drv_R2k_Core_SetAwbCtl(struct k510_isp_device *isp,ISP_CORE_AWB_CTL_S *p + + int Isp_Drv_R2k_Core_GetAwbSts(struct k510_isp_device *isp,ISP_CORE_AWB_STS_S *pAwbSts) + { +- ++ + union U_ISP_CORE_AWB_BLUE_HIST_VALUE gtAwbBHistVal; + gtAwbBHistVal.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_AWB_BLUE_HIST_VALUE); + pAwbSts->awb_blue_hist_value = gtAwbBHistVal.u32; +@@ -657,7 +657,7 @@ int Isp_Drv_R2k_Core_SetCscCtl(struct k510_isp_device *isp,ISP_CORE_CSC_CTL_S *p + *ADA + */ + int Isp_Drv_R2k_Core_SetAdaCtl(struct k510_isp_device *isp,ISP_CORE_ADA_CTL_S *pstAdaCtl) +-{ ++{ + + union U_ISP_CORE_ADA_CTL stCtl; + stCtl.u32 = 0; +@@ -707,8 +707,8 @@ int Isp_Drv_R2k_Core_SetAdaCtl(struct k510_isp_device *isp,ISP_CORE_ADA_CTL_S *p + *rgbir + */ + int Isp_Drv_R2k_Core_SetRgbIrCtl(struct k510_isp_device *isp,ISP_CORE_RGBIR_CTL_S *pstRgbIrCtl) +-{ +- ++{ ++ + union U_ISP_CORE_RGBIR_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.rgbir_en = pstRgbIrCtl->rgbir_en; +@@ -746,11 +746,11 @@ int Isp_Drv_R2k_Core_SetRgbIrCtl(struct k510_isp_device *isp,ISP_CORE_RGBIR_CTL_ + return 0; + } + /* +-* 2D Noise Reduction ++* 2D Noise Reduction + */ + int Isp_Drv_R2k_Core_Set2DnrCtl(struct k510_isp_device *isp,ISP_CORE_2DNR_CTL_S *pst2DnrCtl) + { +- ++ + union U_ISP_CORE_2DNR_CTL stCtl; + stCtl.u32 = 0; + stCtl.bits.core_2dnr_pcf_en = pst2DnrCtl->core_2dnr_pcf_en; +@@ -797,7 +797,7 @@ int Isp_Drv_R2k_Core_Set2DnrCtl(struct k510_isp_device *isp,ISP_CORE_2DNR_CTL_S + */ + int Isp_Drv_R2k_Core_SetEnhLtmCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S *pstEnhCtl) + { +- ++ + union U_ISP_CORE_ENH_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_ENH_CTL); + stCtl.bits.enh_ltm_en = pstEnhCtl->enh_ltm_en; +@@ -818,7 +818,7 @@ int Isp_Drv_R2k_Core_SetEnhLtmCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S + + int Isp_Drv_R2k_Core_SetEnhCCCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S *pstEnhCtl) + { +- ++ + union U_ISP_CORE_ENH_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_ENH_CTL); + stCtl.bits.enh_cc_en = pstEnhCtl->enh_cc_en; +@@ -844,7 +844,7 @@ int Isp_Drv_R2k_Core_SetEnhCCCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S + + int Isp_Drv_R2k_Core_SetEnhSharpenCtl(struct k510_isp_device *isp,ISP_CORE_ENH_CTL_S *pstEnhCtl) + { +- ++ + union U_ISP_CORE_ENH_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_ENH_CTL); + stCtl.bits.enh_sharp_en = pstEnhCtl->enh_sharp_en; +@@ -858,11 +858,11 @@ int Isp_Drv_R2k_Core_SetEnhSharpenCtl(struct k510_isp_device *isp,ISP_CORE_ENH_C + return 0; + } + /* +-* POST Control ++* POST Control + */ + int Isp_Drv_R2k_Core_SetPostContCtl(struct k510_isp_device *isp,ISP_CORE_POST_CTL_S *pstPostCtl) + { +- ++ + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_POST_CTL); + stCtl.bits.post_cont_ad_en = pstPostCtl->post_cont_ad_en; +@@ -877,7 +877,7 @@ int Isp_Drv_R2k_Core_SetPostContCtl(struct k510_isp_device *isp,ISP_CORE_POST_CT + + int Isp_Drv_R2k_Core_SetPostLumaCtl(struct k510_isp_device *isp,ISP_CORE_POST_CTL_S *pstPostCtl) + { +- ++ + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_POST_CTL); + stCtl.bits.post_luma_ad_en = pstPostCtl->post_luma_ad_en; +@@ -905,14 +905,14 @@ int Isp_Drv_R2k_Core_SetPostSatuCtl(struct k510_isp_device *isp,ISP_CORE_POST_CT + return 0; + } + /* +-* OTC ++* OTC + */ + int Isp_Drv_R2k_Core_SetOtcCtl(struct k510_isp_device *isp,ISP_CORE_OTC_CTL_S *pstOtcCtl) + { + + union U_ISP_CORE_POST_CTL stCtl; + stCtl.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_POST_CTL); +- stCtl.bits.post_otc_en = pstOtcCtl->post_otc_en; ++ stCtl.bits.post_otc_en = pstOtcCtl->post_otc_en; + stCtl.bits.otc_yc_sel = pstOtcCtl->otc_yc_sel; + stCtl.bits.otc_uv_format_sel = pstOtcCtl->otc_uv_format_sel; + stCtl.bits.otc_hsync_pol_sel = pstOtcCtl->otc_hsync_pol_sel; +@@ -1003,16 +1003,16 @@ int Isp_Drv_R2k_Core_SetAfCtl(struct k510_isp_device *isp,ISP_CORE_AF_CTL_S *pst + + union U_ISP_CORE_AF_STAT_WIN_H_END stAfWinHEnd; + stAfWinHEnd.u32 = 0; +- stAfWinHEnd.bits.af_stat_win_h_end = pstAfCtl->af_stat_win_h_end; ++ stAfWinHEnd.bits.af_stat_win_h_end = pstAfCtl->af_stat_win_h_end; + isp_reg_writel(isp,stAfWinHEnd.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AF_STAT_WIN_H_END); + + union U_ISP_CORE_AF_STAT_WIN_V_END stAfWinVEnd; + stAfWinVEnd.u32 = 0; +- stAfWinVEnd.bits.af_stat_win_v_end = pstAfCtl->af_stat_win_v_end; ++ stAfWinVEnd.bits.af_stat_win_v_end = pstAfCtl->af_stat_win_v_end; + isp_reg_writel(isp,stAfWinVEnd.u32,ISP_IOMEM_R2K_CORE,ISP_CORE_AF_STAT_WIN_V_END); + + return 0; +-} ++} + + int Isp_Drv_R2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgtAfSts) + { +@@ -1026,7 +1026,7 @@ int Isp_Drv_R2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgt + pgtAfSts->af_high_frq_data = gtAfHighFrqData.u32; + + union U_ISP_CORE_AF_STAT_PIXEL_NUM gtAfStatPixelNum; +- gtAfStatPixelNum.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_AF_STAT_PIXEL_NUM); ++ gtAfStatPixelNum.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_AF_STAT_PIXEL_NUM); + pgtAfSts->af_stat_pixel_num = gtAfStatPixelNum.u32; + return 0; + } +@@ -1034,7 +1034,7 @@ int Isp_Drv_R2k_Core_GetAfSts(struct k510_isp_device *isp,ISP_CORE_AF_STS_S *pgt + int Isp_Drv_R2k_Core_SetRamWrStatus(struct k510_isp_device *isp,unsigned int data) + { + +- ++ + isp_reg_writel(isp,data,ISP_IOMEM_R2K_CORE,ISP_CORE_RAM_WR_STATUS); + + return 0; +@@ -1043,8 +1043,32 @@ int Isp_Drv_R2k_Core_SetRamWrStatus(struct k510_isp_device *isp,unsigned int dat + int Isp_Drv_R2k_Core_GetRamRdStatus(struct k510_isp_device *isp) + { + +- ++ + int isp_ram_ready = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,ISP_CORE_RAM_RD_STATUS); + + return isp_ram_ready; ++} ++ ++/* ++*R2K Reg Opt ++*/ ++ ++int Isp_Drv_R2k_Core_SetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal) ++{ ++ union U_ISP_CORE_REG_CFG_ADDR stRegAddr; ++ union U_ISP_CORE_REG_CFG_VALUE stRegVal; ++ stRegAddr.u32 = pRegVal->reg_addr; ++ stRegVal.u32 = pRegVal->reg_value; ++ isp_reg_writel(isp,stRegVal.u32,ISP_IOMEM_R2K_CORE,stRegAddr.u32); ++ return 0; ++} ++ ++int Isp_Drv_R2k_Core_GetReg(struct k510_isp_device *isp,ISP_CORE_REG_VAL_S *pRegVal) ++{ ++ union U_ISP_CORE_REG_CFG_ADDR gtRegAddr; ++ union U_ISP_CORE_REG_CFG_VALUE gtRegVal; ++ gtRegAddr.u32 = pRegVal->reg_addr; ++ gtRegVal.u32 = isp_reg_readl(isp,ISP_IOMEM_R2K_CORE,gtRegAddr.u32); ++ pRegVal->reg_value = gtRegVal.u32; ++ return 0; + } +\ No newline at end of file +diff --git a/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c b/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c +index f743cc6b..41be41e5 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c ++++ b/drivers/media/platform/canaan-isp/isp_2k/isp_f2k.c +@@ -46,69 +46,69 @@ static unsigned long long get_usec(void) + *****************************************************************************/ + // + void isp_f2k_wrap_SetComRst(struct k510_isp_device *isp) +-{ ++{ + ISP_WRAP_RST_CTL_S stRstCtl; +- stRstCtl.sw_3dnr_rst = 1; ++ stRstCtl.sw_3dnr_rst = 1; + stRstCtl.wdr_2_frame_rst = 1; + stRstCtl.wdr_3_frame_rst =1; +- stRstCtl.ldc_rst = 1; +- stRstCtl.main_out_rst = 1; +- stRstCtl.ds0_out_rst = 1; +- stRstCtl.ds1_out_rst = 1; +- stRstCtl.ds2_out_rst = 1; +- stRstCtl.wrap_com_rst = 1; +- stRstCtl.wrap_cfg_rst = 1; +- stRstCtl.core_com_rst = 1; +- stRstCtl.core_cfg_rst = 1; +- stRstCtl.axi_wr_ch_rst = 1; +- stRstCtl.axi_rd_ch_rst = 1; ++ stRstCtl.ldc_rst = 1; ++ stRstCtl.main_out_rst = 1; ++ stRstCtl.ds0_out_rst = 1; ++ stRstCtl.ds1_out_rst = 1; ++ stRstCtl.ds2_out_rst = 1; ++ stRstCtl.wrap_com_rst = 1; ++ stRstCtl.wrap_cfg_rst = 1; ++ stRstCtl.core_com_rst = 1; ++ stRstCtl.core_cfg_rst = 1; ++ stRstCtl.axi_wr_ch_rst = 1; ++ stRstCtl.axi_rd_ch_rst = 1; + Isp_Drv_F2k_Wrap_SetPipeReset(isp,&stRstCtl); + } + // + void isp_f2k_wrap_SetDmaRst(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_DMA_RST_CTL_S stDmaRstCtl; +- stDmaRstCtl.y_3dnr_wr_ch_rst = 1; +- stDmaRstCtl.uv_3dnr_wr_ch_rst = 1; +- stDmaRstCtl.ldc_y_wr_ch_rst = 1; +- stDmaRstCtl.ldc_uv_wr_ch_rst = 1; +- stDmaRstCtl.wdr_raw_wr_ch_rst = 1; +- stDmaRstCtl.main_out_y_wr_ch_rst = 1; ++ stDmaRstCtl.y_3dnr_wr_ch_rst = 1; ++ stDmaRstCtl.uv_3dnr_wr_ch_rst = 1; ++ stDmaRstCtl.ldc_y_wr_ch_rst = 1; ++ stDmaRstCtl.ldc_uv_wr_ch_rst = 1; ++ stDmaRstCtl.wdr_raw_wr_ch_rst = 1; ++ stDmaRstCtl.main_out_y_wr_ch_rst = 1; + stDmaRstCtl.main_out_uv_wr_ch_rst = 1; +- stDmaRstCtl.y_3dnr_rd_ch_rst = 1; +- stDmaRstCtl.uv_3dnr_rd_ch_rst = 1; +- stDmaRstCtl.ldc_y_rd_ch_rst = 1; +- stDmaRstCtl.ldc_uv_rd_ch_rst = 1; +- stDmaRstCtl.wdr_raw_rd_ch_rst = 1; +- stDmaRstCtl.ds0_out_y_wr_ch_rst = 1; +- stDmaRstCtl.ds0_out_uv_wr_ch_rst = 1; +- stDmaRstCtl.ds1_out_y_wr_ch_rst = 1; +- stDmaRstCtl.ds1_out_uv_wr_ch_rst = 1; +- stDmaRstCtl.ds2_out_r_wr_ch_rst = 1; +- stDmaRstCtl.ds2_out_g_wr_ch_rst = 1; +- stDmaRstCtl.ds2_out_b_wr_ch_rst = 1; +- stDmaRstCtl.ds0_osd0_rd_ch_rst = 1; +- stDmaRstCtl.ds0_osd1_rd_ch_rst = 1; +- stDmaRstCtl.ds1_osd0_rd_ch_rst = 1; +- stDmaRstCtl.ds1_osd1_rd_ch_rst = 1; +- stDmaRstCtl.ds2_osd0_rd_ch_rst = 1; +- stDmaRstCtl.ds2_osd1_rd_ch_rst = 1; +- stDmaRstCtl.ds1_osd2_rd_ch_rst = 1; +- stDmaRstCtl.ds2_osd2_rd_ch_rst = 1; ++ stDmaRstCtl.y_3dnr_rd_ch_rst = 1; ++ stDmaRstCtl.uv_3dnr_rd_ch_rst = 1; ++ stDmaRstCtl.ldc_y_rd_ch_rst = 1; ++ stDmaRstCtl.ldc_uv_rd_ch_rst = 1; ++ stDmaRstCtl.wdr_raw_rd_ch_rst = 1; ++ stDmaRstCtl.ds0_out_y_wr_ch_rst = 1; ++ stDmaRstCtl.ds0_out_uv_wr_ch_rst = 1; ++ stDmaRstCtl.ds1_out_y_wr_ch_rst = 1; ++ stDmaRstCtl.ds1_out_uv_wr_ch_rst = 1; ++ stDmaRstCtl.ds2_out_r_wr_ch_rst = 1; ++ stDmaRstCtl.ds2_out_g_wr_ch_rst = 1; ++ stDmaRstCtl.ds2_out_b_wr_ch_rst = 1; ++ stDmaRstCtl.ds0_osd0_rd_ch_rst = 1; ++ stDmaRstCtl.ds0_osd1_rd_ch_rst = 1; ++ stDmaRstCtl.ds1_osd0_rd_ch_rst = 1; ++ stDmaRstCtl.ds1_osd1_rd_ch_rst = 1; ++ stDmaRstCtl.ds2_osd0_rd_ch_rst = 1; ++ stDmaRstCtl.ds2_osd1_rd_ch_rst = 1; ++ stDmaRstCtl.ds1_osd2_rd_ch_rst = 1; ++ stDmaRstCtl.ds2_osd2_rd_ch_rst = 1; + Isp_Drv_F2k_Wrap_SetDmaReset(isp,&stDmaRstCtl); + } + // + void isp_f2k_wrap_SetPipeClkCtl(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_PIPE_CLK_CTL_S pstPipeClkCtl; + pstPipeClkCtl.wrap_com_clk_en = 1; + pstPipeClkCtl.wrap_cfg_clk_en = 1; + pstPipeClkCtl.core_com_clk_en = 1; + pstPipeClkCtl.core_cfg_clk_en = 1; +- pstPipeClkCtl.axi_wr_ch_en = 1; +- pstPipeClkCtl.axi_rd_ch_en = 1; ++ pstPipeClkCtl.axi_wr_ch_en = 1; ++ pstPipeClkCtl.axi_rd_ch_en = 1; + Isp_Drv_F2k_Wrap_SetComClkCtl(isp,&pstPipeClkCtl); + } + // +@@ -152,7 +152,7 @@ void isp_f2k_wrap_SetWdr(struct k510_isp_device *isp,struct isp_wrap_wdr_info *w + stWdrModeCtl->wdr_long_l2_buf_depth = 0; + stWdrModeCtl->wdr_long_ch_mode = 0; + stWdrModeCtl->wdr_long_l2_buf_en = 0; +- stWdrModeCtl->wdr_short_s1_buf_en = 0; ++ stWdrModeCtl->wdr_short_s1_buf_en = 0; + } + ISP_WRAP_WDR_PIXEL_FORMAT_CTL_S *stWdrPixelFormat = &pstWdrAttr.stWdrPixelFormat; + stWdrPixelFormat->wdr_long_img_format = ISP_RGBRAW_DATA; +@@ -164,13 +164,13 @@ void isp_f2k_wrap_SetWdr(struct k510_isp_device *isp,struct isp_wrap_wdr_info *w + stWdrBuf->wdr_buf_base = 0x0; + stWdrBuf->wdr_buf_size = 0x0; + stWdrBuf->wdr_line_stride = 0x0; +- Isp_Drv_F2k_Wrap_SetWdr(isp,&pstWdrAttr); ++ Isp_Drv_F2k_Wrap_SetWdr(isp,&pstWdrAttr); + } + // + void isp_f2k_wrap_Set3dnr(struct k510_isp_device *isp,struct isp_wrap_3dnr_info *nr3dInfo) + { + ISP_WRAP_3DNR_ATTR_S pst3dnrAttr; +- if( 1 == nr3dInfo->nr3d_en) ++ if( 1 == nr3dInfo->nr3d_en) + { + pst3dnrAttr.clk_3dnr_en = 1; + pst3dnrAttr.pipe_3dnr_dma_en = 1; +@@ -223,7 +223,7 @@ void isp_f2k_wrap_SetLdc(struct k510_isp_device *isp,struct isp_wrap_ldc_info *l + { + pstLdcAttr.ldc_clk_en = 0; + pstLdcAttr.ldc_dma_en = 0; +- } ++ } + ISP_WRAP_LDC_BUF_S *stLdcBuf = &pstLdcAttr.stLdcBuf; + stLdcBuf->ldc_y_buf_base = ldcInfo->ldc_y_buf_base;//ISP_BUF_LDC_Y; + stLdcBuf->ldc_uv_buf_base = ldcInfo->ldc_uv_buf_base;//ISP_BUF_LDC_UV; +@@ -313,9 +313,9 @@ void isp_f2k_wrap_SetDs0Out(struct k510_isp_device *isp,struct isp_wrap_ds0_info + stDs0ClkCtl->ds_out0_osd0_ch_clk_en = 0; + stDs0ClkCtl->ds_out0_osd1_ch_clk_en = 0; + stDs0ClkCtl->ds_out0_osd2_ch_clk_en = 0; +- stDs0DmaEn->ds_out0_dma_en = 0; ++ stDs0DmaEn->ds_out0_dma_en = 0; + stDs0DmaEn->ds_out0_y_ch_dma_en =0; +- stDs0DmaEn->ds_out0_uv_ch_dma_en = 0; ++ stDs0DmaEn->ds_out0_uv_ch_dma_en = 0; + stDs0DmaEn->ds0_osd0_ch_dma_en =0; + stDs0DmaEn->ds0_osd1_ch_dma_en = 0; + stDs0DmaEn->ds0_osd2_ch_dma_en = 0; +@@ -334,7 +334,7 @@ void isp_f2k_wrap_SetDs0Out(struct k510_isp_device *isp,struct isp_wrap_ds0_info + stDs0Buf->ds0_y_buf0_base = ds0Info->ds0_y_buf0_base;//ISP_BUF_DS0_Y; + stDs0Buf->ds0_y_buf1_base = ds0Info->ds0_y_buf1_base;//ISP_BUF_DS0_Y; + stDs0Buf->ds0_y_line_stride = ds0Info->ds0_line_stride;//(Width + 15)/16*16;//ISP_BUF_DS0_Y_STRIDE; +- stDs0Buf->ds0_uv_line_stride = ds0Info->ds0_line_stride;//(Width + 15)/16*16;//ISP_BUF_DS0_UV_STRIDE; ++ stDs0Buf->ds0_uv_line_stride = ds0Info->ds0_line_stride;//(Width + 15)/16*16;//ISP_BUF_DS0_UV_STRIDE; + stDs0Buf->ds0_uv_buf0_base = ds0Info->ds0_uv_buf0_base;//ISP_BUF_DS0_Y + stDs0Buf->ds0_y_line_stride * Height;//ISP_BUF_DS0_UV; + stDs0Buf->ds0_uv_buf1_base = ds0Info->ds0_uv_buf1_base;//ISP_BUF_DS0_Y + stDs0Buf->ds0_y_line_stride * Height;//ISP_BUF_DS0_UV; + Isp_Drv_F2k_Wrap_SetDs0Out(isp,&pstDs0OutAttr); +@@ -351,7 +351,7 @@ void isp_f2k_wrap_SetDs1Out(struct k510_isp_device *isp,struct isp_wrap_ds1_info + stDs1ClkCtl->ds1_out_clk_en = 1; + stDs1ClkCtl->ds1_out_y_ch_clk_en = 1; + stDs1ClkCtl->ds1_out_uv_ch_clk_en = 1; +- ++ + if( 1 == ds1Info->ds1_out_en) { + + stDs1ClkCtl->ds_out1_osd0_ch_clk_en = 0; +@@ -408,7 +408,7 @@ void isp_f2k_wrap_SetDs1Out(struct k510_isp_device *isp,struct isp_wrap_ds1_info + stDs1Buf->ds1_y_buf0_base = ds1Info->ds1_y_buf0_base;//ISP_BUF_DS1_Y; + stDs1Buf->ds1_y_buf1_base = ds1Info->ds1_y_buf1_base;//ISP_BUF_DS1_Y; + stDs1Buf->ds1_y_line_stride = ds1Info->ds1_line_stride;//(Width +15)/16*16;//ISP_BUF_DS1_Y_STRIDE; +- stDs1Buf->ds1_uv_line_stride = ds1Info->ds1_line_stride;//(Width +15)/16*16;//ISP_BUF_DS1_Y_STRIDE; ++ stDs1Buf->ds1_uv_line_stride = ds1Info->ds1_line_stride;//(Width +15)/16*16;//ISP_BUF_DS1_Y_STRIDE; + stDs1Buf->ds1_uv_buf0_base = ds1Info->ds1_uv_buf0_base;//ISP_BUF_DS1_Y + stDs1Buf->ds1_y_line_stride *Height;//ISP_BUF_DS1_UV; + stDs1Buf->ds1_uv_buf1_base = ds1Info->ds1_uv_buf1_base;//ISP_BUF_DS1_Y + stDs1Buf->ds1_y_line_stride *Height;//ISP_BUF_DS1_UV; + Isp_Drv_F2k_Wrap_SetDs1Out(isp,&pstDs1OutAttr); +@@ -465,7 +465,7 @@ void isp_f2k_wrap_SetDs2Out(struct k510_isp_device *isp,struct isp_wrap_ds2_info + } + ISP_WRAP_DS2_PIXEL_FORMAT_CTL_S *stDs2PixelFormat = &pstDs2OutAttr.stDs2PixelFormat; + stDs2PixelFormat->ds2_out_img_format = ds2Info->ds2_out_img_format;//ISP_RGBRAW_DATA; +- stDs2PixelFormat->ds2_out_img_out_format = ds2Info->ds2_out_img_out_format;//OUT_ARGB; ++ stDs2PixelFormat->ds2_out_img_out_format = ds2Info->ds2_out_img_out_format;//OUT_ARGB; + stDs2PixelFormat->ds2_out_pixel_width = ds2Info->ds2_out_pxl_width;//PIXEL_8; + stDs2PixelFormat->ds2_out_yuv422_pxl_order = ds2Info->ds2_out_yuv422_pxl_order;//YUYV; //not need + stDs2PixelFormat->ds2_out_yuv_in_format = ds2Info->ds2_out_yuv_in_format;//IN_YUV422; //not need +@@ -482,12 +482,12 @@ void isp_f2k_wrap_SetDs2Out(struct k510_isp_device *isp,struct isp_wrap_ds2_info + stDs2Buf->ds2_r_line_stride = ds2Info->ds2_line_stride; + stDs2Buf->ds2_g_line_stride = ds2Info->ds2_line_stride; + stDs2Buf->ds2_b_line_stride = ds2Info->ds2_line_stride; +- Isp_Drv_F2k_Wrap_SetDs2Out(isp,&pstDs2OutAttr); ++ Isp_Drv_F2k_Wrap_SetDs2Out(isp,&pstDs2OutAttr); + } + // + void isp_f2k_wrap_SetDmaConfig(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_DMA_ATTR_S pstDmaAttr; + unsigned int DmaChIndex = 0; + ISP_WRAP_DMA_MODE_S *stDmaChMode = &pstDmaAttr.stDmaChMode; +@@ -583,107 +583,107 @@ int isp_f2k_wrap_SetAxiCtl(struct k510_isp_device *isp) + */ + int isp_f2k_wrap_SetIntMask(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_CORE_INT_CTL_S stCoreIntCtl; +- stCoreIntCtl.int_raw_in_mask= 1 ; +- stCoreIntCtl.int_3a_mask= 1 ; +- stCoreIntCtl.raw_int_mask= 1 ; +- stCoreIntCtl.rgb_int_mask= 1 ; +- stCoreIntCtl.yuv_int_mask= 1 ; +- stCoreIntCtl.ldc_int_mask= 1 ; ++ stCoreIntCtl.int_raw_in_mask= 1 ; ++ stCoreIntCtl.int_3a_mask= 1 ; ++ stCoreIntCtl.raw_int_mask= 1 ; ++ stCoreIntCtl.rgb_int_mask= 1 ; ++ stCoreIntCtl.yuv_int_mask= 1 ; ++ stCoreIntCtl.ldc_int_mask= 1 ; + stCoreIntCtl.main_out_int_mask= 1 ; +- stCoreIntCtl.isp_awb_int_mask= 1 ; +- stCoreIntCtl.isp_ae_int_mask= 1 ; +- stCoreIntCtl.isp_af_int_mask= 1 ; ++ stCoreIntCtl.isp_awb_int_mask= 1 ; ++ stCoreIntCtl.isp_ae_int_mask= 1 ; ++ stCoreIntCtl.isp_af_int_mask= 1 ; + Isp_Drv_F2k_Wrap_SetCoreIntCtlMask(isp,&stCoreIntCtl); + + ISP_WRAP_DMA_WR_INT_MASK0_S stDmaWRMask0; +- stDmaWRMask0.wr_3dnr_y_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_y_line_base_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_y_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_y_line_base_int_mask= 1 ; + stDmaWRMask0.wr_3dnr_y_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_y_err_immediate_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_line_base_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_err_immediate_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_line_base_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_err_immediate_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_uv_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_uv_line_base_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_y_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_line_base_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_frm_end_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_line_base_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_uv_frm_end_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_uv_line_base_int_mask= 1 ; + stDmaWRMask0.ldc_wr_uv_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_uv_err_immediate_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_frm_end_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_line_base_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_uv_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_line_base_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_err_immediate_int_mask= 1 ; + stDmaWRMask0.main_out_wr_y_frm_end_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_y_line_base_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_y_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_y_err_immediate_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_uv_frm_end_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_uv_line_base_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_uv_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_y_line_base_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_y_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_y_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_uv_frm_end_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_uv_line_base_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_uv_err_frm_end_int_mask= 1 ; + stDmaWRMask0.main_out_wr_uv_err_immediate_int_mask= 1 ; + Isp_Drv_F2k_Wrap_SetDmaWRIntMask0(isp,&stDmaWRMask0); + ISP_WRAP_DMA_WR_INT_MASK1_S stDmaWRMask1; +- stDmaWRMask1.ds0_out_wr_y_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_y_line_base_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_y_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_y_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_frm_end_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_line_base_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_err_immediate_mask= 1 ; + stDmaWRMask1.ds0_out_wr_uv_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_uv_line_base_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_uv_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_uv_err_immediate_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_line_base_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_uv_line_base_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_uv_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_uv_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_frm_end_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_line_base_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_err_immediate_mask= 1 ; + stDmaWRMask1.ds1_out_wr_uv_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_uv_line_base_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_uv_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_uv_err_immediate_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_line_base_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_err_immediate_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_line_base_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_err_immediate_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_line_base_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_uv_line_base_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_uv_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_uv_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_line_base_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_line_base_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_line_base_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_err_immediate_mask= 1 ; + Isp_Drv_F2k_Wrap_SetDmaWRIntMask1(isp,&stDmaWRMask1); + ISP_WRAP_DMA_RD_INT_MASK0_S stDmaRDMask0; + stDmaRDMask0.rd_3dnr_y_frm_end_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_y_line_base_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_y_err_frm_end_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_y_err_immediate_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_uv_frm_end_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_uv_line_base_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_uv_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_y_line_base_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_y_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_y_err_immediate_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_uv_frm_end_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_uv_line_base_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_uv_err_frm_end_int_mask= 1 ; + stDmaRDMask0.rd_3dnr_uv_err_immediate_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_line_base_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_err_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_err_immediate_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_line_base_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_err_immediate_int_mask= 1 ; + stDmaRDMask0.ldc_rd_uv_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_uv_line_base_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_uv_err_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_uv_err_immediate_int_mask= 1 ; +- stDmaRDMask0.wdr_rd_raw_frm_end_int_mask= 1 ; +- stDmaRDMask0.wdr_rd_raw_line_base_int_mask= 1 ; +- stDmaRDMask0.wdr_rd_raw_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_uv_line_base_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_uv_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_uv_err_immediate_int_mask= 1 ; ++ stDmaRDMask0.wdr_rd_raw_frm_end_int_mask= 1 ; ++ stDmaRDMask0.wdr_rd_raw_line_base_int_mask= 1 ; ++ stDmaRDMask0.wdr_rd_raw_err_frm_end_int_mask= 1 ; + stDmaRDMask0.wdr_rd_raw_err_immediate_int_mask= 1 ; +- Isp_Drv_F2k_Wrap_SetDmaRDIntMask0(isp,&stDmaRDMask0); ++ Isp_Drv_F2k_Wrap_SetDmaRDIntMask0(isp,&stDmaRDMask0); + } + // + int isp_f2k_wrap_SetConfigDone(struct k510_isp_device *isp,unsigned int wp_en) + { +- ++ + ISP_WRAP_CONFIG_DONE_S pstConfigDone; + pstConfigDone.int_polarity = 1; + pstConfigDone.sen_reg_pro_en = wp_en;//0; +@@ -703,7 +703,7 @@ int isp_f2k_wrap_reset(struct k510_isp_device *isp) + { + unsigned int stData; + union U_ISP_WRAP_AXI_CTL axi_ctl; +- ++ + isp_f2k_wrap_SetConfigDone(isp,1); + // + stData = 0; +@@ -712,9 +712,9 @@ int isp_f2k_wrap_reset(struct k510_isp_device *isp) + msleep(50); + + axi_ctl.u32 = 0; +- axi_ctl.bits.axi_wr_ch_rst_req = 1; +- axi_ctl.bits.axi_rd_ch_rst_req = 1; +- isp_reg_writel(isp, axi_ctl.u32, ISP_IOMEM_F2K_WRAP, ISP_WRAP_AXI_CTL); ++ axi_ctl.bits.axi_wr_ch_rst_req = 1; ++ axi_ctl.bits.axi_rd_ch_rst_req = 1; ++ isp_reg_writel(isp, axi_ctl.u32, ISP_IOMEM_F2K_WRAP, ISP_WRAP_AXI_CTL); + axi_ctl.u32 = 0; + axi_ctl = (union U_ISP_WRAP_AXI_CTL)isp_reg_readl(isp, ISP_IOMEM_F2K_WRAP, ISP_WRAP_AXI_CTL); + printk("%s>AXI_CTL = 0x%x\n", __func__, axi_ctl); +@@ -726,10 +726,10 @@ int isp_f2k_wrap_reset(struct k510_isp_device *isp) + } + + isp_f2k_wrap_SetConfigDone(isp,1); +- ++ + stData = 0; + isp_reg_writel(isp,stData,ISP_IOMEM_F2K_WRAP,ISP_WRAP_PIPE_CLK_CTL); +- ++ + // + stData = 0xffffffff; + isp_reg_writel(isp,stData,ISP_IOMEM_F2K_WRAP,ISP_WRAP_SWRST_CTL); +@@ -743,7 +743,7 @@ static int isp_f2k_wrap_config(struct isp_f2k_device *f2k,struct isp_wrap_cfg_in + { + struct k510_isp_device *isp = to_isp_device(f2k); + //struct isp_wrap_cfg_info *isp_wrap_cfg =&isp_cfg->isp_wrap_cfg; +- isp_f2k_wrap_SetConfigDone(isp,1); ++ isp_f2k_wrap_SetConfigDone(isp,1); + // + isp_f2k_wrap_SetComRst(isp); + // +@@ -785,24 +785,24 @@ static int isp_f2k_wrap_config(struct isp_f2k_device *f2k,struct isp_wrap_cfg_in + // + isp_f2k_wrap_SetIntMask(isp); + // +- isp_f2k_wrap_SetConfigDone(isp,0); ++ isp_f2k_wrap_SetConfigDone(isp,0); + +- return 0; ++ return 0; + } + //wrap int + static int isp_f2k_wrap_setIntCore(struct k510_isp_device *isp,struct isp_wrap_intcore_info *intCoreEn) + { + ISP_WRAP_CORE_INT_CTL_S coreIntMask; +- coreIntMask.int_raw_in_mask = ~intCoreEn->int_raw_in_en; +- coreIntMask.int_3a_mask = ~intCoreEn->int_3a_en; +- coreIntMask.raw_int_mask = ~intCoreEn->raw_int_en; +- coreIntMask.rgb_int_mask = ~intCoreEn->rgb_int_en; +- coreIntMask.yuv_int_mask = ~intCoreEn->yuv_int_en; +- coreIntMask.ldc_int_mask = ~intCoreEn->ldc_int_en; ++ coreIntMask.int_raw_in_mask = ~intCoreEn->int_raw_in_en; ++ coreIntMask.int_3a_mask = ~intCoreEn->int_3a_en; ++ coreIntMask.raw_int_mask = ~intCoreEn->raw_int_en; ++ coreIntMask.rgb_int_mask = ~intCoreEn->rgb_int_en; ++ coreIntMask.yuv_int_mask = ~intCoreEn->yuv_int_en; ++ coreIntMask.ldc_int_mask = ~intCoreEn->ldc_int_en; + coreIntMask.main_out_int_mask = ~intCoreEn->main_out_int_en; +- coreIntMask.isp_awb_int_mask = ~intCoreEn->isp_awb_int_en; +- coreIntMask.isp_ae_int_mask = ~intCoreEn->isp_ae_int_en; +- coreIntMask.isp_af_int_mask = ~intCoreEn->isp_af_int_en; ++ coreIntMask.isp_awb_int_mask = ~intCoreEn->isp_awb_int_en; ++ coreIntMask.isp_ae_int_mask = ~intCoreEn->isp_ae_int_en; ++ coreIntMask.isp_af_int_mask = ~intCoreEn->isp_af_int_en; + Isp_Drv_F2k_Wrap_SetCoreIntCtlMask(isp,&coreIntMask); + return 0; + }; +@@ -810,33 +810,33 @@ static int isp_f2k_wrap_setIntCore(struct k510_isp_device *isp,struct isp_wrap_i + static int isp_f2k_wrap_setIntWr0(struct k510_isp_device *isp,struct isp_wrap_intwr0_info *intWr0En) + { + ISP_WRAP_DMA_WR_INT_MASK0_S wrIntMask0; +- wrIntMask0.wr_3dnr_y_frm_end_int_mask = ~intWr0En->wr_3dnr_y_frm_end_int_en; +- wrIntMask0.wr_3dnr_y_line_base_int_mask = 1; ++ wrIntMask0.wr_3dnr_y_frm_end_int_mask = ~intWr0En->wr_3dnr_y_frm_end_int_en; ++ wrIntMask0.wr_3dnr_y_line_base_int_mask = 1; + wrIntMask0.wr_3dnr_y_err_frm_end_int_mask = 1; +- wrIntMask0.wr_3dnr_y_err_immediate_int_mask = 1; +- wrIntMask0.wr_3dnr_uv_frm_end_int_mask = ~intWr0En->wr_3dnr_uv_frm_end_int_en; +- wrIntMask0.wr_3dnr_uv_line_base_int_mask = 1; +- wrIntMask0.wr_3dnr_uv_err_frm_end_int_mask = 1; +- wrIntMask0.wr_3dnr_uv_err_immediate_int_mask = 1; +- wrIntMask0.ldc_wr_y_frm_end_int_mask = ~intWr0En->ldc_wr_y_frm_end_int_en; +- wrIntMask0.ldc_wr_y_line_base_int_mask = 1; +- wrIntMask0.ldc_wr_y_err_frm_end_int_mask = 1; +- wrIntMask0.ldc_wr_y_err_immediate_int_mask = 1; +- wrIntMask0.ldc_wr_uv_frm_end_int_mask = ~intWr0En->ldc_wr_uv_frm_end_int_en; +- wrIntMask0.ldc_wr_uv_line_base_int_mask = 1; ++ wrIntMask0.wr_3dnr_y_err_immediate_int_mask = 1; ++ wrIntMask0.wr_3dnr_uv_frm_end_int_mask = ~intWr0En->wr_3dnr_uv_frm_end_int_en; ++ wrIntMask0.wr_3dnr_uv_line_base_int_mask = 1; ++ wrIntMask0.wr_3dnr_uv_err_frm_end_int_mask = 1; ++ wrIntMask0.wr_3dnr_uv_err_immediate_int_mask = 1; ++ wrIntMask0.ldc_wr_y_frm_end_int_mask = ~intWr0En->ldc_wr_y_frm_end_int_en; ++ wrIntMask0.ldc_wr_y_line_base_int_mask = 1; ++ wrIntMask0.ldc_wr_y_err_frm_end_int_mask = 1; ++ wrIntMask0.ldc_wr_y_err_immediate_int_mask = 1; ++ wrIntMask0.ldc_wr_uv_frm_end_int_mask = ~intWr0En->ldc_wr_uv_frm_end_int_en; ++ wrIntMask0.ldc_wr_uv_line_base_int_mask = 1; + wrIntMask0.ldc_wr_uv_err_frm_end_int_mask = 1; +- wrIntMask0.ldc_wr_uv_err_immediate_int_mask = 1; +- wrIntMask0.wdr_wr_raw_frm_end_int_mask = ~intWr0En->wdr_wr_raw_frm_end_int_en; +- wrIntMask0.wdr_wr_raw_line_base_int_mask = 1; +- wrIntMask0.wdr_wr_raw_err_frm_end_int_mask = 1; +- wrIntMask0.wdr_wr_raw_err_immediate_int_mask = 1; ++ wrIntMask0.ldc_wr_uv_err_immediate_int_mask = 1; ++ wrIntMask0.wdr_wr_raw_frm_end_int_mask = ~intWr0En->wdr_wr_raw_frm_end_int_en; ++ wrIntMask0.wdr_wr_raw_line_base_int_mask = 1; ++ wrIntMask0.wdr_wr_raw_err_frm_end_int_mask = 1; ++ wrIntMask0.wdr_wr_raw_err_immediate_int_mask = 1; + wrIntMask0.main_out_wr_y_frm_end_int_mask = ~intWr0En->main_out_wr_y_frm_end_int_en; +- wrIntMask0.main_out_wr_y_line_base_int_mask = 1; +- wrIntMask0.main_out_wr_y_err_frm_end_int_mask = 1; +- wrIntMask0.main_out_wr_y_err_immediate_int_mask = 1; +- wrIntMask0.main_out_wr_uv_frm_end_int_mask = ~intWr0En->main_out_wr_uv_frm_end_int_en; +- wrIntMask0.main_out_wr_uv_line_base_int_mask = 1; +- wrIntMask0.main_out_wr_uv_err_frm_end_int_mask = 1; ++ wrIntMask0.main_out_wr_y_line_base_int_mask = 1; ++ wrIntMask0.main_out_wr_y_err_frm_end_int_mask = 1; ++ wrIntMask0.main_out_wr_y_err_immediate_int_mask = 1; ++ wrIntMask0.main_out_wr_uv_frm_end_int_mask = ~intWr0En->main_out_wr_uv_frm_end_int_en; ++ wrIntMask0.main_out_wr_uv_line_base_int_mask = 1; ++ wrIntMask0.main_out_wr_uv_err_frm_end_int_mask = 1; + wrIntMask0.main_out_wr_uv_err_immediate_int_mask = 1; + Isp_Drv_F2k_Wrap_SetDmaWRIntMask0(isp,&wrIntMask0); + return 0; +@@ -846,33 +846,33 @@ static int isp_f2k_wrap_setIntWr1(struct k510_isp_device *isp,struct isp_wrap_in + { + ISP_WRAP_DMA_WR_INT_MASK1_S wrIntMask1; + wrIntMask1.ds0_out_wr_y_frm_end_mask = ~intWr1En->ds0_out_wr_y_frm_end_en; +- wrIntMask1.ds0_out_wr_y_line_base_mask = 1; +- wrIntMask1.ds0_out_wr_y_err_frm_end_mask = 1; +- wrIntMask1.ds0_out_wr_y_err_immediate_mask = 1; +- wrIntMask1.ds0_out_wr_uv_frm_end_mask = ~intWr1En->ds0_out_wr_uv_frm_end_en; +- wrIntMask1.ds0_out_wr_uv_line_base_mask = 1; +- wrIntMask1.ds0_out_wr_uv_err_frm_end_mask = 1; ++ wrIntMask1.ds0_out_wr_y_line_base_mask = 1; ++ wrIntMask1.ds0_out_wr_y_err_frm_end_mask = 1; ++ wrIntMask1.ds0_out_wr_y_err_immediate_mask = 1; ++ wrIntMask1.ds0_out_wr_uv_frm_end_mask = ~intWr1En->ds0_out_wr_uv_frm_end_en; ++ wrIntMask1.ds0_out_wr_uv_line_base_mask = 1; ++ wrIntMask1.ds0_out_wr_uv_err_frm_end_mask = 1; + wrIntMask1.ds0_out_wr_uv_err_immediate_mask = 1; + wrIntMask1.ds1_out_wr_y_frm_end_mask = ~intWr1En->ds1_out_wr_y_frm_end_en; +- wrIntMask1.ds1_out_wr_y_line_base_mask = 1; +- wrIntMask1.ds1_out_wr_y_err_frm_end_mask = 1; +- wrIntMask1.ds1_out_wr_y_err_immediate_mask = 1; +- wrIntMask1.ds1_out_wr_uv_frm_end_mask = ~intWr1En->ds1_out_wr_uv_frm_end_en; +- wrIntMask1.ds1_out_wr_uv_line_base_mask = 1; +- wrIntMask1.ds1_out_wr_uv_err_frm_end_mask = 1; ++ wrIntMask1.ds1_out_wr_y_line_base_mask = 1; ++ wrIntMask1.ds1_out_wr_y_err_frm_end_mask = 1; ++ wrIntMask1.ds1_out_wr_y_err_immediate_mask = 1; ++ wrIntMask1.ds1_out_wr_uv_frm_end_mask = ~intWr1En->ds1_out_wr_uv_frm_end_en; ++ wrIntMask1.ds1_out_wr_uv_line_base_mask = 1; ++ wrIntMask1.ds1_out_wr_uv_err_frm_end_mask = 1; + wrIntMask1.ds1_out_wr_uv_err_immediate_mask = 1; + wrIntMask1.ds2_out_wr_r_frm_end_mask = ~intWr1En->ds2_out_wr_r_frm_end_en; +- wrIntMask1.ds2_out_wr_r_line_base_mask = 1; +- wrIntMask1.ds2_out_wr_r_err_frm_end_mask = 1; +- wrIntMask1.ds2_out_wr_r_err_immediate_mask = 1; ++ wrIntMask1.ds2_out_wr_r_line_base_mask = 1; ++ wrIntMask1.ds2_out_wr_r_err_frm_end_mask = 1; ++ wrIntMask1.ds2_out_wr_r_err_immediate_mask = 1; + wrIntMask1.ds2_out_wr_g_frm_end_mask = ~intWr1En->ds2_out_wr_g_frm_end_en; +- wrIntMask1.ds2_out_wr_g_line_base_mask = 1; +- wrIntMask1.ds2_out_wr_g_err_frm_end_mask = 1; +- wrIntMask1.ds2_out_wr_g_err_immediate_mask = 1; +- wrIntMask1.ds2_out_wr_b_frm_end_mask = ~intWr1En->ds2_out_wr_b_frm_end_en; +- wrIntMask1.ds2_out_wr_b_line_base_mask = 1; +- wrIntMask1.ds2_out_wr_b_err_frm_end_mask = 1; +- wrIntMask1.ds2_out_wr_b_err_immediate_mask = 1; ++ wrIntMask1.ds2_out_wr_g_line_base_mask = 1; ++ wrIntMask1.ds2_out_wr_g_err_frm_end_mask = 1; ++ wrIntMask1.ds2_out_wr_g_err_immediate_mask = 1; ++ wrIntMask1.ds2_out_wr_b_frm_end_mask = ~intWr1En->ds2_out_wr_b_frm_end_en; ++ wrIntMask1.ds2_out_wr_b_line_base_mask = 1; ++ wrIntMask1.ds2_out_wr_b_err_frm_end_mask = 1; ++ wrIntMask1.ds2_out_wr_b_err_immediate_mask = 1; + Isp_Drv_F2k_Wrap_SetDmaWRIntMask1(isp,&wrIntMask1); + return 0; + } +@@ -881,64 +881,64 @@ static int isp_f2k_wrap_setIntRd0(struct k510_isp_device *isp,struct isp_wrap_in + { + ISP_WRAP_DMA_RD_INT_MASK0_S rdIntMask0; + rdIntMask0.rd_3dnr_y_frm_end_int_mask = ~intRd0En->rd_3dnr_y_frm_end_int_en; +- rdIntMask0.rd_3dnr_y_line_base_int_mask = 1; +- rdIntMask0.rd_3dnr_y_err_frm_end_int_mask = 1; +- rdIntMask0.rd_3dnr_y_err_immediate_int_mask = 1; +- rdIntMask0.rd_3dnr_uv_frm_end_int_mask = ~intRd0En->rd_3dnr_uv_frm_end_int_en; +- rdIntMask0.rd_3dnr_uv_line_base_int_mask = 1; +- rdIntMask0.rd_3dnr_uv_err_frm_end_int_mask = 1; ++ rdIntMask0.rd_3dnr_y_line_base_int_mask = 1; ++ rdIntMask0.rd_3dnr_y_err_frm_end_int_mask = 1; ++ rdIntMask0.rd_3dnr_y_err_immediate_int_mask = 1; ++ rdIntMask0.rd_3dnr_uv_frm_end_int_mask = ~intRd0En->rd_3dnr_uv_frm_end_int_en; ++ rdIntMask0.rd_3dnr_uv_line_base_int_mask = 1; ++ rdIntMask0.rd_3dnr_uv_err_frm_end_int_mask = 1; + rdIntMask0.rd_3dnr_uv_err_immediate_int_mask = 1; +- rdIntMask0.ldc_rd_y_frm_end_int_mask = ~intRd0En->ldc_rd_y_frm_end_int_en; +- rdIntMask0.ldc_rd_y_line_base_int_mask = 1; +- rdIntMask0.ldc_rd_y_err_frm_end_int_mask = 1; +- rdIntMask0.ldc_rd_y_err_immediate_int_mask = 1; ++ rdIntMask0.ldc_rd_y_frm_end_int_mask = ~intRd0En->ldc_rd_y_frm_end_int_en; ++ rdIntMask0.ldc_rd_y_line_base_int_mask = 1; ++ rdIntMask0.ldc_rd_y_err_frm_end_int_mask = 1; ++ rdIntMask0.ldc_rd_y_err_immediate_int_mask = 1; + rdIntMask0.ldc_rd_uv_frm_end_int_mask = ~intRd0En->ldc_rd_uv_frm_end_int_en; +- rdIntMask0.ldc_rd_uv_line_base_int_mask = 1; +- rdIntMask0.ldc_rd_uv_err_frm_end_int_mask = 1; +- rdIntMask0.ldc_rd_uv_err_immediate_int_mask = 1; +- rdIntMask0.wdr_rd_raw_frm_end_int_mask = ~intRd0En->wdr_rd_raw_frm_end_int_en; +- rdIntMask0.wdr_rd_raw_line_base_int_mask = 1; +- rdIntMask0.wdr_rd_raw_err_frm_end_int_mask = 1; ++ rdIntMask0.ldc_rd_uv_line_base_int_mask = 1; ++ rdIntMask0.ldc_rd_uv_err_frm_end_int_mask = 1; ++ rdIntMask0.ldc_rd_uv_err_immediate_int_mask = 1; ++ rdIntMask0.wdr_rd_raw_frm_end_int_mask = ~intRd0En->wdr_rd_raw_frm_end_int_en; ++ rdIntMask0.wdr_rd_raw_line_base_int_mask = 1; ++ rdIntMask0.wdr_rd_raw_err_frm_end_int_mask = 1; + rdIntMask0.wdr_rd_raw_err_immediate_int_mask = 1; + Isp_Drv_F2k_Wrap_SetDmaRDIntMask0(isp,&rdIntMask0); + return 0; + } + +-void k510isp_f2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq_info) ++void k510isp_f2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq_info) + { + dev_dbg(isp->dev,"%s:start\n",__func__); + struct isp_wrap_intcore_info intCoreEn; + intCoreEn.int_raw_in_en = irq_info->raw_en; + if((1 ==irq_info->awb_en)||(1 ==irq_info->ae_en)||(1 ==irq_info->af_en)) + { +- intCoreEn.int_3a_en = 1; ++ intCoreEn.int_3a_en = 1; + } +- else +- intCoreEn.int_3a_en = 0; +- intCoreEn.raw_int_en = irq_info->raw_en; +- intCoreEn.rgb_int_en = irq_info->rgb_en; +- intCoreEn.yuv_int_en = irq_info->yuv_en; +- intCoreEn.ldc_int_en = irq_info->ldc_core_en; ++ else ++ intCoreEn.int_3a_en = 0; ++ intCoreEn.raw_int_en = irq_info->raw_en; ++ intCoreEn.rgb_int_en = irq_info->rgb_en; ++ intCoreEn.yuv_int_en = irq_info->yuv_en; ++ intCoreEn.ldc_int_en = irq_info->ldc_core_en; + intCoreEn.main_out_int_en = irq_info->main_core_en; + + #if 0 +- intCoreEn.isp_awb_int_en = irq_info->awb_en; +- intCoreEn.isp_ae_int_en = irq_info->ae_en; +- intCoreEn.isp_af_int_en = irq_info->af_en; ++ intCoreEn.isp_awb_int_en = irq_info->awb_en; ++ intCoreEn.isp_ae_int_en = irq_info->ae_en; ++ intCoreEn.isp_af_int_en = irq_info->af_en; + #else +- intCoreEn.isp_awb_int_en = 0; +- intCoreEn.isp_ae_int_en = 0; +- intCoreEn.isp_af_int_en = 0; ++ intCoreEn.isp_awb_int_en = 0; ++ intCoreEn.isp_ae_int_en = 0; ++ intCoreEn.isp_af_int_en = 0; + #endif + isp_f2k_wrap_setIntCore(isp,&intCoreEn); + + struct isp_wrap_intwr0_info intWr0En; +- intWr0En.wr_3dnr_y_frm_end_int_en = irq_info->nr3d_w_en; ++ intWr0En.wr_3dnr_y_frm_end_int_en = irq_info->nr3d_w_en; + intWr0En.wr_3dnr_uv_frm_end_int_en = irq_info->nr3d_w_en; + intWr0En.ldc_wr_y_frm_end_int_en = irq_info->ldc_w_en; + intWr0En.ldc_wr_uv_frm_end_int_en = irq_info->ldc_w_en; + intWr0En.wdr_wr_raw_frm_end_int_en = irq_info->wdr_w_en; +- intWr0En.main_out_wr_y_frm_end_int_en = irq_info->main_dma_en; ++ intWr0En.main_out_wr_y_frm_end_int_en = irq_info->main_dma_en; + intWr0En.main_out_wr_uv_frm_end_int_en = irq_info->main_dma_en; + isp_f2k_wrap_setIntWr0(isp,&intWr0En); + +@@ -955,7 +955,7 @@ void k510isp_f2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq + struct isp_wrap_intrd0_info intRd0En; + intRd0En.rd_3dnr_y_frm_end_int_en = irq_info->nr3d_r_en; + intRd0En.rd_3dnr_uv_frm_end_int_en = irq_info->nr3d_r_en; +- intRd0En.ldc_rd_y_frm_end_int_en = irq_info->ldc_r_en; ++ intRd0En.ldc_rd_y_frm_end_int_en = irq_info->ldc_r_en; + intRd0En.ldc_rd_uv_frm_end_int_en = irq_info->ldc_r_en; + intRd0En.wdr_rd_raw_frm_end_int_en = irq_info->wdr_r_en; + isp_f2k_wrap_setIntRd0(isp,&intRd0En); +@@ -967,12 +967,12 @@ void k510isp_f2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq + static int isp_f2k_core_SetItc(struct k510_isp_device *isp,ITC_INFO_S *itcInfo) + { + ISP_CORE_ITC_CTL_S stItcCtl; +- stItcCtl.hsync_pol = itcInfo->hsync_pol; +- stItcCtl.vsync_pol = itcInfo->vsync_pol; +- stItcCtl.hsync_input_timing = itcInfo->hsync_input_timing; ++ stItcCtl.hsync_pol = itcInfo->hsync_pol; ++ stItcCtl.vsync_pol = itcInfo->vsync_pol; ++ stItcCtl.hsync_input_timing = itcInfo->hsync_input_timing; + stItcCtl.vsync_input_timing = itcInfo->vsync_input_timing; +- stItcCtl.mirror_ctl = itcInfo->flip_ctl; +- stItcCtl.video_format_ctl = itcInfo->video_fmt_sel; ++ stItcCtl.mirror_ctl = itcInfo->flip_ctl; ++ stItcCtl.video_format_ctl = itcInfo->video_fmt_sel; + Isp_Drv_F2k_Core_SetItcCtl(isp,&stItcCtl); + return 0; + } +@@ -982,10 +982,10 @@ static int isp_f2k_core_SetImage(struct k510_isp_device *isp,ITC_INFO_S *itcInfo + + ISP_CORE_IMAGE_ATTR_S stImgAttr; + stImgAttr.image_height = itcInfo->total_size.Height - 1; +- stImgAttr.image_width = itcInfo->total_size.Width - 1; +- stImgAttr.image_v_start = itcInfo->itc_size.Height_st; +- stImgAttr.image_h_start = itcInfo->itc_size.Width_st; +- stImgAttr.image_active_width = itcInfo->itc_size.Width; ++ stImgAttr.image_width = itcInfo->total_size.Width - 1; ++ stImgAttr.image_v_start = itcInfo->itc_size.Height_st; ++ stImgAttr.image_h_start = itcInfo->itc_size.Width_st; ++ stImgAttr.image_active_width = itcInfo->itc_size.Width; + stImgAttr.image_active_height = itcInfo->itc_size.Height; + Isp_Drv_F2k_Core_SetImageAttr(isp,&stImgAttr); + return 0; +@@ -1000,7 +1000,7 @@ static int isp_f2k_core_SetTpgCtl(struct k510_isp_device *isp,TPG_INFO_S *tpgInf + stTestCtl.test_pattern_sel = tpgInfo->tpg_sel; + stTestCtl.wdr_l_mul_data = tpgInfo->wdr_l_mul_data; + stTestCtl.wdr_m_mul_data = tpgInfo->wdr_m_mul_data; +- stTestCtl.wdr_s_mul_data = tpgInfo->wdr_s_mul_data; ++ stTestCtl.wdr_s_mul_data = tpgInfo->wdr_s_mul_data; + Isp_Drv_F2k_Core_SetTestCtl(isp,&stTestCtl); + return 0; + } +@@ -1020,13 +1020,13 @@ static int isp_f2k_core_SetLscCtl(struct k510_isp_device *isp,LSC_INFO_S *lscInf + { + + ISP_CORE_LSC_CTL_S stLscCtl; +- stLscCtl.lsc_en = lscInfo->lsc_en; +- stLscCtl.lsc_h_center = lscInfo->lsc_h_center; ++ stLscCtl.lsc_en = lscInfo->lsc_en; ++ stLscCtl.lsc_h_center = lscInfo->lsc_h_center; + stLscCtl.lsc_v_center = lscInfo->lsc_v_center; + stLscCtl.lsc_red_ratio = lscInfo->lsc_r_ratio; +- stLscCtl.lsc_green_ratio = lscInfo->lsc_g_ratio; +- stLscCtl.lsc_blue_ratio = lscInfo->lsc_b_ratio; +- stLscCtl.lsc_ir_ratio = lscInfo->lsc_ir_ratio; ++ stLscCtl.lsc_green_ratio = lscInfo->lsc_g_ratio; ++ stLscCtl.lsc_blue_ratio = lscInfo->lsc_b_ratio; ++ stLscCtl.lsc_ir_ratio = lscInfo->lsc_ir_ratio; + Isp_Drv_F2k_Core_SetLscCtl(isp,&stLscCtl); + return 0; + } +@@ -1035,42 +1035,42 @@ static int isp_f2k_core_SetAeCtl(struct k510_isp_device *isp,AE_INFO_S *aeInfo) + { + + ISP_CORE_AE_CTL_S stAeCtl; +- stAeCtl.ae_as_en = aeInfo->ae_as_en; +- stAeCtl.ae_ag_en = aeInfo->ae_ag_en; +- stAeCtl.ae_airis_en = aeInfo->ae_airis_en; ++ stAeCtl.ae_as_en = aeInfo->ae_as_en; ++ stAeCtl.ae_ag_en = aeInfo->ae_ag_en; ++ stAeCtl.ae_airis_en = aeInfo->ae_airis_en; + stAeCtl.ae_enter_ls_sel = aeInfo->ae_enter_ls_sel; +- stAeCtl.ae_exit_ls_sel = aeInfo->ae_exit_ls_sel; ++ stAeCtl.ae_exit_ls_sel = aeInfo->ae_exit_ls_sel; + stAeCtl.ae_win_mode_sel = aeInfo->ae_win_mode_sel; + stAeCtl.ae_back_light_mode_sel = aeInfo->ae_back_light_mode_sel; +- stAeCtl.ae_day_change_en = aeInfo->ae_day_change_en; +- stAeCtl.ae_day_change_sel = aeInfo->ae_day_change_sel; ++ stAeCtl.ae_day_change_en = aeInfo->ae_day_change_en; ++ stAeCtl.ae_day_change_sel = aeInfo->ae_day_change_sel; + stAeCtl.ae_win_h_start = aeInfo->ae_win_size.h_start; + stAeCtl.ae_win_v_start = aeInfo->ae_win_size.v_start; +- stAeCtl.ae_win_h_end = aeInfo->ae_win_size.h_end; +- stAeCtl.ae_win_v_end = aeInfo->ae_win_size.v_end; +- stAeCtl.ae_tar_bright = aeInfo->ae_tar_bright; ++ stAeCtl.ae_win_h_end = aeInfo->ae_win_size.h_end; ++ stAeCtl.ae_win_v_end = aeInfo->ae_win_size.v_end; ++ stAeCtl.ae_tar_bright = aeInfo->ae_tar_bright; + stAeCtl.ae_tar_bright_range = aeInfo->ae_tar_bright_range; + stAeCtl.ae_l_ex_time = aeInfo->ae_l_ex_time; + stAeCtl.ae_m_ex_time = aeInfo->ae_m_ex_time; + stAeCtl.ae_s_ex_time = aeInfo->ae_s_ex_time; +- stAeCtl.ae_agc = aeInfo->ae_agc; ++ stAeCtl.ae_agc = aeInfo->ae_agc; + stAeCtl.ae_ad_shuttle_freq = aeInfo->ae_ad_shuttle_freq; + stAeCtl.ae_ad_gain_freq = aeInfo->ae_ad_gain_freq; + stAeCtl.ae_adjust_step_max = aeInfo->ae_adjust_step_max; +- stAeCtl.ae_ex_value_max = aeInfo->ae_ex_value_max; +- stAeCtl.ae_ex_value_mid = aeInfo->ae_ex_value_mid; +- stAeCtl.ae_ex_value_min = aeInfo->ae_ex_value_min; +- stAeCtl.ae_gain_value_max = aeInfo->ae_gain_value_max; ++ stAeCtl.ae_ex_value_max = aeInfo->ae_ex_value_max; ++ stAeCtl.ae_ex_value_mid = aeInfo->ae_ex_value_mid; ++ stAeCtl.ae_ex_value_min = aeInfo->ae_ex_value_min; ++ stAeCtl.ae_gain_value_max = aeInfo->ae_gain_value_max; + stAeCtl.ae_gain_value_mid = aeInfo->ae_gain_value_mid; + stAeCtl.ae_gain_value_min = aeInfo->ae_gain_value_min; + stAeCtl.ae_dn_switch_ad_step_max = aeInfo->ae_dn_switch_ad_step_max; + stAeCtl.ae_dn_switch_wait_time = aeInfo->ae_dn_switch_wait_time; + stAeCtl.ape_max_diff = aeInfo->ape_max_diff; +- stAeCtl.ape_drv_signal_max = aeInfo->ape_drv_signal_max; +- stAeCtl.ape_coeff_distance = aeInfo->ape_coeff_distance; ++ stAeCtl.ape_drv_signal_max = aeInfo->ape_drv_signal_max; ++ stAeCtl.ape_coeff_distance = aeInfo->ape_coeff_distance; + stAeCtl.ape_coeff_speed = aeInfo->ape_coeff_speed; + stAeCtl.ape_coeff_acceleration = aeInfo->ape_coeff_acceleration; +- stAeCtl.ape_drv_manual_value = aeInfo->ape_drv_manual_value; ++ stAeCtl.ape_drv_manual_value = aeInfo->ape_drv_manual_value; + stAeCtl.ape_damp_manual_value = aeInfo->ape_damp_manual_value; + Isp_Drv_F2k_Core_SetAeCtl(isp,&stAeCtl); + return 0; +@@ -1096,16 +1096,16 @@ static int isp_f2k_core_GetAeSts(struct k510_isp_device *isp,struct k510isp_ae_s + static int isp_f2k_core_SetAwbCtl(struct k510_isp_device *isp,AWB_INFO_S *awbInfo) + { + ISP_CORE_AWB_CTL_S stAwbCtl; +- stAwbCtl.awb_d65_en = awbInfo->awb_d65_en; +- stAwbCtl.awb_ccm_en = awbInfo->awb_ccm_en; +- stAwbCtl.awb_en = awbInfo->awb_en; ++ stAwbCtl.awb_d65_en = awbInfo->awb_d65_en; ++ stAwbCtl.awb_ccm_en = awbInfo->awb_ccm_en; ++ stAwbCtl.awb_en = awbInfo->awb_en; + stAwbCtl.awb_mode_sel = awbInfo->awb_mode_sel; + stAwbCtl.awb_hist_mode_sel = awbInfo->awb_hist_mode_sel; +- stAwbCtl.awb_veri_en = awbInfo->awb_veri_en; +- stAwbCtl.awb_mode_sel = awbInfo->awb_mode_sel; ++ stAwbCtl.awb_veri_en = awbInfo->awb_veri_en; ++ stAwbCtl.awb_mode_sel = awbInfo->awb_mode_sel; + stAwbCtl.awb_value_save_en = awbInfo->awb_value_save_en; + stAwbCtl.awb_ccm_adp_adjust_en = awbInfo->awb_ccm_adp_adjust_en; +- stAwbCtl.awb_stab_en = awbInfo->awb_stab_en; ++ stAwbCtl.awb_stab_en = awbInfo->awb_stab_en; + stAwbCtl.awb_d65_red_gain = awbInfo->awb_d65_red_gain; + stAwbCtl.awb_d65_blue_gain = awbInfo->awb_d65_blue_gain; + stAwbCtl.ccm_rr_coff = awbInfo->ccm_coff[0][0]; +@@ -1120,16 +1120,16 @@ static int isp_f2k_core_SetAwbCtl(struct k510_isp_device *isp,AWB_INFO_S *awbInf + stAwbCtl.ccm_correct_coff = awbInfo->ccm_correct_coff; + stAwbCtl.awb_win_h_start = awbInfo->awb_win_size.h_start; + stAwbCtl.awb_win_v_start = awbInfo->awb_win_size.v_start; +- stAwbCtl.awb_win_h_end = awbInfo->awb_win_size.h_end; +- stAwbCtl.awb_win_v_end = awbInfo->awb_win_size.v_end; +- stAwbCtl.awb_correct_diff_th = awbInfo->awb_correct_diff_th; ++ stAwbCtl.awb_win_h_end = awbInfo->awb_win_size.h_end; ++ stAwbCtl.awb_win_v_end = awbInfo->awb_win_size.v_end; ++ stAwbCtl.awb_correct_diff_th = awbInfo->awb_correct_diff_th; + stAwbCtl.awb_color_changeres_time = awbInfo->awb_color_changeres_time; + stAwbCtl.awb_historgram_th = awbInfo->awb_historgram_th; +- stAwbCtl.awb_red_gain_adjust = awbInfo->awb_red_gain_adjust; +- stAwbCtl.awb_green_gain_adjust = awbInfo->awb_green_gain_adjust; ++ stAwbCtl.awb_red_gain_adjust = awbInfo->awb_red_gain_adjust; ++ stAwbCtl.awb_green_gain_adjust = awbInfo->awb_green_gain_adjust; + stAwbCtl.awb_blue_gain_adjust = awbInfo->awb_blue_gain_adjust; + stAwbCtl.awb_red_max_value = awbInfo->awb_red_max_value; +- stAwbCtl.awb_blue_max_value = awbInfo->awb_blue_max_value; ++ stAwbCtl.awb_blue_max_value = awbInfo->awb_blue_max_value; + stAwbCtl.awb_red_min_value = awbInfo->awb_red_min_value; + stAwbCtl.awb_blue_min_value = awbInfo->awb_blue_min_value; + stAwbCtl.awb_red_obj_value = awbInfo->awb_red_obj_value; +@@ -1137,29 +1137,50 @@ static int isp_f2k_core_SetAwbCtl(struct k510_isp_device *isp,AWB_INFO_S *awbInf + Isp_Drv_F2k_Core_SetAwbCtl(isp,&stAwbCtl); + return 0; + } ++ ++// reg opt ++ ++static int isp_f2k_core_RegSet(struct k510_isp_device *isp,struct k510isp_reg_val *reg_val) ++{ ++ ISP_CORE_REG_VAL_S stRegVal; ++ stRegVal.reg_addr = reg_val->reg_addr; ++ stRegVal.reg_value = reg_val->reg_value; ++ Isp_Drv_F2k_Core_SetReg(isp,&stRegVal); ++ return 0; ++} ++ ++static int isp_f2k_core_RegGet(struct k510_isp_device *isp,struct k510isp_reg_val *reg_val) ++{ ++ ISP_CORE_REG_VAL_S gtRegVal; ++ gtRegVal.reg_addr = reg_val->reg_addr; ++ Isp_Drv_F2k_Core_GetReg(isp,>RegVal); ++ reg_val->reg_value = gtRegVal.reg_value; ++ return 0; ++} ++ + //WDR + static int isp_f2k_core_SetWdrCtl(struct k510_isp_device *isp,struct isp_core_wdr_Info *wdrInfo) + { + + ISP_CORE_WDR_CTL_S stWdrCtl; +- stWdrCtl.wdr_fusion_en = wdrInfo->wdr_fusion_en; +- stWdrCtl.wdr_frame_sel = wdrInfo->wdr_frame_sel; +- stWdrCtl.wdr_adp_adjust_en = wdrInfo->wdr_adp_adjust_en; ++ stWdrCtl.wdr_fusion_en = wdrInfo->wdr_fusion_en; ++ stWdrCtl.wdr_frame_sel = wdrInfo->wdr_frame_sel; ++ stWdrCtl.wdr_adp_adjust_en = wdrInfo->wdr_adp_adjust_en; + stWdrCtl.wdr_stab_en = wdrInfo->wdr_stab_en; +- stWdrCtl.wdr_en = wdrInfo->wdr_en; +- stWdrCtl.wdr_ghost_remove_en = wdrInfo->wdr_ghost_remove_en; ++ stWdrCtl.wdr_en = wdrInfo->wdr_en; ++ stWdrCtl.wdr_ghost_remove_en = wdrInfo->wdr_ghost_remove_en; + stWdrCtl.wdr_3frame_out_mode = wdrInfo->wdr_3frame_out_mode; + stWdrCtl.wdr_mode_sel = wdrInfo->wdr_mode_sel; + stWdrCtl.wdr_2frame_ex_ratio = wdrInfo->wdr_2frame_ex_ratio; +- stWdrCtl.wdr_3frame_ex_ratio = wdrInfo->wdr_3frame_ex_ratio; +- stWdrCtl.wdr_stat_img_sel = wdrInfo->wdr_stat_img_sel; ++ stWdrCtl.wdr_3frame_ex_ratio = wdrInfo->wdr_3frame_ex_ratio; ++ stWdrCtl.wdr_stat_img_sel = wdrInfo->wdr_stat_img_sel; + stWdrCtl.wdr_ltm_data_sel = wdrInfo->wdr_ltm_data_sel; + stWdrCtl.wdr_tz_data_sel = wdrInfo->wdr_tz_data_sel; + stWdrCtl.wdr_remove_purple_en = wdrInfo->wdr_remove_purple_en; + stWdrCtl.wdr_over_ex_ratio_th1 = wdrInfo->wdr_over_ex_ratio_th1; + stWdrCtl.wdr_over_ex_ratio_th2 = wdrInfo->wdr_over_ex_ratio_th2; + stWdrCtl.wdr_fusion_ratio_th = wdrInfo->wdr_fusion_ratio_th; +- stWdrCtl.wdr_fusion_value1 = wdrInfo->wdr_fusion_value1; ++ stWdrCtl.wdr_fusion_value1 = wdrInfo->wdr_fusion_value1; + stWdrCtl.wdr_fusion_value2 = wdrInfo->wdr_fusion_value2; + Isp_Drv_F2k_Core_SetWdrCtl(isp,&stWdrCtl); + return 0; +@@ -1185,21 +1206,21 @@ static int isp_f2k_core_SetCscCtl(struct k510_isp_device *isp,CSC_INFO_S *cscInf + static int isp_f2k_core_SetAdaCtl(struct k510_isp_device *isp,ADA_INFO_S *adaInfo) + { + ISP_CORE_ADA_CTL_S stAdaCtl; +- stAdaCtl.ada_rgb_gamma_en = adaInfo->ada_rgb_gamma_en; +- stAdaCtl.ada_yuv_gamma_en = adaInfo->ada_yuv_gamma_en; +- stAdaCtl.ada_adjust_en = adaInfo->ada_adjust_en; ++ stAdaCtl.ada_rgb_gamma_en = adaInfo->ada_rgb_gamma_en; ++ stAdaCtl.ada_yuv_gamma_en = adaInfo->ada_yuv_gamma_en; ++ stAdaCtl.ada_adjust_en = adaInfo->ada_adjust_en; + stAdaCtl.ada_img_stab_en = adaInfo->ada_img_stab_en; + stAdaCtl.ada_ccr_en = adaInfo->ada_ccr_en; + stAdaCtl.ada_adp_en = adaInfo->ada_adp_en; +- stAdaCtl.ada_adp_ccr_en = adaInfo->ada_adp_ccr_en; ++ stAdaCtl.ada_adp_ccr_en = adaInfo->ada_adp_ccr_en; + stAdaCtl.ada_stat_mode_sel = adaInfo->ada_stat_mode_sel; + stAdaCtl.ada_enh_mode_sel = adaInfo->ada_enh_mode_sel; +- stAdaCtl.ada_stat_max_value = adaInfo->ada_stat_max_value; ++ stAdaCtl.ada_stat_max_value = adaInfo->ada_stat_max_value; + stAdaCtl.ada_ad_stren_max_value = adaInfo->ada_ad_stren_max_value; + stAdaCtl.ada_win_h_start = adaInfo->ada_win_size.h_start; + stAdaCtl.ada_win_v_start = adaInfo->ada_win_size.v_start; +- stAdaCtl.ada_win_h_end = adaInfo->ada_win_size.h_end; +- stAdaCtl.ada_win_v_end = adaInfo->ada_win_size.v_end; ++ stAdaCtl.ada_win_h_end = adaInfo->ada_win_size.h_end; ++ stAdaCtl.ada_win_v_end = adaInfo->ada_win_size.v_end; + Isp_Drv_F2k_Core_SetAdaCtl(isp,&stAdaCtl); + return 0; + } +@@ -1207,16 +1228,16 @@ static int isp_f2k_core_SetAdaCtl(struct k510_isp_device *isp,ADA_INFO_S *adaInf + static int isp_f2k_core_SetRgbirCtl(struct k510_isp_device *isp,RGBIR_INFO_S *rgbirInfo) + { + ISP_CORE_RGBIR_CTL_S stRgbirCtl; +- stRgbirCtl.rgbir_en = rgbirInfo->rgbir_en; +- stRgbirCtl.rgbir_rtf_en = rgbirInfo->rgbir_rtf_en; +- stRgbirCtl.rgbir_rpc_en = rgbirInfo->rgbir_rpc_en; ++ stRgbirCtl.rgbir_en = rgbirInfo->rgbir_en; ++ stRgbirCtl.rgbir_rtf_en = rgbirInfo->rgbir_rtf_en; ++ stRgbirCtl.rgbir_rpc_en = rgbirInfo->rgbir_rpc_en; + stRgbirCtl.rgbir_fusion_en = rgbirInfo->rgbir_fusion_en; + stRgbirCtl.rgbir_output_sel = rgbirInfo->rgbir_output_sel; +- stRgbirCtl.rgbir_rpc_max_value = rgbirInfo->rgbir_rpc_max_value; ++ stRgbirCtl.rgbir_rpc_max_value = rgbirInfo->rgbir_rpc_max_value; + stRgbirCtl.rgbir_rpc_color_coff = rgbirInfo->rgbir_rpc_color_coff; +- stRgbirCtl.rgbir_rpc_luma_coff = rgbirInfo->rgbir_rpc_luma_coff; ++ stRgbirCtl.rgbir_rpc_luma_coff = rgbirInfo->rgbir_rpc_luma_coff; + stRgbirCtl.rgbir_rpc_th = rgbirInfo->rgbir_rpc_th; +- stRgbirCtl.rgbir_rpc_th1 = rgbirInfo->rgbir_rpc_th1; ++ stRgbirCtl.rgbir_rpc_th1 = rgbirInfo->rgbir_rpc_th1; + Isp_Drv_F2k_Core_SetRgbIrCtl(isp,&stRgbirCtl); + return 0; + } +@@ -1226,13 +1247,13 @@ static int isp_f2k_core_Set2dnrCtl(struct k510_isp_device *isp,NR2D_INFO_S *nr2d + ISP_CORE_2DNR_CTL_S st2dnrCtl; + st2dnrCtl.core_2dnr_pcf_en = nr2dInfo->d2nr_pcf_en; + st2dnrCtl.core_2dnr_raw_en = nr2dInfo->d2nr_raw_en; +- st2dnrCtl.core_2dnr_edge_en = nr2dInfo->d2nr_edge_en; ++ st2dnrCtl.core_2dnr_edge_en = nr2dInfo->d2nr_edge_en; + st2dnrCtl.core_2dnr_bap_en = nr2dInfo->d2nr_bap_en; +- st2dnrCtl.core_2dnr_luma_en = nr2dInfo->d2nr_luma_en; +- st2dnrCtl.core_2dnr_chroma_en = nr2dInfo->d2nr_chroma_en; +- st2dnrCtl.core_2dnr_pcf_adp_en = nr2dInfo->d2nr_pcf_adp_en; +- st2dnrCtl.core_2dnr_raw_adp_en = nr2dInfo->d2nr_raw_adp_en; +- st2dnrCtl.core_2dnr_luma_adp_en = nr2dInfo->d2nr_luma_adp_en; ++ st2dnrCtl.core_2dnr_luma_en = nr2dInfo->d2nr_luma_en; ++ st2dnrCtl.core_2dnr_chroma_en = nr2dInfo->d2nr_chroma_en; ++ st2dnrCtl.core_2dnr_pcf_adp_en = nr2dInfo->d2nr_pcf_adp_en; ++ st2dnrCtl.core_2dnr_raw_adp_en = nr2dInfo->d2nr_raw_adp_en; ++ st2dnrCtl.core_2dnr_luma_adp_en = nr2dInfo->d2nr_luma_adp_en; + st2dnrCtl.core_2dnr_chroma_adp_en = nr2dInfo->d2nr_chroma_adp_en; + st2dnrCtl.core_2dnr_raw_intensity = nr2dInfo->d2nr_raw_intensity; + st2dnrCtl.core_2dnr_bap_intensity = nr2dInfo->d2nr_bap_intensity; +@@ -1246,32 +1267,32 @@ static int isp_f2k_core_Set2dnrCtl(struct k510_isp_device *isp,NR2D_INFO_S *nr2d + static int isp_f2k_core_Set3dnrCtl(struct k510_isp_device *isp,NR3D_INFO_S *nr3dInfo) + { + ISP_CORE_3DNR_CTL_S st3dnrCtl; +- st3dnrCtl.core_3dnr_en = nr3dInfo->d3nr_en; +- st3dnrCtl.core_3dnr_pre_luma_en = nr3dInfo->d3nr_pre_luma_en; +- st3dnrCtl.core_3dnr_pre_chroma_en = nr3dInfo->d3nr_pre_chroma_en; ++ st3dnrCtl.core_3dnr_en = nr3dInfo->d3nr_en; ++ st3dnrCtl.core_3dnr_pre_luma_en = nr3dInfo->d3nr_pre_luma_en; ++ st3dnrCtl.core_3dnr_pre_chroma_en = nr3dInfo->d3nr_pre_chroma_en; + st3dnrCtl.core_3dnr_main_luma_en = nr3dInfo->d3nr_main_luma_en; + st3dnrCtl.core_3dnr_main_chroma_en = nr3dInfo->d3nr_main_chroma_en; +- st3dnrCtl.core_3dnr_post_luma_en = nr3dInfo->d3nr_post_luma_en; ++ st3dnrCtl.core_3dnr_post_luma_en = nr3dInfo->d3nr_post_luma_en; + st3dnrCtl.core_3dnr_post_chroma_en = nr3dInfo->d3nr_post_chroma_en; + st3dnrCtl.core_3dnr_2d_luma_en = nr3dInfo->d3nr_2d_luma_en; + st3dnrCtl.core_3dnr_2d_chroma_en = nr3dInfo->d3nr_2d_luma_en; +- st3dnrCtl.core_3dnr_wb_en = nr3dInfo->d3nr_wb_en; ++ st3dnrCtl.core_3dnr_wb_en = nr3dInfo->d3nr_wb_en; + st3dnrCtl.core_3dnr_wb_sel = nr3dInfo->d3nr_wb_sel; + st3dnrCtl.core_3dnr_adp_luma_en = nr3dInfo->d3nr_adp_luma_en; + st3dnrCtl.core_3dnr_adp_chroma_en = nr3dInfo->d3nr_adp_chroma_en; +- st3dnrCtl.core_3dnr_pre_luma_th = nr3dInfo->d3nr_pre_luma_th; +- st3dnrCtl.core_3dnr_pre_luma_intensity = nr3dInfo->d3nr_pre_luma_intensity; ++ st3dnrCtl.core_3dnr_pre_luma_th = nr3dInfo->d3nr_pre_luma_th; ++ st3dnrCtl.core_3dnr_pre_luma_intensity = nr3dInfo->d3nr_pre_luma_intensity; + st3dnrCtl.core_3dnr_pre_chroma_intensity = nr3dInfo->d3nr_pre_chroma_intensity; + st3dnrCtl.core_3dnr_mid_filter_th = nr3dInfo->d3nr_mid_filter_th; +- st3dnrCtl.core_3dnr_pre_mid_filter_th = nr3dInfo->d3nr_pre_mid_filter_th; +- st3dnrCtl.core_3dnr_cur_mid_filter_th = nr3dInfo->d3nr_cur_mid_filter_th; ++ st3dnrCtl.core_3dnr_pre_mid_filter_th = nr3dInfo->d3nr_pre_mid_filter_th; ++ st3dnrCtl.core_3dnr_cur_mid_filter_th = nr3dInfo->d3nr_cur_mid_filter_th; + st3dnrCtl.core_3dnr_low_pass_filter_th = nr3dInfo->d3nr_low_pass_filter_th; +- st3dnrCtl.core_3dnr_luma_th = nr3dInfo->d3nr_luma_th; ++ st3dnrCtl.core_3dnr_luma_th = nr3dInfo->d3nr_luma_th; + st3dnrCtl.core_3dnr_min_value = nr3dInfo->d3nr_min_value; + st3dnrCtl.core_3dnr_luma_intensity = nr3dInfo->d3nr_luma_intensity; +- st3dnrCtl.core_3dnr_chroma_intensity = nr3dInfo->d3nr_chroma_intensity; +- st3dnrCtl.core_3dnr_post_edge_th = nr3dInfo->d3nr_post_edge_th; +- st3dnrCtl.core_3dnr_post_luma_intensity = nr3dInfo->d3nr_post_luma_intensity; ++ st3dnrCtl.core_3dnr_chroma_intensity = nr3dInfo->d3nr_chroma_intensity; ++ st3dnrCtl.core_3dnr_post_edge_th = nr3dInfo->d3nr_post_edge_th; ++ st3dnrCtl.core_3dnr_post_luma_intensity = nr3dInfo->d3nr_post_luma_intensity; + st3dnrCtl.core_3dnr_post_chroma_intensity = nr3dInfo->d3nr_post_chroma_intensity; + Isp_Drv_F2k_Core_Set3DnrCtl(isp,&st3dnrCtl); + return 0; +@@ -1281,17 +1302,17 @@ static int isp_f2k_core_SetEnhCtl(struct k510_isp_device *isp,ENH_INFO_S *enhInf + { + ISP_CORE_ENH_CTL_S stEnhCtl; + stEnhCtl.enh_ltm_en = enhInfo->enh_ltm_en; +- stEnhCtl.enh_sharp_en = enhInfo->enh_sharp_en; +- stEnhCtl.enh_cc_en = enhInfo->enh_cc_en; +- stEnhCtl.enh_adp_ltm_en = enhInfo->enh_adp_ltm_en; +- stEnhCtl.enh_adp_sharp_en = enhInfo->enh_adp_sharp_en; +- stEnhCtl.enh_adp_cc_en = enhInfo->enh_adp_cc_en; +- stEnhCtl.ltm_gain = enhInfo->ltm_gain; +- stEnhCtl.ltm_th = enhInfo->ltm_th; +- stEnhCtl.enh_nr_th = enhInfo->enh_nr_th; ++ stEnhCtl.enh_sharp_en = enhInfo->enh_sharp_en; ++ stEnhCtl.enh_cc_en = enhInfo->enh_cc_en; ++ stEnhCtl.enh_adp_ltm_en = enhInfo->enh_adp_ltm_en; ++ stEnhCtl.enh_adp_sharp_en = enhInfo->enh_adp_sharp_en; ++ stEnhCtl.enh_adp_cc_en = enhInfo->enh_adp_cc_en; ++ stEnhCtl.ltm_gain = enhInfo->ltm_gain; ++ stEnhCtl.ltm_th = enhInfo->ltm_th; ++ stEnhCtl.enh_nr_th = enhInfo->enh_nr_th; + stEnhCtl.enh_th1 = enhInfo->enh_th1; + stEnhCtl.enh_th2 = enhInfo->enh_th2; +- stEnhCtl.sharp_gain = enhInfo->sharp_gain; ++ stEnhCtl.sharp_gain = enhInfo->sharp_gain; + Isp_Drv_F2k_Core_SetEnhLtmCtl(isp,&stEnhCtl); + Isp_Drv_F2k_Core_SetEnhCCCtl(isp,&stEnhCtl); + Isp_Drv_F2k_Core_SetEnhSharpenCtl(isp,&stEnhCtl); +@@ -1301,10 +1322,10 @@ static int isp_f2k_core_SetEnhCtl(struct k510_isp_device *isp,ENH_INFO_S *enhInf + static int isp_f2k_core_SetPostCtl(struct k510_isp_device *isp,POST_INFO_S *postInfo) + { + ISP_CORE_POST_CTL_S stPostCtl; +- stPostCtl.post_cont_ad_en = postInfo->post_cont_ad_en; +- stPostCtl.post_luma_ad_en = postInfo->post_luma_ad_en; ++ stPostCtl.post_cont_ad_en = postInfo->post_cont_ad_en; ++ stPostCtl.post_luma_ad_en = postInfo->post_luma_ad_en; + stPostCtl.post_satu_ad_en = postInfo->post_satu_ad_en; +- stPostCtl.cont_ad_intensity = postInfo->cont_ad_intensity; ++ stPostCtl.cont_ad_intensity = postInfo->cont_ad_intensity; + stPostCtl.luma_ad_intensity = postInfo->luma_ad_intensity; + stPostCtl.satu_ad_intensity = postInfo->satu_ad_intensity; + Isp_Drv_F2k_Core_SetPostContCtl(isp,&stPostCtl); +@@ -1317,14 +1338,14 @@ static int isp_f2k_core_SetOtcCtl(struct k510_isp_device *isp,OTC_INFO_S *otcInf + { + ISP_CORE_OTC_CTL_S stOtcCtl; + stOtcCtl.post_otc_en = otcInfo->post_otc_en; +- stOtcCtl.otc_yc_sel = otcInfo->otc_yc_sel; +- stOtcCtl.otc_uv_format_sel = otcInfo->otc_uv_format_sel; +- stOtcCtl.otc_hsync_pol_sel = otcInfo->otc_hsync_pol_sel; +- stOtcCtl.otc_vsync_pol_sel = otcInfo->otc_vsync_pol_sel; +- stOtcCtl.otc_stt_vr = otcInfo->otc_out_size.Width_st; +- stOtcCtl.otc_stt_hr = otcInfo->otc_out_size.Height_st; +- stOtcCtl.otc_height = otcInfo->otc_out_size.Height; +- stOtcCtl.otc_width = otcInfo->otc_out_size.Width; ++ stOtcCtl.otc_yc_sel = otcInfo->otc_yc_sel; ++ stOtcCtl.otc_uv_format_sel = otcInfo->otc_uv_format_sel; ++ stOtcCtl.otc_hsync_pol_sel = otcInfo->otc_hsync_pol_sel; ++ stOtcCtl.otc_vsync_pol_sel = otcInfo->otc_vsync_pol_sel; ++ stOtcCtl.otc_stt_vr = otcInfo->otc_out_size.Width_st; ++ stOtcCtl.otc_stt_hr = otcInfo->otc_out_size.Height_st; ++ stOtcCtl.otc_height = otcInfo->otc_out_size.Height; ++ stOtcCtl.otc_width = otcInfo->otc_out_size.Width; + Isp_Drv_F2k_Core_SetOtcCtl(isp,&stOtcCtl); + return 0; + } +@@ -1332,14 +1353,14 @@ static int isp_f2k_core_SetOtcCtl(struct k510_isp_device *isp,OTC_INFO_S *otcInf + static int isp_f2k_core_SetLdcCtl(struct k510_isp_device *isp,LDC_INFO_S *ldcInfo) + { + ISP_CORE_LDC_CTL_S stLdcCtl; +- stLdcCtl.ldc_en = ldcInfo->ldc_en; +- stLdcCtl.ldc_arith_en = ldcInfo->ldc_arith_en; ++ stLdcCtl.ldc_en = ldcInfo->ldc_en; ++ stLdcCtl.ldc_arith_en = ldcInfo->ldc_arith_en; + stLdcCtl.ldc_req_freq = ldcInfo->ldc_req_freq; + stLdcCtl.ldc_stt_ln = ldcInfo->ldc_stt_ln; + stLdcCtl.ldc_h_center_pos = ldcInfo->ldc_h_center_pos; + stLdcCtl.ldc_v_center_pos = ldcInfo->ldc_v_center_pos; + stLdcCtl.ldc_rectify_cr = ldcInfo->ldc_rectify_cr; +- stLdcCtl.ldc_rectify_cz = ldcInfo->ldc_rectify_cz; ++ stLdcCtl.ldc_rectify_cz = ldcInfo->ldc_rectify_cz; + Isp_Drv_F2k_Core_SetLdcCtl(isp,&stLdcCtl); + return 0; + } +@@ -1347,11 +1368,11 @@ static int isp_f2k_core_SetLdcCtl(struct k510_isp_device *isp,LDC_INFO_S *ldcInf + static int isp_f2k_core_SetAfCtl(struct k510_isp_device *isp,AF_INFO_S *afInfo) + { + ISP_CORE_AF_CTL_S stAfCtl; +- stAfCtl.af_stat_en = afInfo->af_stat_en; +- stAfCtl.af_stat_mode_sel= afInfo->af_stat_mode_sel; +- stAfCtl.af_stat_win_h_start= afInfo->af_win_size.h_start; +- stAfCtl.af_stat_win_v_start= afInfo->af_win_size.v_start; +- stAfCtl.af_stat_win_h_end= afInfo->af_win_size.h_end; ++ stAfCtl.af_stat_en = afInfo->af_stat_en; ++ stAfCtl.af_stat_mode_sel= afInfo->af_stat_mode_sel; ++ stAfCtl.af_stat_win_h_start= afInfo->af_win_size.h_start; ++ stAfCtl.af_stat_win_v_start= afInfo->af_win_size.v_start; ++ stAfCtl.af_stat_win_h_end= afInfo->af_win_size.h_end; + stAfCtl.af_stat_win_v_end= afInfo->af_win_size.v_end; + Isp_Drv_F2k_Core_SetAfCtl(isp,&stAfCtl); + return 0; +@@ -1421,7 +1442,7 @@ static int isp_f2k_core_SetFbd(struct k510_isp_device *isp,FBD_INFO_S *fbdInfo) + FBCD_BUF_S *yDataBufInfo = &fbdInfo->yDataBufInfo; + stIspFbdYBuf->fbd_y_data_buf_base0 = yDataBufInfo->data_buf_base0; + stIspFbdYBuf->fbd_y_data_buf_base0 = yDataBufInfo->data_buf_base1; +- stIspFbdYBuf->fbd_y_data_stride = yDataBufInfo->data_stride; ++ stIspFbdYBuf->fbd_y_data_stride = yDataBufInfo->data_stride; + FBCD_BUF_S *yHeadBufInfo = &fbdInfo->yHeadBufInfo; + stIspFbdYBuf->fbd_y_head_buf_base0 = yHeadBufInfo->data_buf_base0; + stIspFbdYBuf->fbd_y_head_buf_base1 = yHeadBufInfo->data_buf_base1; +@@ -1435,7 +1456,7 @@ static int isp_f2k_core_SetFbd(struct k510_isp_device *isp,FBD_INFO_S *fbdInfo) + stIspFbdYLBuf->fbd_yl_head_buf_base0 = ylHeadBufInfo->data_buf_base0; + stIspFbdYLBuf->fbd_yl_head_buf_base1 = ylHeadBufInfo->data_buf_base1; + stIspFbdYLBuf->fbd_yl_head_stride = ylHeadBufInfo->data_stride; +- ISP_FBD_UV_BUF_S *stIspFbdUVBuf = &stIspFbdBuf->stIspFbdUVBuf; ++ ISP_FBD_UV_BUF_S *stIspFbdUVBuf = &stIspFbdBuf->stIspFbdUVBuf; + FBCD_BUF_S *uvDataBufInfo = &fbdInfo->uvDataBufInfo; + stIspFbdUVBuf->fbd_uv_data_buf_base0 = uvDataBufInfo->data_buf_base0; + stIspFbdUVBuf->fbd_uv_data_buf_base1 = uvDataBufInfo->data_buf_base1; +@@ -1541,7 +1562,7 @@ void isp_f2k_ds_SetInputSize(struct k510_isp_device *isp,IMAGE_SIZE *dsInSizeInf + } + // + void isp_f2k_ds_SetRgb2YuvCoff(struct k510_isp_device *isp) +-{ ++{ + unsigned int osd_rgb2yuv_coeff[3][4]; + osd_rgb2yuv_coeff[0][0]= 0x00000132; + osd_rgb2yuv_coeff[0][1]= 0x00000259; +@@ -1559,7 +1580,7 @@ void isp_f2k_ds_SetRgb2YuvCoff(struct k510_isp_device *isp) + } + // + void isp_f2k_ds_SetYuv2RgbCoff(struct k510_isp_device *isp) +-{ ++{ + unsigned int osd_yuv2rgb_coeff[3][4]; + osd_yuv2rgb_coeff[0][0] = 0x00000400; + osd_yuv2rgb_coeff[0][1] = 0x00000000; +@@ -1626,15 +1647,15 @@ void isp_f2k_ds_SetSingleDS(struct k510_isp_device *isp,unsigned int u8Index,str + stDsFormat->out_rgb_mode = dsInfo->out_rgb_mode; + stDsFormat->out_yuv_mode = dsInfo->out_yuv_mode; + stDsFormat->out_uv_swap = dsInfo->out_uv_swap; +- unsigned int osdIndex = 0; ++ unsigned int osdIndex = 0; + ISP_DS_OSD_ATTR_S *stDsOsdAttr = &stDsAttr.DsOsdAttr[osdIndex]; + ISP_OSD_INFO_S *osdInfo = &dsInfo->osdInfo[osdIndex]; + isp_f2k_ds_SetOSD(stDsOsdAttr,osdInfo); +- osdIndex = 1; ++ osdIndex = 1; + stDsOsdAttr = &stDsAttr.DsOsdAttr[osdIndex]; + osdInfo = &dsInfo->osdInfo[osdIndex]; + isp_f2k_ds_SetOSD(stDsOsdAttr,osdInfo); +- osdIndex = 2; ++ osdIndex = 2; + stDsOsdAttr = &stDsAttr.DsOsdAttr[osdIndex]; + osdInfo = &dsInfo->osdInfo[osdIndex]; + isp_f2k_ds_SetOSD(stDsOsdAttr,osdInfo); +@@ -1685,7 +1706,7 @@ void isp_f2k_config(struct k510_isp_device *isp,struct isp_cfg_info *isp_cfg) + GFP_KERNEL); + if (nr3d_dma_new.addr == NULL) + return -ENOMEM; +- ++ + nr3d_dma_old = isp->isp_f2k.nr3d_dma; + isp->isp_f2k.nr3d_dma = nr3d_dma_new; + +@@ -1696,7 +1717,7 @@ void isp_f2k_config(struct k510_isp_device *isp,struct isp_cfg_info *isp_cfg) + isp_wrap_cfg->nr3dInfo.nr3d_y_line_stride = (isp_core_cfg->itcInfo.itc_size.Width + 15)/16*16*12/8;//0xb40; + isp_wrap_cfg->nr3dInfo.nr3d_uv_line_stride = (isp_core_cfg->itcInfo.itc_size.Width + 15)/16*16;//0x780; + isp_wrap_cfg->nr3dInfo.nr3d_y_buf_base = nr3d_dma_new.dma; +- isp_wrap_cfg->nr3dInfo.nr3d_uv_buf_base = nr3d_dma_new.dma + isp_wrap_cfg->nr3dInfo.nr3d_y_line_stride * isp_core_cfg->itcInfo.itc_size.Height; ++ isp_wrap_cfg->nr3dInfo.nr3d_uv_buf_base = nr3d_dma_new.dma + isp_wrap_cfg->nr3dInfo.nr3d_y_line_stride * isp_core_cfg->itcInfo.itc_size.Height; + } + // + isp_f2k_core_config(f2k,isp_core_cfg); +@@ -1727,7 +1748,7 @@ static void isp_f2k_set_fbc_outaddr(struct isp_f2k_device *f2k, u32 addr) + addr = addr+1920*1080; + isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_MAIN_UV_BUF0_BASE); + isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_MAIN_UV_BUF1_BASE); +- isp_reg_writel(isp,0x30001,ISP_IOMEM_F2K_WRAP,ISP_WRAP_CONFIG_DONE); ++ isp_reg_writel(isp,0x30001,ISP_IOMEM_F2K_WRAP,ISP_WRAP_CONFIG_DONE); + } + + /* +@@ -1749,7 +1770,7 @@ static void isp_f2k_set_main_outaddr(struct isp_f2k_device *f2k, u32 addr) + __func__,main_info->main_line_stride,main_info->main_size.Width,main_info->main_size.Height); + addr = addr + main_info->main_line_stride*main_info->main_size.Height;//1920*1080; + isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_MAIN_UV_BUF0_BASE); +- isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_MAIN_UV_BUF1_BASE); ++ isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_MAIN_UV_BUF1_BASE); + isp_reg_writel(isp,0x30001,ISP_IOMEM_F2K_WRAP,ISP_WRAP_CONFIG_DONE); + } + +@@ -1765,7 +1786,7 @@ static void isp_f2k_set_out0_outaddr(struct isp_f2k_device *f2k, u32 addr) + struct k510_isp_device *isp = to_isp_device(f2k); + struct isp_wrap_cfg_info *isp_wrap_cfg = &f2k->isp_cfg.isp_wrap_cfg; + struct isp_wrap_ds0_info *ds0_info = &isp_wrap_cfg->ds0Info; +- ++ + #ifdef SET_DIFF_BUFF + if((f2k->pingpong[DS0_VIDEO]%2) == 0) + { +@@ -1777,7 +1798,7 @@ static void isp_f2k_set_out0_outaddr(struct isp_f2k_device *f2k, u32 addr) + { + isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS0_Y_BUF1_BASE); + addr = addr + ds0_info->ds0_line_stride*ds0_info->ds0_size.Height;//1920*1080; +- isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS0_UV_BUF1_BASE); ++ isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS0_UV_BUF1_BASE); + } + f2k->pingpong[DS0_VIDEO]++; + isp_reg_writel(isp,0x30001,ISP_IOMEM_F2K_WRAP,ISP_WRAP_CONFIG_DONE); //fix split screen +@@ -1812,7 +1833,7 @@ static void isp_f2k_set_out1_outaddr(struct isp_f2k_device *f2k, u32 addr) + addr = addr + ds1_info->ds1_line_stride*ds1_info->ds1_size.Height;//1920*1080; + isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS1_UV_BUF0_BASE); + isp_reg_writel(isp,addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS1_UV_BUF1_BASE); +- isp_reg_writel(isp,0x30001,ISP_IOMEM_F2K_WRAP,ISP_WRAP_CONFIG_DONE); ++ isp_reg_writel(isp,0x30001,ISP_IOMEM_F2K_WRAP,ISP_WRAP_CONFIG_DONE); + } + + /* +@@ -1832,20 +1853,20 @@ static void isp_f2k_set_out2_outaddr(struct isp_f2k_device *f2k, u32 addr) + // + //dev_dbg(f2k->isp->dev,"%s:line_stride (%d),Width(%d),Height(%d) addr(0x%x)\n",\ + __func__,ds2_info->ds2_line_stride,ds2_info->ds2_size.Width,height,addr); +- r_addr = addr; ++ r_addr = addr; + isp_reg_writel(isp,r_addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS2_R_BUF0_BASE); + isp_reg_writel(isp,r_addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS2_R_BUF1_BASE); + + if( DS2_S_RGB == ds2_info->ds2_out_img_out_format) + g_addr = r_addr + ds2_info->ds2_line_stride * height; +- else ++ else + g_addr = r_addr + ds2_info->ds2_line_stride/4*2; + isp_reg_writel(isp,g_addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS2_G_BUF0_BASE); + isp_reg_writel(isp,g_addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS2_G_BUF1_BASE); + // + if( DS2_S_RGB == ds2_info->ds2_out_img_out_format) + b_addr = g_addr + ds2_info->ds2_line_stride * height; +- else ++ else + b_addr = g_addr + ds2_info->ds2_line_stride/4*3; + isp_reg_writel(isp,b_addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS2_B_BUF0_BASE); + isp_reg_writel(isp,b_addr,ISP_IOMEM_F2K_WRAP,ISP_WRAP_DS2_B_BUF1_BASE); +@@ -2024,13 +2045,13 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_IMAGE_H_START ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_IMAGE_ACTIVE_WIDTH ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_IMAGE_ACTIVE_HEIGHT ); +- //tpg ++ //tpg + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_TEST_CTL ); +- //blc ++ //blc + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_BLC_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_BLC_OFFSET ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_BLC_RATIO ); +- //lsc ++ //lsc + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_H_CENTER ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_V_CENTER ); +@@ -2038,7 +2059,7 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_G_RATIO ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_B_RATIO ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_IR_RATIO ); +- //ae ++ //ae + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_WIN_H_START ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_WIN_V_START ); +@@ -2060,7 +2081,7 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_GAIN_MIN ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_DN_SWITCH_ADJUST_STEP_MAX); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_DN_SWITCH_WAIT_TIME ); +- ++ + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DIFF_MAX ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DRV_SIGNAL_MAX ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_COEFF_DIS ); +@@ -2068,7 +2089,7 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_COEFF_ACCE ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DRV_MANUAL_VALUE ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DAMP_MANUAL_VALUE ); +- ++ + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_VALUE_READY ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_LONG_CUR_EX ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_MID_CUR_EX ); +@@ -2079,7 +2100,7 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_EX_STATUS ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_SUM ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_PIXEL_SUM ); +- //awb ++ //awb + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_D65_RED_GAIN ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_D65_BLUE_GAIN ); +@@ -2123,14 +2144,14 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_ORG_RED_VALUE ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_ORG_GREEN_VALUE ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_ORG_BLUE_VALUE ); +- //wdr ++ //wdr + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_WDR_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_WDR_OVER_EX_RATIO_TH1 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_WDR_OVER_EX_RATIO_TH2 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_WDR_FUSION_RATIO_TH ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_WDR_FUSION_VALUE1 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_WDR_FUSION_VALUE2 ); +- //csc ++ //csc + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_00 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_01 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_02 ); +@@ -2140,7 +2161,7 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_20 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_21 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_22 ); +- //ada ++ //ada + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_STAT_MAX_VALUE ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_AD_STREN_MAX_VALUE ); +@@ -2148,21 +2169,21 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_WIN_V_START ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_WIN_H_END ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_WIN_V_END ); +- //rgbir ++ //rgbir + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_MAX_VALUE ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_COLOR_COFF ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_LUMA_COFF ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_TH ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_TH1 ); +- //2dnr ++ //2dnr + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_RAW_INTENSITY ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_BAP_INTENSITY ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_EDGE_INTENSITY ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_LUMA_INTENSITY ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_CHROMA_INTENSITY ); +- //3dnr ++ //3dnr + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_3DNR_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_3DNR_PRE_LUMA_TH ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_3DNR_PRE_LUMA_INTENSITY ); +@@ -2178,7 +2199,7 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_3DNR_POST_EDGE_TH ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_3DNR_POST_LUMA_INTENSITY ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_3DNR_POST_CHROMA_INTENSITY ); +- //enh ++ //enh + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ENH_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LTM_GAIN ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LTM_TH ); +@@ -2186,28 +2207,28 @@ static void isp_f2k_core_print_status(struct isp_f2k_device *f2k) + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ENH_TH1 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ENH_TH2 ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_SHARP_GAIN ); +- //post ++ //post + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_POST_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CONT_GAIN ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LUMA_GAIN ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_SATU_GAIN ); +- //otc ++ //otc + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_STT_VR ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_STT_HR ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_HEIGHT ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_WIDTH ); +- //ldc ++ //ldc + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_REQ_FREQ ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_H_CENTER_POS ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_V_CENTER_POS ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_RECTIFY_CR ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_RECTIFY_CZ ); +- //ram table ++ //ram table + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RAM_WR_STATUS ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RAM_RD_STATUS ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RAM_READ_LOCK ); +- //af ++ //af + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AF_CTL ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AF_STAT_WIN_H_START ); + ISP_F2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AF_STAT_WIN_V_START ); +@@ -2398,32 +2419,32 @@ static void isp_3dnr_mfbc_print_status(struct isp_f2k_device *f2k) + dev_dbg(isp->dev, "-------------ISP 3DNR MFBC Register dump start----------\n"); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_INPUT_SIZE ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_OUT_FORMAT ); +- ++ + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_DATA_BUF_BASE0 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_DATA_BUF_BASE1 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_DATA_LINE_STRIDE ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_DATA_WR_BLEN ); +- ++ + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_HEAD_BUF_BASE0 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_HEAD_BUF_BASE1 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_HEAD_LINE_STRIDE ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_Y_HEAD_WR_BLEN ); +- ++ + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_DATA_BUF_BASE0 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_DATA_BUF_BASE1 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_DATA_LINE_STRIDE ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_DATA_WR_BLEN ); +- ++ + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_HEAD_BUF_BASE0 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_HEAD_BUF_BASE1 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_HEAD_LINE_STRIDE ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_UV_HEAD_WR_BLEN ); +- ++ + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_DATA_BUF_BASE0 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_DATA_BUF_BASE1 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_DATA_LINE_STRIDE ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_DATA_WR_BLEN ); +- ++ + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_HEAD_BUF_BASE0 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_HEAD_BUF_BASE1 ); + ISP_3DNR_MFBC_PRINT_REGISTER(isp,ISP_FBC_YL_HEAD_LINE_STRIDE ); +@@ -2588,39 +2609,39 @@ static void isp_f2k_remap_print_status(struct isp_f2k_device *f2k) + ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_30_1_CTRL); + ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_0_CTRL); + ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_1_CTRL); +- +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); ++ ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); + ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_19_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); +- ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); ++ ISP_F2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); + dev_dbg(isp->dev, "-------------ISP F2K MAIN REMAP Register dump end----------\n"); + // + dev_dbg(isp->dev, "-------------ISP F2K OUT0 REMAP Register dump start----------\n"); +@@ -2688,39 +2709,39 @@ static void isp_f2k_remap_print_status(struct isp_f2k_device *f2k) + ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_30_1_CTRL); + ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_0_CTRL); + ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_1_CTRL); +- +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); ++ ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); + ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_19_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); +- ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); ++ ISP_F2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); + dev_dbg(isp->dev, "-------------ISP F2K OUT0 REMAP Register dump end----------\n"); + // + dev_dbg(isp->dev, "-------------ISP F2K OUT1 REMAP Register dump start----------\n"); +@@ -2788,39 +2809,39 @@ static void isp_f2k_remap_print_status(struct isp_f2k_device *f2k) + ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_30_1_CTRL); + ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_0_CTRL); + ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_1_CTRL); +- +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); ++ ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); + ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_19_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); +- ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); ++ ISP_F2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); + dev_dbg(isp->dev, "-------------ISP F2K OUT1 REMAP Register dump end----------\n"); + } + /* ----------------------------------------------------------------------------- +@@ -2835,7 +2856,7 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + unsigned long flags; + int drop=0; + struct isp_cfg_info *isp_cfg = &f2k->isp_cfg; +- ++ + dev_dbg(video->isp->dev,"%s:start\n",__func__); + spin_lock_irqsave(&video->irqlock, flags); + if (WARN_ON(list_empty(&video->dmaqueue))) { +@@ -2844,7 +2865,7 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + if(isp_cfg->isp_wrap_cfg.ds0Info.ds0_out_en == 0 && dsNum == DS0_VIDEO) + { + return; +- } ++ } + f2k->profile.no_buf_drop_cnt++; + return; + } +@@ -2854,15 +2875,15 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + if(isp_cfg->isp_wrap_cfg.ds0Info.ds0_out_en == 0 && dsNum == DS0_VIDEO) + { + return; +- } ++ } + f2k->profile.no_buf_drop_cnt++; + return; + } + +- buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); ++ buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); + + if(f2k->profile.drop_threshold > 0LL && f2k->profile.buf_set_time[dsNum] != 0) +- { ++ { + unsigned long long delta; + delta = get_usec() - f2k->profile.buf_set_time[dsNum]; + if(delta > f2k->profile.drop_threshold) +@@ -2881,7 +2902,7 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + list_del(&buf->irqlist); + next_buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); + } +- ++ + if(next_buf != NULL) + { + if(dsNum == MAIN_VIDEO) +@@ -2893,7 +2914,7 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + else if(dsNum == DS2_VIDEO) + isp_f2k_set_out2_outaddr(f2k, next_buf->dma); + } +- ++ + spin_unlock_irqrestore(&video->irqlock, flags); + + if(!drop) +@@ -2956,7 +2977,7 @@ static void video_buffer_next(struct isp_f2k_device *f2k, enum video_type dsNum) + pipe->state &= ~ISP_PIPELINE_STREAM; + spin_unlock(&pipe->lock); + } +- ++ + spin_unlock_irqrestore(&video->irqlock, flags); + + return; +@@ -2972,7 +2993,7 @@ static void f2k_isr_main_buffer(struct isp_f2k_device *f2k) + { + //dev_err(f2k->isp->dev,"%s:list_empty\n",__func__); + return 0; +- } ++ } + + if (f2k->state == ISP_PIPELINE_STREAM_CONTINUOUS && f2k->underrun) { + dev_err(f2k->isp->dev,"%s:f2k->state(0x%x)\n",__func__,f2k->state); +@@ -2980,7 +3001,7 @@ static void f2k_isr_main_buffer(struct isp_f2k_device *f2k) + return 1; + } + +- video_buffer_next(f2k, MAIN_VIDEO); ++ video_buffer_next(f2k, MAIN_VIDEO); + + f2k->profile.buf_set_time[MAIN_VIDEO] = get_usec(); + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; +@@ -2998,7 +3019,7 @@ static void f2k_isr_out0_buffer(struct isp_f2k_device *f2k) + { + //dev_dbg(f2k->isp->dev,"%s:list_empty\n",__func__); + return 0; +- } ++ } + + if (f2k->state == ISP_PIPELINE_STREAM_CONTINUOUS && f2k->underrun) { + f2k->underrun = 0; +@@ -3009,7 +3030,7 @@ static void f2k_isr_out0_buffer(struct isp_f2k_device *f2k) + + f2k->profile.buf_set_time[DS0_VIDEO] = get_usec(); + +- pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; ++ pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + + return buffer != NULL; + } +@@ -3024,14 +3045,14 @@ static void f2k_isr_out1_buffer(struct isp_f2k_device *f2k) + { + //dev_dbg(f2k->isp->dev,"%s:list_empty\n",__func__); + return 0; +- } ++ } + + if (f2k->state == ISP_PIPELINE_STREAM_CONTINUOUS && f2k->underrun) { + f2k->underrun = 0; + return 1; + } + +- video_buffer_next(f2k, DS1_VIDEO); ++ video_buffer_next(f2k, DS1_VIDEO); + f2k->profile.buf_set_time[DS1_VIDEO] = get_usec(); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; +@@ -3049,14 +3070,14 @@ static void f2k_isr_out2_buffer(struct isp_f2k_device *f2k) + { + //dev_dbg(f2k->isp->dev,"%s:list_empty\n",__func__); + return 0; +- } ++ } + + if (f2k->state == ISP_PIPELINE_STREAM_CONTINUOUS && f2k->underrun) { + f2k->underrun = 0; + return 1; + } + +- video_buffer_next(f2k, DS2_VIDEO); ++ video_buffer_next(f2k, DS2_VIDEO); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + +@@ -3082,7 +3103,7 @@ int k510isp_f2k_main_isr(struct isp_f2k_device *f2k,u32 events) + } + + int k510isp_f2k_ds0_isr(struct isp_f2k_device *f2k,u32 events) +-{ ++{ + dev_dbg(f2k->isp->dev,"%s:events(0x%x)start\n",__func__,events); + if (f2k->state == ISP_PIPELINE_STREAM_STOPPED) + return 0; +@@ -3090,7 +3111,7 @@ int k510isp_f2k_ds0_isr(struct isp_f2k_device *f2k,u32 events) + /* Handle queued buffers on frame end interrupts */ + //if(events & (IRQW1_STS_OUT0_Y_FRAME_IRQ|IRQW1_STS_OUT0_UV_FRAME_IRQ)) + f2k_isr_out0_buffer(f2k); +- ++ + return 0; + } + +@@ -3103,7 +3124,7 @@ int k510isp_f2k_ds1_isr(struct isp_f2k_device *f2k,u32 events) + /* Handle queued buffers on frame end interrupts */ + //if(events & (IRQW1_STS_OUT1_Y_FRAME_IRQ|IRQW1_STS_OUT1_UV_FRAME_IRQ)) + f2k_isr_out1_buffer(f2k); +- ++ + return 0; + } + +@@ -3116,7 +3137,7 @@ int k510isp_f2k_ds2_isr(struct isp_f2k_device *f2k,u32 events) + /* Handle queued buffers on frame end interrupts */ + //if(events & (IRQW1_STS_OUT2_R_FRAME_IRQ|IRQW1_STS_OUT2_G_FRAME_IRQ|IRQW1_STS_OUT2_B_FRAME_IRQ)) + f2k_isr_out2_buffer(f2k); +- ++ + return 0; + } + /* ----------------------------------------------------------------------------- +@@ -3157,14 +3178,14 @@ static int f2k_video_queue(struct k510isp_video *video, struct k510isp_buffer *b + if (f2k->output & ISP_F2K_OUTPUT_DS1_MEM) + { + f2k->pingpong[DS1_VIDEO] = 0; +- isp_f2k_set_out1_outaddr(f2k, buffer->dma); ++ isp_f2k_set_out1_outaddr(f2k, buffer->dma); + } + if (f2k->output & ISP_F2K_OUTPUT_DS2_MEM) + { + f2k->pingpong[DS2_VIDEO] = 0; + isp_f2k_set_out2_outaddr(f2k, buffer->dma); + } +- ++ + #ifdef SET_DIFF_BUFF + buffer++; + if (f2k->output & ISP_F2K_OUTPUT_FBC) +@@ -3218,7 +3239,7 @@ int k510isp_f2k_reset(struct k510_isp_device *isp) + { + isp_f2k_wrap_reset(isp); + reset_control_reset(isp->reset[FBC_RST]); +- reset_control_reset(isp->reset[ISP_F2K_RST]); ++ reset_control_reset(isp->reset[ISP_F2K_RST]); + return 0; + } + /* +@@ -3232,7 +3253,7 @@ int k510isp_f2k_reset(struct k510_isp_device *isp) + static long f2k_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) + { + struct isp_f2k_device *f2k = v4l2_get_subdevdata(sd); +- int ret; ++ int ret; + dev_dbg(f2k->isp->dev,"%s:cmd(0x%x)\n",__func__,cmd); + struct isp_wrap_cfg_info *isp_wrap_cfg = &f2k->isp_cfg.isp_wrap_cfg; + struct isp_core_cfg_info *isp_core_cfg = &f2k->isp_cfg.isp_core_cfg; +@@ -3273,7 +3294,7 @@ static long f2k_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) + mutex_lock(&f2k->ioctl_lock); + ret = isp_f2k_remap_out1_config(f2k, arg); + mutex_unlock(&f2k->ioctl_lock); +- break; ++ break; + case VIDIOC_K510ISP_F2K_AE_STAT_REQ: + mutex_lock(&f2k->ioctl_lock); + isp_f2k_core_GetAeSts(f2k->isp,arg); +@@ -3286,13 +3307,23 @@ static long f2k_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) + break; + case VIDIOC_K510ISP_F2K_CORE_CFG_GET: + mutex_lock(&f2k->ioctl_lock); +- ++ + mutex_unlock(&f2k->ioctl_lock); + break; + case VIDIOC_K510ISP_SYSCTL_RST_F2K: + mutex_lock(&f2k->ioctl_lock); + reset_control_reset(f2k->isp->reset[ISP_F2K_RST]); +- reset_control_reset(f2k->isp->reset[FBC_RST]); ++ reset_control_reset(f2k->isp->reset[FBC_RST]); ++ mutex_unlock(&f2k->ioctl_lock); ++ break; ++ case VIDIOC_K510ISP_F2K_CORE_REG_SET: ++ mutex_lock(&f2k->ioctl_lock); ++ isp_f2k_core_RegSet(f2k->isp,arg); ++ mutex_unlock(&f2k->ioctl_lock); ++ break; ++ case VIDIOC_K510ISP_F2K_CORE_REG_GET: ++ mutex_lock(&f2k->ioctl_lock); ++ isp_f2k_core_RegGet(f2k->isp,arg); + mutex_unlock(&f2k->ioctl_lock); + break; + default: +@@ -3341,7 +3372,7 @@ static int f2k_set_stream(struct v4l2_subdev *sd, int enable) + dev_dbg(f2k->isp->dev,"%s:enable(0x%d)\n",__func__,enable); + + struct isp_cfg_info *isp_cfg = &f2k->isp_cfg; +- struct isp_irq_info irq_info; ++ struct isp_irq_info irq_info; + + if (f2k->state == ISP_PIPELINE_STREAM_STOPPED) { + if (enable == ISP_PIPELINE_STREAM_STOPPED) +@@ -3352,7 +3383,7 @@ static int f2k_set_stream(struct v4l2_subdev *sd, int enable) + k510isp_f2k_reset(isp); + mutex_unlock(&f2k->ioctl_lock); + return 0; +- } ++ } + atomic_set(&f2k->stopping, 0); + } + +@@ -3413,7 +3444,7 @@ static int f2k_set_stream(struct v4l2_subdev *sd, int enable) + if(f2k->profile.drop_cnt[i] > 0) + dev_info(f2k->isp->dev,"f2k ds%d jump drop_cnt %d\n", i, f2k->profile.drop_cnt[i]); + } +- } ++ } + dev_info(f2k->isp->dev,"f2k dmaErrCnt %d, no_buf_drop_cnt %d, total %d\n", f2k->profile.dmaErrCnt, f2k->profile.no_buf_drop_cnt, f2k->profile.pic_cnt); + break; + } +@@ -3543,7 +3574,7 @@ f2k_try_format(struct isp_f2k_device *f2k, struct v4l2_subdev_pad_config *cfg, + else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) + fmt->code = MEDIA_BUS_FMT_UYVY8_1X16; + } +- ++ + /* Hardcode the output size to the crop rectangle size. */ + crop = __f2k_get_crop(f2k, cfg, which); + fmt->width = crop->width; +@@ -3630,7 +3661,7 @@ static int f2k_enum_mbus_code(struct v4l2_subdev *sd, + case ISP_F2K_PAD_SINK: + if (code->index >= ARRAY_SIZE(f2k_fmts)) + { +- dev_err(f2k->isp->dev,"%s:code->index %d\n",__func__,code->index); ++ dev_err(f2k->isp->dev,"%s:code->index %d\n",__func__,code->index); + return -EINVAL; + } + code->code = f2k_fmts[code->index]; +@@ -3652,7 +3683,7 @@ static int f2k_enum_mbus_code(struct v4l2_subdev *sd, + code->code = MEDIA_BUS_FMT_UYVY8_1X16; + else + { +- dev_err(f2k->isp->dev,"%s:code->index1 %d\n",__func__,code->index); ++ dev_err(f2k->isp->dev,"%s:code->index1 %d\n",__func__,code->index); + return -EINVAL; + } + } else { +@@ -3663,7 +3694,7 @@ static int f2k_enum_mbus_code(struct v4l2_subdev *sd, + code->code = format->code; + else + { +- dev_err(f2k->isp->dev,"%s:code->index2 %d\n",__func__,code->index); ++ dev_err(f2k->isp->dev,"%s:code->index2 %d\n",__func__,code->index); + return -EINVAL; + } + } +@@ -3688,7 +3719,7 @@ static int f2k_enum_frame_size(struct v4l2_subdev *sd, + { + dev_err(f2k->isp->dev,"%s:fse->index%d\n",__func__,fse->index); + return -EINVAL; +- } ++ } + + format.code = fse->code; + format.width = 1; +@@ -3697,11 +3728,11 @@ static int f2k_enum_frame_size(struct v4l2_subdev *sd, + fse->min_width = format.width; + fse->min_height = format.height; + +- if (format.code != fse->code) ++ if (format.code != fse->code) + { + dev_err(f2k->isp->dev,"%s:format.code,fse->code %d\n",__func__,fse->code); + return -EINVAL; +- } ++ } + + format.code = fse->code; + format.width = -1; +@@ -3736,7 +3767,7 @@ static int f2k_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_conf + { + dev_err(f2k->isp->dev,"%s:no pad\n",__func__); + return -EINVAL; +- } ++ } + + switch (sel->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: +@@ -3786,14 +3817,14 @@ static int f2k_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_conf + { + dev_err(f2k->isp->dev,"%s:pad == NULL\n",__func__); + return -EINVAL; +- } ++ } + + /* The crop rectangle can't be changed while streaming. */ + if (f2k->state != ISP_PIPELINE_STREAM_STOPPED) + { + dev_err(f2k->isp->dev,"%s:ISP_PIPELINE_STREAM_RUNNING\n",__func__); + return -EBUSY; +- } ++ } + + /* Modifying the crop rectangle always changes the format on the source + * pad. If the KEEP_CONFIG flag is set, just return the current crop +@@ -3891,7 +3922,7 @@ static int f2k_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config + dev_warn(f2k->isp->dev, "%s:pad error!\n",__func__); + return -EINVAL; + } +- ++ + if (fmt->pad == ISP_F2K_PAD_SINK) { + /* Reset the crop rectangle. */ + crop = &f2k->crop_in; +@@ -3899,7 +3930,7 @@ static int f2k_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config + crop->top = 0; + crop->width = fmt->format.width; + crop->height = fmt->format.height; +- // ++ // + format = &fmt->format; + f2k->formats[ISP_F2K_PAD_SINK].width = format->width; + f2k->formats[ISP_F2K_PAD_SINK].height = format->height; +@@ -3921,7 +3952,7 @@ static int f2k_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config + f2k->formats[ISP_F2K_PAD_MAIN_SOURCE].height = format->height; + f2k->formats[ISP_F2K_PAD_MAIN_SOURCE].field = V4L2_FIELD_NONE; + f2k->formats[ISP_F2K_PAD_MAIN_SOURCE].colorspace =V4L2_COLORSPACE_SRGB; +- f2k->formats[ISP_F2K_PAD_MAIN_SOURCE].code = format->code; ++ f2k->formats[ISP_F2K_PAD_MAIN_SOURCE].code = format->code; + } + + if (fmt->pad == ISP_F2K_PAD_DS0_SOURCE) { +@@ -3971,7 +4002,7 @@ static int f2k_link_validate(struct v4l2_subdev *sd, + { + dev_err(f2k->isp->dev,"%s:format error\n",__func__); + return -EPIPE; +- } ++ } + + return 0; + } +@@ -3998,7 +4029,7 @@ static int f2k_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) + format.format.code = f2k->formats[pad].code;//MEDIA_BUS_FMT_SRGGB10_1X10;//MEDIA_BUS_FMT_SGRBG10_1X10; + format.format.width = f2k->formats[pad].width;//1920;//4096; + format.format.height = f2k->formats[pad].height;//1080;//4096; +- f2k_set_format(sd, fh ? fh->pad : NULL, &format); ++ f2k_set_format(sd, fh ? fh->pad : NULL, &format); + } + + return 0; +@@ -4074,7 +4105,7 @@ static int f2k_link_setup(struct media_entity *entity, + { + dev_err(f2k->isp->dev,"%s:!ISP_F2K_INPUT_NONE\n",__func__); + return -EBUSY; +- } ++ } + + if (remote->entity == &f2k->subdev.entity) + f2k->input = ISP_F2K_INPUT_VI; +@@ -4089,21 +4120,21 @@ static int f2k_link_setup(struct media_entity *entity, + { + dev_err(f2k->isp->dev,"%s:!ISP_F2K_PAD_MAIN_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + f2k->output |= ISP_F2K_OUTPUT_MAIN_MEM; + } else { + f2k->output &= ~ISP_F2K_OUTPUT_MAIN_MEM; + } + break; + case ISP_F2K_PAD_DS0_SOURCE: +- case ISP_F2K_PAD_DS0_SOURCE | 2 << 16: ++ case ISP_F2K_PAD_DS0_SOURCE | 2 << 16: + /* Write to memory */ + if (flags & MEDIA_LNK_FL_ENABLED) { + if (f2k->output & ISP_F2K_OUTPUT_DS0_MEM) + { + dev_err(f2k->isp->dev,"%s:!ISP_F2K_PAD_DS0_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + f2k->output |= ISP_F2K_OUTPUT_DS0_MEM; + } else { + f2k->output &= ~ISP_F2K_OUTPUT_DS0_MEM; +@@ -4117,7 +4148,7 @@ static int f2k_link_setup(struct media_entity *entity, + { + dev_err(f2k->isp->dev,"%s:!ISP_F2K_PAD_DS1_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + f2k->output |= ISP_F2K_OUTPUT_DS1_MEM; + } else { + f2k->output &= ~ISP_F2K_OUTPUT_DS1_MEM; +@@ -4131,7 +4162,7 @@ static int f2k_link_setup(struct media_entity *entity, + { + dev_err(f2k->isp->dev,"%s:!ISP_F2K_PAD_DS2_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + f2k->output |= ISP_F2K_OUTPUT_DS2_MEM; + } else { + f2k->output &= ~ISP_F2K_OUTPUT_DS2_MEM; +@@ -4139,7 +4170,7 @@ static int f2k_link_setup(struct media_entity *entity, + break; + default: + dev_dbg(f2k->isp->dev,"%s:!no index\n",__func__); +- return -EINVAL; ++ return -EINVAL; + } + + dev_dbg(f2k->isp->dev,"%s:end\n",__func__); +@@ -4182,7 +4213,7 @@ int k510isp_f2k_register_entities(struct isp_f2k_device *f2k, + dev_err(f2k->isp->dev, "%s: v4l2_device_register_subdev failed (%d)\n", + __func__, ret); + goto error; +- } ++ } + + ret = k510isp_video_register(&f2k->video_out[MAIN_VIDEO], vdev); + if (ret < 0) +@@ -4222,7 +4253,7 @@ int k510isp_f2k_register_entities(struct isp_f2k_device *f2k, + k510isp_video_unregister(&f2k->video_out[DS1_VIDEO]); + error_ds0: + k510isp_video_unregister(&f2k->video_out[DS0_VIDEO]); +-error_main: ++error_main: + k510isp_video_unregister(&f2k->video_out[MAIN_VIDEO]); + error: + k510isp_f2k_unregister_entities(f2k); +@@ -4269,7 +4300,7 @@ static int k510isp_f2k_init_entities(struct isp_f2k_device *f2k) + { + dev_err(isp->dev,"%s:media_entity_pads_init ret:%d\n",__func__,ret); + return ret; +- } ++ } + dev_dbg(isp->dev,"%s:media_entity_pads_init end\n",__func__); + f2k_init_formats(sd, NULL); + // +@@ -4279,14 +4310,14 @@ static int k510isp_f2k_init_entities(struct isp_f2k_device *f2k) + f2k->video_out[MAIN_VIDEO].capture_mem = PAGE_ALIGN(4096 * 4096) * 3; + f2k->video_out[MAIN_VIDEO].bpl_alignment = 32; //16 + f2k->video_out[MAIN_VIDEO].bpl_max = 0xffffffe0;//0xfffffff0; //0xffffffe0 +- //f2k->output |= ISP_F2K_OUTPUT_MAIN_MEM; +- ++ //f2k->output |= ISP_F2K_OUTPUT_MAIN_MEM; ++ + ret = k510isp_video_init(&f2k->video_out[MAIN_VIDEO], "F2K"); + if (ret < 0) + { + dev_err(isp->dev,"%s:k510isp_video_init ret:%d\n",__func__,ret); + goto error_video; +- } ++ } + // + f2k->video_out[DS0_VIDEO].type = V4L2_BUF_TYPE_VIDEO_CAPTURE;//V4L2_BUF_TYPE_VIDEO_CAPTURE;//V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;//V4L2_BUF_TYPE_VIDEO_OUTPUT; + f2k->video_out[DS0_VIDEO].ops = &f2k_video_ops; +@@ -4338,13 +4369,13 @@ static int k510isp_f2k_init_entities(struct isp_f2k_device *f2k) + return 0; + + error_ds1_video: +- k510isp_video_cleanup(&f2k->video_out[DS1_VIDEO]); ++ k510isp_video_cleanup(&f2k->video_out[DS1_VIDEO]); + error_ds0_video: + k510isp_video_cleanup(&f2k->video_out[DS0_VIDEO]); + error_main_video: + k510isp_video_cleanup(&f2k->video_out[MAIN_VIDEO]); + error_video: +- media_entity_cleanup(&f2k->subdev.entity); ++ media_entity_cleanup(&f2k->subdev.entity); + return ret; + } + /* +@@ -4380,7 +4411,7 @@ int k510isp_f2k_init(struct k510_isp_device *isp) + dev_err(isp->dev,"%s:k510isp_f2k_init_entities\n",__func__); + mutex_destroy(&f2k->ioctl_lock); + return ret; +- } ++ } + dev_dbg(isp->dev,"%s:end\n",__func__); + return 0; + } +@@ -4403,5 +4434,5 @@ void k510isp_f2k_cleanup(struct k510_isp_device *isp) + dma_free_coherent(isp->dev, f2k->nr3d_dma.dma_size, f2k->nr3d_dma.addr, + f2k->nr3d_dma.dma); + // +- mutex_destroy(&f2k->ioctl_lock); ++ mutex_destroy(&f2k->ioctl_lock); + } +diff --git a/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c b/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c +index e878d5a8..54349efa 100755 +--- a/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c ++++ b/drivers/media/platform/canaan-isp/isp_2k/isp_r2k.c +@@ -43,69 +43,69 @@ static unsigned long long get_usec(void) + // + void isp_r2k_wrap_SetComRst(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_RST_CTL_S stRstCtl; +- stRstCtl.sw_3dnr_rst = 1; ++ stRstCtl.sw_3dnr_rst = 1; + stRstCtl.wdr_2_frame_rst = 1; + stRstCtl.wdr_3_frame_rst =1; +- stRstCtl.ldc_rst = 1; +- stRstCtl.main_out_rst = 1; +- stRstCtl.ds0_out_rst = 1; +- stRstCtl.ds1_out_rst = 1; +- stRstCtl.ds2_out_rst = 1; +- stRstCtl.wrap_com_rst = 1; +- stRstCtl.wrap_cfg_rst = 1; +- stRstCtl.core_com_rst = 1; +- stRstCtl.core_cfg_rst = 1; +- stRstCtl.axi_wr_ch_rst = 1; +- stRstCtl.axi_rd_ch_rst = 1; ++ stRstCtl.ldc_rst = 1; ++ stRstCtl.main_out_rst = 1; ++ stRstCtl.ds0_out_rst = 1; ++ stRstCtl.ds1_out_rst = 1; ++ stRstCtl.ds2_out_rst = 1; ++ stRstCtl.wrap_com_rst = 1; ++ stRstCtl.wrap_cfg_rst = 1; ++ stRstCtl.core_com_rst = 1; ++ stRstCtl.core_cfg_rst = 1; ++ stRstCtl.axi_wr_ch_rst = 1; ++ stRstCtl.axi_rd_ch_rst = 1; + Isp_Drv_R2k_Wrap_SetPipeReset(isp,&stRstCtl); + } + // + void isp_r2k_wrap_SetDmaRst(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_DMA_RST_CTL_S stDmaRstCtl; +- stDmaRstCtl.y_3dnr_wr_ch_rst = 1; +- stDmaRstCtl.uv_3dnr_wr_ch_rst = 1; +- stDmaRstCtl.ldc_y_wr_ch_rst = 1; +- stDmaRstCtl.ldc_uv_wr_ch_rst = 1; +- stDmaRstCtl.wdr_raw_wr_ch_rst = 1; +- stDmaRstCtl.main_out_y_wr_ch_rst = 1; ++ stDmaRstCtl.y_3dnr_wr_ch_rst = 1; ++ stDmaRstCtl.uv_3dnr_wr_ch_rst = 1; ++ stDmaRstCtl.ldc_y_wr_ch_rst = 1; ++ stDmaRstCtl.ldc_uv_wr_ch_rst = 1; ++ stDmaRstCtl.wdr_raw_wr_ch_rst = 1; ++ stDmaRstCtl.main_out_y_wr_ch_rst = 1; + stDmaRstCtl.main_out_uv_wr_ch_rst = 1; +- stDmaRstCtl.y_3dnr_rd_ch_rst = 1; +- stDmaRstCtl.uv_3dnr_rd_ch_rst = 1; +- stDmaRstCtl.ldc_y_rd_ch_rst = 1; +- stDmaRstCtl.ldc_uv_rd_ch_rst = 1; +- stDmaRstCtl.wdr_raw_rd_ch_rst = 1; +- stDmaRstCtl.ds0_out_y_wr_ch_rst = 1; +- stDmaRstCtl.ds0_out_uv_wr_ch_rst = 1; +- stDmaRstCtl.ds1_out_y_wr_ch_rst = 1; +- stDmaRstCtl.ds1_out_uv_wr_ch_rst = 1; +- stDmaRstCtl.ds2_out_r_wr_ch_rst = 1; +- stDmaRstCtl.ds2_out_g_wr_ch_rst = 1; +- stDmaRstCtl.ds2_out_b_wr_ch_rst = 1; +- stDmaRstCtl.ds0_osd0_rd_ch_rst = 1; +- stDmaRstCtl.ds0_osd1_rd_ch_rst = 1; +- stDmaRstCtl.ds1_osd0_rd_ch_rst = 1; +- stDmaRstCtl.ds1_osd1_rd_ch_rst = 1; +- stDmaRstCtl.ds2_osd0_rd_ch_rst = 1; +- stDmaRstCtl.ds2_osd1_rd_ch_rst = 1; +- stDmaRstCtl.ds1_osd2_rd_ch_rst = 1; +- stDmaRstCtl.ds2_osd2_rd_ch_rst = 1; ++ stDmaRstCtl.y_3dnr_rd_ch_rst = 1; ++ stDmaRstCtl.uv_3dnr_rd_ch_rst = 1; ++ stDmaRstCtl.ldc_y_rd_ch_rst = 1; ++ stDmaRstCtl.ldc_uv_rd_ch_rst = 1; ++ stDmaRstCtl.wdr_raw_rd_ch_rst = 1; ++ stDmaRstCtl.ds0_out_y_wr_ch_rst = 1; ++ stDmaRstCtl.ds0_out_uv_wr_ch_rst = 1; ++ stDmaRstCtl.ds1_out_y_wr_ch_rst = 1; ++ stDmaRstCtl.ds1_out_uv_wr_ch_rst = 1; ++ stDmaRstCtl.ds2_out_r_wr_ch_rst = 1; ++ stDmaRstCtl.ds2_out_g_wr_ch_rst = 1; ++ stDmaRstCtl.ds2_out_b_wr_ch_rst = 1; ++ stDmaRstCtl.ds0_osd0_rd_ch_rst = 1; ++ stDmaRstCtl.ds0_osd1_rd_ch_rst = 1; ++ stDmaRstCtl.ds1_osd0_rd_ch_rst = 1; ++ stDmaRstCtl.ds1_osd1_rd_ch_rst = 1; ++ stDmaRstCtl.ds2_osd0_rd_ch_rst = 1; ++ stDmaRstCtl.ds2_osd1_rd_ch_rst = 1; ++ stDmaRstCtl.ds1_osd2_rd_ch_rst = 1; ++ stDmaRstCtl.ds2_osd2_rd_ch_rst = 1; + Isp_Drv_R2k_Wrap_SetDmaReset(isp,&stDmaRstCtl); + } + // + void isp_r2k_wrap_SetPipeClkCtl(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_PIPE_CLK_CTL_S pstPipeClkCtl; + pstPipeClkCtl.wrap_com_clk_en = 1; + pstPipeClkCtl.wrap_cfg_clk_en = 1; + pstPipeClkCtl.core_com_clk_en = 1; + pstPipeClkCtl.core_cfg_clk_en = 1; +- pstPipeClkCtl.axi_wr_ch_en = 1; +- pstPipeClkCtl.axi_rd_ch_en = 1; ++ pstPipeClkCtl.axi_wr_ch_en = 1; ++ pstPipeClkCtl.axi_rd_ch_en = 1; + Isp_Drv_R2k_Wrap_SetComClkCtl(isp,&pstPipeClkCtl); + } + // +@@ -122,7 +122,7 @@ void isp_r2k_wrap_SetLdc(struct k510_isp_device *isp,struct isp_wrap_ldc_info *l + { + pstLdcAttr.ldc_clk_en = 0; + pstLdcAttr.ldc_dma_en = 0; +- } ++ } + ISP_WRAP_LDC_BUF_S *stLdcBuf = &pstLdcAttr.stLdcBuf; + stLdcBuf->ldc_y_buf_base = ldcInfo->ldc_y_buf_base;//ISP_BUF_LDC_Y; + stLdcBuf->ldc_uv_buf_base = ldcInfo->ldc_uv_buf_base;//ISP_BUF_LDC_UV; +@@ -133,7 +133,7 @@ void isp_r2k_wrap_SetLdc(struct k510_isp_device *isp,struct isp_wrap_ldc_info *l + // + void isp_r2k_wrap_SetMainOut(struct k510_isp_device *isp,struct isp_wrap_main_info *mainInfo) + { +- ++ + ISP_WRAP_MAINOUT_ATTR_S pstMainOutAttr; + pstMainOutAttr.main_out_clk_en = 1; + if( 1 == mainInfo->main_out_en) +@@ -213,9 +213,9 @@ void isp_r2k_wrap_SetDs0Out(struct k510_isp_device *isp,struct isp_wrap_ds0_info + stDs0ClkCtl->ds_out0_osd0_ch_clk_en = 0; + stDs0ClkCtl->ds_out0_osd1_ch_clk_en = 0; + stDs0ClkCtl->ds_out0_osd2_ch_clk_en = 0; +- stDs0DmaEn->ds_out0_dma_en = 0; ++ stDs0DmaEn->ds_out0_dma_en = 0; + stDs0DmaEn->ds_out0_y_ch_dma_en =0; +- stDs0DmaEn->ds_out0_uv_ch_dma_en = 0; ++ stDs0DmaEn->ds_out0_uv_ch_dma_en = 0; + stDs0DmaEn->ds0_osd0_ch_dma_en =0; + stDs0DmaEn->ds0_osd1_ch_dma_en = 0; + stDs0DmaEn->ds0_osd2_ch_dma_en = 0; +@@ -234,7 +234,7 @@ void isp_r2k_wrap_SetDs0Out(struct k510_isp_device *isp,struct isp_wrap_ds0_info + stDs0Buf->ds0_y_buf0_base = ds0Info->ds0_y_buf0_base;//ISP_BUF_DS0_Y; + stDs0Buf->ds0_y_buf1_base = ds0Info->ds0_y_buf1_base;//ISP_BUF_DS0_Y; + stDs0Buf->ds0_y_line_stride = ds0Info->ds0_line_stride;//(Width + 15)/16*16;//ISP_BUF_DS0_Y_STRIDE; +- stDs0Buf->ds0_uv_line_stride = ds0Info->ds0_line_stride;//(Width + 15)/16*16;//ISP_BUF_DS0_UV_STRIDE; ++ stDs0Buf->ds0_uv_line_stride = ds0Info->ds0_line_stride;//(Width + 15)/16*16;//ISP_BUF_DS0_UV_STRIDE; + stDs0Buf->ds0_uv_buf0_base = ds0Info->ds0_uv_buf0_base;//ISP_BUF_DS0_Y + stDs0Buf->ds0_y_line_stride * Height;//ISP_BUF_DS0_UV; + stDs0Buf->ds0_uv_buf1_base = ds0Info->ds0_uv_buf1_base;//ISP_BUF_DS0_Y + stDs0Buf->ds0_y_line_stride * Height;//ISP_BUF_DS0_UV; + Isp_Drv_R2k_Wrap_SetDs0Out(isp,&pstDs0OutAttr); +@@ -252,7 +252,7 @@ void isp_r2k_wrap_SetDs1Out(struct k510_isp_device *isp,struct isp_wrap_ds1_info + stDs1ClkCtl->ds1_out_clk_en = 1; + stDs1ClkCtl->ds1_out_y_ch_clk_en = 1; + stDs1ClkCtl->ds1_out_uv_ch_clk_en = 1; +- ++ + if( 1 == ds1Info->ds1_out_en) { + + stDs1ClkCtl->ds_out1_osd0_ch_clk_en = 0; +@@ -309,7 +309,7 @@ void isp_r2k_wrap_SetDs1Out(struct k510_isp_device *isp,struct isp_wrap_ds1_info + stDs1Buf->ds1_y_buf0_base = ds1Info->ds1_y_buf0_base;//ISP_BUF_DS1_Y; + stDs1Buf->ds1_y_buf1_base = ds1Info->ds1_y_buf1_base;//ISP_BUF_DS1_Y; + stDs1Buf->ds1_y_line_stride = ds1Info->ds1_line_stride;//(Width +15)/16*16;//ISP_BUF_DS1_Y_STRIDE; +- stDs1Buf->ds1_uv_line_stride = ds1Info->ds1_line_stride;//(Width +15)/16*16;//ISP_BUF_DS1_Y_STRIDE; ++ stDs1Buf->ds1_uv_line_stride = ds1Info->ds1_line_stride;//(Width +15)/16*16;//ISP_BUF_DS1_Y_STRIDE; + stDs1Buf->ds1_uv_buf0_base = ds1Info->ds1_uv_buf0_base;//ISP_BUF_DS1_Y + stDs1Buf->ds1_y_line_stride *Height;//ISP_BUF_DS1_UV; + stDs1Buf->ds1_uv_buf1_base = ds1Info->ds1_uv_buf1_base;//ISP_BUF_DS1_Y + stDs1Buf->ds1_y_line_stride *Height;//ISP_BUF_DS1_UV; + Isp_Drv_R2k_Wrap_SetDs1Out(isp,&pstDs1OutAttr); +@@ -317,7 +317,7 @@ void isp_r2k_wrap_SetDs1Out(struct k510_isp_device *isp,struct isp_wrap_ds1_info + // + void isp_r2k_wrap_SetDs2Out(struct k510_isp_device *isp,struct isp_wrap_ds2_info *ds2Info) + { +- ++ + unsigned int Width = ds2Info->ds2_size.Width; + unsigned int Height = ds2Info->ds2_size.Height; + ISP_WRAP_DS2OUT_ATTR_S pstDs2OutAttr; +@@ -367,7 +367,7 @@ void isp_r2k_wrap_SetDs2Out(struct k510_isp_device *isp,struct isp_wrap_ds2_info + } + ISP_WRAP_DS2_PIXEL_FORMAT_CTL_S *stDs2PixelFormat = &pstDs2OutAttr.stDs2PixelFormat; + stDs2PixelFormat->ds2_out_img_format = ds2Info->ds2_out_img_format;//ISP_RGBRAW_DATA; +- stDs2PixelFormat->ds2_out_img_out_format = ds2Info->ds2_out_img_out_format;//OUT_ARGB; ++ stDs2PixelFormat->ds2_out_img_out_format = ds2Info->ds2_out_img_out_format;//OUT_ARGB; + stDs2PixelFormat->ds2_out_pixel_width = ds2Info->ds2_out_pxl_width;//PIXEL_8; + stDs2PixelFormat->ds2_out_yuv422_pxl_order = ds2Info->ds2_out_yuv422_pxl_order;//YUYV; //not need + stDs2PixelFormat->ds2_out_yuv_in_format = ds2Info->ds2_out_yuv_in_format;//IN_YUV422; //not need +@@ -384,12 +384,12 @@ void isp_r2k_wrap_SetDs2Out(struct k510_isp_device *isp,struct isp_wrap_ds2_info + stDs2Buf->ds2_r_line_stride = ds2Info->ds2_line_stride; + stDs2Buf->ds2_g_line_stride = ds2Info->ds2_line_stride; + stDs2Buf->ds2_b_line_stride = ds2Info->ds2_line_stride; +- Isp_Drv_R2k_Wrap_SetDs2Out(isp,&pstDs2OutAttr); ++ Isp_Drv_R2k_Wrap_SetDs2Out(isp,&pstDs2OutAttr); + } + // + void isp_r2k_wrap_SetDmaConfig(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_DMA_ATTR_S pstDmaAttr; + unsigned int DmaChIndex = 0; + ISP_WRAP_DMA_MODE_S *stDmaChMode = &pstDmaAttr.stDmaChMode; +@@ -485,106 +485,106 @@ int isp_r2k_wrap_SetAxiCtl(struct k510_isp_device *isp) + */ + int isp_r2k_wrap_SetIntMask(struct k510_isp_device *isp) + { +- ++ + ISP_WRAP_CORE_INT_CTL_S stCoreIntCtl; +- stCoreIntCtl.int_raw_in_mask= 1 ; +- stCoreIntCtl.int_3a_mask= 1 ; +- stCoreIntCtl.raw_int_mask= 1 ; +- stCoreIntCtl.rgb_int_mask= 1 ; +- stCoreIntCtl.yuv_int_mask= 1 ; +- stCoreIntCtl.ldc_int_mask= 1 ; ++ stCoreIntCtl.int_raw_in_mask= 1 ; ++ stCoreIntCtl.int_3a_mask= 1 ; ++ stCoreIntCtl.raw_int_mask= 1 ; ++ stCoreIntCtl.rgb_int_mask= 1 ; ++ stCoreIntCtl.yuv_int_mask= 1 ; ++ stCoreIntCtl.ldc_int_mask= 1 ; + stCoreIntCtl.main_out_int_mask= 1 ; +- stCoreIntCtl.isp_awb_int_mask= 1 ; +- stCoreIntCtl.isp_ae_int_mask= 1 ; +- stCoreIntCtl.isp_af_int_mask= 1 ; ++ stCoreIntCtl.isp_awb_int_mask= 1 ; ++ stCoreIntCtl.isp_ae_int_mask= 1 ; ++ stCoreIntCtl.isp_af_int_mask= 1 ; + Isp_Drv_R2k_Wrap_SetCoreIntCtlMask(isp,&stCoreIntCtl); + ISP_WRAP_DMA_WR_INT_MASK0_S stDmaWRMask0; +- stDmaWRMask0.wr_3dnr_y_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_y_line_base_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_y_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_y_line_base_int_mask= 1 ; + stDmaWRMask0.wr_3dnr_y_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_y_err_immediate_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_line_base_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.wr_3dnr_uv_err_immediate_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_line_base_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_y_err_immediate_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_uv_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_uv_line_base_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_y_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_line_base_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wr_3dnr_uv_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_frm_end_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_line_base_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_y_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_uv_frm_end_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_uv_line_base_int_mask= 1 ; + stDmaWRMask0.ldc_wr_uv_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.ldc_wr_uv_err_immediate_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_frm_end_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_line_base_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.wdr_wr_raw_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.ldc_wr_uv_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_line_base_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.wdr_wr_raw_err_immediate_int_mask= 1 ; + stDmaWRMask0.main_out_wr_y_frm_end_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_y_line_base_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_y_err_frm_end_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_y_err_immediate_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_uv_frm_end_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_uv_line_base_int_mask= 1 ; +- stDmaWRMask0.main_out_wr_uv_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_y_line_base_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_y_err_frm_end_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_y_err_immediate_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_uv_frm_end_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_uv_line_base_int_mask= 1 ; ++ stDmaWRMask0.main_out_wr_uv_err_frm_end_int_mask= 1 ; + stDmaWRMask0.main_out_wr_uv_err_immediate_int_mask= 1 ; + Isp_Drv_R2k_Wrap_SetDmaWRIntMask0(isp,&stDmaWRMask0); + ISP_WRAP_DMA_WR_INT_MASK1_S stDmaWRMask1; +- stDmaWRMask1.ds0_out_wr_y_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_y_line_base_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_y_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_y_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_frm_end_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_line_base_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_y_err_immediate_mask= 1 ; + stDmaWRMask1.ds0_out_wr_uv_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_uv_line_base_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_uv_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds0_out_wr_uv_err_immediate_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_line_base_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_y_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_uv_line_base_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_uv_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds0_out_wr_uv_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_frm_end_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_line_base_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_y_err_immediate_mask= 1 ; + stDmaWRMask1.ds1_out_wr_uv_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_uv_line_base_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_uv_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds1_out_wr_uv_err_immediate_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_line_base_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_r_err_immediate_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_line_base_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_g_err_immediate_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_line_base_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_err_frm_end_mask= 1 ; +- stDmaWRMask1.ds2_out_wr_b_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_uv_line_base_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_uv_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds1_out_wr_uv_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_line_base_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_r_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_line_base_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_g_err_immediate_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_line_base_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_err_frm_end_mask= 1 ; ++ stDmaWRMask1.ds2_out_wr_b_err_immediate_mask= 1 ; + Isp_Drv_R2k_Wrap_SetDmaWRIntMask1(isp,&stDmaWRMask1); + ISP_WRAP_DMA_RD_INT_MASK0_S stDmaRDMask0; + stDmaRDMask0.rd_3dnr_y_frm_end_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_y_line_base_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_y_err_frm_end_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_y_err_immediate_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_uv_frm_end_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_uv_line_base_int_mask= 1 ; +- stDmaRDMask0.rd_3dnr_uv_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_y_line_base_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_y_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_y_err_immediate_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_uv_frm_end_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_uv_line_base_int_mask= 1 ; ++ stDmaRDMask0.rd_3dnr_uv_err_frm_end_int_mask= 1 ; + stDmaRDMask0.rd_3dnr_uv_err_immediate_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_line_base_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_err_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_y_err_immediate_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_line_base_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_y_err_immediate_int_mask= 1 ; + stDmaRDMask0.ldc_rd_uv_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_uv_line_base_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_uv_err_frm_end_int_mask= 1 ; +- stDmaRDMask0.ldc_rd_uv_err_immediate_int_mask= 1 ; +- stDmaRDMask0.wdr_rd_raw_frm_end_int_mask= 1 ; +- stDmaRDMask0.wdr_rd_raw_line_base_int_mask= 1 ; +- stDmaRDMask0.wdr_rd_raw_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_uv_line_base_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_uv_err_frm_end_int_mask= 1 ; ++ stDmaRDMask0.ldc_rd_uv_err_immediate_int_mask= 1 ; ++ stDmaRDMask0.wdr_rd_raw_frm_end_int_mask= 1 ; ++ stDmaRDMask0.wdr_rd_raw_line_base_int_mask= 1 ; ++ stDmaRDMask0.wdr_rd_raw_err_frm_end_int_mask= 1 ; + stDmaRDMask0.wdr_rd_raw_err_immediate_int_mask= 1 ; +- Isp_Drv_R2k_Wrap_SetDmaRDIntMask0(isp,&stDmaRDMask0); ++ Isp_Drv_R2k_Wrap_SetDmaRDIntMask0(isp,&stDmaRDMask0); + } + // + int isp_r2k_wrap_SetConfigDone(struct k510_isp_device *isp,unsigned int wp_en) + { +- ++ + ISP_WRAP_CONFIG_DONE_S pstConfigDone; + pstConfigDone.int_polarity = 1; + pstConfigDone.sen_reg_pro_en = wp_en;//0; +@@ -595,7 +595,7 @@ int isp_r2k_wrap_SetConfigDone(struct k510_isp_device *isp,unsigned int wp_en) + else + { + pstConfigDone.wrap_config_done_en = 1; +- } ++ } + Isp_Drv_R2k_Wrap_SetConfigdoneCtl(isp,&pstConfigDone); + return 0; + } +@@ -604,7 +604,7 @@ int isp_r2k_wrap_reset(struct k510_isp_device *isp) + { + unsigned int stData; + union U_ISP_WRAP_AXI_CTL axi_ctl; +- ++ + isp_r2k_wrap_SetConfigDone(isp,1); + // + stData = 0; +@@ -613,9 +613,9 @@ int isp_r2k_wrap_reset(struct k510_isp_device *isp) + msleep(50); + + axi_ctl.u32 = 0; +- axi_ctl.bits.axi_wr_ch_rst_req = 1; +- axi_ctl.bits.axi_rd_ch_rst_req = 1; +- isp_reg_writel(isp, axi_ctl.u32, ISP_IOMEM_R2K_WRAP, ISP_WRAP_AXI_CTL); ++ axi_ctl.bits.axi_wr_ch_rst_req = 1; ++ axi_ctl.bits.axi_rd_ch_rst_req = 1; ++ isp_reg_writel(isp, axi_ctl.u32, ISP_IOMEM_R2K_WRAP, ISP_WRAP_AXI_CTL); + axi_ctl.u32 = 0; + axi_ctl = (union U_ISP_WRAP_AXI_CTL)isp_reg_readl(isp, ISP_IOMEM_R2K_WRAP, ISP_WRAP_AXI_CTL); + printk("%s>AXI_CTL = 0x%x\n", __func__, axi_ctl); +@@ -627,10 +627,10 @@ int isp_r2k_wrap_reset(struct k510_isp_device *isp) + } + + isp_r2k_wrap_SetConfigDone(isp,1); +- ++ + stData = 0; + isp_reg_writel(isp,stData,ISP_IOMEM_R2K_WRAP,ISP_WRAP_PIPE_CLK_CTL); +- ++ + // + stData = 0xffffffff; + isp_reg_writel(isp,stData,ISP_IOMEM_R2K_WRAP,ISP_WRAP_SWRST_CTL); +@@ -680,9 +680,9 @@ static int isp_r2k_wrap_config(struct isp_r2k_device *r2k,struct isp_wrap_cfg_in + // + isp_r2k_wrap_SetIntMask(isp); + // +- isp_r2k_wrap_SetConfigDone(isp,0); ++ isp_r2k_wrap_SetConfigDone(isp,0); + +- return 0; ++ return 0; + } + /**************************************************************************** + *wrap int +@@ -690,16 +690,16 @@ static int isp_r2k_wrap_config(struct isp_r2k_device *r2k,struct isp_wrap_cfg_in + int isp_r2k_wrap_setIntCore(struct k510_isp_device *isp,struct isp_wrap_intcore_info *intCoreEn) + { + ISP_WRAP_CORE_INT_CTL_S coreIntMask; +- coreIntMask.int_raw_in_mask = ~intCoreEn->int_raw_in_en; +- coreIntMask.int_3a_mask = ~intCoreEn->int_3a_en; +- coreIntMask.raw_int_mask = ~intCoreEn->raw_int_en; +- coreIntMask.rgb_int_mask = ~intCoreEn->rgb_int_en; +- coreIntMask.yuv_int_mask = ~intCoreEn->yuv_int_en; +- coreIntMask.ldc_int_mask = ~intCoreEn->ldc_int_en; ++ coreIntMask.int_raw_in_mask = ~intCoreEn->int_raw_in_en; ++ coreIntMask.int_3a_mask = ~intCoreEn->int_3a_en; ++ coreIntMask.raw_int_mask = ~intCoreEn->raw_int_en; ++ coreIntMask.rgb_int_mask = ~intCoreEn->rgb_int_en; ++ coreIntMask.yuv_int_mask = ~intCoreEn->yuv_int_en; ++ coreIntMask.ldc_int_mask = ~intCoreEn->ldc_int_en; + coreIntMask.main_out_int_mask = ~intCoreEn->main_out_int_en; +- coreIntMask.isp_awb_int_mask = ~intCoreEn->isp_awb_int_en; +- coreIntMask.isp_ae_int_mask = ~intCoreEn->isp_ae_int_en; +- coreIntMask.isp_af_int_mask = ~intCoreEn->isp_af_int_en; ++ coreIntMask.isp_awb_int_mask = ~intCoreEn->isp_awb_int_en; ++ coreIntMask.isp_ae_int_mask = ~intCoreEn->isp_ae_int_en; ++ coreIntMask.isp_af_int_mask = ~intCoreEn->isp_af_int_en; + Isp_Drv_R2k_Wrap_SetCoreIntCtlMask(isp,&coreIntMask); + return 0; + }; +@@ -708,33 +708,33 @@ int isp_r2k_wrap_setIntWr0(struct k510_isp_device *isp,struct isp_wrap_intwr0_in + { + + ISP_WRAP_DMA_WR_INT_MASK0_S wrIntMask0; +- wrIntMask0.wr_3dnr_y_frm_end_int_mask = ~intWr0En->wr_3dnr_y_frm_end_int_en; +- wrIntMask0.wr_3dnr_y_line_base_int_mask = ~intWr0En->wr_3dnr_y_line_base_int_en; ++ wrIntMask0.wr_3dnr_y_frm_end_int_mask = ~intWr0En->wr_3dnr_y_frm_end_int_en; ++ wrIntMask0.wr_3dnr_y_line_base_int_mask = ~intWr0En->wr_3dnr_y_line_base_int_en; + wrIntMask0.wr_3dnr_y_err_frm_end_int_mask = ~intWr0En->wr_3dnr_y_err_frm_end_int_en; +- wrIntMask0.wr_3dnr_y_err_immediate_int_mask = ~intWr0En->wr_3dnr_y_err_immediate_int_en; +- wrIntMask0.wr_3dnr_uv_frm_end_int_mask = ~intWr0En->wr_3dnr_uv_frm_end_int_en; +- wrIntMask0.wr_3dnr_uv_line_base_int_mask = ~intWr0En->wr_3dnr_uv_line_base_int_en; +- wrIntMask0.wr_3dnr_uv_err_frm_end_int_mask = ~intWr0En->wr_3dnr_uv_err_frm_end_int_en; +- wrIntMask0.wr_3dnr_uv_err_immediate_int_mask = ~intWr0En->wr_3dnr_uv_err_immediate_int_en; +- wrIntMask0.ldc_wr_y_frm_end_int_mask = ~intWr0En->ldc_wr_y_frm_end_int_en; +- wrIntMask0.ldc_wr_y_line_base_int_mask = ~intWr0En->ldc_wr_y_line_base_int_en; +- wrIntMask0.ldc_wr_y_err_frm_end_int_mask = ~intWr0En->ldc_wr_y_err_frm_end_int_en; +- wrIntMask0.ldc_wr_y_err_immediate_int_mask = ~intWr0En->ldc_wr_y_err_immediate_int_en; +- wrIntMask0.ldc_wr_uv_frm_end_int_mask = ~intWr0En->ldc_wr_uv_frm_end_int_en; +- wrIntMask0.ldc_wr_uv_line_base_int_mask = ~intWr0En->ldc_wr_uv_line_base_int_en; ++ wrIntMask0.wr_3dnr_y_err_immediate_int_mask = ~intWr0En->wr_3dnr_y_err_immediate_int_en; ++ wrIntMask0.wr_3dnr_uv_frm_end_int_mask = ~intWr0En->wr_3dnr_uv_frm_end_int_en; ++ wrIntMask0.wr_3dnr_uv_line_base_int_mask = ~intWr0En->wr_3dnr_uv_line_base_int_en; ++ wrIntMask0.wr_3dnr_uv_err_frm_end_int_mask = ~intWr0En->wr_3dnr_uv_err_frm_end_int_en; ++ wrIntMask0.wr_3dnr_uv_err_immediate_int_mask = ~intWr0En->wr_3dnr_uv_err_immediate_int_en; ++ wrIntMask0.ldc_wr_y_frm_end_int_mask = ~intWr0En->ldc_wr_y_frm_end_int_en; ++ wrIntMask0.ldc_wr_y_line_base_int_mask = ~intWr0En->ldc_wr_y_line_base_int_en; ++ wrIntMask0.ldc_wr_y_err_frm_end_int_mask = ~intWr0En->ldc_wr_y_err_frm_end_int_en; ++ wrIntMask0.ldc_wr_y_err_immediate_int_mask = ~intWr0En->ldc_wr_y_err_immediate_int_en; ++ wrIntMask0.ldc_wr_uv_frm_end_int_mask = ~intWr0En->ldc_wr_uv_frm_end_int_en; ++ wrIntMask0.ldc_wr_uv_line_base_int_mask = ~intWr0En->ldc_wr_uv_line_base_int_en; + wrIntMask0.ldc_wr_uv_err_frm_end_int_mask = ~intWr0En->ldc_wr_uv_err_frm_end_int_en; +- wrIntMask0.ldc_wr_uv_err_immediate_int_mask = ~intWr0En->ldc_wr_uv_err_immediate_int_en; +- wrIntMask0.wdr_wr_raw_frm_end_int_mask = ~intWr0En->wdr_wr_raw_frm_end_int_en; +- wrIntMask0.wdr_wr_raw_line_base_int_mask = ~intWr0En->wdr_wr_raw_line_base_int_en; +- wrIntMask0.wdr_wr_raw_err_frm_end_int_mask = ~intWr0En->wdr_wr_raw_err_frm_end_int_en; +- wrIntMask0.wdr_wr_raw_err_immediate_int_mask = ~intWr0En->wdr_wr_raw_err_immediate_int_en; ++ wrIntMask0.ldc_wr_uv_err_immediate_int_mask = ~intWr0En->ldc_wr_uv_err_immediate_int_en; ++ wrIntMask0.wdr_wr_raw_frm_end_int_mask = ~intWr0En->wdr_wr_raw_frm_end_int_en; ++ wrIntMask0.wdr_wr_raw_line_base_int_mask = ~intWr0En->wdr_wr_raw_line_base_int_en; ++ wrIntMask0.wdr_wr_raw_err_frm_end_int_mask = ~intWr0En->wdr_wr_raw_err_frm_end_int_en; ++ wrIntMask0.wdr_wr_raw_err_immediate_int_mask = ~intWr0En->wdr_wr_raw_err_immediate_int_en; + wrIntMask0.main_out_wr_y_frm_end_int_mask = ~intWr0En->main_out_wr_y_frm_end_int_en; +- wrIntMask0.main_out_wr_y_line_base_int_mask = ~intWr0En->main_out_wr_y_line_base_int_en; +- wrIntMask0.main_out_wr_y_err_frm_end_int_mask = ~intWr0En->main_out_wr_y_err_frm_end_int_en; +- wrIntMask0.main_out_wr_y_err_immediate_int_mask = ~intWr0En->main_out_wr_y_err_immediate_int_en; +- wrIntMask0.main_out_wr_uv_frm_end_int_mask = ~intWr0En->main_out_wr_uv_frm_end_int_en; +- wrIntMask0.main_out_wr_uv_line_base_int_mask = ~intWr0En->main_out_wr_uv_line_base_int_en; +- wrIntMask0.main_out_wr_uv_err_frm_end_int_mask = ~intWr0En->main_out_wr_uv_err_frm_end_int_en; ++ wrIntMask0.main_out_wr_y_line_base_int_mask = ~intWr0En->main_out_wr_y_line_base_int_en; ++ wrIntMask0.main_out_wr_y_err_frm_end_int_mask = ~intWr0En->main_out_wr_y_err_frm_end_int_en; ++ wrIntMask0.main_out_wr_y_err_immediate_int_mask = ~intWr0En->main_out_wr_y_err_immediate_int_en; ++ wrIntMask0.main_out_wr_uv_frm_end_int_mask = ~intWr0En->main_out_wr_uv_frm_end_int_en; ++ wrIntMask0.main_out_wr_uv_line_base_int_mask = ~intWr0En->main_out_wr_uv_line_base_int_en; ++ wrIntMask0.main_out_wr_uv_err_frm_end_int_mask = ~intWr0En->main_out_wr_uv_err_frm_end_int_en; + wrIntMask0.main_out_wr_uv_err_immediate_int_mask = ~intWr0En->main_out_wr_uv_err_immediate_int_en; + dev_dbg(isp->dev,"%s:wrIntMask0(0x%x)\n",__func__,wrIntMask0); + Isp_Drv_R2k_Wrap_SetDmaWRIntMask0(isp,&wrIntMask0); +@@ -745,102 +745,102 @@ int isp_r2k_wrap_setIntWr1(struct k510_isp_device *isp,struct isp_wrap_intwr1_in + { + ISP_WRAP_DMA_WR_INT_MASK1_S wrIntMask1; + wrIntMask1.ds0_out_wr_y_frm_end_mask = ~intWr1En->ds0_out_wr_y_frm_end_en; +- wrIntMask1.ds0_out_wr_y_line_base_mask = ~intWr1En->ds0_out_wr_y_line_base_en; +- wrIntMask1.ds0_out_wr_y_err_frm_end_mask = ~intWr1En->ds0_out_wr_y_err_frm_end_en; +- wrIntMask1.ds0_out_wr_y_err_immediate_mask = ~intWr1En->ds0_out_wr_y_err_immediate_en; +- wrIntMask1.ds0_out_wr_uv_frm_end_mask = ~intWr1En->ds0_out_wr_uv_frm_end_en; +- wrIntMask1.ds0_out_wr_uv_line_base_mask = ~intWr1En->ds0_out_wr_uv_line_base_en; +- wrIntMask1.ds0_out_wr_uv_err_frm_end_mask = ~intWr1En->ds0_out_wr_uv_err_frm_end_en; ++ wrIntMask1.ds0_out_wr_y_line_base_mask = ~intWr1En->ds0_out_wr_y_line_base_en; ++ wrIntMask1.ds0_out_wr_y_err_frm_end_mask = ~intWr1En->ds0_out_wr_y_err_frm_end_en; ++ wrIntMask1.ds0_out_wr_y_err_immediate_mask = ~intWr1En->ds0_out_wr_y_err_immediate_en; ++ wrIntMask1.ds0_out_wr_uv_frm_end_mask = ~intWr1En->ds0_out_wr_uv_frm_end_en; ++ wrIntMask1.ds0_out_wr_uv_line_base_mask = ~intWr1En->ds0_out_wr_uv_line_base_en; ++ wrIntMask1.ds0_out_wr_uv_err_frm_end_mask = ~intWr1En->ds0_out_wr_uv_err_frm_end_en; + wrIntMask1.ds0_out_wr_uv_err_immediate_mask = ~intWr1En->ds0_out_wr_uv_err_immediate_en; + wrIntMask1.ds1_out_wr_y_frm_end_mask = ~intWr1En->ds1_out_wr_y_frm_end_en; +- wrIntMask1.ds1_out_wr_y_line_base_mask = ~intWr1En->ds1_out_wr_y_line_base_en; +- wrIntMask1.ds1_out_wr_y_err_frm_end_mask = ~intWr1En->ds1_out_wr_y_err_frm_end_en; +- wrIntMask1.ds1_out_wr_y_err_immediate_mask = ~intWr1En->ds1_out_wr_y_err_immediate_en; +- wrIntMask1.ds1_out_wr_uv_frm_end_mask = ~intWr1En->ds1_out_wr_uv_frm_end_en; +- wrIntMask1.ds1_out_wr_uv_line_base_mask = ~intWr1En->ds1_out_wr_uv_line_base_en; +- wrIntMask1.ds1_out_wr_uv_err_frm_end_mask = ~intWr1En->ds1_out_wr_uv_err_frm_end_en; ++ wrIntMask1.ds1_out_wr_y_line_base_mask = ~intWr1En->ds1_out_wr_y_line_base_en; ++ wrIntMask1.ds1_out_wr_y_err_frm_end_mask = ~intWr1En->ds1_out_wr_y_err_frm_end_en; ++ wrIntMask1.ds1_out_wr_y_err_immediate_mask = ~intWr1En->ds1_out_wr_y_err_immediate_en; ++ wrIntMask1.ds1_out_wr_uv_frm_end_mask = ~intWr1En->ds1_out_wr_uv_frm_end_en; ++ wrIntMask1.ds1_out_wr_uv_line_base_mask = ~intWr1En->ds1_out_wr_uv_line_base_en; ++ wrIntMask1.ds1_out_wr_uv_err_frm_end_mask = ~intWr1En->ds1_out_wr_uv_err_frm_end_en; + wrIntMask1.ds1_out_wr_uv_err_immediate_mask = ~intWr1En->ds1_out_wr_uv_err_immediate_en; + wrIntMask1.ds2_out_wr_r_frm_end_mask = ~intWr1En->ds2_out_wr_r_frm_end_en; +- wrIntMask1.ds2_out_wr_r_line_base_mask = ~intWr1En->ds2_out_wr_r_line_base_en; +- wrIntMask1.ds2_out_wr_r_err_frm_end_mask = ~intWr1En->ds2_out_wr_r_err_frm_end_en; +- wrIntMask1.ds2_out_wr_r_err_immediate_mask = ~intWr1En->ds2_out_wr_r_err_immediate_en; ++ wrIntMask1.ds2_out_wr_r_line_base_mask = ~intWr1En->ds2_out_wr_r_line_base_en; ++ wrIntMask1.ds2_out_wr_r_err_frm_end_mask = ~intWr1En->ds2_out_wr_r_err_frm_end_en; ++ wrIntMask1.ds2_out_wr_r_err_immediate_mask = ~intWr1En->ds2_out_wr_r_err_immediate_en; + wrIntMask1.ds2_out_wr_g_frm_end_mask = ~intWr1En->ds2_out_wr_g_frm_end_en; +- wrIntMask1.ds2_out_wr_g_line_base_mask = ~intWr1En->ds2_out_wr_g_line_base_en; +- wrIntMask1.ds2_out_wr_g_err_frm_end_mask = ~intWr1En->ds2_out_wr_g_err_frm_end_en; +- wrIntMask1.ds2_out_wr_g_err_immediate_mask = ~intWr1En->ds2_out_wr_g_err_immediate_en; ++ wrIntMask1.ds2_out_wr_g_line_base_mask = ~intWr1En->ds2_out_wr_g_line_base_en; ++ wrIntMask1.ds2_out_wr_g_err_frm_end_mask = ~intWr1En->ds2_out_wr_g_err_frm_end_en; ++ wrIntMask1.ds2_out_wr_g_err_immediate_mask = ~intWr1En->ds2_out_wr_g_err_immediate_en; + wrIntMask1.ds2_out_wr_b_frm_end_mask = ~intWr1En->ds2_out_wr_b_frm_end_en; +- wrIntMask1.ds2_out_wr_b_line_base_mask = ~intWr1En->ds2_out_wr_b_line_base_en; +- wrIntMask1.ds2_out_wr_b_err_frm_end_mask = ~intWr1En->ds0_out_wr_uv_err_frm_end_en; +- wrIntMask1.ds2_out_wr_b_err_immediate_mask = ~intWr1En->ds0_out_wr_uv_err_immediate_en; +- dev_dbg(isp->dev,"%s:wrIntMask1(0x%x)\n",__func__,wrIntMask1); ++ wrIntMask1.ds2_out_wr_b_line_base_mask = ~intWr1En->ds2_out_wr_b_line_base_en; ++ wrIntMask1.ds2_out_wr_b_err_frm_end_mask = ~intWr1En->ds0_out_wr_uv_err_frm_end_en; ++ wrIntMask1.ds2_out_wr_b_err_immediate_mask = ~intWr1En->ds0_out_wr_uv_err_immediate_en; ++ dev_dbg(isp->dev,"%s:wrIntMask1(0x%x)\n",__func__,wrIntMask1); + Isp_Drv_R2k_Wrap_SetDmaWRIntMask1(isp,&wrIntMask1); + return 0; + } + // + int isp_r2k_wrap_setIntRd0(struct k510_isp_device *isp,struct isp_wrap_intrd0_info *intRd0En) + { +- ++ + ISP_WRAP_DMA_RD_INT_MASK0_S rdIntMask0; + rdIntMask0.rd_3dnr_y_frm_end_int_mask = ~intRd0En->rd_3dnr_y_frm_end_int_en; +- rdIntMask0.rd_3dnr_y_line_base_int_mask = ~intRd0En->rd_3dnr_y_line_base_int_en; +- rdIntMask0.rd_3dnr_y_err_frm_end_int_mask = ~intRd0En->rd_3dnr_y_err_frm_end_int_en; +- rdIntMask0.rd_3dnr_y_err_immediate_int_mask = ~intRd0En->rd_3dnr_y_err_immediate_int_en; +- rdIntMask0.rd_3dnr_uv_frm_end_int_mask = ~intRd0En->rd_3dnr_uv_frm_end_int_en; +- rdIntMask0.rd_3dnr_uv_line_base_int_mask = ~intRd0En->rd_3dnr_uv_line_base_int_en; +- rdIntMask0.rd_3dnr_uv_err_frm_end_int_mask = ~intRd0En->rd_3dnr_uv_err_frm_end_int_en; ++ rdIntMask0.rd_3dnr_y_line_base_int_mask = ~intRd0En->rd_3dnr_y_line_base_int_en; ++ rdIntMask0.rd_3dnr_y_err_frm_end_int_mask = ~intRd0En->rd_3dnr_y_err_frm_end_int_en; ++ rdIntMask0.rd_3dnr_y_err_immediate_int_mask = ~intRd0En->rd_3dnr_y_err_immediate_int_en; ++ rdIntMask0.rd_3dnr_uv_frm_end_int_mask = ~intRd0En->rd_3dnr_uv_frm_end_int_en; ++ rdIntMask0.rd_3dnr_uv_line_base_int_mask = ~intRd0En->rd_3dnr_uv_line_base_int_en; ++ rdIntMask0.rd_3dnr_uv_err_frm_end_int_mask = ~intRd0En->rd_3dnr_uv_err_frm_end_int_en; + rdIntMask0.rd_3dnr_uv_err_immediate_int_mask = ~intRd0En->rd_3dnr_uv_err_immediate_int_en; +- rdIntMask0.ldc_rd_y_frm_end_int_mask = ~intRd0En->ldc_rd_y_frm_end_int_en; +- rdIntMask0.ldc_rd_y_line_base_int_mask = ~intRd0En->ldc_rd_y_line_base_int_en; +- rdIntMask0.ldc_rd_y_err_frm_end_int_mask = ~intRd0En->ldc_rd_y_err_frm_end_int_en; +- rdIntMask0.ldc_rd_y_err_immediate_int_mask = ~intRd0En->ldc_rd_y_err_immediate_int_en; ++ rdIntMask0.ldc_rd_y_frm_end_int_mask = ~intRd0En->ldc_rd_y_frm_end_int_en; ++ rdIntMask0.ldc_rd_y_line_base_int_mask = ~intRd0En->ldc_rd_y_line_base_int_en; ++ rdIntMask0.ldc_rd_y_err_frm_end_int_mask = ~intRd0En->ldc_rd_y_err_frm_end_int_en; ++ rdIntMask0.ldc_rd_y_err_immediate_int_mask = ~intRd0En->ldc_rd_y_err_immediate_int_en; + rdIntMask0.ldc_rd_uv_frm_end_int_mask = ~intRd0En->ldc_rd_uv_frm_end_int_en; +- rdIntMask0.ldc_rd_uv_line_base_int_mask = ~intRd0En->ldc_rd_uv_line_base_int_en; +- rdIntMask0.ldc_rd_uv_err_frm_end_int_mask = ~intRd0En->ldc_rd_uv_err_frm_end_int_en; +- rdIntMask0.ldc_rd_uv_err_immediate_int_mask = ~intRd0En->ldc_rd_uv_err_immediate_int_en; +- rdIntMask0.wdr_rd_raw_frm_end_int_mask = ~intRd0En->wdr_rd_raw_frm_end_int_en; +- rdIntMask0.wdr_rd_raw_line_base_int_mask = ~intRd0En->wdr_rd_raw_line_base_int_en; +- rdIntMask0.wdr_rd_raw_err_frm_end_int_mask = ~intRd0En->wdr_rd_raw_err_frm_end_int_en; ++ rdIntMask0.ldc_rd_uv_line_base_int_mask = ~intRd0En->ldc_rd_uv_line_base_int_en; ++ rdIntMask0.ldc_rd_uv_err_frm_end_int_mask = ~intRd0En->ldc_rd_uv_err_frm_end_int_en; ++ rdIntMask0.ldc_rd_uv_err_immediate_int_mask = ~intRd0En->ldc_rd_uv_err_immediate_int_en; ++ rdIntMask0.wdr_rd_raw_frm_end_int_mask = ~intRd0En->wdr_rd_raw_frm_end_int_en; ++ rdIntMask0.wdr_rd_raw_line_base_int_mask = ~intRd0En->wdr_rd_raw_line_base_int_en; ++ rdIntMask0.wdr_rd_raw_err_frm_end_int_mask = ~intRd0En->wdr_rd_raw_err_frm_end_int_en; + rdIntMask0.wdr_rd_raw_err_immediate_int_mask = ~intRd0En->wdr_rd_raw_err_immediate_int_en; + Isp_Drv_R2k_Wrap_SetDmaRDIntMask0(isp,&rdIntMask0); + return 0; + } + +-void k510isp_r2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq_info) ++void k510isp_r2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq_info) + { + dev_dbg(isp->dev,"%s:start\n",__func__); + struct isp_wrap_intcore_info intCoreEn; + intCoreEn.int_raw_in_en = irq_info->raw_en; + if((1 ==irq_info->awb_en)||(1 ==irq_info->ae_en)||(1 ==irq_info->af_en)) + { +- intCoreEn.int_3a_en = 1; ++ intCoreEn.int_3a_en = 1; + } +- else +- intCoreEn.int_3a_en = 0; ++ else ++ intCoreEn.int_3a_en = 0; + +- intCoreEn.raw_int_en = irq_info->raw_en; +- intCoreEn.rgb_int_en = irq_info->rgb_en; +- intCoreEn.yuv_int_en = irq_info->yuv_en; +- intCoreEn.ldc_int_en = irq_info->ldc_core_en; ++ intCoreEn.raw_int_en = irq_info->raw_en; ++ intCoreEn.rgb_int_en = irq_info->rgb_en; ++ intCoreEn.yuv_int_en = irq_info->yuv_en; ++ intCoreEn.ldc_int_en = irq_info->ldc_core_en; + intCoreEn.main_out_int_en = irq_info->main_core_en; +-#if 0 +- intCoreEn.isp_awb_int_en = irq_info->awb_en; +- intCoreEn.isp_ae_int_en = irq_info->ae_en; +- intCoreEn.isp_af_int_en = irq_info->af_en; ++#if 0 ++ intCoreEn.isp_awb_int_en = irq_info->awb_en; ++ intCoreEn.isp_ae_int_en = irq_info->ae_en; ++ intCoreEn.isp_af_int_en = irq_info->af_en; + #else +- intCoreEn.isp_awb_int_en = 0; +- intCoreEn.isp_ae_int_en = 0; +- intCoreEn.isp_af_int_en = 0; ++ intCoreEn.isp_awb_int_en = 0; ++ intCoreEn.isp_ae_int_en = 0; ++ intCoreEn.isp_af_int_en = 0; + #endif + + isp_r2k_wrap_setIntCore(isp,&intCoreEn); + + static struct isp_wrap_intwr0_info intWr0En; +- intWr0En.wr_3dnr_y_frm_end_int_en = irq_info->nr3d_w_en; ++ intWr0En.wr_3dnr_y_frm_end_int_en = irq_info->nr3d_w_en; + intWr0En.wr_3dnr_uv_frm_end_int_en = irq_info->nr3d_w_en; + intWr0En.ldc_wr_y_frm_end_int_en = irq_info->ldc_w_en; + intWr0En.ldc_wr_uv_frm_end_int_en = irq_info->ldc_w_en; + intWr0En.wdr_wr_raw_frm_end_int_en = irq_info->wdr_w_en; +- intWr0En.main_out_wr_y_frm_end_int_en = irq_info->main_dma_en; ++ intWr0En.main_out_wr_y_frm_end_int_en = irq_info->main_dma_en; + intWr0En.main_out_wr_uv_frm_end_int_en = irq_info->main_dma_en; + dev_dbg(isp->dev,"%s:intWr0En(0x%x)\n",__func__,intWr0En); + isp_r2k_wrap_setIntWr0(isp,&intWr0En); +@@ -859,7 +859,7 @@ void k510isp_r2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq + static struct isp_wrap_intrd0_info intRd0En; + intRd0En.rd_3dnr_y_frm_end_int_en = irq_info->nr3d_r_en; + intRd0En.rd_3dnr_uv_frm_end_int_en = irq_info->nr3d_r_en; +- intRd0En.ldc_rd_y_frm_end_int_en = irq_info->ldc_r_en; ++ intRd0En.ldc_rd_y_frm_end_int_en = irq_info->ldc_r_en; + intRd0En.ldc_rd_uv_frm_end_int_en = irq_info->ldc_r_en; + intRd0En.wdr_rd_raw_frm_end_int_en = irq_info->wdr_r_en; + isp_r2k_wrap_setIntRd0(isp,&intRd0En); +@@ -870,14 +870,14 @@ void k510isp_r2k_irq_enable(struct k510_isp_device *isp,struct isp_irq_info *irq + //ITC + static int isp_r2k_core_SetItc(struct k510_isp_device *isp,ITC_INFO_S *itcInfo) + { +- ++ + ISP_CORE_ITC_CTL_S stItcCtl; +- stItcCtl.hsync_pol = itcInfo->hsync_pol; +- stItcCtl.vsync_pol = itcInfo->vsync_pol; +- stItcCtl.hsync_input_timing = itcInfo->hsync_input_timing; ++ stItcCtl.hsync_pol = itcInfo->hsync_pol; ++ stItcCtl.vsync_pol = itcInfo->vsync_pol; ++ stItcCtl.hsync_input_timing = itcInfo->hsync_input_timing; + stItcCtl.vsync_input_timing = itcInfo->vsync_input_timing; +- stItcCtl.mirror_ctl = itcInfo->flip_ctl; +- stItcCtl.video_format_ctl = itcInfo->video_fmt_sel; ++ stItcCtl.mirror_ctl = itcInfo->flip_ctl; ++ stItcCtl.video_format_ctl = itcInfo->video_fmt_sel; + Isp_Drv_R2k_Core_SetItcCtl(isp,&stItcCtl); + return 0; + } +@@ -887,10 +887,10 @@ static int isp_r2k_core_SetImage(struct k510_isp_device *isp,ITC_INFO_S *itcInfo + + ISP_CORE_IMAGE_ATTR_S stImgAttr; + stImgAttr.image_height = itcInfo->total_size.Height - 1; +- stImgAttr.image_width = itcInfo->total_size.Width - 1; +- stImgAttr.image_v_start = itcInfo->itc_size.Height_st; +- stImgAttr.image_h_start = itcInfo->itc_size.Width_st; +- stImgAttr.image_active_width = itcInfo->itc_size.Width; ++ stImgAttr.image_width = itcInfo->total_size.Width - 1; ++ stImgAttr.image_v_start = itcInfo->itc_size.Height_st; ++ stImgAttr.image_h_start = itcInfo->itc_size.Width_st; ++ stImgAttr.image_active_width = itcInfo->itc_size.Width; + stImgAttr.image_active_height = itcInfo->itc_size.Height; + Isp_Drv_R2k_Core_SetImageAttr(isp,&stImgAttr); + return 0; +@@ -898,7 +898,7 @@ static int isp_r2k_core_SetImage(struct k510_isp_device *isp,ITC_INFO_S *itcInfo + //TPG + static int isp_r2k_core_SetTpgCtl(struct k510_isp_device *isp,TPG_INFO_S *tpgInfo) + { +- ++ + ISP_CORE_TEST_CTL_S stTestCtl; + stTestCtl.test_pattern_en = tpgInfo->tpg_en; + stTestCtl.bayer_mode_sel = tpgInfo->bayer_mode_sel; +@@ -906,14 +906,14 @@ static int isp_r2k_core_SetTpgCtl(struct k510_isp_device *isp,TPG_INFO_S *tpgInf + stTestCtl.test_pattern_sel = tpgInfo->tpg_sel; + stTestCtl.wdr_l_mul_data = tpgInfo->wdr_l_mul_data; + stTestCtl.wdr_m_mul_data = tpgInfo->wdr_m_mul_data; +- stTestCtl.wdr_s_mul_data = tpgInfo->wdr_s_mul_data; ++ stTestCtl.wdr_s_mul_data = tpgInfo->wdr_s_mul_data; + Isp_Drv_R2k_Core_SetTestCtl(isp,&stTestCtl); + return 0; + } + //BLC + static int isp_r2k_core_SetBlcCtl(struct k510_isp_device *isp,BLC_INFO_S *blcInfo) + { +- ++ + ISP_CORE_BLC_CTL_S stBlcCtl; + stBlcCtl.blc_en = blcInfo->blc_en; + stBlcCtl.blc_offset = blcInfo->blc_offset; +@@ -924,59 +924,59 @@ static int isp_r2k_core_SetBlcCtl(struct k510_isp_device *isp,BLC_INFO_S *blcInf + //LSC + static int isp_r2k_core_SetLscCtl(struct k510_isp_device *isp,LSC_INFO_S *lscInfo) + { +- ++ + ISP_CORE_LSC_CTL_S stLscCtl; +- stLscCtl.lsc_en = lscInfo->lsc_en; +- stLscCtl.lsc_h_center = lscInfo->lsc_h_center; ++ stLscCtl.lsc_en = lscInfo->lsc_en; ++ stLscCtl.lsc_h_center = lscInfo->lsc_h_center; + stLscCtl.lsc_v_center = lscInfo->lsc_v_center; + stLscCtl.lsc_red_ratio = lscInfo->lsc_r_ratio; +- stLscCtl.lsc_green_ratio = lscInfo->lsc_g_ratio; +- stLscCtl.lsc_blue_ratio = lscInfo->lsc_b_ratio; +- stLscCtl.lsc_ir_ratio = lscInfo->lsc_ir_ratio; ++ stLscCtl.lsc_green_ratio = lscInfo->lsc_g_ratio; ++ stLscCtl.lsc_blue_ratio = lscInfo->lsc_b_ratio; ++ stLscCtl.lsc_ir_ratio = lscInfo->lsc_ir_ratio; + Isp_Drv_R2k_Core_SetLscCtl(isp,&stLscCtl); + return 0; + } + //AE + static int isp_r2k_core_SetAeCtl(struct k510_isp_device *isp,AE_INFO_S *aeInfo) + { +- ++ + ISP_CORE_AE_CTL_S stAeCtl; +- stAeCtl.ae_as_en = aeInfo->ae_as_en; +- stAeCtl.ae_ag_en = aeInfo->ae_ag_en; +- stAeCtl.ae_airis_en = aeInfo->ae_airis_en; ++ stAeCtl.ae_as_en = aeInfo->ae_as_en; ++ stAeCtl.ae_ag_en = aeInfo->ae_ag_en; ++ stAeCtl.ae_airis_en = aeInfo->ae_airis_en; + stAeCtl.ae_enter_ls_sel = aeInfo->ae_enter_ls_sel; +- stAeCtl.ae_exit_ls_sel = aeInfo->ae_exit_ls_sel; ++ stAeCtl.ae_exit_ls_sel = aeInfo->ae_exit_ls_sel; + stAeCtl.ae_win_mode_sel = aeInfo->ae_win_mode_sel; + stAeCtl.ae_back_light_mode_sel = aeInfo->ae_back_light_mode_sel; +- stAeCtl.ae_day_change_en = aeInfo->ae_day_change_en; +- stAeCtl.ae_day_change_sel = aeInfo->ae_day_change_sel; ++ stAeCtl.ae_day_change_en = aeInfo->ae_day_change_en; ++ stAeCtl.ae_day_change_sel = aeInfo->ae_day_change_sel; + stAeCtl.ae_win_h_start = aeInfo->ae_win_size.h_start; + stAeCtl.ae_win_v_start = aeInfo->ae_win_size.v_start; +- stAeCtl.ae_win_h_end = aeInfo->ae_win_size.h_end; +- stAeCtl.ae_win_v_end = aeInfo->ae_win_size.v_end; +- stAeCtl.ae_tar_bright = aeInfo->ae_tar_bright; ++ stAeCtl.ae_win_h_end = aeInfo->ae_win_size.h_end; ++ stAeCtl.ae_win_v_end = aeInfo->ae_win_size.v_end; ++ stAeCtl.ae_tar_bright = aeInfo->ae_tar_bright; + stAeCtl.ae_tar_bright_range = aeInfo->ae_tar_bright_range; + stAeCtl.ae_l_ex_time = aeInfo->ae_l_ex_time; + stAeCtl.ae_m_ex_time = aeInfo->ae_m_ex_time; + stAeCtl.ae_s_ex_time = aeInfo->ae_s_ex_time; +- stAeCtl.ae_agc = aeInfo->ae_agc; ++ stAeCtl.ae_agc = aeInfo->ae_agc; + stAeCtl.ae_ad_shuttle_freq = aeInfo->ae_ad_shuttle_freq; + stAeCtl.ae_ad_gain_freq = aeInfo->ae_ad_gain_freq; + stAeCtl.ae_adjust_step_max = aeInfo->ae_adjust_step_max; +- stAeCtl.ae_ex_value_max = aeInfo->ae_ex_value_max; +- stAeCtl.ae_ex_value_mid = aeInfo->ae_ex_value_mid; +- stAeCtl.ae_ex_value_min = aeInfo->ae_ex_value_min; +- stAeCtl.ae_gain_value_max = aeInfo->ae_gain_value_max; ++ stAeCtl.ae_ex_value_max = aeInfo->ae_ex_value_max; ++ stAeCtl.ae_ex_value_mid = aeInfo->ae_ex_value_mid; ++ stAeCtl.ae_ex_value_min = aeInfo->ae_ex_value_min; ++ stAeCtl.ae_gain_value_max = aeInfo->ae_gain_value_max; + stAeCtl.ae_gain_value_mid = aeInfo->ae_gain_value_mid; + stAeCtl.ae_gain_value_min = aeInfo->ae_gain_value_min; + stAeCtl.ae_dn_switch_ad_step_max = aeInfo->ae_dn_switch_ad_step_max; + stAeCtl.ae_dn_switch_wait_time = aeInfo->ae_dn_switch_wait_time; + stAeCtl.ape_max_diff = aeInfo->ape_max_diff; +- stAeCtl.ape_drv_signal_max = aeInfo->ape_drv_signal_max; +- stAeCtl.ape_coeff_distance = aeInfo->ape_coeff_distance; ++ stAeCtl.ape_drv_signal_max = aeInfo->ape_drv_signal_max; ++ stAeCtl.ape_coeff_distance = aeInfo->ape_coeff_distance; + stAeCtl.ape_coeff_speed = aeInfo->ape_coeff_speed; + stAeCtl.ape_coeff_acceleration = aeInfo->ape_coeff_acceleration; +- stAeCtl.ape_drv_manual_value = aeInfo->ape_drv_manual_value; ++ stAeCtl.ape_drv_manual_value = aeInfo->ape_drv_manual_value; + stAeCtl.ape_damp_manual_value = aeInfo->ape_damp_manual_value; + Isp_Drv_R2k_Core_SetAeCtl(isp,&stAeCtl); + return 0; +@@ -1000,18 +1000,18 @@ static int isp_r2k_core_GetAeSts(struct k510_isp_device *isp,struct k510isp_ae_s + //AWB + static int isp_r2k_core_SetAwbCtl(struct k510_isp_device *isp,AWB_INFO_S *awbInfo) + { +- ++ + ISP_CORE_AWB_CTL_S stAwbCtl; +- stAwbCtl.awb_d65_en = awbInfo->awb_d65_en; +- stAwbCtl.awb_ccm_en = awbInfo->awb_ccm_en; +- stAwbCtl.awb_en = awbInfo->awb_en; ++ stAwbCtl.awb_d65_en = awbInfo->awb_d65_en; ++ stAwbCtl.awb_ccm_en = awbInfo->awb_ccm_en; ++ stAwbCtl.awb_en = awbInfo->awb_en; + stAwbCtl.awb_mode_sel = awbInfo->awb_mode_sel; + stAwbCtl.awb_hist_mode_sel = awbInfo->awb_hist_mode_sel; +- stAwbCtl.awb_veri_en = awbInfo->awb_veri_en; +- stAwbCtl.awb_mode_sel = awbInfo->awb_mode_sel; ++ stAwbCtl.awb_veri_en = awbInfo->awb_veri_en; ++ stAwbCtl.awb_mode_sel = awbInfo->awb_mode_sel; + stAwbCtl.awb_value_save_en = awbInfo->awb_value_save_en; + stAwbCtl.awb_ccm_adp_adjust_en = awbInfo->awb_ccm_adp_adjust_en; +- stAwbCtl.awb_stab_en = awbInfo->awb_stab_en; ++ stAwbCtl.awb_stab_en = awbInfo->awb_stab_en; + stAwbCtl.awb_d65_red_gain = awbInfo->awb_d65_red_gain; + stAwbCtl.awb_d65_blue_gain = awbInfo->awb_d65_blue_gain; + stAwbCtl.ccm_rr_coff = awbInfo->ccm_coff[0][0]; +@@ -1026,16 +1026,16 @@ static int isp_r2k_core_SetAwbCtl(struct k510_isp_device *isp,AWB_INFO_S *awbInf + stAwbCtl.ccm_correct_coff = awbInfo->ccm_correct_coff; + stAwbCtl.awb_win_h_start = awbInfo->awb_win_size.h_start; + stAwbCtl.awb_win_v_start = awbInfo->awb_win_size.v_start; +- stAwbCtl.awb_win_h_end = awbInfo->awb_win_size.h_end; +- stAwbCtl.awb_win_v_end = awbInfo->awb_win_size.v_end; +- stAwbCtl.awb_correct_diff_th = awbInfo->awb_correct_diff_th; ++ stAwbCtl.awb_win_h_end = awbInfo->awb_win_size.h_end; ++ stAwbCtl.awb_win_v_end = awbInfo->awb_win_size.v_end; ++ stAwbCtl.awb_correct_diff_th = awbInfo->awb_correct_diff_th; + stAwbCtl.awb_color_changeres_time = awbInfo->awb_color_changeres_time; + stAwbCtl.awb_historgram_th = awbInfo->awb_historgram_th; +- stAwbCtl.awb_red_gain_adjust = awbInfo->awb_red_gain_adjust; +- stAwbCtl.awb_green_gain_adjust = awbInfo->awb_green_gain_adjust; ++ stAwbCtl.awb_red_gain_adjust = awbInfo->awb_red_gain_adjust; ++ stAwbCtl.awb_green_gain_adjust = awbInfo->awb_green_gain_adjust; + stAwbCtl.awb_blue_gain_adjust = awbInfo->awb_blue_gain_adjust; + stAwbCtl.awb_red_max_value = awbInfo->awb_red_max_value; +- stAwbCtl.awb_blue_max_value = awbInfo->awb_blue_max_value; ++ stAwbCtl.awb_blue_max_value = awbInfo->awb_blue_max_value; + stAwbCtl.awb_red_min_value = awbInfo->awb_red_min_value; + stAwbCtl.awb_blue_min_value = awbInfo->awb_blue_min_value; + stAwbCtl.awb_red_obj_value = awbInfo->awb_red_obj_value; +@@ -1043,10 +1043,31 @@ static int isp_r2k_core_SetAwbCtl(struct k510_isp_device *isp,AWB_INFO_S *awbInf + Isp_Drv_R2k_Core_SetAwbCtl(isp,&stAwbCtl); + return 0; + } ++ ++// reg opt ++ ++static int isp_r2k_core_RegSet(struct k510_isp_device *isp,struct k510isp_reg_val *reg_val) ++{ ++ ISP_CORE_REG_VAL_S stRegVal; ++ stRegVal.reg_addr = reg_val->reg_addr; ++ stRegVal.reg_value = reg_val->reg_value; ++ Isp_Drv_R2k_Core_SetReg(isp,&stRegVal); ++ return 0; ++} ++ ++static int isp_r2k_core_RegGet(struct k510_isp_device *isp,struct k510isp_reg_val *reg_val) ++{ ++ ISP_CORE_REG_VAL_S gtRegVal; ++ gtRegVal.reg_addr = reg_val->reg_addr; ++ Isp_Drv_R2k_Core_GetReg(isp,>RegVal); ++ reg_val->reg_value = gtRegVal.reg_value; ++ return 0; ++} ++ + //CSC + static int isp_r2k_core_SetCscCtl(struct k510_isp_device *isp,CSC_INFO_S *cscInfo) + { +- ++ + ISP_CORE_CSC_CTL_S stCscCtl; + stCscCtl.csc_r2y_00 = cscInfo->csc_r2y[0][0]; + stCscCtl.csc_r2y_01 = cscInfo->csc_r2y[0][1]; +@@ -1063,23 +1084,23 @@ static int isp_r2k_core_SetCscCtl(struct k510_isp_device *isp,CSC_INFO_S *cscInf + //ADA + static int isp_r2k_core_SetAdaCtl(struct k510_isp_device *isp,ADA_INFO_S *adaInfo) + { +- ++ + ISP_CORE_ADA_CTL_S stAdaCtl; +- stAdaCtl.ada_rgb_gamma_en = adaInfo->ada_rgb_gamma_en; +- stAdaCtl.ada_yuv_gamma_en = adaInfo->ada_yuv_gamma_en; +- stAdaCtl.ada_adjust_en = adaInfo->ada_adjust_en; ++ stAdaCtl.ada_rgb_gamma_en = adaInfo->ada_rgb_gamma_en; ++ stAdaCtl.ada_yuv_gamma_en = adaInfo->ada_yuv_gamma_en; ++ stAdaCtl.ada_adjust_en = adaInfo->ada_adjust_en; + stAdaCtl.ada_img_stab_en = adaInfo->ada_img_stab_en; + stAdaCtl.ada_ccr_en = adaInfo->ada_ccr_en; + stAdaCtl.ada_adp_en = adaInfo->ada_adp_en; +- stAdaCtl.ada_adp_ccr_en = adaInfo->ada_adp_ccr_en; ++ stAdaCtl.ada_adp_ccr_en = adaInfo->ada_adp_ccr_en; + stAdaCtl.ada_stat_mode_sel = adaInfo->ada_stat_mode_sel; + stAdaCtl.ada_enh_mode_sel = adaInfo->ada_enh_mode_sel; +- stAdaCtl.ada_stat_max_value = adaInfo->ada_stat_max_value; ++ stAdaCtl.ada_stat_max_value = adaInfo->ada_stat_max_value; + stAdaCtl.ada_ad_stren_max_value = adaInfo->ada_ad_stren_max_value; + stAdaCtl.ada_win_h_start = adaInfo->ada_win_size.h_start; + stAdaCtl.ada_win_v_start = adaInfo->ada_win_size.v_start; +- stAdaCtl.ada_win_h_end = adaInfo->ada_win_size.h_end; +- stAdaCtl.ada_win_v_end = adaInfo->ada_win_size.v_end; ++ stAdaCtl.ada_win_h_end = adaInfo->ada_win_size.h_end; ++ stAdaCtl.ada_win_v_end = adaInfo->ada_win_size.v_end; + Isp_Drv_R2k_Core_SetAdaCtl(isp,&stAdaCtl); + return 0; + } +@@ -1088,33 +1109,33 @@ static int isp_r2k_core_SetRgbirCtl(struct k510_isp_device *isp,RGBIR_INFO_S *rg + { + + ISP_CORE_RGBIR_CTL_S stRgbirCtl; +- stRgbirCtl.rgbir_en = rgbirInfo->rgbir_en; +- stRgbirCtl.rgbir_rtf_en = rgbirInfo->rgbir_rtf_en; +- stRgbirCtl.rgbir_rpc_en = rgbirInfo->rgbir_rpc_en; ++ stRgbirCtl.rgbir_en = rgbirInfo->rgbir_en; ++ stRgbirCtl.rgbir_rtf_en = rgbirInfo->rgbir_rtf_en; ++ stRgbirCtl.rgbir_rpc_en = rgbirInfo->rgbir_rpc_en; + stRgbirCtl.rgbir_fusion_en = rgbirInfo->rgbir_fusion_en; + stRgbirCtl.rgbir_output_sel = rgbirInfo->rgbir_output_sel; +- stRgbirCtl.rgbir_rpc_max_value = rgbirInfo->rgbir_rpc_max_value; ++ stRgbirCtl.rgbir_rpc_max_value = rgbirInfo->rgbir_rpc_max_value; + stRgbirCtl.rgbir_rpc_color_coff = rgbirInfo->rgbir_rpc_color_coff; +- stRgbirCtl.rgbir_rpc_luma_coff = rgbirInfo->rgbir_rpc_luma_coff; ++ stRgbirCtl.rgbir_rpc_luma_coff = rgbirInfo->rgbir_rpc_luma_coff; + stRgbirCtl.rgbir_rpc_th = rgbirInfo->rgbir_rpc_th; +- stRgbirCtl.rgbir_rpc_th1 = rgbirInfo->rgbir_rpc_th1; ++ stRgbirCtl.rgbir_rpc_th1 = rgbirInfo->rgbir_rpc_th1; + Isp_Drv_R2k_Core_SetRgbIrCtl(isp,&stRgbirCtl); + return 0; + } + //2DNR + static int isp_r2k_core_Set2dnrCtl(struct k510_isp_device *isp,NR2D_INFO_S *nr2dInfo) + { +- ++ + ISP_CORE_2DNR_CTL_S st2dnrCtl; + st2dnrCtl.core_2dnr_pcf_en = nr2dInfo->d2nr_pcf_en; + st2dnrCtl.core_2dnr_raw_en = nr2dInfo->d2nr_raw_en; +- st2dnrCtl.core_2dnr_edge_en = nr2dInfo->d2nr_edge_en; ++ st2dnrCtl.core_2dnr_edge_en = nr2dInfo->d2nr_edge_en; + st2dnrCtl.core_2dnr_bap_en = nr2dInfo->d2nr_bap_en; +- st2dnrCtl.core_2dnr_luma_en = nr2dInfo->d2nr_luma_en; +- st2dnrCtl.core_2dnr_chroma_en = nr2dInfo->d2nr_chroma_en; +- st2dnrCtl.core_2dnr_pcf_adp_en = nr2dInfo->d2nr_pcf_adp_en; +- st2dnrCtl.core_2dnr_raw_adp_en = nr2dInfo->d2nr_raw_adp_en; +- st2dnrCtl.core_2dnr_luma_adp_en = nr2dInfo->d2nr_luma_adp_en; ++ st2dnrCtl.core_2dnr_luma_en = nr2dInfo->d2nr_luma_en; ++ st2dnrCtl.core_2dnr_chroma_en = nr2dInfo->d2nr_chroma_en; ++ st2dnrCtl.core_2dnr_pcf_adp_en = nr2dInfo->d2nr_pcf_adp_en; ++ st2dnrCtl.core_2dnr_raw_adp_en = nr2dInfo->d2nr_raw_adp_en; ++ st2dnrCtl.core_2dnr_luma_adp_en = nr2dInfo->d2nr_luma_adp_en; + st2dnrCtl.core_2dnr_chroma_adp_en = nr2dInfo->d2nr_chroma_adp_en; + st2dnrCtl.core_2dnr_raw_intensity = nr2dInfo->d2nr_raw_intensity; + st2dnrCtl.core_2dnr_bap_intensity = nr2dInfo->d2nr_bap_intensity; +@@ -1130,17 +1151,17 @@ static int isp_r2k_core_SetEnhCtl(struct k510_isp_device *isp,ENH_INFO_S *enhInf + + ISP_CORE_ENH_CTL_S stEnhCtl; + stEnhCtl.enh_ltm_en = enhInfo->enh_ltm_en; +- stEnhCtl.enh_sharp_en = enhInfo->enh_sharp_en; +- stEnhCtl.enh_cc_en = enhInfo->enh_cc_en; +- stEnhCtl.enh_adp_ltm_en = enhInfo->enh_adp_ltm_en; +- stEnhCtl.enh_adp_sharp_en = enhInfo->enh_adp_sharp_en; +- stEnhCtl.enh_adp_cc_en = enhInfo->enh_adp_cc_en; +- stEnhCtl.ltm_gain = enhInfo->ltm_gain; +- stEnhCtl.ltm_th = enhInfo->ltm_th; +- stEnhCtl.enh_nr_th = enhInfo->enh_nr_th; ++ stEnhCtl.enh_sharp_en = enhInfo->enh_sharp_en; ++ stEnhCtl.enh_cc_en = enhInfo->enh_cc_en; ++ stEnhCtl.enh_adp_ltm_en = enhInfo->enh_adp_ltm_en; ++ stEnhCtl.enh_adp_sharp_en = enhInfo->enh_adp_sharp_en; ++ stEnhCtl.enh_adp_cc_en = enhInfo->enh_adp_cc_en; ++ stEnhCtl.ltm_gain = enhInfo->ltm_gain; ++ stEnhCtl.ltm_th = enhInfo->ltm_th; ++ stEnhCtl.enh_nr_th = enhInfo->enh_nr_th; + stEnhCtl.enh_th1 = enhInfo->enh_th1; + stEnhCtl.enh_th2 = enhInfo->enh_th2; +- stEnhCtl.sharp_gain = enhInfo->sharp_gain; ++ stEnhCtl.sharp_gain = enhInfo->sharp_gain; + Isp_Drv_R2k_Core_SetEnhLtmCtl(isp,&stEnhCtl); + Isp_Drv_R2k_Core_SetEnhCCCtl(isp,&stEnhCtl); + Isp_Drv_R2k_Core_SetEnhSharpenCtl(isp,&stEnhCtl); +@@ -1151,10 +1172,10 @@ static int isp_r2k_core_SetPostCtl(struct k510_isp_device *isp,POST_INFO_S *post + { + + ISP_CORE_POST_CTL_S stPostCtl; +- stPostCtl.post_cont_ad_en = postInfo->post_cont_ad_en; +- stPostCtl.post_luma_ad_en = postInfo->post_luma_ad_en; ++ stPostCtl.post_cont_ad_en = postInfo->post_cont_ad_en; ++ stPostCtl.post_luma_ad_en = postInfo->post_luma_ad_en; + stPostCtl.post_satu_ad_en = postInfo->post_satu_ad_en; +- stPostCtl.cont_ad_intensity = postInfo->cont_ad_intensity; ++ stPostCtl.cont_ad_intensity = postInfo->cont_ad_intensity; + stPostCtl.luma_ad_intensity = postInfo->luma_ad_intensity; + stPostCtl.satu_ad_intensity = postInfo->satu_ad_intensity; + Isp_Drv_R2k_Core_SetPostContCtl(isp,&stPostCtl); +@@ -1165,46 +1186,46 @@ static int isp_r2k_core_SetPostCtl(struct k510_isp_device *isp,POST_INFO_S *post + //OTC + static int isp_r2k_core_SetOtcCtl(struct k510_isp_device *isp,OTC_INFO_S *otcInfo) + { +- ++ + ISP_CORE_OTC_CTL_S stOtcCtl; + stOtcCtl.post_otc_en = otcInfo->post_otc_en; +- stOtcCtl.otc_yc_sel = otcInfo->otc_yc_sel; +- stOtcCtl.otc_uv_format_sel = otcInfo->otc_uv_format_sel; +- stOtcCtl.otc_hsync_pol_sel = otcInfo->otc_hsync_pol_sel; +- stOtcCtl.otc_vsync_pol_sel = otcInfo->otc_vsync_pol_sel; +- stOtcCtl.otc_stt_vr = otcInfo->otc_out_size.Width_st; +- stOtcCtl.otc_stt_hr = otcInfo->otc_out_size.Height_st; +- stOtcCtl.otc_height = otcInfo->otc_out_size.Height; +- stOtcCtl.otc_width = otcInfo->otc_out_size.Width; ++ stOtcCtl.otc_yc_sel = otcInfo->otc_yc_sel; ++ stOtcCtl.otc_uv_format_sel = otcInfo->otc_uv_format_sel; ++ stOtcCtl.otc_hsync_pol_sel = otcInfo->otc_hsync_pol_sel; ++ stOtcCtl.otc_vsync_pol_sel = otcInfo->otc_vsync_pol_sel; ++ stOtcCtl.otc_stt_vr = otcInfo->otc_out_size.Width_st; ++ stOtcCtl.otc_stt_hr = otcInfo->otc_out_size.Height_st; ++ stOtcCtl.otc_height = otcInfo->otc_out_size.Height; ++ stOtcCtl.otc_width = otcInfo->otc_out_size.Width; + Isp_Drv_R2k_Core_SetOtcCtl(isp,&stOtcCtl); + return 0; + } + //LDC + static int isp_r2k_core_SetLdcCtl(struct k510_isp_device *isp,LDC_INFO_S *ldcInfo) + { +- ++ + ISP_CORE_LDC_CTL_S stLdcCtl; +- stLdcCtl.ldc_en = ldcInfo->ldc_en; +- stLdcCtl.ldc_arith_en = ldcInfo->ldc_arith_en; ++ stLdcCtl.ldc_en = ldcInfo->ldc_en; ++ stLdcCtl.ldc_arith_en = ldcInfo->ldc_arith_en; + stLdcCtl.ldc_req_freq = ldcInfo->ldc_req_freq; + stLdcCtl.ldc_stt_ln = ldcInfo->ldc_stt_ln; + stLdcCtl.ldc_h_center_pos = ldcInfo->ldc_h_center_pos; + stLdcCtl.ldc_v_center_pos = ldcInfo->ldc_v_center_pos; + stLdcCtl.ldc_rectify_cr = ldcInfo->ldc_rectify_cr; +- stLdcCtl.ldc_rectify_cz = ldcInfo->ldc_rectify_cz; ++ stLdcCtl.ldc_rectify_cz = ldcInfo->ldc_rectify_cz; + Isp_Drv_R2k_Core_SetLdcCtl(isp,&stLdcCtl); + return 0; + } + //AF + static int isp_r2k_core_SetAfCtl(struct k510_isp_device *isp,AF_INFO_S *afInfo) + { +- ++ + ISP_CORE_AF_CTL_S stAfCtl; +- stAfCtl.af_stat_en = afInfo->af_stat_en; +- stAfCtl.af_stat_mode_sel= afInfo->af_stat_mode_sel; +- stAfCtl.af_stat_win_h_start= afInfo->af_win_size.h_start; +- stAfCtl.af_stat_win_v_start= afInfo->af_win_size.v_start; +- stAfCtl.af_stat_win_h_end= afInfo->af_win_size.h_end; ++ stAfCtl.af_stat_en = afInfo->af_stat_en; ++ stAfCtl.af_stat_mode_sel= afInfo->af_stat_mode_sel; ++ stAfCtl.af_stat_win_h_start= afInfo->af_win_size.h_start; ++ stAfCtl.af_stat_win_v_start= afInfo->af_win_size.v_start; ++ stAfCtl.af_stat_win_h_end= afInfo->af_win_size.h_end; + stAfCtl.af_stat_win_v_end= afInfo->af_win_size.v_end; + Isp_Drv_R2k_Core_SetAfCtl(isp,&stAfCtl); + return 0; +@@ -1289,7 +1310,7 @@ void isp_r2k_ds_SetInputSize(struct k510_isp_device *isp,IMAGE_SIZE *dsInSizeInf + // + void isp_r2k_ds_SetRgb2YuvCoff(struct k510_isp_device *isp) + { +- ++ + unsigned int osd_rgb2yuv_coeff[3][4]; + osd_rgb2yuv_coeff[0][0]= 0x00000132; + osd_rgb2yuv_coeff[0][1]= 0x00000259; +@@ -1308,7 +1329,7 @@ void isp_r2k_ds_SetRgb2YuvCoff(struct k510_isp_device *isp) + // + void isp_r2k_ds_SetYuv2RgbCoff(struct k510_isp_device *isp) + { +- ++ + unsigned int osd_yuv2rgb_coeff[3][4]; + osd_yuv2rgb_coeff[0][0] = 0x00000400; + osd_yuv2rgb_coeff[0][1] = 0x00000000; +@@ -1375,15 +1396,15 @@ void isp_r2k_ds_SetSingleDS(struct k510_isp_device *isp,unsigned int u8Index,str + stDsFormat->out_rgb_mode = dsInfo->out_rgb_mode; + stDsFormat->out_yuv_mode = dsInfo->out_yuv_mode; + stDsFormat->out_uv_swap = dsInfo->out_uv_swap; +- unsigned int osdIndex = 0; ++ unsigned int osdIndex = 0; + ISP_DS_OSD_ATTR_S *stDsOsdAttr = &stDsAttr.DsOsdAttr[osdIndex]; + ISP_OSD_INFO_S *osdInfo = &dsInfo->osdInfo[osdIndex]; + isp_r2k_ds_SetOSD(stDsOsdAttr,osdInfo); +- osdIndex = 1; ++ osdIndex = 1; + stDsOsdAttr = &stDsAttr.DsOsdAttr[osdIndex]; + osdInfo = &dsInfo->osdInfo[osdIndex]; + isp_r2k_ds_SetOSD(stDsOsdAttr,osdInfo); +- osdIndex = 2; ++ osdIndex = 2; + stDsOsdAttr = &stDsAttr.DsOsdAttr[osdIndex]; + osdInfo = &dsInfo->osdInfo[osdIndex]; + isp_r2k_ds_SetOSD(stDsOsdAttr,osdInfo); +@@ -1421,13 +1442,13 @@ static int isp_r2k_ds_config(struct isp_r2k_device *r2k,struct isp_ds_cfg_info * + * + *****************************************************************************/ + static int isp_r2k_config(struct k510_isp_device *isp,struct isp_cfg_info *isp_cfg) +-{ ++{ + struct isp_r2k_device *r2k = &isp->isp_r2k; + struct isp_core_cfg_info *isp_core_cfg =&isp_cfg->isp_core_cfg; + isp_r2k_core_config(r2k,isp_core_cfg); + struct isp_ds_cfg_info *isp_ds_cfg =&isp_cfg->isp_ds_cfg; + isp_r2k_ds_config(r2k,isp_ds_cfg); +- struct isp_wrap_cfg_info *isp_wrap_cfg =&isp_cfg->isp_wrap_cfg; ++ struct isp_wrap_cfg_info *isp_wrap_cfg =&isp_cfg->isp_wrap_cfg; + dev_dbg(isp->dev,"%s:main_y_buf0_base(0x%x)\n",__func__,isp_wrap_cfg->mainInfo.main_y_buf0_base); + isp_r2k_wrap_config(r2k,isp_wrap_cfg); + // printk("isp_r2k_config end \n"); +@@ -1451,7 +1472,7 @@ static void isp_r2k_set_fbc_outaddr(struct isp_r2k_device *r2k, u32 addr) + addr = addr+1920*1080; + isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_MAIN_UV_BUF0_BASE); + isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_MAIN_UV_BUF1_BASE); +- isp_reg_writel(isp,0x30001,ISP_IOMEM_R2K_WRAP,ISP_WRAP_CONFIG_DONE); ++ isp_reg_writel(isp,0x30001,ISP_IOMEM_R2K_WRAP,ISP_WRAP_CONFIG_DONE); + } + + /* +@@ -1472,8 +1493,8 @@ static void isp_r2k_set_main_outaddr(struct isp_r2k_device *r2k, u32 addr) + __func__,main_info->main_line_stride,main_info->main_size.Width,main_info->main_size.Height); + addr = addr + main_info->main_line_stride*main_info->main_size.Height;//1920*1080; + isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_MAIN_UV_BUF0_BASE); +- isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_MAIN_UV_BUF1_BASE); +- isp_reg_writel(isp,0x30001,ISP_IOMEM_R2K_WRAP,ISP_WRAP_CONFIG_DONE); ++ isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_MAIN_UV_BUF1_BASE); ++ isp_reg_writel(isp,0x30001,ISP_IOMEM_R2K_WRAP,ISP_WRAP_CONFIG_DONE); + } + + /* +@@ -1532,7 +1553,7 @@ static void isp_r2k_set_out1_outaddr(struct isp_r2k_device *r2k, u32 addr) + addr = addr + ds1_info->ds1_line_stride*ds1_info->ds1_size.Height;//1920*1080; + isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS1_UV_BUF0_BASE); + isp_reg_writel(isp,addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS1_UV_BUF1_BASE); +- isp_reg_writel(isp,0x30001,ISP_IOMEM_R2K_WRAP,ISP_WRAP_CONFIG_DONE); ++ isp_reg_writel(isp,0x30001,ISP_IOMEM_R2K_WRAP,ISP_WRAP_CONFIG_DONE); + } + + /* +@@ -1549,23 +1570,23 @@ static void isp_r2k_set_out2_outaddr(struct isp_r2k_device *r2k, u32 addr) + struct isp_wrap_ds2_info *ds2_info = &isp_wrap_cfg->ds2Info; + u32 r_addr,g_addr,b_addr; + unsigned int height = ds2_info->ds2_video_height;//ds2_info->ds2_size.Height +- // = ++ // = + //dev_dbg(r2k->isp->dev,"%s:line_stride (%d),Width(%d),Height(%d)\n",\ + __func__,ds2_info->ds2_line_stride,ds2_info->ds2_size.Width,height); +- r_addr = addr; ++ r_addr = addr; + isp_reg_writel(isp,r_addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS2_R_BUF0_BASE); + isp_reg_writel(isp,r_addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS2_R_BUF1_BASE); + + if( DS2_S_RGB == ds2_info->ds2_out_img_out_format) + g_addr = r_addr + ds2_info->ds2_line_stride * height; +- else ++ else + g_addr = r_addr + ds2_info->ds2_line_stride; + isp_reg_writel(isp,g_addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS2_G_BUF0_BASE); + isp_reg_writel(isp,g_addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS2_G_BUF1_BASE); + // + if( DS2_S_RGB == ds2_info->ds2_out_img_out_format) + b_addr = g_addr + ds2_info->ds2_line_stride * height; +- else ++ else + b_addr = g_addr + ds2_info->ds2_line_stride; + isp_reg_writel(isp,b_addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS2_B_BUF0_BASE); + isp_reg_writel(isp,b_addr,ISP_IOMEM_R2K_WRAP,ISP_WRAP_DS2_B_BUF1_BASE); +@@ -1594,7 +1615,7 @@ static void isp_r2k_enable(struct isp_r2k_device *r2k) + void isp_r2k_wrap_print_status(struct isp_r2k_device *r2k) + { + +- ++ + struct k510_isp_device *isp = to_isp_device(r2k); + + dev_dbg(isp->dev, "-------------ISP R2K WRAP Register dump start----------\n"); +@@ -1749,13 +1770,13 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_IMAGE_H_START ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_IMAGE_ACTIVE_WIDTH ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_IMAGE_ACTIVE_HEIGHT ); +- //tpg ++ //tpg + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_TEST_CTL ); +- //blc ++ //blc + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_BLC_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_BLC_OFFSET ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_BLC_RATIO ); +- //lsc ++ //lsc + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_H_CENTER ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_V_CENTER ); +@@ -1763,7 +1784,7 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_G_RATIO ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_B_RATIO ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LSC_IR_RATIO ); +- //ae ++ //ae + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_WIN_H_START ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_WIN_V_START ); +@@ -1785,7 +1806,7 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_GAIN_MIN ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_DN_SWITCH_ADJUST_STEP_MAX); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_DN_SWITCH_WAIT_TIME ); +- ++ + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DIFF_MAX ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DRV_SIGNAL_MAX ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_COEFF_DIS ); +@@ -1793,7 +1814,7 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_COEFF_ACCE ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DRV_MANUAL_VALUE ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_APE_DAMP_MANUAL_VALUE ); +- ++ + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_VALUE_READY ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_LONG_CUR_EX ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_MID_CUR_EX ); +@@ -1804,7 +1825,7 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_EX_STATUS ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_SUM ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AE_PIXEL_SUM ); +- //awb ++ //awb + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_D65_RED_GAIN ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_D65_BLUE_GAIN ); +@@ -1848,7 +1869,7 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_ORG_RED_VALUE ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_ORG_GREEN_VALUE ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AWB_ORG_BLUE_VALUE ); +- //csc ++ //csc + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_00 ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_01 ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_02 ); +@@ -1858,7 +1879,7 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_20 ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_21 ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CSC_R2Y_22 ); +- //ada ++ //ada + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_STAT_MAX_VALUE ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_AD_STREN_MAX_VALUE ); +@@ -1866,21 +1887,21 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_WIN_V_START ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_WIN_H_END ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ADA_WIN_V_END ); +- //rgbir ++ //rgbir + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_MAX_VALUE ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_COLOR_COFF ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_LUMA_COFF ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_TH ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RGBIR_RPC_TH1 ); +- //2dnr ++ //2dnr + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_RAW_INTENSITY ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_BAP_INTENSITY ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_EDGE_INTENSITY ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_LUMA_INTENSITY ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_2DNR_CHROMA_INTENSITY ); +- //enh ++ //enh + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ENH_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LTM_GAIN ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LTM_TH ); +@@ -1888,28 +1909,28 @@ static void isp_r2k_core_print_status(struct isp_r2k_device *r2k) + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ENH_TH1 ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_ENH_TH2 ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_SHARP_GAIN ); +- //post ++ //post + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_POST_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_CONT_GAIN ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LUMA_GAIN ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_SATU_GAIN ); +- //otc ++ //otc + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_STT_VR ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_STT_HR ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_HEIGHT ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_OTC_WIDTH ); +- //ldc ++ //ldc + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_REQ_FREQ ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_H_CENTER_POS ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_V_CENTER_POS ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_RECTIFY_CR ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_LDC_RECTIFY_CZ ); +- //ram table ++ //ram table + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RAM_WR_STATUS ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RAM_RD_STATUS ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_RAM_READ_LOCK ); +- //af ++ //af + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AF_CTL ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AF_STAT_WIN_H_START ); + ISP_R2K_CORE_PRINT_REGISTER(isp,ISP_CORE_AF_STAT_WIN_V_START ); +@@ -2100,7 +2121,7 @@ static int isp_r2k_remap_out0_config(struct isp_r2k_device *r2k,struct isp_remap + { + + struct k510_isp_device *isp = to_isp_device(r2k); +- ++ + ISP_DRV_LINE_DRAW_U DrawAreaNum; + ISP_REMAP_ATTR_S stRemapCtl; + +@@ -2113,7 +2134,7 @@ static int isp_r2k_remap_out1_config(struct isp_r2k_device *r2k,struct isp_remap + { + + struct k510_isp_device *isp = to_isp_device(r2k); +- ++ + ISP_DRV_LINE_DRAW_U DrawAreaNum; + ISP_REMAP_ATTR_S stRemapCtl; + Isp_Drv_R2k_Remap_SetOut1Line(isp,DrawAreaNum,&stRemapCtl); +@@ -2137,7 +2158,7 @@ static int isp_r2k_remap_out1_config(struct isp_r2k_device *r2k,struct isp_remap + static void isp_r2k_remap_print_status(struct isp_r2k_device *r2k) + { + +- ++ + struct k510_isp_device *isp = to_isp_device(r2k); + // + dev_dbg(isp->dev, "-------------ISP R2K MAIN REMAP Register dump start----------\n"); +@@ -2205,39 +2226,39 @@ static void isp_r2k_remap_print_status(struct isp_r2k_device *r2k) + ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_30_1_CTRL); + ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_0_CTRL); + ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_1_CTRL); +- +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); ++ ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); + ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_19_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); +- ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); ++ ISP_R2K_MAIN_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); + dev_dbg(isp->dev, "-------------ISP R2K MAIN REMAP Register dump end----------\n"); + // + dev_dbg(isp->dev, "-------------ISP R2K OUT0 REMAP Register dump start----------\n"); +@@ -2305,39 +2326,39 @@ static void isp_r2k_remap_print_status(struct isp_r2k_device *r2k) + ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_30_1_CTRL); + ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_0_CTRL); + ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_1_CTRL); +- +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); ++ ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); + ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_19_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); +- ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); ++ ISP_R2K_OUT0_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); + dev_dbg(isp->dev, "-------------ISP R2K OUT0 REMAP Register dump end----------\n"); + // + dev_dbg(isp->dev, "-------------ISP R2K OUT1 REMAP Register dump start----------\n"); +@@ -2405,39 +2426,39 @@ static void isp_r2k_remap_print_status(struct isp_r2k_device *r2k) + ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_30_1_CTRL); + ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_0_CTRL); + ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_INFO_AREA_31_1_CTRL); +- +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); ++ ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_00_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_01_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_02_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_03_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_04_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_05_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_06_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_07_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_08_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_09_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_10_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_11_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_12_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_13_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_14_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_15_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_16_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_17_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_18_0_CTRL); + ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_19_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); +- ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_20_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_21_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_22_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_23_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_24_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_25_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_26_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_27_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_28_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_29_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_30_0_CTRL); ++ ISP_R2K_OUT1_REMAP_PRINT_REGISTER(isp,ISP_FILL_DATA_AREA_31_0_CTRL); + dev_dbg(isp->dev, "-------------ISP R2K OUT1 REMAP Register dump end----------\n"); + } + +@@ -2453,7 +2474,7 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + unsigned long flags; + int drop = 0; + struct isp_cfg_info *isp_cfg = &r2k->isp_cfg; +- ++ + dev_dbg(video->isp->dev,"%s:start\n",__func__); + spin_lock_irqsave(&video->irqlock, flags); + if (WARN_ON(list_empty(&video->dmaqueue))) { +@@ -2462,7 +2483,7 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + if(isp_cfg->isp_wrap_cfg.ds0Info.ds0_out_en == 0 && dsNum == DS0_VIDEO) + { + return; +- } ++ } + r2k->profile.no_buf_drop_cnt++; + return; + } +@@ -2472,15 +2493,15 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + if(isp_cfg->isp_wrap_cfg.ds0Info.ds0_out_en == 0 && dsNum == DS0_VIDEO) + { + return; +- } ++ } + r2k->profile.no_buf_drop_cnt++; + return; + } + + buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); +- ++ + if(r2k->profile.drop_threshold > 0LL && r2k->profile.buf_set_time[dsNum] != 0) +- { ++ { + unsigned long long delta; + delta = get_usec() - r2k->profile.buf_set_time[dsNum]; + if(delta > r2k->profile.drop_threshold) +@@ -2499,7 +2520,7 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + list_del(&buf->irqlist); + next_buf = list_first_entry(&video->dmaqueue, struct k510isp_buffer, irqlist); + } +- ++ + if(next_buf != NULL) + { + if(dsNum == MAIN_VIDEO) +@@ -2511,7 +2532,7 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + else if(dsNum == DS2_VIDEO) + isp_r2k_set_out2_outaddr(r2k, next_buf->dma); + } +- ++ + spin_unlock_irqrestore(&video->irqlock, flags); + + if(!drop) +@@ -2574,7 +2595,7 @@ static void video_buffer_next(struct isp_r2k_device *r2k, enum video_type dsNum) + pipe->state &= ~ISP_PIPELINE_STREAM; + spin_unlock(&pipe->lock); + } +- ++ + spin_unlock_irqrestore(&video->irqlock, flags); + + return; +@@ -2594,7 +2615,7 @@ static void r2k_isr_main_buffer(struct isp_r2k_device *r2k) + return 1; + } + +- video_buffer_next(r2k, MAIN_VIDEO); ++ video_buffer_next(r2k, MAIN_VIDEO); + + r2k->profile.buf_set_time[MAIN_VIDEO] = get_usec(); + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; +@@ -2638,7 +2659,7 @@ static void r2k_isr_out1_buffer(struct isp_r2k_device *r2k) + return 1; + } + +- video_buffer_next(r2k, DS1_VIDEO); ++ video_buffer_next(r2k, DS1_VIDEO); + r2k->profile.buf_set_time[DS1_VIDEO] = get_usec(); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; +@@ -2660,7 +2681,7 @@ static void r2k_isr_out2_buffer(struct isp_r2k_device *r2k) + return 1; + } + +- video_buffer_next(r2k, DS2_VIDEO); ++ video_buffer_next(r2k, DS2_VIDEO); + + pipe->state |= ISP_PIPELINE_IDLE_OUTPUT; + +@@ -2693,7 +2714,7 @@ int k510isp_r2k_ds0_isr(struct isp_r2k_device *r2k,u32 events) + /* Handle queued buffers on frame end interrupts */ + //if(events & (IRQW1_STS_OUT0_Y_FRAME_IRQ|IRQW1_STS_OUT0_UV_FRAME_IRQ)) + r2k_isr_out0_buffer(r2k); +- ++ + return 0; + } + +@@ -2704,7 +2725,7 @@ int k510isp_r2k_ds1_isr(struct isp_r2k_device *r2k,u32 events) + return 0; + //if(events & (IRQW1_STS_OUT1_Y_FRAME_IRQ|IRQW1_STS_OUT1_UV_FRAME_IRQ)) + r2k_isr_out1_buffer(r2k); +- ++ + return 0; + } + // +@@ -2736,7 +2757,7 @@ static int r2k_video_queue(struct k510isp_video *video, struct k510isp_buffer *b + { + dev_err(video->isp->dev,"%s:no mem dev\n",__func__); + return -ENODEV; +- } ++ } + if (r2k->output & ISP_R2K_OUTPUT_FBC) + { + isp_r2k_set_fbc_outaddr(r2k, buffer->dma); +@@ -2771,25 +2792,25 @@ static int r2k_video_queue(struct k510isp_video *video, struct k510isp_buffer *b + } + if (r2k->output & ISP_R2K_OUTPUT_MAIN_MEM) + { +- dev_dbg(video->isp->dev,"%s:buffer->dma(0x%x)\n",__func__,buffer->dma); ++ dev_dbg(video->isp->dev,"%s:buffer->dma(0x%x)\n",__func__,buffer->dma); + r2k->pingpong[MAIN_VIDEO] = 0; +- isp_r2k_set_main_outaddr(r2k, buffer->dma); ++ isp_r2k_set_main_outaddr(r2k, buffer->dma); + } + + if (r2k->output & ISP_R2K_OUTPUT_DS0_MEM) + { + r2k->pingpong[DS0_VIDEO] = 0; +- isp_r2k_set_out0_outaddr(r2k, buffer->dma); ++ isp_r2k_set_out0_outaddr(r2k, buffer->dma); + } + if (r2k->output & ISP_R2K_OUTPUT_DS1_MEM) + { + r2k->pingpong[DS1_VIDEO] = 0; +- isp_r2k_set_out1_outaddr(r2k, buffer->dma); ++ isp_r2k_set_out1_outaddr(r2k, buffer->dma); + } + if (r2k->output & ISP_R2K_OUTPUT_DS2_MEM) + { + r2k->pingpong[DS2_VIDEO] = 0; +- isp_r2k_set_out2_outaddr(r2k, buffer->dma); ++ isp_r2k_set_out2_outaddr(r2k, buffer->dma); + } + #endif + /* We now have a buffer queued on the output, restart the pipeline +@@ -2874,7 +2895,7 @@ static long r2k_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) + mutex_lock(&r2k->ioctl_lock); + ret = isp_r2k_remap_out1_config(r2k, arg); + mutex_unlock(&r2k->ioctl_lock); +- break; ++ break; + case VIDIOC_K510ISP_R2K_AE_STAT_REQ: + mutex_lock(&r2k->ioctl_lock); + isp_r2k_core_GetAeSts(r2k->isp,arg); +@@ -2894,6 +2915,16 @@ static long r2k_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) + reset_control_reset(r2k->isp->reset[ISP_R2K_RST]); + mutex_unlock(&r2k->ioctl_lock); + break; ++ case VIDIOC_K510ISP_R2K_CORE_REG_SET: ++ mutex_lock(&r2k->ioctl_lock); ++ isp_r2k_core_RegSet(r2k->isp,arg); ++ mutex_unlock(&r2k->ioctl_lock); ++ break; ++ case VIDIOC_K510ISP_R2K_CORE_REG_GET: ++ mutex_lock(&r2k->ioctl_lock); ++ isp_r2k_core_RegGet(r2k->isp,arg); ++ mutex_unlock(&r2k->ioctl_lock); ++ break; + default: + dev_err(r2k->isp->dev,"%s:cmd(0x%x) err!\n",__func__,cmd); + return -ENOIOCTLCMD; +@@ -2940,8 +2971,8 @@ static int r2k_set_stream(struct v4l2_subdev *sd, int enable) + dev_dbg(r2k->isp->dev,"%s:enable(0x%d)\n",__func__,enable); + + struct isp_cfg_info *isp_cfg = &r2k->isp_cfg; +- struct isp_irq_info irq_info; +- ++ struct isp_irq_info irq_info; ++ + if (r2k->state == ISP_PIPELINE_STREAM_STOPPED) { + if (enable == ISP_PIPELINE_STREAM_STOPPED) + { +@@ -2951,9 +2982,9 @@ static int r2k_set_stream(struct v4l2_subdev *sd, int enable) + k510isp_r2k_reset(isp); + mutex_unlock(&r2k->ioctl_lock); + return 0; +- } ++ } + atomic_set(&r2k->stopping, 0); +- } ++ } + + switch (enable) { + case ISP_PIPELINE_STREAM_CONTINUOUS: +@@ -3016,7 +3047,7 @@ static int r2k_set_stream(struct v4l2_subdev *sd, int enable) + if(r2k->profile.drop_cnt[i] > 0) + dev_info(r2k->isp->dev,"r2k ds%d jump drop_cnt %d\n", i, r2k->profile.drop_cnt[i]); + } +- } ++ } + dev_info(r2k->isp->dev,"r2k dmaErrCnt %d, no_buf_drop_cnt %d, total %d\n", r2k->profile.dmaErrCnt, r2k->profile.no_buf_drop_cnt, r2k->profile.pic_cnt); + break; + } +@@ -3231,7 +3262,7 @@ static int r2k_enum_mbus_code(struct v4l2_subdev *sd, + case ISP_R2K_PAD_SINK: + if (code->index >= ARRAY_SIZE(r2k_fmts)) + { +- dev_err(r2k->isp->dev,"%s:code->index %d\n",__func__,code->index); ++ dev_err(r2k->isp->dev,"%s:code->index %d\n",__func__,code->index); + return -EINVAL; + } + code->code = r2k_fmts[code->index]; +@@ -3253,7 +3284,7 @@ static int r2k_enum_mbus_code(struct v4l2_subdev *sd, + code->code = MEDIA_BUS_FMT_UYVY8_1X16; + else + { +- dev_err(r2k->isp->dev,"%s:code->index1 %d\n",__func__,code->index); ++ dev_err(r2k->isp->dev,"%s:code->index1 %d\n",__func__,code->index); + return -EINVAL; + } + } else { +@@ -3264,7 +3295,7 @@ static int r2k_enum_mbus_code(struct v4l2_subdev *sd, + code->code = format->code; + else + { +- dev_err(r2k->isp->dev,"%s:code->index2 %d\n",__func__,code->index); ++ dev_err(r2k->isp->dev,"%s:code->index2 %d\n",__func__,code->index); + return -EINVAL; + } + } +@@ -3289,7 +3320,7 @@ static int r2k_enum_frame_size(struct v4l2_subdev *sd, + { + dev_err(r2k->isp->dev,"%s:fse->index%d\n",__func__,fse->index); + return -EINVAL; +- } ++ } + + format.code = fse->code; + format.width = 1; +@@ -3302,7 +3333,7 @@ static int r2k_enum_frame_size(struct v4l2_subdev *sd, + { + dev_err(r2k->isp->dev,"%s:format.code,fse->code %d\n",__func__,fse->code); + return -EINVAL; +- } ++ } + + format.code = fse->code; + format.width = -1; +@@ -3337,7 +3368,7 @@ static int r2k_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_conf + { + dev_err(r2k->isp->dev,"%s:no pad\n",__func__); + return -EINVAL; +- } ++ } + + switch (sel->target) { + case V4L2_SEL_TGT_CROP_BOUNDS: +@@ -3387,14 +3418,14 @@ static int r2k_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_conf + { + dev_err(r2k->isp->dev,"%s:pad == NULL\n",__func__); + return -EINVAL; +- } ++ } + + /* The crop rectangle can't be changed while streaming. */ + if (r2k->state != ISP_PIPELINE_STREAM_STOPPED) + { + dev_err(r2k->isp->dev,"%s:ISP_PIPELINE_STREAM_RUNNING\n",__func__); + return -EBUSY; +- } ++ } + + /* Modifying the crop rectangle always changes the format on the source + * pad. If the KEEP_CONFIG flag is set, just return the current crop +@@ -3499,7 +3530,7 @@ static int r2k_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config + crop->top = 0; + crop->width = fmt->format.width; + crop->height = fmt->format.height; +- // ++ // + format = &fmt->format; + r2k->formats[ISP_R2K_PAD_SINK].width = format->width; + r2k->formats[ISP_R2K_PAD_SINK].height = format->height; +@@ -3521,7 +3552,7 @@ static int r2k_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config + r2k->formats[ISP_R2K_PAD_MAIN_SOURCE].height = format->height; + r2k->formats[ISP_R2K_PAD_MAIN_SOURCE].field = V4L2_FIELD_NONE; + r2k->formats[ISP_R2K_PAD_MAIN_SOURCE].colorspace =V4L2_COLORSPACE_SRGB; +- r2k->formats[ISP_R2K_PAD_MAIN_SOURCE].code = format->code; ++ r2k->formats[ISP_R2K_PAD_MAIN_SOURCE].code = format->code; + } + + if (fmt->pad == ISP_R2K_PAD_DS0_SOURCE) { +@@ -3570,7 +3601,7 @@ static int r2k_link_validate(struct v4l2_subdev *sd, + { + dev_err(r2k->isp->dev,"%s:format error\n",__func__); + return -EPIPE; +- } ++ } + + return 0; + } +@@ -3597,7 +3628,7 @@ static int r2k_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) + format.format.code = r2k->formats[pad].code;//MEDIA_BUS_FMT_SRGGB10_1X10;//MEDIA_BUS_FMT_SGRBG10_1X10; + format.format.width = r2k->formats[pad].width;//1920;//4096; + format.format.height = r2k->formats[pad].height;//1080;//4096; +- r2k_set_format(sd, fh ? fh->pad : NULL, &format); ++ r2k_set_format(sd, fh ? fh->pad : NULL, &format); + } + + return 0; +@@ -3673,12 +3704,12 @@ static int r2k_link_setup(struct media_entity *entity, + { + dev_err(r2k->isp->dev,"%s:!ISP_R2K_INPUT_NONE\n",__func__); + return -EBUSY; +- } ++ } + + if (remote->entity == &r2k->subdev.entity) + r2k->input = ISP_R2K_INPUT_VI; + else +- r2k->input = ISP_R2K_INPUT_NONE; ++ r2k->input = ISP_R2K_INPUT_NONE; + break; + case ISP_R2K_PAD_MAIN_SOURCE: + case ISP_R2K_PAD_MAIN_SOURCE | 2 << 16: +@@ -3688,21 +3719,21 @@ static int r2k_link_setup(struct media_entity *entity, + { + dev_err(r2k->isp->dev,"%s:!ISP_R2K_PAD_MAIN_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + r2k->output |= ISP_R2K_OUTPUT_MAIN_MEM; + } else { + r2k->output &= ~ISP_R2K_OUTPUT_MAIN_MEM; + } + break; + case ISP_R2K_PAD_DS0_SOURCE: +- case ISP_R2K_PAD_DS0_SOURCE | 2 << 16: ++ case ISP_R2K_PAD_DS0_SOURCE | 2 << 16: + /* Write to memory */ + if (flags & MEDIA_LNK_FL_ENABLED) { + if (r2k->output & ISP_R2K_OUTPUT_DS0_MEM) + { + dev_err(r2k->isp->dev,"%s:!ISP_R2K_PAD_DS0_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + r2k->output |= ISP_R2K_OUTPUT_DS0_MEM; + } else { + r2k->output &= ~ISP_R2K_OUTPUT_DS0_MEM; +@@ -3716,7 +3747,7 @@ static int r2k_link_setup(struct media_entity *entity, + { + dev_err(r2k->isp->dev,"%s:!ISP_R2K_PAD_DS1_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + r2k->output |= ISP_R2K_OUTPUT_DS1_MEM; + } else { + r2k->output &= ~ISP_R2K_OUTPUT_DS1_MEM; +@@ -3730,7 +3761,7 @@ static int r2k_link_setup(struct media_entity *entity, + { + dev_err(r2k->isp->dev,"%s:!ISP_R2K_PAD_DS2_SOURCE\n",__func__); + return -EBUSY; +- } ++ } + r2k->output |= ISP_R2K_OUTPUT_DS2_MEM; + } else { + r2k->output &= ~ISP_R2K_OUTPUT_DS2_MEM; +@@ -3738,7 +3769,7 @@ static int r2k_link_setup(struct media_entity *entity, + break; + default: + dev_dbg(r2k->isp->dev,"%s:!no index\n",__func__); +- return -EINVAL; ++ return -EINVAL; + } + + dev_dbg(r2k->isp->dev,"%s:end\n",__func__); +@@ -3822,7 +3853,7 @@ int k510isp_r2k_register_entities(struct isp_r2k_device *r2k, + k510isp_video_unregister(&r2k->video_out[DS1_VIDEO]); + error_ds0: + k510isp_video_unregister(&r2k->video_out[DS0_VIDEO]); +-error_main: ++error_main: + k510isp_video_unregister(&r2k->video_out[MAIN_VIDEO]); + error: + k510isp_r2k_unregister_entities(r2k); +@@ -3870,7 +3901,7 @@ static int k510isp_r2k_init_entities(struct isp_r2k_device *r2k) + { + dev_err(isp->dev,"%s:media_entity_pads_init ret:%d\n",__func__,ret); + return ret; +- } ++ } + dev_dbg(isp->dev,"%s:media_entity_pads_init end\n",__func__); + r2k_init_formats(sd, NULL); + //MAIN +@@ -3887,7 +3918,7 @@ static int k510isp_r2k_init_entities(struct isp_r2k_device *r2k) + { + dev_err(isp->dev,"%s:k510isp_video_init ret:%d\n",__func__,ret); + goto error_video; +- } ++ } + //DS0 + r2k->video_out[DS0_VIDEO].type = V4L2_BUF_TYPE_VIDEO_CAPTURE;//V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;//V4L2_BUF_TYPE_VIDEO_OUTPUT; + r2k->video_out[DS0_VIDEO].bpl_alignment = 32;//16;//32; +@@ -3902,7 +3933,7 @@ static int k510isp_r2k_init_entities(struct isp_r2k_device *r2k) + { + dev_err(isp->dev,"%s:k510isp_video_init ret:%d\n",__func__,ret); + goto error_main_video; +- } ++ } + //DS1 + r2k->video_out[DS1_VIDEO].type = V4L2_BUF_TYPE_VIDEO_CAPTURE;//V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;//V4L2_BUF_TYPE_VIDEO_OUTPUT; + r2k->video_out[DS1_VIDEO].bpl_alignment = 32;//16;//32; +@@ -3917,7 +3948,7 @@ static int k510isp_r2k_init_entities(struct isp_r2k_device *r2k) + { + dev_err(isp->dev,"%s:k510isp_video_init ret:%d\n",__func__,ret); + goto error_ds0_video; +- } ++ } + //DS0 + r2k->video_out[DS2_VIDEO].type = V4L2_BUF_TYPE_VIDEO_CAPTURE;//V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;//V4L2_BUF_TYPE_VIDEO_OUTPUT; + r2k->video_out[DS2_VIDEO].bpl_alignment = 32;//16;//32; +@@ -3932,7 +3963,7 @@ static int k510isp_r2k_init_entities(struct isp_r2k_device *r2k) + { + dev_err(isp->dev,"%s:k510isp_video_init ret:%d\n",__func__,ret); + goto error_ds1_video; +- } ++ } + dev_dbg(isp->dev,"%s: end\n",__func__); + return 0; + +@@ -3978,8 +4009,8 @@ int k510isp_r2k_init(struct k510_isp_device *isp) + dev_err(isp->dev,"%s:k510isp_r2k_init_entities\n",__func__); + mutex_destroy(&r2k->ioctl_lock); + return ret; +- } +- dev_dbg(isp->dev,"%s: end\n",__func__); ++ } ++ dev_dbg(isp->dev,"%s: end\n",__func__); + return 0; + } + /* +@@ -3996,5 +4027,5 @@ void k510isp_r2k_cleanup(struct k510_isp_device *isp) + k510isp_video_cleanup(&r2k->video_out[DS2_VIDEO]); + media_entity_cleanup(&r2k->subdev.entity); + +- mutex_destroy(&r2k->ioctl_lock); ++ mutex_destroy(&r2k->ioctl_lock); + } +diff --git a/include/uapi/linux/k510isp.h b/include/uapi/linux/k510isp.h +index 48d5ba06..2dbcb4fb 100755 +--- a/include/uapi/linux/k510isp.h ++++ b/include/uapi/linux/k510isp.h +@@ -29,7 +29,7 @@ + #define VIDIOC_K510ISP_F2K_REMAP_OUT1_CFG \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 7,struct isp_remap_cfg_info) + #define VIDIOC_K510ISP_F2K_FBCD_CFG \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 8,struct isp_remap_cfg_info) ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 8,struct isp_remap_cfg_info) + #define VIDIOC_K510ISP_R2K_WRAP_CFG \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 9,struct isp_wrap_cfg_info) + #define VIDIOC_K510ISP_R2K_CORE_CFG \ +@@ -96,18 +96,14 @@ + _IOWR('V', BASE_VIDIOC_PRIVATE + 40,unsigned long) + #define VIDIOC_K510ISP_SYSCTL_RST_R2K \ + _IOWR('V', BASE_VIDIOC_PRIVATE + 41,unsigned long) +-#define VIDIOC_K510ISP_F2K_AWB_VAL_GET \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 42, struct k510isp_awb_sync_info) +-#define VIDIOC_K510ISP_R2K_AWB_VAL_SET \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 43, struct k510isp_awb_sync_info) + #define VIDIOC_K510ISP_F2K_CORE_REG_SET \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 44, struct k510isp_reg_val) ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 42, struct k510isp_reg_val) + #define VIDIOC_K510ISP_F2K_CORE_REG_GET \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 45, struct k510isp_reg_val) ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 43, struct k510isp_reg_val) + #define VIDIOC_K510ISP_R2K_CORE_REG_SET \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 46, struct k510isp_reg_val) ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 44, struct k510isp_reg_val) + #define VIDIOC_K510ISP_R2K_CORE_REG_GET \ +- _IOWR('V', BASE_VIDIOC_PRIVATE + 47, struct k510isp_reg_val) ++ _IOWR('V', BASE_VIDIOC_PRIVATE + 45, struct k510isp_reg_val) + // + /* + * Events +@@ -170,7 +166,7 @@ struct k510isp_awb_sync_info { + struct k510isp_awb_stats{ + // + __u32 bfb_pos;//Blue hist value of AWB in feedback mode +- __u32 bfb_pot;//Blue hist pixels of AWB in feedback mode ++ __u32 bfb_pot;//Blue hist pixels of AWB in feedback mode + __u32 rfb_pos;//Red hist value of AWB in feedback mode + __u32 rfb_pot;//Red hist pixels of AWB in feedback mode + // +-- +2.36.1 + From 84662c39a56bf6c3df4d8bf593d01f63caa38ab1 Mon Sep 17 00:00:00 2001 From: wangchenggen <74888535+wangchenggen@users.noreply.github.com> Date: Mon, 29 Aug 2022 20:44:34 +0800 Subject: [PATCH 15/74] Add GC2053,GC2093,GC2145 Sensor driver and config file, 800x1280 LCD Support (#301) * meida: add driver & config for gc2053,gc2093,gc2145 sensor. Signed-off-by: Chenggen.Wang * display: add 800x1280 lcd & mutli lcd support. Signed-off-by: Chenggen.Wang Signed-off-by: Chenggen.Wang Co-authored-by: Chenggen.Wang Co-authored-by: zhangxiaojingCAN <104607452+zhangxiaojingCAN@users.noreply.github.com> --- package/mediactl_lib/src/config/gc2053.conf | 531 ++ package/mediactl_lib/src/config/gc2093.conf | 531 ++ package/mediactl_lib/src/config/gc2145.conf | 531 ++ .../video_drm_gc2053_gc2093_1920x1080.conf | 322 ++ ..._drm_gc2093_1920x1080_gc2145_1280x960.conf | 322 ++ ...drm_gc2093_1920x1080_gc2145_1600x1200.conf | 322 ++ ...o_drm_gc2093_800x1080_gc2145_1280x960.conf | 322 ++ ..._drm_gc2093_800x1080_gc2145_1600x1200.conf | 322 ++ ...t-gc2053-gc2093-gc2145-sensor-driver.patch | 4671 +++++++++++++++++ .../0026-drm-panel-mutli-panel-support.patch | 2506 +++++++++ ...pport-Fitipower-JD9365D-800x1280-lcd.patch | 934 ++++ .../0013-display-add-bootargs-panel.id.patch | 69 + 12 files changed, 11383 insertions(+) create mode 100644 package/mediactl_lib/src/config/gc2053.conf create mode 100644 package/mediactl_lib/src/config/gc2093.conf create mode 100644 package/mediactl_lib/src/config/gc2145.conf create mode 100755 package/mediactl_lib/src/config/video_drm_gc2053_gc2093_1920x1080.conf create mode 100644 package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1280x960.conf create mode 100644 package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1600x1200.conf create mode 100755 package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1280x960.conf create mode 100755 package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1600x1200.conf create mode 100644 package/patches/linux/0025-camera-support-gc2053-gc2093-gc2145-sensor-driver.patch create mode 100644 package/patches/linux/0026-drm-panel-mutli-panel-support.patch create mode 100644 package/patches/uboot/0012-display-Support-Fitipower-JD9365D-800x1280-lcd.patch create mode 100644 package/patches/uboot/0013-display-add-bootargs-panel.id.patch diff --git a/package/mediactl_lib/src/config/gc2053.conf b/package/mediactl_lib/src/config/gc2053.conf new file mode 100644 index 0000000..d89cd77 --- /dev/null +++ b/package/mediactl_lib/src/config/gc2053.conf @@ -0,0 +1,531 @@ +{ + "isp_general":{ + "isp_out_sel":0, + "dvp_ch_mode":1, + "hist_3a_out_en":0, + "main_out":{ + "out_img_format":1, + "out_yuv_in_format":0, + "out_yuv422_pxl_order":0, + "out_pxl_width":0, + "out_frame_buf_size":2048 + }, + "out0":{ + "ds0_out_img_format":1, + "ds0_out_yuv_in_format":0, + "ds0_out_yuv422_pxl_order":0, + "ds0_out_pxl_width":0, + "ds0_frame_buf_size":2048 + }, + "out1":{ + "ds1_out_img_format":1, + "ds1_out_yuv_in_format":0, + "ds1_out_yuv422_pxl_order":0, + "ds1_out_pxl_width":0, + "ds1_frame_buf_size":2048 + }, + "out2":{ + "ds2_out_img_format":0, + "ds2_out_yuv_in_format":0, + "ds2_out_yuv422_pxl_order":0, + "ds2_out_pxl_width":0, + "ds2_frame_buf_size":2048 + }, + "wdr":{ + "wdr_mode":0, + "wdr_long_ch_mode":0, + "wdr_long_l2_buf_en":0, + "wdr_short_s1_buf_en":0, + "wdr_dynamic_switch_en":0, + "wdr_long_l2_buf_depth":0, + "wdr_long_img_format":0, + "wdr_long_yuv_in_format":0, + "wdr_long_img_out_format":0, + "wdr_long_yuv422_pxl_order":0, + "wdr_long_pixel_width":2, + "wdr_buf_base":0, + "wdr_line_stride":0, + "wdr_frame_buf_size":0 + }, + "nr3d":{ + "nr3d_en":0, + "nr3d_fbcd_en":0, + "nr3d_mv_out_en":0, + "nr3d_y_img_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, + "nr3d_y_yuv422_pxl_order":0, + "nr3d_y_pixel_width":2, + "nr3d_uv_img_format":0, + "nr3d_uv_yuv_in_format":0, + "nr3d_uv_mig_out_format":0, + "nr3d_uv_yuv422_pxl_order":0, + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 + }, + "ldc":{ + "ldc_line_stride":2048, + "ldc_frame_buf_size":2048 + } + }, + "isp_core": { + "itc": { + "hsync_pol":0, + "vsync_pol":0, + "hsync_input_timing":2, + "vsync_input_timing":1, + "flip_ctl" :0, + "video_fmt_sl":0, + "itc_ttl_h" :3476, + "itc_ttl_v" :1166, + "itc_stt_hr" :0, + "itc_stt_vr" :1 + }, + "tpg": { + "tpg_en":0, + "bayer_mode_sel":3, + "motion_mode_sel":0, + "tpg_sel":9, + "wdr_l_mul_data":0, + "wdr_m_mul_data":0, + "wdr_s_mul_data":0 + }, + "blc":{ + "blc_en" :1, + "blc_offset" :240, + "blc_ratio" :272 + }, + "lsc":{ + "lsc_en" :1, + "lsc_h_center" :900, + "lsc_v_center" :580, + "lsc_r_ratio" :10, + "lsc_g_ratio":6, + "lsc_b_ratio" :6, + "lsc_ir_ratio" :6 + }, + "ae":{ + "ae_as_en" :1, + "ae_ag_en" :1, + "ae_airis_en" :0, + "ae_enter_ls_sel" :0, + "ae_exit_ls_sel" :0, + "ae_win_mode_sel" :0, + "ae_back_light_mode_sel" :0, + "ae_day_change_en" :0, + "ae_day_change_sel" :0, + "ae_win_stth" :0, + "ae_win_sttv" :0, + "ae_win_endh" :1919, + "ae_win_endv" :1079, + "ae_yobj" :90, + "ae_av_rg" :13, + "ae_l_ex_time" :1100, + "ae_m_ex_time" :32, + "ae_s_ex_time" :32, + "ae_agc" :256, + "ae_ad_shuttle_freq" :1, + "ae_ad_gain_freq" :0, + "ae_adjust_step_max":36, + "ae_ex_value_max" :1162, + "ae_ex_value_mid" :256, + "ae_ex_value_min" :1, + "ae_gain_value_max" :2304, + "ae_gain_value_mid" :512, + "ae_gain_value_min" :256, + "ae_dn_switch_ad_step_max" :512, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, + "ape_drv_signal_max" :3840, + "ape_coeff_distance" :0, + "ape_coeff_speed" :0, + "ape_coeff_acceleration" :0, + "ape_drv_manual_value" :4095, + "ape_damp_manual_value" :2048 + }, + "awb":{ + "awb_d65_en" :1, + "awb_ccm_en" :1, + "awb_en" :1, + "awb_mode_sel" :1, + "awb_hist_mode_sel" :0, + "awb_veri_en" :0, + "awb_fb_en" :0, + "awb_value_save_en" :0, + "awb_ccm_adp_adjust_en" :0, + "awb_stab_en" :1, + "awb_d65_red_gain" :466, + "awb_d65_blue_gain" :382, + "ccm_rr" :322, + "ccm_rg" :54, + "ccm_rb" :12, + "ccm_gr" :37, + "ccm_gg" :310, + "ccm_gb" :17, + "ccm_br" :0, + "ccm_bg" :60, + "ccm_bb" :316, + "ccm_correct_coff" :256, + "awb_win_stth" :0, + "awb_win_sttv" :0, + "awb_win_endh" :1919, + "awb_win_endv" :1079, + "awb_correct_diff_th" :8, + "awb_color_changeres_time" :8, + "awb_historgram_th" :4, + "awb_red_gain_adjust" :256, + "awb_green_gain_adjust" :256, + "awb_blue_gain_adjust" :256, + "awb_red_max_value" :240, + "awb_blue_max_value" :379, + "awb_red_min_value" :176, + "awb_blue_min_value" :281, + "awb_red_obj_value" :256, + "awb_blue_obj_value" :256 + }, + "wdr":{ + "wdr_fusion_en" :0, + "wdr_frame_sel" :0, + "wdr_adp_adjust_en" :0, + "wdr_stab_en" :0, + "wdr_en" :0, + "wdr_ghost_remove_en" :0, + "wdr_3frame_out_mode" :0, + "wdr_mode_sel" :0, + "wdr_2frame_ex_ratio" :1, + "wdr_3frame_ex_ratio" :1, + "wdr_stat_img_sel" :0, + "wdr_ltm_data_sel" :1, + "wdr_tz_data_sel" :1, + "wdr_remove_purple_en" :0, + "wdr_over_ex_ratio_th1" :384, + "wdr_over_ex_ratio_th2" :32, + "wdr_fusion_ratio_th" :192, + "wdr_fusion_value1" :64, + "wdr_fusion_value2" :16 + }, + "csc":{ + "rgb2yuv_00":153, + "rgb2yuv_01":256, + "rgb2yuv_02":86, + "rgb2yuv_10":301, + "rgb2yuv_11":214, + "rgb2yuv_12":170, + "rgb2yuv_20":58, + "rgb2yuv_21":42, + "rgb2yuv_22":256 + }, + "ada":{ + "gm_rgb_en" :1, + "gm_yuv_en" :0, + "ada_en" :0, + "ada_sbz_en" :0, + "ada_ccr_en" :0, + "ada_adp_en" :0, + "ada_adp_ccr_en" :0, + "ada_stat_mode_sel" :0, + "ada_enh_mode_sel" :0, + "ada_hist_max" :128, + "ada_ttl_max" :128, + "ada_win_stth" :0, + "ada_win_sttv" :0, + "ada_win_endh" :1919, + "ada_win_endv" :1079 + }, + "rgb-ir":{ + "raw_fmt" :0, + "rgbir_rct_en" :0, + "dfc_en" :0, + "rgbir_fs_en" :0, + "rgbir_ot_sl" :0, + "rgbir_fs_max" :256, + "dfc_krb" :0, + "dfc_ky" :0, + "dfc_th" :256, + "dfc_th_1" :256 + }, + "2dnr":{ + "dpeak_en" :1, + "nr2d_raw_en" :1, + "nr2d_eg_en" :1, + "nr2d_jl_en" :1, + "nr2d_av_en" :1, + "nr2d_c_en" :1, + "dpeak_adp_en" :1, + "nr2d_raw_adp_en":1, + "nr2d_y_adp_en" :1, + "nr2d_c_adp_en" :1, + "nr2d_raw_kl" :16, + "nr2d_jl_th" :511, + "nr2d_eg_k" :48, + "nr2d_y_k" :64, + "nr2d_c_k" :255 + }, + "3dnr":{ + "nr3d_en" :1, + "nr3dp_y_en" :1, + "nr3dp_c_en" :1, + "nr3dm_y_en" :1, + "nr3dm_c_en" :1, + "nr3db_y_en" :1, + "nr3db_c_en" :1, + "nr3dm_nr2d_y_en" :1, + "nr3dm_nr2d_c_en" :1, + "core_3dnr_wb_en" :1, + "core_3dnr_wb_sel" :1, + "core_3dnr_adp_luma_en" :0, + "core_3dnr_adp_chroma_en" :0, + "nr3dp_thy" :64, + "nr3dp_thyp" :64, + "nr3dp_thcp" :64, + "nr3dm_mid_th" :128, + "nr3dm_mtp_th" :8, + "nr3dm_mtc_th" :128, + "nr3dm_ym_k" :60, + "nr3dm_thy" :64, + "nr3dm_min" :0, + "nr3dm_thw0" :128, + "core_3dnr_chroma_intensity" :122, + "nr3db_nr2d_eg_th" :64, + "nr3db_thyp" :64, + "nr3db_thcp" :32 + }, + "enh":{ + "ltm":{ + "enh_ltm_en" :1, + "enh_adp_ltm_en" :0, + "ltm_gain" :128, + "ltm_mm_th" :128 + }, + "sharp":{ + "enh_sharp_en" :1, + "enh_adp_sharp_en" :1, + "shp_core" :8, + "shp_th1" :18, + "shp_th2" :256, + "shp_gain" :64 + }, + "cc":{ + "enh_cc_en" :1, + "enh_adp_cc_en" :0 + } + }, + "post_ctl":{ + "otc_ctl":{ + "otc_en" :0, + "otc_yc_sl" :0, + "otc_uv_sl" :1, + "otc_hs_plt_sl" :0, + "otc_vs_plt_sl" :0, + "otc_stt_vr" :0, + "otc_stt_hr" :0 + }, + "ctrst":{ + "ctrst_en" :1, + "ctrst_gain":128 + }, + "luma":{ + "luma_en" :1, + "luma_gain":128 + }, + "strt":{ + "strt_en" :1, + "strt_gain":255 + } + }, + "ldc":{ + "ldc_en" :0, + "ldc_rct_en" :0, + "ldc_rq_frq" :128, + "ldc_stt_ln" :540, + "ldc_ch" :960, + "ldc_cv" :540, + "ldc_cr" :684, + "ldc_cz" :684 + }, + "af":{ + "af_stat_en" :1, + "af_stat_mode_sel" :0, + "af_stat_win_h_start":0, + "af_stat_win_v_start":0, + "af_stat_win_h_end" :1919, + "af_stat_win_v_end" :1079 + } + }, + "isp_post":{ + "rgb2yuv":{ + "osd_rgb2yuv_coeff00":306, + "osd_rgb2yuv_coeff01":601, + "osd_rgb2yuv_coeff02":117, + "osd_rgb2yuv_coeff03":0, + "osd_rgb2yuv_coeff10":3920, + "osd_rgb2yuv_coeff11":3749, + "osd_rgb2yuv_coeff12":523, + "osd_rgb2yuv_coeff13":128, + "osd_rgb2yuv_coeff20":523, + "osd_rgb2yuv_coeff21":3658, + "osd_rgb2yuv_coeff22":4011, + "osd_rgb2yuv_coeff23":128 + }, + "yuv2rgb":{ + "out_yuv2rgb_coeff00":1024, + "out_yuv2rgb_coeff01":0, + "out_yuv2rgb_coeff02":1441, + "out_yuv2rgb_coeff03":3916, + "out_yuv2rgb_coeff10":1024, + "out_yuv2rgb_coeff11":3742, + "out_yuv2rgb_coeff12":3362, + "out_yuv2rgb_coeff13":136, + "out_yuv2rgb_coeff20":1024, + "out_yuv2rgb_coeff21":1822, + "out_yuv2rgb_coeff22":0, + "out_yuv2rgb_coeff23":3868 + }, + "ds0":{ + "ds0_out_rgb_mode":0, + "ds0_out_rgb_en":0, + "ds0_out_yuv_mode":0, + "ds0_out_uv_swap":0, + "ds0_osd0":{ + "ds0_osd0_enable":0, + "ds0_osd0_type":0, + "ds0_osd0_alpha_tpye":0, + "ds0_osd0_vst":0, + "ds0_osd0_hst":0, + "ds0_osd0_vend":0, + "ds0_osd0_hend":0, + "ds0_osd0_dma_request_length":0, + "ds0_osd0_dma_map":0, + "ds0_osd0_rgb_rev":0, + "ds0_osd0_global_alpha":0, + "ds0_osd0_swap_64":0, + "ds0_osd0_outstanding_num":0, + "ds0_osd0_bd_limit_en":0 + }, + "ds0_osd1":{ + "ds0_osd1_enable":0, + "ds0_osd1_type":0, + "ds0_osd1_alpha_tpye":0, + "ds0_osd1_vst":0, + "ds0_osd1_hst":0, + "ds0_osd1_vend":0, + "ds0_osd1_hend":0, + "ds0_osd1_dma_request_length":0, + "ds0_osd1_dma_map":0, + "ds0_osd1_rgb_rev":0, + "ds0_osd1_global_alpha":0, + "ds0_osd1_swap_64":0, + "ds0_osd1_outstanding_num":0, + "ds0_osd1_bd_limit_en":0 + }, + "ds0_osd2":{ + "ds0_osd2_enable":0, + "ds0_osd2_type":0, + "ds0_osd2_alpha_tpye":0, + "ds0_osd2_vst":0, + "ds0_osd2_hst":0, + "ds0_osd2_vend":0, + "ds0_osd2_hend":0, + "ds0_osd2_dma_request_length":0, + "ds0_osd2_dma_map":0, + "ds0_osd2_rgb_rev":0, + "ds0_osd2_global_alpha":0, + "ds0_osd2_swap_64":0, + "ds0_osd2_outstanding_num":0, + "ds0_osd2_bd_limit_en":0 + } + }, + "ds1":{ + "ds1_out_rgb_mode":0, + "ds1_out_rgb_en":0, + "ds1_out_yuv_mode":0, + "ds1_out_uv_swap":0, + "ds1_osd0":{ + "ds1_osd0_enable":0, + "ds1_osd0_type":0, + "ds1_osd0_alpha_tpye":0, + "ds1_osd0_vst":0, + "ds1_osd0_hst":0, + "ds1_osd0_vend":0, + "ds1_osd0_hend":0, + "ds1_osd0_dma_request_length":0, + "ds1_osd0_dma_map":0, + "ds1_osd0_rgb_rev":0, + "ds1_osd0_global_alpha":0, + "ds1_osd0_swap_64":0, + "ds1_osd0_outstanding_num":0, + "ds1_osd0_bd_limit_en":0 + }, + "ds1_osd1":{ + "ds1_osd1_enable":0, + "ds1_osd1_type":0, + "ds1_osd1_alpha_tpye":0, + "ds1_osd1_vst":0, + "ds1_osd1_hst":0, + "ds1_osd1_vend":0, + "ds1_osd1_hend":0, + "ds1_osd1_dma_request_length":0, + "ds1_osd1_dma_map":0, + "ds1_osd1_rgb_rev":0, + "ds1_osd1_global_alpha":0, + "ds1_osd1_swap_64":0, + "ds1_osd1_outstanding_num":0, + "ds1_osd1_bd_limit_en":0 + }, + "ds1_osd2":{ + "ds1_osd2_enable":0, + "ds1_osd2_type":0, + "ds1_osd2_alpha_tpye":0, + "ds1_osd2_vst":0, + "ds1_osd2_hst":0, + "ds1_osd2_vend":0, + "ds1_osd2_hend":0, + "ds1_osd2_dma_request_length":0, + "ds1_osd2_dma_map":0, + "ds1_osd2_rgb_rev":0, + "ds1_osd2_global_alpha":0, + "ds1_osd2_swap_64":0, + "ds1_osd2_outstanding_num":0, + "ds1_osd2_bd_limit_en":0 + } + }, + "ds2":{ + "ds2_out_rgb_mode":0, + "ds2_out_rgb_en":1, + "ds2_out_yuv_mode":0, + "ds2_out_uv_swap":0, + "ds2_osd0":{ + "ds2_osd0_enable":0, + "ds2_osd0_type":0, + "ds2_osd0_alpha_tpye":0, + "ds2_osd0_vst":0, + "ds2_osd0_hst":0, + "ds2_osd0_vend":0, + "ds2_osd0_hend":0, + "ds2_osd0_dma_request_length":0, + "ds2_osd0_dma_map":0, + "ds2_osd0_rgb_rev":0, + "ds2_osd0_global_alpha":0, + "ds2_osd0_swap_64":0, + "ds2_osd0_outstanding_num":0, + "ds2_osd0_bd_limit_en":0 + }, + "ds2_osd1":{ + "ds2_osd1_enable":0, + "ds2_osd1_type":0, + "ds2_osd1_alpha_tpye":0, + "ds2_osd1_vst":0, + "ds2_osd1_hst":0, + "ds2_osd1_vend":0, + "ds2_osd1_hend":0, + "ds2_osd1_dma_request_length":0, + "ds2_osd1_dma_map":0, + "ds2_osd1_rgb_rev":0, + "ds2_osd1_global_alpha":0, + "ds2_osd1_swap_64":0, + "ds2_osd1_outstanding_num":0, + "ds2_osd1_bd_limit_en":0 + } + } + } +} diff --git a/package/mediactl_lib/src/config/gc2093.conf b/package/mediactl_lib/src/config/gc2093.conf new file mode 100644 index 0000000..d89cd77 --- /dev/null +++ b/package/mediactl_lib/src/config/gc2093.conf @@ -0,0 +1,531 @@ +{ + "isp_general":{ + "isp_out_sel":0, + "dvp_ch_mode":1, + "hist_3a_out_en":0, + "main_out":{ + "out_img_format":1, + "out_yuv_in_format":0, + "out_yuv422_pxl_order":0, + "out_pxl_width":0, + "out_frame_buf_size":2048 + }, + "out0":{ + "ds0_out_img_format":1, + "ds0_out_yuv_in_format":0, + "ds0_out_yuv422_pxl_order":0, + "ds0_out_pxl_width":0, + "ds0_frame_buf_size":2048 + }, + "out1":{ + "ds1_out_img_format":1, + "ds1_out_yuv_in_format":0, + "ds1_out_yuv422_pxl_order":0, + "ds1_out_pxl_width":0, + "ds1_frame_buf_size":2048 + }, + "out2":{ + "ds2_out_img_format":0, + "ds2_out_yuv_in_format":0, + "ds2_out_yuv422_pxl_order":0, + "ds2_out_pxl_width":0, + "ds2_frame_buf_size":2048 + }, + "wdr":{ + "wdr_mode":0, + "wdr_long_ch_mode":0, + "wdr_long_l2_buf_en":0, + "wdr_short_s1_buf_en":0, + "wdr_dynamic_switch_en":0, + "wdr_long_l2_buf_depth":0, + "wdr_long_img_format":0, + "wdr_long_yuv_in_format":0, + "wdr_long_img_out_format":0, + "wdr_long_yuv422_pxl_order":0, + "wdr_long_pixel_width":2, + "wdr_buf_base":0, + "wdr_line_stride":0, + "wdr_frame_buf_size":0 + }, + "nr3d":{ + "nr3d_en":0, + "nr3d_fbcd_en":0, + "nr3d_mv_out_en":0, + "nr3d_y_img_format":0, + "nr3d_y_yuv_in_format":0, + "nr3d_y_img_out_format":0, + "nr3d_y_yuv422_pxl_order":0, + "nr3d_y_pixel_width":2, + "nr3d_uv_img_format":0, + "nr3d_uv_yuv_in_format":0, + "nr3d_uv_mig_out_format":0, + "nr3d_uv_yuv422_pxl_order":0, + "nr3d_uv_pixel_width":2, + "nr3d_frame_buf_size":0 + }, + "ldc":{ + "ldc_line_stride":2048, + "ldc_frame_buf_size":2048 + } + }, + "isp_core": { + "itc": { + "hsync_pol":0, + "vsync_pol":0, + "hsync_input_timing":2, + "vsync_input_timing":1, + "flip_ctl" :0, + "video_fmt_sl":0, + "itc_ttl_h" :3476, + "itc_ttl_v" :1166, + "itc_stt_hr" :0, + "itc_stt_vr" :1 + }, + "tpg": { + "tpg_en":0, + "bayer_mode_sel":3, + "motion_mode_sel":0, + "tpg_sel":9, + "wdr_l_mul_data":0, + "wdr_m_mul_data":0, + "wdr_s_mul_data":0 + }, + "blc":{ + "blc_en" :1, + "blc_offset" :240, + "blc_ratio" :272 + }, + "lsc":{ + "lsc_en" :1, + "lsc_h_center" :900, + "lsc_v_center" :580, + "lsc_r_ratio" :10, + "lsc_g_ratio":6, + "lsc_b_ratio" :6, + "lsc_ir_ratio" :6 + }, + "ae":{ + "ae_as_en" :1, + "ae_ag_en" :1, + "ae_airis_en" :0, + "ae_enter_ls_sel" :0, + "ae_exit_ls_sel" :0, + "ae_win_mode_sel" :0, + "ae_back_light_mode_sel" :0, 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"wdr_remove_purple_en" :0, + "wdr_over_ex_ratio_th1" :384, + "wdr_over_ex_ratio_th2" :32, + "wdr_fusion_ratio_th" :192, + "wdr_fusion_value1" :64, + "wdr_fusion_value2" :16 + }, + "csc":{ + "rgb2yuv_00":153, + "rgb2yuv_01":256, + "rgb2yuv_02":86, + "rgb2yuv_10":301, + "rgb2yuv_11":214, + "rgb2yuv_12":170, + "rgb2yuv_20":58, + "rgb2yuv_21":42, + "rgb2yuv_22":256 + }, + "ada":{ + "gm_rgb_en" :1, + "gm_yuv_en" :0, + "ada_en" :0, + "ada_sbz_en" :0, + "ada_ccr_en" :0, + "ada_adp_en" :0, + "ada_adp_ccr_en" :0, + "ada_stat_mode_sel" :0, + "ada_enh_mode_sel" :0, + "ada_hist_max" :128, + "ada_ttl_max" :128, + "ada_win_stth" :0, + "ada_win_sttv" :0, + "ada_win_endh" :1919, + "ada_win_endv" :1079 + }, + "rgb-ir":{ + "raw_fmt" :0, + "rgbir_rct_en" :0, + "dfc_en" :0, + "rgbir_fs_en" :0, + "rgbir_ot_sl" :0, + "rgbir_fs_max" :256, + "dfc_krb" :0, + "dfc_ky" :0, + "dfc_th" :256, + "dfc_th_1" :256 + }, + "2dnr":{ + "dpeak_en" :1, + "nr2d_raw_en" :1, + "nr2d_eg_en" :1, + "nr2d_jl_en" :1, + "nr2d_av_en" :1, + "nr2d_c_en" :1, + "dpeak_adp_en" :1, + "nr2d_raw_adp_en":1, + "nr2d_y_adp_en" :1, + "nr2d_c_adp_en" :1, + "nr2d_raw_kl" :16, + "nr2d_jl_th" :511, + "nr2d_eg_k" :48, + "nr2d_y_k" :64, + "nr2d_c_k" :255 + }, + "3dnr":{ + "nr3d_en" :1, + "nr3dp_y_en" :1, + "nr3dp_c_en" :1, + "nr3dm_y_en" :1, + "nr3dm_c_en" :1, + "nr3db_y_en" :1, + "nr3db_c_en" :1, + "nr3dm_nr2d_y_en" :1, + "nr3dm_nr2d_c_en" :1, + "core_3dnr_wb_en" :1, + "core_3dnr_wb_sel" :1, + "core_3dnr_adp_luma_en" :0, + "core_3dnr_adp_chroma_en" :0, + "nr3dp_thy" :64, + "nr3dp_thyp" :64, + "nr3dp_thcp" :64, + "nr3dm_mid_th" :128, + "nr3dm_mtp_th" :8, + "nr3dm_mtc_th" :128, + "nr3dm_ym_k" :60, + "nr3dm_thy" :64, + "nr3dm_min" :0, + "nr3dm_thw0" :128, + "core_3dnr_chroma_intensity" :122, + "nr3db_nr2d_eg_th" :64, + "nr3db_thyp" :64, + "nr3db_thcp" :32 + }, + "enh":{ + "ltm":{ + "enh_ltm_en" :1, + "enh_adp_ltm_en" :0, + "ltm_gain" :128, + "ltm_mm_th" :128 + }, + "sharp":{ + "enh_sharp_en" :1, + "enh_adp_sharp_en" :1, + "shp_core" :8, + "shp_th1" :18, + "shp_th2" :256, + "shp_gain" :64 + }, + "cc":{ + "enh_cc_en" :1, + "enh_adp_cc_en" :0 + } + }, + "post_ctl":{ + "otc_ctl":{ + "otc_en" :0, + "otc_yc_sl" :0, + "otc_uv_sl" :1, + "otc_hs_plt_sl" :0, + "otc_vs_plt_sl" :0, + "otc_stt_vr" :0, + "otc_stt_hr" :0 + }, + "ctrst":{ + "ctrst_en" :1, + "ctrst_gain":128 + }, + "luma":{ + "luma_en" :1, + "luma_gain":128 + }, + "strt":{ + "strt_en" :1, + "strt_gain":255 + } + }, + "ldc":{ + "ldc_en" :0, + "ldc_rct_en" :0, + "ldc_rq_frq" :128, + "ldc_stt_ln" :540, + "ldc_ch" :960, + "ldc_cv" :540, + "ldc_cr" :684, + "ldc_cz" :684 + }, + "af":{ + "af_stat_en" :1, + "af_stat_mode_sel" :0, + "af_stat_win_h_start":0, + "af_stat_win_v_start":0, + "af_stat_win_h_end" :1919, + "af_stat_win_v_end" :1079 + } + }, + "isp_post":{ + "rgb2yuv":{ + "osd_rgb2yuv_coeff00":306, + "osd_rgb2yuv_coeff01":601, + "osd_rgb2yuv_coeff02":117, + "osd_rgb2yuv_coeff03":0, + "osd_rgb2yuv_coeff10":3920, + "osd_rgb2yuv_coeff11":3749, + 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"ds0_osd0_bd_limit_en":0 + }, + "ds0_osd1":{ + "ds0_osd1_enable":0, + "ds0_osd1_type":0, + "ds0_osd1_alpha_tpye":0, + "ds0_osd1_vst":0, + "ds0_osd1_hst":0, + "ds0_osd1_vend":0, + "ds0_osd1_hend":0, + "ds0_osd1_dma_request_length":0, + "ds0_osd1_dma_map":0, + "ds0_osd1_rgb_rev":0, + "ds0_osd1_global_alpha":0, + "ds0_osd1_swap_64":0, + "ds0_osd1_outstanding_num":0, + "ds0_osd1_bd_limit_en":0 + }, + "ds0_osd2":{ + "ds0_osd2_enable":0, + "ds0_osd2_type":0, + "ds0_osd2_alpha_tpye":0, + "ds0_osd2_vst":0, + "ds0_osd2_hst":0, + "ds0_osd2_vend":0, + "ds0_osd2_hend":0, + "ds0_osd2_dma_request_length":0, + "ds0_osd2_dma_map":0, + "ds0_osd2_rgb_rev":0, + "ds0_osd2_global_alpha":0, + "ds0_osd2_swap_64":0, + "ds0_osd2_outstanding_num":0, + "ds0_osd2_bd_limit_en":0 + } + }, + "ds1":{ + "ds1_out_rgb_mode":0, + "ds1_out_rgb_en":0, + "ds1_out_yuv_mode":0, + "ds1_out_uv_swap":0, + "ds1_osd0":{ + "ds1_osd0_enable":0, + "ds1_osd0_type":0, + "ds1_osd0_alpha_tpye":0, + "ds1_osd0_vst":0, + "ds1_osd0_hst":0, + "ds1_osd0_vend":0, + "ds1_osd0_hend":0, + "ds1_osd0_dma_request_length":0, + "ds1_osd0_dma_map":0, + "ds1_osd0_rgb_rev":0, + "ds1_osd0_global_alpha":0, + "ds1_osd0_swap_64":0, + "ds1_osd0_outstanding_num":0, + "ds1_osd0_bd_limit_en":0 + }, + "ds1_osd1":{ + "ds1_osd1_enable":0, + "ds1_osd1_type":0, + "ds1_osd1_alpha_tpye":0, + "ds1_osd1_vst":0, + "ds1_osd1_hst":0, + "ds1_osd1_vend":0, + "ds1_osd1_hend":0, + "ds1_osd1_dma_request_length":0, + "ds1_osd1_dma_map":0, + "ds1_osd1_rgb_rev":0, + "ds1_osd1_global_alpha":0, + "ds1_osd1_swap_64":0, + "ds1_osd1_outstanding_num":0, + "ds1_osd1_bd_limit_en":0 + }, + "ds1_osd2":{ + "ds1_osd2_enable":0, + "ds1_osd2_type":0, + "ds1_osd2_alpha_tpye":0, + "ds1_osd2_vst":0, + "ds1_osd2_hst":0, + "ds1_osd2_vend":0, + "ds1_osd2_hend":0, + "ds1_osd2_dma_request_length":0, + "ds1_osd2_dma_map":0, + "ds1_osd2_rgb_rev":0, + "ds1_osd2_global_alpha":0, + "ds1_osd2_swap_64":0, + "ds1_osd2_outstanding_num":0, + "ds1_osd2_bd_limit_en":0 + } + }, + "ds2":{ + "ds2_out_rgb_mode":0, + "ds2_out_rgb_en":1, + "ds2_out_yuv_mode":0, + "ds2_out_uv_swap":0, + "ds2_osd0":{ + "ds2_osd0_enable":0, + "ds2_osd0_type":0, + "ds2_osd0_alpha_tpye":0, + "ds2_osd0_vst":0, + "ds2_osd0_hst":0, + "ds2_osd0_vend":0, + "ds2_osd0_hend":0, + "ds2_osd0_dma_request_length":0, + "ds2_osd0_dma_map":0, + "ds2_osd0_rgb_rev":0, + "ds2_osd0_global_alpha":0, + "ds2_osd0_swap_64":0, + "ds2_osd0_outstanding_num":0, + "ds2_osd0_bd_limit_en":0 + }, + "ds2_osd1":{ + "ds2_osd1_enable":0, + "ds2_osd1_type":0, + "ds2_osd1_alpha_tpye":0, + "ds2_osd1_vst":0, + "ds2_osd1_hst":0, + "ds2_osd1_vend":0, + "ds2_osd1_hend":0, + "ds2_osd1_dma_request_length":0, + "ds2_osd1_dma_map":0, + "ds2_osd1_rgb_rev":0, + "ds2_osd1_global_alpha":0, + "ds2_osd1_swap_64":0, + "ds2_osd1_outstanding_num":0, + "ds2_osd1_bd_limit_en":0 + } + } + } +} diff --git a/package/mediactl_lib/src/config/gc2145.conf b/package/mediactl_lib/src/config/gc2145.conf new file mode 100644 index 0000000..eed49db --- /dev/null +++ b/package/mediactl_lib/src/config/gc2145.conf @@ -0,0 +1,531 @@ +{ + "isp_general":{ + "isp_out_sel":0, + "dvp_ch_mode":1, + "hist_3a_out_en":0, + "main_out":{ + "out_img_format":1, + "out_yuv_in_format":0, + "out_yuv422_pxl_order":0, + "out_pxl_width":0, + "out_frame_buf_size":2048 + }, + "out0":{ + "ds0_out_img_format":1, + "ds0_out_yuv_in_format":0, + "ds0_out_yuv422_pxl_order":0, + "ds0_out_pxl_width":0, + "ds0_frame_buf_size":2048 + }, + "out1":{ + "ds1_out_img_format":1, + "ds1_out_yuv_in_format":0, + "ds1_out_yuv422_pxl_order":0, + "ds1_out_pxl_width":0, + "ds1_frame_buf_size":2048 + }, + "out2":{ + "ds2_out_img_format":0, + "ds2_out_yuv_in_format":0, + "ds2_out_yuv422_pxl_order":0, + "ds2_out_pxl_width":0, + "ds2_frame_buf_size":2048 + }, + "wdr":{ + "wdr_mode":0, + "wdr_long_ch_mode":0, + "wdr_long_l2_buf_en":0, + "wdr_short_s1_buf_en":0, + "wdr_dynamic_switch_en":0, + "wdr_long_l2_buf_depth":0, + "wdr_long_img_format":0, + "wdr_long_yuv_in_format":0, + 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"wdr_s_mul_data":0 + }, + "blc":{ + "blc_en" :1, + "blc_offset" :240, + "blc_ratio" :272 + }, + "lsc":{ + "lsc_en" :1, + "lsc_h_center" :900, + "lsc_v_center" :580, + "lsc_r_ratio" :10, + "lsc_g_ratio":6, + "lsc_b_ratio" :6, + "lsc_ir_ratio" :6 + }, + "ae":{ + "ae_as_en" :1, + "ae_ag_en" :1, + "ae_airis_en" :0, + "ae_enter_ls_sel" :0, + "ae_exit_ls_sel" :0, + "ae_win_mode_sel" :0, + "ae_back_light_mode_sel" :0, + "ae_day_change_en" :0, + "ae_day_change_sel" :0, + "ae_win_stth" :0, + "ae_win_sttv" :0, + "ae_win_endh" :1280, + "ae_win_endv" :960, + "ae_yobj" :90, + "ae_av_rg" :13, + "ae_l_ex_time" :1100, + "ae_m_ex_time" :32, + "ae_s_ex_time" :32, + "ae_agc" :256, + "ae_ad_shuttle_freq" :1, + "ae_ad_gain_freq" :0, + "ae_adjust_step_max":36, + "ae_ex_value_max" :1162, + "ae_ex_value_mid" :256, + "ae_ex_value_min" :1, + "ae_gain_value_max" :2304, + "ae_gain_value_mid" :512, + "ae_gain_value_min" :256, + "ae_dn_switch_ad_step_max" :512, + "ae_dn_switch_wait_time" :255, + "ape_max_diff" :12, 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"awb_blue_min_value" :281, + "awb_red_obj_value" :256, + "awb_blue_obj_value" :256 + }, + "wdr":{ + "wdr_fusion_en" :0, + "wdr_frame_sel" :0, + "wdr_adp_adjust_en" :0, + "wdr_stab_en" :0, + "wdr_en" :0, + "wdr_ghost_remove_en" :0, + "wdr_3frame_out_mode" :0, + "wdr_mode_sel" :0, + "wdr_2frame_ex_ratio" :1, + "wdr_3frame_ex_ratio" :1, + "wdr_stat_img_sel" :0, + "wdr_ltm_data_sel" :1, + "wdr_tz_data_sel" :1, + "wdr_remove_purple_en" :0, + "wdr_over_ex_ratio_th1" :384, + "wdr_over_ex_ratio_th2" :32, + "wdr_fusion_ratio_th" :192, + "wdr_fusion_value1" :64, + "wdr_fusion_value2" :16 + }, + "csc":{ + "rgb2yuv_00":153, + "rgb2yuv_01":256, + "rgb2yuv_02":86, + "rgb2yuv_10":301, + "rgb2yuv_11":214, + "rgb2yuv_12":170, + "rgb2yuv_20":58, + "rgb2yuv_21":42, + "rgb2yuv_22":256 + }, + "ada":{ + "gm_rgb_en" :1, + "gm_yuv_en" :0, + "ada_en" :0, + "ada_sbz_en" :0, + "ada_ccr_en" :0, + "ada_adp_en" :0, + "ada_adp_ccr_en" :0, + "ada_stat_mode_sel" :0, + "ada_enh_mode_sel" :0, + "ada_hist_max" :128, + "ada_ttl_max" :128, + "ada_win_stth" :0, + "ada_win_sttv" :0, + "ada_win_endh" :1599, + "ada_win_endv" :1199 + }, + "rgb-ir":{ + "raw_fmt" :0, + "rgbir_rct_en" :0, + "dfc_en" :0, + "rgbir_fs_en" :0, + "rgbir_ot_sl" :0, + "rgbir_fs_max" :256, + "dfc_krb" :0, + "dfc_ky" :0, + "dfc_th" :256, + "dfc_th_1" :256 + }, + "2dnr":{ + "dpeak_en" :1, + "nr2d_raw_en" :1, + "nr2d_eg_en" :1, + "nr2d_jl_en" :1, + "nr2d_av_en" :1, + "nr2d_c_en" :1, + "dpeak_adp_en" :1, + "nr2d_raw_adp_en":1, + "nr2d_y_adp_en" :1, + "nr2d_c_adp_en" :1, + "nr2d_raw_kl" :16, + "nr2d_jl_th" :511, + "nr2d_eg_k" :48, + "nr2d_y_k" :64, + "nr2d_c_k" :255 + }, + "3dnr":{ + "nr3d_en" :1, + "nr3dp_y_en" :1, + "nr3dp_c_en" :1, + "nr3dm_y_en" :1, + "nr3dm_c_en" :1, + "nr3db_y_en" :1, + "nr3db_c_en" :1, + "nr3dm_nr2d_y_en" :1, + "nr3dm_nr2d_c_en" :1, + "core_3dnr_wb_en" :1, + "core_3dnr_wb_sel" :1, + "core_3dnr_adp_luma_en" :0, + "core_3dnr_adp_chroma_en" :0, + "nr3dp_thy" :64, + "nr3dp_thyp" :64, + "nr3dp_thcp" :64, + "nr3dm_mid_th" :128, + "nr3dm_mtp_th" :8, + "nr3dm_mtc_th" :128, + "nr3dm_ym_k" :60, + "nr3dm_thy" :64, + "nr3dm_min" :0, + "nr3dm_thw0" :128, + "core_3dnr_chroma_intensity" :122, + "nr3db_nr2d_eg_th" :64, + "nr3db_thyp" :64, + "nr3db_thcp" :32 + }, + "enh":{ + "ltm":{ + "enh_ltm_en" :1, + "enh_adp_ltm_en" :0, + "ltm_gain" :128, + "ltm_mm_th" :128 + }, + "sharp":{ + "enh_sharp_en" :1, + "enh_adp_sharp_en" :1, + "shp_core" :8, + "shp_th1" :18, + "shp_th2" :256, + "shp_gain" :64 + }, + "cc":{ + "enh_cc_en" :1, + "enh_adp_cc_en" :0 + } + }, + "post_ctl":{ + "otc_ctl":{ + "otc_en" :0, + "otc_yc_sl" :0, + "otc_uv_sl" :1, + "otc_hs_plt_sl" :0, + "otc_vs_plt_sl" :0, + "otc_stt_vr" :0, + "otc_stt_hr" :0 + }, + "ctrst":{ + "ctrst_en" :1, + "ctrst_gain":128 + }, + "luma":{ + "luma_en" :1, + "luma_gain":128 + }, + "strt":{ + "strt_en" :1, + "strt_gain":255 + } + }, + "ldc":{ + "ldc_en" :0, + "ldc_rct_en" :0, + "ldc_rq_frq" :128, + "ldc_stt_ln" :540, + "ldc_ch" :960, + "ldc_cv" :540, + "ldc_cr" :684, + "ldc_cz" :684 + }, + "af":{ + "af_stat_en" :1, + "af_stat_mode_sel" :0, + "af_stat_win_h_start":0, + "af_stat_win_v_start":0, + "af_stat_win_h_end" :1919, + "af_stat_win_v_end" :1079 + } + }, + "isp_post":{ + "rgb2yuv":{ + "osd_rgb2yuv_coeff00":306, + "osd_rgb2yuv_coeff01":601, + "osd_rgb2yuv_coeff02":117, + "osd_rgb2yuv_coeff03":0, + "osd_rgb2yuv_coeff10":3920, + "osd_rgb2yuv_coeff11":3749, + "osd_rgb2yuv_coeff12":523, + "osd_rgb2yuv_coeff13":128, + "osd_rgb2yuv_coeff20":523, + "osd_rgb2yuv_coeff21":3658, + "osd_rgb2yuv_coeff22":4011, + "osd_rgb2yuv_coeff23":128 + }, + "yuv2rgb":{ + "out_yuv2rgb_coeff00":1024, + "out_yuv2rgb_coeff01":0, + "out_yuv2rgb_coeff02":1441, + "out_yuv2rgb_coeff03":3916, + "out_yuv2rgb_coeff10":1024, + "out_yuv2rgb_coeff11":3742, + "out_yuv2rgb_coeff12":3362, + "out_yuv2rgb_coeff13":136, + "out_yuv2rgb_coeff20":1024, + "out_yuv2rgb_coeff21":1822, + "out_yuv2rgb_coeff22":0, + "out_yuv2rgb_coeff23":3868 + }, + "ds0":{ + "ds0_out_rgb_mode":0, + "ds0_out_rgb_en":0, + "ds0_out_yuv_mode":0, + "ds0_out_uv_swap":0, + "ds0_osd0":{ + "ds0_osd0_enable":0, + "ds0_osd0_type":0, + "ds0_osd0_alpha_tpye":0, + "ds0_osd0_vst":0, + "ds0_osd0_hst":0, + "ds0_osd0_vend":0, + "ds0_osd0_hend":0, + "ds0_osd0_dma_request_length":0, + "ds0_osd0_dma_map":0, + "ds0_osd0_rgb_rev":0, + "ds0_osd0_global_alpha":0, + "ds0_osd0_swap_64":0, + "ds0_osd0_outstanding_num":0, + "ds0_osd0_bd_limit_en":0 + }, + "ds0_osd1":{ + "ds0_osd1_enable":0, + "ds0_osd1_type":0, + "ds0_osd1_alpha_tpye":0, + "ds0_osd1_vst":0, + "ds0_osd1_hst":0, + "ds0_osd1_vend":0, + "ds0_osd1_hend":0, + "ds0_osd1_dma_request_length":0, + "ds0_osd1_dma_map":0, + "ds0_osd1_rgb_rev":0, + "ds0_osd1_global_alpha":0, + "ds0_osd1_swap_64":0, + "ds0_osd1_outstanding_num":0, + "ds0_osd1_bd_limit_en":0 + }, + "ds0_osd2":{ + "ds0_osd2_enable":0, + "ds0_osd2_type":0, + "ds0_osd2_alpha_tpye":0, + "ds0_osd2_vst":0, + "ds0_osd2_hst":0, + "ds0_osd2_vend":0, + "ds0_osd2_hend":0, + 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"ds1_osd1_outstanding_num":0, + "ds1_osd1_bd_limit_en":0 + }, + "ds1_osd2":{ + "ds1_osd2_enable":0, + "ds1_osd2_type":0, + "ds1_osd2_alpha_tpye":0, + "ds1_osd2_vst":0, + "ds1_osd2_hst":0, + "ds1_osd2_vend":0, + "ds1_osd2_hend":0, + "ds1_osd2_dma_request_length":0, + "ds1_osd2_dma_map":0, + "ds1_osd2_rgb_rev":0, + "ds1_osd2_global_alpha":0, + "ds1_osd2_swap_64":0, + "ds1_osd2_outstanding_num":0, + "ds1_osd2_bd_limit_en":0 + } + }, + "ds2":{ + "ds2_out_rgb_mode":0, + "ds2_out_rgb_en":1, + "ds2_out_yuv_mode":0, + "ds2_out_uv_swap":0, + "ds2_osd0":{ + "ds2_osd0_enable":0, + "ds2_osd0_type":0, + "ds2_osd0_alpha_tpye":0, + "ds2_osd0_vst":0, + "ds2_osd0_hst":0, + "ds2_osd0_vend":0, + "ds2_osd0_hend":0, + "ds2_osd0_dma_request_length":0, + "ds2_osd0_dma_map":0, + "ds2_osd0_rgb_rev":0, + "ds2_osd0_global_alpha":0, + "ds2_osd0_swap_64":0, + "ds2_osd0_outstanding_num":0, + "ds2_osd0_bd_limit_en":0 + }, + "ds2_osd1":{ + "ds2_osd1_enable":0, + "ds2_osd1_type":0, + "ds2_osd1_alpha_tpye":0, + "ds2_osd1_vst":0, + "ds2_osd1_hst":0, + "ds2_osd1_vend":0, + "ds2_osd1_hend":0, + "ds2_osd1_dma_request_length":0, + "ds2_osd1_dma_map":0, + "ds2_osd1_rgb_rev":0, + "ds2_osd1_global_alpha":0, + "ds2_osd1_swap_64":0, + "ds2_osd1_outstanding_num":0, + "ds2_osd1_bd_limit_en":0 + } + } + } +} diff --git a/package/mediactl_lib/src/config/video_drm_gc2053_gc2093_1920x1080.conf b/package/mediactl_lib/src/config/video_drm_gc2053_gc2093_1920x1080.conf new file mode 100755 index 0000000..f20605b --- /dev/null +++ b/package/mediactl_lib/src/config/video_drm_gc2053_gc2093_1920x1080.conf @@ -0,0 +1,322 @@ +{ + "sensor0":{ + "sensor0_name":"m00_f_gc2053 3-0037", + "sensor0_cfg_file":"gc2053.conf", + "sensor0_total_size":{ + "sensor0_total_width":2200, + "sensor0_total_height":1125 + }, + "sensor0_active_size":{ + "sensor0_active_width":1920, + "sensor0_active_height":1080 + }, + "/dev/video2":{ + "video2_used":0, + "video2_width":1920, + "video2_height":1080, + "video2_out_format":1 + }, + "/dev/video3":{ + "video3_used":1, + "video3_width":1080, + "video3_height":720, + "video3_out_format":1 + }, + "/dev/video4":{ + "video4_used":0, + "video4_width":640, + "video4_height":480, + "video4_out_format":1 + }, + "/dev/video5":{ + "video5_used":0, + "video5_width":320, + "video5_height":320, + "video5_height_r":240, + "video5_out_format":1, + "video5_pitch":320 + } + }, + "sensor1":{ + "sensor1_name":"m01_f_gc2093 0-007e", + "sensor1_cfg_file":"gc2093.conf", + "sensor1_total_size":{ + "sensor1_total_width":2640, + "sensor1_total_height":2500 + }, + "sensor1_active_size":{ + "sensor1_active_width":1920, + "sensor1_active_height":1080 + }, + "/dev/video6":{ + "video6_used":0, + "video6_width":1920, + "video6_height":1080, + "video6_out_format":1 + }, + "/dev/video7":{ + "video7_used":1, + "video7_width":1080, + "video7_height":720, + "video7_out_format":1 + }, + "/dev/video8":{ + "video8_used":0, + "video8_width":640, + "video8_height":480, + "video8_out_format":1 + }, + "/dev/video9":{ + "video9_used":0, + "video9_width":320, + "video9_height":240, + "video9_height_r":240, + "video9_out_format":1, + "video9_pitch":320 + } + }, + "mipi_csi2":{ + "csi0_used":1, + "csi0_sony_wdr":0, + "csi0_lane_nb":2, + "csi0_dl0_map":1, + "csi0_dl1_map":2, + "csi0_dl2_map":3, + "csi0_dl3_map":4, + "csi00_datatype_select0":43, + "csi00_datatype_select1":42, + "csi00_vc_select":1, + "csi01_datatype_select0":43, + "csi01_datatype_select1":42, + "csi01_vc_select":2, + "csi02_datatype_select0":43, + "csi02_datatype_select1":42, + "csi02_vc_select":4, + "csi1_used":1, + "csi1_sony_wdr":0, + "csi1_lane_nb":2, + "csi1_dl0_map":3, + "csi1_dl1_map":4, + "csi1_dl2_map":1, + "csi1_dl3_map":2, + "csi10_datatype_select0":43, + "csi10_datatype_select1":42, + "csi10_vc_select":1 + }, + "isp_vi":{ + "vi_wrap":{ + "dphy_mode":0, + "sony_mode":0, + "sensor0_interface_en":1, + "sensor0_tpg_w_en":0, + "sensor0_tpg_r_en":0, + "sensor0_wdr_sensor_vendor":0, + "sensor0_wdr_mode":0, + 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"p00_r_st_width":279, + "p00_r_st_height":44, + "p00_tof_mode_enable":0, + "p00_vi_pipe_tpg_tof_frm_num":3, + "p00_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe01":{ + "p01_win_mode_en":1, + "p01_input_ch_sel":1, + "p01_ch_mode_sel":1, + "p01_pixel_type":0, + "p01_yuv_in_format":0, + "p01_yuv_out_format":0, + "p01_yuv422_order":0, + "p01_pixel_width":1, + "p01_data_out_timming_ctrl":3, + "p01_sync_pulse_mode":0, + "p01_sen_mipi_clk_pol":1, + "p01_sen_mipi_vsync_pol":0, + "p01_sen_mipi_hsync_pol":0, + "p01_sen_mipi_field_pol":1, + "p01_isp_clk_pol":1, + "p01_isp_vsync_pol":1, + "p01_isp_hsync_pol":1, + "p01_isp_field_pol":1, + "p01_tpg_w_en":0, + "p01_tpg_r_en":0, + "p01_total_width":2200, + "p01_total_height":1125, + "p01_in_width":1920, + "p01_in_height":1080, + "p01_w_st_width":0, + "p01_w_st_height":16383, + "p01_r_st_width":279, + "p01_r_st_height":44, + "p01_vi_pipe_w_addr_y0 ":0, + "p01_vi_pipe_w_addr_y1 ":0, + "p01_vi_pipe_w_addr_uv0":0, + "p01_vi_pipe_w_addr_uv1":0, + "p01_vi_pipe_r_addr_y0 ":0, + "p01_vi_pipe_r_addr_y1 ":0, + "p01_vi_pipe_addr_stride":0, + "p01_tof_mode_enable":0, + "p01_vi_pipe_tpg_tof_frm_num":3, + "p01_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe02":{ + "p02_win_mode_en":1, + "p02_input_ch_sel":1, + "p02_ch_mode_sel":1, + "p02_pixel_type":0, + "p02_yuv_in_format":0, + "p02_yuv_out_format":0, + "p02_yuv422_order":0, + "p02_pixel_width":1, + "p02_data_out_timming_ctrl":3, + "p02_sync_pulse_mode":0, + "p02_sen_mipi_clk_pol":1, + "p02_sen_mipi_vsync_pol":0, + "p02_sen_mipi_hsync_pol":0, + "p02_sen_mipi_field_pol":1, + "p02_isp_clk_pol":1, + "p02_isp_vsync_pol":1, + "p02_isp_hsync_pol":1, + "p02_isp_field_pol":1, + "p02_tpg_w_en":0, + "p02_tpg_r_en":0, + "p02_total_width":2200, + "p02_total_height":1125, + "p02_in_width":1920, + "p02_in_height":1080, + "p02_w_st_width":0, + "p02_w_st_height":16383, + "p02_r_st_width":279, + "p02_r_st_height":44, + "p02_vi_pipe_w_addr_y0 ":0, + "p02_vi_pipe_w_addr_y1 ":0, + "p02_vi_pipe_w_addr_uv0":0, + "p02_vi_pipe_w_addr_uv1":0, + "p02_vi_pipe_r_addr_y0 ":0, + "p02_vi_pipe_r_addr_y1 ":0, + "p02_vi_pipe_addr_stride":0, + "p02_tof_mode_enable":0, + "p02_vi_pipe_tpg_tof_frm_num":3, + "p02_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe10":{ + "p10_win_mode_en":1, + "p10_input_ch_sel":1, + "p10_ch_mode_sel":1, + "p10_pixel_type":0, + "p10_yuv_in_format":0, + "p10_yuv_out_format":0, + "p10_yuv422_order":0, + "p10_pixel_width":1, + "p10_data_out_timming_ctrl":3, + "p10_sync_pulse_mode":0, + "p10_sen_mipi_clk_pol":1, + "p10_sen_mipi_vsync_pol":0, + "p10_sen_mipi_hsync_pol":0, + "p10_sen_mipi_field_pol":1, + "p10_isp_clk_pol":1, + "p10_isp_vsync_pol":1, + "p10_isp_hsync_pol":1, + "p10_isp_field_pol":1, + "p10_tpg_w_en":0, + "p10_tpg_r_en":0, + "p10_total_width":2640, + "p10_total_height":2500, + "p10_in_width":1920, + "p10_in_height":1080, + "p10_w_st_width":0, + "p10_w_st_height":16383, + "p10_r_st_width":279, + "p10_r_st_height":44, + "p10_vi_pipe_w_addr_y0 ":0, + "p10_vi_pipe_w_addr_y1 ":0, + "p10_vi_pipe_w_addr_uv0":0, + "p10_vi_pipe_w_addr_uv1":0, + "p10_vi_pipe_r_addr_y0 ":0, + "p10_vi_pipe_r_addr_y1 ":0, + "p10_vi_pipe_addr_stride":0, + "p10_tof_mode_enable":0, + "p10_vi_pipe_tpg_tof_frm_num":3, + "p10_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_dvp00":{ + "dvp00_win_mode_en":1, + "dvp00_input_ch_sel":1, + "dvp00_ch_mode_sel":1, + "dvp00_pixel_type":0, + "dvp00_yuv_in_format":0, + "dvp00_yuv_out_format":0, + "dvp00_yuv422_order":0, + "dvp00_pixel_width":1, + "dvp00_data_out_timming_ctrl":3, + "dvp00_sync_pulse_mode":0, + "dvp00_sen_mipi_clk_pol":1, + "dvp00_sen_mipi_vsync_pol":0, + "dvp00_sen_mipi_hsync_pol":0, + "dvp00_sen_mipi_field_pol":1, + "dvp00_isp_clk_pol":1, + "dvp00_isp_vsync_pol":1, + "dvp00_isp_hsync_pol":1, + "dvp00_isp_field_pol":1, + "dvp00_tpg_w_en":0, + "dvp00_tpg_r_en":0, + "dvp00_total_width":2640, + "dvp00_total_height":2500, + "dvp00_in_width":1920, + "dvp00_in_height":1080, + "dvp00_w_st_width":0, + "dvp00_w_st_height":16383, + "dvp00_r_st_width":279, + "dvp00_r_st_height":44, + "dvp00_vi_pipe_w_addr_y0 ":0, + "dvp00_vi_pipe_w_addr_y1 ":0, + "dvp00_vi_pipe_w_addr_uv0":0, + "dvp00_vi_pipe_w_addr_uv1":0, + "dvp00_vi_pipe_r_addr_y0 ":0, + "dvp00_vi_pipe_r_addr_y1 ":0, + "dvp00_vi_pipe_addr_stride":0, + "dvp00_tof_mode_enable":0, + "dvp00_vi_pipe_tpg_tof_frm_num":3, + "dvp00_vi_pipe_tpg_tof_frm_stride":66432 + } + } +} diff --git a/package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1280x960.conf b/package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1280x960.conf new file mode 100644 index 0000000..700b89d --- /dev/null +++ b/package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1280x960.conf @@ -0,0 +1,322 @@ +{ + "sensor0":{ + "sensor0_name":"m00_f_gc2093 0-0037", + "sensor0_cfg_file":"gc2093.conf", + "sensor0_total_size":{ + "sensor0_total_width":2640, + "sensor0_total_height":2500 + }, + "sensor0_active_size":{ + "sensor0_active_width":1920, + "sensor0_active_height":1080 + }, + "/dev/video2":{ + "video2_used":0, + "video2_width":1920, + "video2_height":1080, + "video2_out_format":1 + }, + "/dev/video3":{ + "video3_used":1, + "video3_width":1080, + "video3_height":720, + "video3_out_format":1 + }, + "/dev/video4":{ + "video4_used":0, + "video4_width":640, + "video4_height":480, + "video4_out_format":1 + }, + "/dev/video5":{ + "video5_used":0, + "video5_width":320, + "video5_height":320, + "video5_height_r":240, + "video5_out_format":1, + "video5_pitch":320 + } + }, + "sensor1":{ + "sensor1_name":"m01_f_gc2145 3-003c", + "sensor1_cfg_file":"gc2145.conf", + "sensor1_total_size":{ + "sensor1_total_width":1920, + "sensor1_total_height":1250 + }, + "sensor1_active_size":{ + "sensor1_active_width":1280, + "sensor1_active_height":960 + }, + "/dev/video6":{ + "video6_used":0, + "video6_width":1280, + "video6_height":960, + "video6_out_format":1 + }, + "/dev/video7":{ + "video7_used":1, + "video7_width":1080, + "video7_height":720, + "video7_out_format":1 + }, + "/dev/video8":{ + "video8_used":0, + "video8_width":640, + "video8_height":480, + "video8_out_format":1 + }, + "/dev/video9":{ + "video9_used":0, + "video9_width":320, + "video9_height":240, + "video9_height_r":240, + "video9_out_format":1, + "video9_pitch":320 + } + }, + "mipi_csi2":{ + "csi0_used":1, + "csi0_sony_wdr":0, + "csi0_lane_nb":2, + "csi0_dl0_map":1, + "csi0_dl1_map":2, + "csi0_dl2_map":3, + "csi0_dl3_map":4, + "csi00_datatype_select0":43, + "csi00_datatype_select1":42, + "csi00_vc_select":1, + "csi01_datatype_select0":43, + "csi01_datatype_select1":42, + "csi01_vc_select":2, + "csi02_datatype_select0":43, + "csi02_datatype_select1":42, + "csi02_vc_select":4, + "csi1_used":1, + "csi1_sony_wdr":0, + "csi1_lane_nb":2, + "csi1_dl0_map":3, + "csi1_dl1_map":4, + "csi1_dl2_map":1, + "csi1_dl3_map":2, + "csi10_datatype_select0":43, + "csi10_datatype_select1":42, + "csi10_vc_select":1 + }, + "isp_vi":{ + "vi_wrap":{ + "dphy_mode":0, + "sony_mode":0, + "sensor0_interface_en":1, + "sensor0_tpg_w_en":0, + "sensor0_tpg_r_en":0, + "sensor0_wdr_sensor_vendor":0, + "sensor0_wdr_mode":0, + "sensor0_mipi_mode":0, + "sensor0_isp_pipeline":1, + "sensor1_interface_en":1, + "sensor1_tpg_w_en":0, + "sensor1_tpg_r_en":0, + "sensor1_wdr_sensor_vendor":0, + "sensor1_wdr_mode":0, + "sensor1_mipi_mode":0, + "sensor1_isp_pipeline":2, + "sensor2_interface_en":0, + "sensor2_tpg_w_en":0, + "sensor2_tpg_r_en":0, + "sensor2_wdr_sensor_vendor":0, + "sensor2_wdr_mode":0, + "sensor2_mipi_mode":0, + "sensor2_isp_pipeline":2 + }, + "vi_pipe00":{ + "p00_win_mode_en":1, + "p00_input_ch_sel":1, + "p00_ch_mode_sel":1, + "p00_pixel_type":0, + "p00_yuv_in_format":0, + "p00_yuv_out_format":0, + "p00_yuv422_order":0, + "p00_pixel_width":1, + "p00_data_out_timming_ctrl":3, + "p00_sync_pulse_mode":0, + "p00_sen_mipi_clk_pol":1, + "p00_sen_mipi_vsync_pol":0, + "p00_sen_mipi_hsync_pol":0, + "p00_sen_mipi_field_pol":1, + "p00_isp_clk_pol":1, + "p00_isp_vsync_pol":1, + "p00_isp_hsync_pol":1, + "p00_isp_field_pol":1, + "p00_tpg_w_en":0, + "p00_tpg_r_en":0, + "p00_w_st_width":0, + "p00_w_st_height":16383, + "p00_r_st_width":279, + "p00_r_st_height":44, + "p00_tof_mode_enable":0, + "p00_vi_pipe_tpg_tof_frm_num":3, + "p00_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe01":{ + "p01_win_mode_en":1, + "p01_input_ch_sel":1, + "p01_ch_mode_sel":1, + "p01_pixel_type":0, + "p01_yuv_in_format":0, + "p01_yuv_out_format":0, + "p01_yuv422_order":0, + "p01_pixel_width":1, + "p01_data_out_timming_ctrl":3, + "p01_sync_pulse_mode":0, + "p01_sen_mipi_clk_pol":1, + "p01_sen_mipi_vsync_pol":0, + "p01_sen_mipi_hsync_pol":0, + "p01_sen_mipi_field_pol":1, + "p01_isp_clk_pol":1, + "p01_isp_vsync_pol":1, + "p01_isp_hsync_pol":1, + "p01_isp_field_pol":1, + "p01_tpg_w_en":0, + "p01_tpg_r_en":0, + "p01_total_width":2640, + "p01_total_height":2500, + "p01_in_width":1920, + "p01_in_height":1080, + "p01_w_st_width":0, + "p01_w_st_height":16383, + "p01_r_st_width":279, + "p01_r_st_height":44, + "p01_vi_pipe_w_addr_y0 ":0, + "p01_vi_pipe_w_addr_y1 ":0, + "p01_vi_pipe_w_addr_uv0":0, + "p01_vi_pipe_w_addr_uv1":0, + "p01_vi_pipe_r_addr_y0 ":0, + "p01_vi_pipe_r_addr_y1 ":0, + "p01_vi_pipe_addr_stride":0, + "p01_tof_mode_enable":0, + "p01_vi_pipe_tpg_tof_frm_num":3, + "p01_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe02":{ + "p02_win_mode_en":1, + "p02_input_ch_sel":1, + "p02_ch_mode_sel":1, + "p02_pixel_type":0, + "p02_yuv_in_format":0, + "p02_yuv_out_format":0, + "p02_yuv422_order":0, + "p02_pixel_width":1, + "p02_data_out_timming_ctrl":3, + "p02_sync_pulse_mode":0, + "p02_sen_mipi_clk_pol":1, + "p02_sen_mipi_vsync_pol":0, + "p02_sen_mipi_hsync_pol":0, + "p02_sen_mipi_field_pol":1, + "p02_isp_clk_pol":1, + "p02_isp_vsync_pol":1, + "p02_isp_hsync_pol":1, + "p02_isp_field_pol":1, + "p02_tpg_w_en":0, + "p02_tpg_r_en":0, + "p02_total_width":2640, + "p02_total_height":2500, + "p02_in_width":1920, + "p02_in_height":1080, + "p02_w_st_width":0, + "p02_w_st_height":16383, + "p02_r_st_width":279, + "p02_r_st_height":44, + "p02_vi_pipe_w_addr_y0 ":0, + "p02_vi_pipe_w_addr_y1 ":0, + "p02_vi_pipe_w_addr_uv0":0, + "p02_vi_pipe_w_addr_uv1":0, + "p02_vi_pipe_r_addr_y0 ":0, + "p02_vi_pipe_r_addr_y1 ":0, + "p02_vi_pipe_addr_stride":0, + "p02_tof_mode_enable":0, + "p02_vi_pipe_tpg_tof_frm_num":3, + "p02_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe10":{ + "p10_win_mode_en":1, + "p10_input_ch_sel":1, + "p10_ch_mode_sel":1, + "p10_pixel_type":0, + "p10_yuv_in_format":0, + "p10_yuv_out_format":0, + "p10_yuv422_order":0, + "p10_pixel_width":1, + "p10_data_out_timming_ctrl":3, + "p10_sync_pulse_mode":0, + "p10_sen_mipi_clk_pol":1, + "p10_sen_mipi_vsync_pol":0, + "p10_sen_mipi_hsync_pol":0, + "p10_sen_mipi_field_pol":1, + "p10_isp_clk_pol":1, + "p10_isp_vsync_pol":1, + "p10_isp_hsync_pol":1, + "p10_isp_field_pol":1, + "p10_tpg_w_en":0, + "p10_tpg_r_en":0, + "p10_total_width":1920, + "p10_total_height":1250, + "p10_in_width":1280, + "p10_in_height":960, + "p10_w_st_width":0, + "p10_w_st_height":16383, + "p10_r_st_width":279, + "p10_r_st_height":44, + "p10_vi_pipe_w_addr_y0 ":0, + "p10_vi_pipe_w_addr_y1 ":0, + "p10_vi_pipe_w_addr_uv0":0, + "p10_vi_pipe_w_addr_uv1":0, + "p10_vi_pipe_r_addr_y0 ":0, + "p10_vi_pipe_r_addr_y1 ":0, + "p10_vi_pipe_addr_stride":0, + "p10_tof_mode_enable":0, + "p10_vi_pipe_tpg_tof_frm_num":3, + "p10_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_dvp00":{ + "dvp00_win_mode_en":1, + "dvp00_input_ch_sel":1, + "dvp00_ch_mode_sel":1, + "dvp00_pixel_type":0, + "dvp00_yuv_in_format":0, + "dvp00_yuv_out_format":0, + "dvp00_yuv422_order":0, + "dvp00_pixel_width":1, + "dvp00_data_out_timming_ctrl":3, + "dvp00_sync_pulse_mode":0, + "dvp00_sen_mipi_clk_pol":1, + "dvp00_sen_mipi_vsync_pol":0, + "dvp00_sen_mipi_hsync_pol":0, + "dvp00_sen_mipi_field_pol":1, + "dvp00_isp_clk_pol":1, + "dvp00_isp_vsync_pol":1, + "dvp00_isp_hsync_pol":1, + "dvp00_isp_field_pol":1, + "dvp00_tpg_w_en":0, + "dvp00_tpg_r_en":0, + "dvp00_total_width":1920, + "dvp00_total_height":1250, + "dvp00_in_width":1280, + "dvp00_in_height":960, + "dvp00_w_st_width":0, + "dvp00_w_st_height":16383, + "dvp00_r_st_width":279, + "dvp00_r_st_height":44, + "dvp00_vi_pipe_w_addr_y0 ":0, + "dvp00_vi_pipe_w_addr_y1 ":0, + "dvp00_vi_pipe_w_addr_uv0":0, + "dvp00_vi_pipe_w_addr_uv1":0, + "dvp00_vi_pipe_r_addr_y0 ":0, + "dvp00_vi_pipe_r_addr_y1 ":0, + "dvp00_vi_pipe_addr_stride":0, + "dvp00_tof_mode_enable":0, + "dvp00_vi_pipe_tpg_tof_frm_num":3, + "dvp00_vi_pipe_tpg_tof_frm_stride":66432 + } + } +} diff --git a/package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1600x1200.conf b/package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1600x1200.conf new file mode 100644 index 0000000..047bb2d --- /dev/null +++ b/package/mediactl_lib/src/config/video_drm_gc2093_1920x1080_gc2145_1600x1200.conf @@ -0,0 +1,322 @@ +{ + "sensor0":{ + "sensor0_name":"m00_f_gc2093 0-0037", + "sensor0_cfg_file":"gc2093.conf", + "sensor0_total_size":{ + "sensor0_total_width":2640, + "sensor0_total_height":2500 + }, + "sensor0_active_size":{ + "sensor0_active_width":1920, + "sensor0_active_height":1080 + }, + "/dev/video2":{ + "video2_used":0, + "video2_width":1920, + "video2_height":1080, + "video2_out_format":1 + }, + "/dev/video3":{ + "video3_used":1, + "video3_width":1080, + "video3_height":720, + "video3_out_format":1 + }, + "/dev/video4":{ + "video4_used":0, + "video4_width":640, + "video4_height":480, + "video4_out_format":1 + }, + "/dev/video5":{ + "video5_used":0, + "video5_width":320, + "video5_height":320, + "video5_height_r":240, + "video5_out_format":1, + "video5_pitch":320 + } + }, + "sensor1":{ + "sensor1_name":"m01_f_gc2145 3-003c", + "sensor1_cfg_file":"gc2145.conf", + "sensor1_total_size":{ + "sensor1_total_width":1920, + "sensor1_total_height":1250 + }, + "sensor1_active_size":{ + "sensor1_active_width":1600, + "sensor1_active_height":1200 + }, + "/dev/video6":{ + "video6_used":0, + "video6_width":1600, + "video6_height":1200, + "video6_out_format":1 + }, + "/dev/video7":{ + "video7_used":1, + "video7_width":1080, + "video7_height":720, + "video7_out_format":1 + }, + "/dev/video8":{ + "video8_used":0, + "video8_width":640, + "video8_height":480, + "video8_out_format":1 + }, + "/dev/video9":{ + "video9_used":0, + "video9_width":320, + "video9_height":240, + "video9_height_r":240, + "video9_out_format":1, + "video9_pitch":320 + } + }, + "mipi_csi2":{ + "csi0_used":1, + "csi0_sony_wdr":0, + "csi0_lane_nb":2, + "csi0_dl0_map":1, + "csi0_dl1_map":2, + "csi0_dl2_map":3, + "csi0_dl3_map":4, + "csi00_datatype_select0":43, + "csi00_datatype_select1":42, + "csi00_vc_select":1, + "csi01_datatype_select0":43, + "csi01_datatype_select1":42, + "csi01_vc_select":2, + "csi02_datatype_select0":43, + "csi02_datatype_select1":42, + "csi02_vc_select":4, + "csi1_used":1, + "csi1_sony_wdr":0, + "csi1_lane_nb":2, + "csi1_dl0_map":3, + "csi1_dl1_map":4, + "csi1_dl2_map":1, + "csi1_dl3_map":2, + "csi10_datatype_select0":43, + "csi10_datatype_select1":42, + "csi10_vc_select":1 + }, + "isp_vi":{ + "vi_wrap":{ + "dphy_mode":0, + "sony_mode":0, + "sensor0_interface_en":1, + "sensor0_tpg_w_en":0, + "sensor0_tpg_r_en":0, + "sensor0_wdr_sensor_vendor":0, + "sensor0_wdr_mode":0, + "sensor0_mipi_mode":0, + "sensor0_isp_pipeline":1, + "sensor1_interface_en":1, + "sensor1_tpg_w_en":0, + "sensor1_tpg_r_en":0, + "sensor1_wdr_sensor_vendor":0, + "sensor1_wdr_mode":0, + "sensor1_mipi_mode":0, + "sensor1_isp_pipeline":2, + "sensor2_interface_en":0, + "sensor2_tpg_w_en":0, + "sensor2_tpg_r_en":0, + "sensor2_wdr_sensor_vendor":0, + "sensor2_wdr_mode":0, + "sensor2_mipi_mode":0, + "sensor2_isp_pipeline":2 + }, + "vi_pipe00":{ + "p00_win_mode_en":1, + "p00_input_ch_sel":1, + "p00_ch_mode_sel":1, + "p00_pixel_type":0, + "p00_yuv_in_format":0, + "p00_yuv_out_format":0, + "p00_yuv422_order":0, + "p00_pixel_width":1, + "p00_data_out_timming_ctrl":3, + "p00_sync_pulse_mode":0, + "p00_sen_mipi_clk_pol":1, + "p00_sen_mipi_vsync_pol":0, + "p00_sen_mipi_hsync_pol":0, + "p00_sen_mipi_field_pol":1, + "p00_isp_clk_pol":1, + "p00_isp_vsync_pol":1, + "p00_isp_hsync_pol":1, + "p00_isp_field_pol":1, + "p00_tpg_w_en":0, + "p00_tpg_r_en":0, + "p00_w_st_width":0, + "p00_w_st_height":16383, + "p00_r_st_width":279, + "p00_r_st_height":44, + "p00_tof_mode_enable":0, + "p00_vi_pipe_tpg_tof_frm_num":3, + "p00_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe01":{ + "p01_win_mode_en":1, + "p01_input_ch_sel":1, + "p01_ch_mode_sel":1, + "p01_pixel_type":0, + "p01_yuv_in_format":0, + "p01_yuv_out_format":0, + "p01_yuv422_order":0, + "p01_pixel_width":1, + "p01_data_out_timming_ctrl":3, + "p01_sync_pulse_mode":0, + "p01_sen_mipi_clk_pol":1, + "p01_sen_mipi_vsync_pol":0, + "p01_sen_mipi_hsync_pol":0, + "p01_sen_mipi_field_pol":1, + "p01_isp_clk_pol":1, + "p01_isp_vsync_pol":1, + "p01_isp_hsync_pol":1, + "p01_isp_field_pol":1, + "p01_tpg_w_en":0, + "p01_tpg_r_en":0, + "p01_total_width":2640, + "p01_total_height":2500, + "p01_in_width":1920, + "p01_in_height":1080, + "p01_w_st_width":0, + "p01_w_st_height":16383, + "p01_r_st_width":279, + "p01_r_st_height":44, + "p01_vi_pipe_w_addr_y0 ":0, + "p01_vi_pipe_w_addr_y1 ":0, + "p01_vi_pipe_w_addr_uv0":0, + "p01_vi_pipe_w_addr_uv1":0, + "p01_vi_pipe_r_addr_y0 ":0, + "p01_vi_pipe_r_addr_y1 ":0, + "p01_vi_pipe_addr_stride":0, + "p01_tof_mode_enable":0, + "p01_vi_pipe_tpg_tof_frm_num":3, + "p01_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe02":{ + "p02_win_mode_en":1, + "p02_input_ch_sel":1, + "p02_ch_mode_sel":1, + "p02_pixel_type":0, + "p02_yuv_in_format":0, + "p02_yuv_out_format":0, + "p02_yuv422_order":0, + "p02_pixel_width":1, + "p02_data_out_timming_ctrl":3, + "p02_sync_pulse_mode":0, + "p02_sen_mipi_clk_pol":1, + "p02_sen_mipi_vsync_pol":0, + "p02_sen_mipi_hsync_pol":0, + "p02_sen_mipi_field_pol":1, + "p02_isp_clk_pol":1, + "p02_isp_vsync_pol":1, + "p02_isp_hsync_pol":1, + "p02_isp_field_pol":1, + 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"p10_isp_hsync_pol":1, + "p10_isp_field_pol":1, + "p10_tpg_w_en":0, + "p10_tpg_r_en":0, + "p10_total_width":1920, + "p10_total_height":1250, + "p10_in_width":1600, + "p10_in_height":1200, + "p10_w_st_width":0, + "p10_w_st_height":16383, + "p10_r_st_width":279, + "p10_r_st_height":44, + "p10_vi_pipe_w_addr_y0 ":0, + "p10_vi_pipe_w_addr_y1 ":0, + "p10_vi_pipe_w_addr_uv0":0, + "p10_vi_pipe_w_addr_uv1":0, + "p10_vi_pipe_r_addr_y0 ":0, + "p10_vi_pipe_r_addr_y1 ":0, + "p10_vi_pipe_addr_stride":0, + "p10_tof_mode_enable":0, + "p10_vi_pipe_tpg_tof_frm_num":3, + "p10_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_dvp00":{ + "dvp00_win_mode_en":1, + "dvp00_input_ch_sel":1, + "dvp00_ch_mode_sel":1, + "dvp00_pixel_type":0, + "dvp00_yuv_in_format":0, + "dvp00_yuv_out_format":0, + "dvp00_yuv422_order":0, + "dvp00_pixel_width":1, + "dvp00_data_out_timming_ctrl":3, + "dvp00_sync_pulse_mode":0, + "dvp00_sen_mipi_clk_pol":1, + "dvp00_sen_mipi_vsync_pol":0, + "dvp00_sen_mipi_hsync_pol":0, + "dvp00_sen_mipi_field_pol":1, + "dvp00_isp_clk_pol":1, + "dvp00_isp_vsync_pol":1, + "dvp00_isp_hsync_pol":1, + "dvp00_isp_field_pol":1, + "dvp00_tpg_w_en":0, + "dvp00_tpg_r_en":0, + "dvp00_total_width":1920, + "dvp00_total_height":1250, + "dvp00_in_width":1600, + "dvp00_in_height":1200, + "dvp00_w_st_width":0, + "dvp00_w_st_height":16383, + "dvp00_r_st_width":279, + "dvp00_r_st_height":44, + "dvp00_vi_pipe_w_addr_y0 ":0, + "dvp00_vi_pipe_w_addr_y1 ":0, + "dvp00_vi_pipe_w_addr_uv0":0, + "dvp00_vi_pipe_w_addr_uv1":0, + "dvp00_vi_pipe_r_addr_y0 ":0, + "dvp00_vi_pipe_r_addr_y1 ":0, + "dvp00_vi_pipe_addr_stride":0, + "dvp00_tof_mode_enable":0, + "dvp00_vi_pipe_tpg_tof_frm_num":3, + "dvp00_vi_pipe_tpg_tof_frm_stride":66432 + } + } +} diff --git a/package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1280x960.conf b/package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1280x960.conf new file mode 100755 index 0000000..c22b90c --- /dev/null +++ b/package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1280x960.conf @@ -0,0 +1,322 @@ +{ + "sensor0":{ + "sensor0_name":"m00_f_gc2093 0-0037", + "sensor0_cfg_file":"gc2093.conf", + "sensor0_total_size":{ + "sensor0_total_width":2640, + "sensor0_total_height":2500 + }, + "sensor0_active_size":{ + "sensor0_active_width":800, + "sensor0_active_height":1080 + }, + "/dev/video2":{ + "video2_used":0, + "video2_width":800, + "video2_height":1080, + "video2_out_format":1 + }, + "/dev/video3":{ + "video3_used":1, + "video3_width":800, + "video3_height":600, + "video3_out_format":1 + }, + "/dev/video4":{ + "video4_used":0, + "video4_width":640, + "video4_height":480, + "video4_out_format":1 + }, + "/dev/video5":{ + "video5_used":0, + "video5_width":320, + "video5_height":320, + "video5_height_r":240, + "video5_out_format":1, + "video5_pitch":320 + } + }, + "sensor1":{ + "sensor1_name":"m01_f_gc2145 3-003c", + "sensor1_cfg_file":"gc2145.conf", + "sensor1_total_size":{ + "sensor1_total_width":1920, + "sensor1_total_height":1250 + }, + "sensor1_active_size":{ + "sensor1_active_width":1280, + "sensor1_active_height":960 + }, + "/dev/video6":{ + "video6_used":0, + "video6_width":1280, + "video6_height":960, + "video6_out_format":1 + }, + "/dev/video7":{ + "video7_used":1, + "video7_width":1080, + "video7_height":720, + "video7_out_format":1 + }, + "/dev/video8":{ + "video8_used":0, + "video8_width":640, + "video8_height":480, + "video8_out_format":1 + }, + "/dev/video9":{ + "video9_used":0, + "video9_width":320, + "video9_height":240, + "video9_height_r":240, + "video9_out_format":1, + "video9_pitch":320 + } + }, + "mipi_csi2":{ + "csi0_used":1, + "csi0_sony_wdr":0, + "csi0_lane_nb":2, + "csi0_dl0_map":1, + "csi0_dl1_map":2, + "csi0_dl2_map":3, + "csi0_dl3_map":4, + "csi00_datatype_select0":43, + "csi00_datatype_select1":42, + "csi00_vc_select":1, + "csi01_datatype_select0":43, + "csi01_datatype_select1":42, + "csi01_vc_select":2, + "csi02_datatype_select0":43, + "csi02_datatype_select1":42, + "csi02_vc_select":4, + "csi1_used":1, + "csi1_sony_wdr":0, + "csi1_lane_nb":2, + "csi1_dl0_map":3, + "csi1_dl1_map":4, + "csi1_dl2_map":1, + "csi1_dl3_map":2, + "csi10_datatype_select0":43, + "csi10_datatype_select1":42, + "csi10_vc_select":1 + }, + "isp_vi":{ + "vi_wrap":{ + "dphy_mode":0, + "sony_mode":0, + "sensor0_interface_en":1, + "sensor0_tpg_w_en":0, + "sensor0_tpg_r_en":0, + "sensor0_wdr_sensor_vendor":0, + "sensor0_wdr_mode":0, + "sensor0_mipi_mode":0, + "sensor0_isp_pipeline":1, + "sensor1_interface_en":1, + "sensor1_tpg_w_en":0, + "sensor1_tpg_r_en":0, + "sensor1_wdr_sensor_vendor":0, + "sensor1_wdr_mode":0, + "sensor1_mipi_mode":0, + "sensor1_isp_pipeline":2, + "sensor2_interface_en":0, + "sensor2_tpg_w_en":0, + "sensor2_tpg_r_en":0, + "sensor2_wdr_sensor_vendor":0, + "sensor2_wdr_mode":0, + "sensor2_mipi_mode":0, + "sensor2_isp_pipeline":2 + }, + "vi_pipe00":{ + "p00_win_mode_en":1, + "p00_input_ch_sel":1, + "p00_ch_mode_sel":1, + "p00_pixel_type":0, + "p00_yuv_in_format":0, + "p00_yuv_out_format":0, + "p00_yuv422_order":0, + "p00_pixel_width":1, + "p00_data_out_timming_ctrl":3, + "p00_sync_pulse_mode":0, + "p00_sen_mipi_clk_pol":1, + "p00_sen_mipi_vsync_pol":0, + "p00_sen_mipi_hsync_pol":0, + "p00_sen_mipi_field_pol":1, + "p00_isp_clk_pol":1, + "p00_isp_vsync_pol":1, + "p00_isp_hsync_pol":1, + "p00_isp_field_pol":1, + "p00_tpg_w_en":0, + "p00_tpg_r_en":0, + "p00_w_st_width":0, + "p00_w_st_height":16383, + "p00_r_st_width":279, + "p00_r_st_height":44, + "p00_tof_mode_enable":0, + "p00_vi_pipe_tpg_tof_frm_num":3, + "p00_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe01":{ + "p01_win_mode_en":1, + "p01_input_ch_sel":1, + "p01_ch_mode_sel":1, + "p01_pixel_type":0, + "p01_yuv_in_format":0, + "p01_yuv_out_format":0, + "p01_yuv422_order":0, + "p01_pixel_width":1, + "p01_data_out_timming_ctrl":3, + "p01_sync_pulse_mode":0, + "p01_sen_mipi_clk_pol":1, + "p01_sen_mipi_vsync_pol":0, + "p01_sen_mipi_hsync_pol":0, + "p01_sen_mipi_field_pol":1, + "p01_isp_clk_pol":1, + "p01_isp_vsync_pol":1, + "p01_isp_hsync_pol":1, + "p01_isp_field_pol":1, + "p01_tpg_w_en":0, + "p01_tpg_r_en":0, + "p01_total_width":2640, + "p01_total_height":2500, + "p01_in_width":800, + "p01_in_height":1080, + "p01_w_st_width":0, + "p01_w_st_height":16383, + "p01_r_st_width":279, + "p01_r_st_height":44, + "p01_vi_pipe_w_addr_y0 ":0, + "p01_vi_pipe_w_addr_y1 ":0, + "p01_vi_pipe_w_addr_uv0":0, + "p01_vi_pipe_w_addr_uv1":0, + "p01_vi_pipe_r_addr_y0 ":0, + "p01_vi_pipe_r_addr_y1 ":0, + "p01_vi_pipe_addr_stride":0, + "p01_tof_mode_enable":0, + "p01_vi_pipe_tpg_tof_frm_num":3, + "p01_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe02":{ + "p02_win_mode_en":1, + "p02_input_ch_sel":1, + "p02_ch_mode_sel":1, + "p02_pixel_type":0, + "p02_yuv_in_format":0, + "p02_yuv_out_format":0, + "p02_yuv422_order":0, + "p02_pixel_width":1, + "p02_data_out_timming_ctrl":3, + "p02_sync_pulse_mode":0, + "p02_sen_mipi_clk_pol":1, + "p02_sen_mipi_vsync_pol":0, + "p02_sen_mipi_hsync_pol":0, + "p02_sen_mipi_field_pol":1, + "p02_isp_clk_pol":1, + "p02_isp_vsync_pol":1, + "p02_isp_hsync_pol":1, + "p02_isp_field_pol":1, + "p02_tpg_w_en":0, + "p02_tpg_r_en":0, + "p02_total_width":2640, + "p02_total_height":2500, + "p02_in_width":800, + "p02_in_height":1080, + "p02_w_st_width":0, + "p02_w_st_height":16383, + "p02_r_st_width":279, + "p02_r_st_height":44, + "p02_vi_pipe_w_addr_y0 ":0, + "p02_vi_pipe_w_addr_y1 ":0, + "p02_vi_pipe_w_addr_uv0":0, + "p02_vi_pipe_w_addr_uv1":0, + "p02_vi_pipe_r_addr_y0 ":0, + "p02_vi_pipe_r_addr_y1 ":0, + "p02_vi_pipe_addr_stride":0, + "p02_tof_mode_enable":0, + "p02_vi_pipe_tpg_tof_frm_num":3, + "p02_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe10":{ + "p10_win_mode_en":1, + "p10_input_ch_sel":1, + "p10_ch_mode_sel":1, + "p10_pixel_type":0, + "p10_yuv_in_format":0, + "p10_yuv_out_format":0, + "p10_yuv422_order":0, + "p10_pixel_width":1, + "p10_data_out_timming_ctrl":3, + "p10_sync_pulse_mode":0, + "p10_sen_mipi_clk_pol":1, + "p10_sen_mipi_vsync_pol":0, + "p10_sen_mipi_hsync_pol":0, + "p10_sen_mipi_field_pol":1, + "p10_isp_clk_pol":1, + "p10_isp_vsync_pol":1, + "p10_isp_hsync_pol":1, + "p10_isp_field_pol":1, + "p10_tpg_w_en":0, + "p10_tpg_r_en":0, + "p10_total_width":1920, + "p10_total_height":1250, + "p10_in_width":1280, + "p10_in_height":960, + "p10_w_st_width":0, + "p10_w_st_height":16383, + "p10_r_st_width":279, + "p10_r_st_height":44, + "p10_vi_pipe_w_addr_y0 ":0, + "p10_vi_pipe_w_addr_y1 ":0, + "p10_vi_pipe_w_addr_uv0":0, + "p10_vi_pipe_w_addr_uv1":0, + "p10_vi_pipe_r_addr_y0 ":0, + "p10_vi_pipe_r_addr_y1 ":0, + "p10_vi_pipe_addr_stride":0, + "p10_tof_mode_enable":0, + "p10_vi_pipe_tpg_tof_frm_num":3, + "p10_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_dvp00":{ + "dvp00_win_mode_en":1, + "dvp00_input_ch_sel":1, + "dvp00_ch_mode_sel":1, + "dvp00_pixel_type":0, + "dvp00_yuv_in_format":0, + "dvp00_yuv_out_format":0, + "dvp00_yuv422_order":0, + "dvp00_pixel_width":1, + "dvp00_data_out_timming_ctrl":3, + "dvp00_sync_pulse_mode":0, + "dvp00_sen_mipi_clk_pol":1, + "dvp00_sen_mipi_vsync_pol":0, + "dvp00_sen_mipi_hsync_pol":0, + "dvp00_sen_mipi_field_pol":1, + "dvp00_isp_clk_pol":1, + "dvp00_isp_vsync_pol":1, + "dvp00_isp_hsync_pol":1, + "dvp00_isp_field_pol":1, + "dvp00_tpg_w_en":0, + "dvp00_tpg_r_en":0, + "dvp00_total_width":1920, + "dvp00_total_height":1250, + "dvp00_in_width":1280, + "dvp00_in_height":960, + "dvp00_w_st_width":0, + "dvp00_w_st_height":16383, + "dvp00_r_st_width":279, + "dvp00_r_st_height":44, + "dvp00_vi_pipe_w_addr_y0 ":0, + "dvp00_vi_pipe_w_addr_y1 ":0, + "dvp00_vi_pipe_w_addr_uv0":0, + "dvp00_vi_pipe_w_addr_uv1":0, + "dvp00_vi_pipe_r_addr_y0 ":0, + "dvp00_vi_pipe_r_addr_y1 ":0, + "dvp00_vi_pipe_addr_stride":0, + "dvp00_tof_mode_enable":0, + "dvp00_vi_pipe_tpg_tof_frm_num":3, + "dvp00_vi_pipe_tpg_tof_frm_stride":66432 + } + } +} diff --git a/package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1600x1200.conf b/package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1600x1200.conf new file mode 100755 index 0000000..d49363a --- /dev/null +++ b/package/mediactl_lib/src/config/video_drm_gc2093_800x1080_gc2145_1600x1200.conf @@ -0,0 +1,322 @@ +{ + "sensor0":{ + "sensor0_name":"m00_f_gc2093 0-0037", + "sensor0_cfg_file":"gc2093.conf", + "sensor0_total_size":{ + "sensor0_total_width":2640, + "sensor0_total_height":2500 + }, + "sensor0_active_size":{ + "sensor0_active_width":800, + "sensor0_active_height":1080 + }, + "/dev/video2":{ + "video2_used":0, + "video2_width":800, + "video2_height":1080, + "video2_out_format":1 + }, + "/dev/video3":{ + "video3_used":1, + "video3_width":800, + "video3_height":600, + "video3_out_format":1 + }, + "/dev/video4":{ + "video4_used":0, + "video4_width":640, + "video4_height":480, + "video4_out_format":1 + }, + "/dev/video5":{ + "video5_used":0, + "video5_width":320, + "video5_height":320, + "video5_height_r":240, + "video5_out_format":1, + "video5_pitch":320 + } + }, + "sensor1":{ + "sensor1_name":"m01_f_gc2145 3-003c", + "sensor1_cfg_file":"gc2145.conf", + "sensor1_total_size":{ + "sensor1_total_width":1920, + "sensor1_total_height":1250 + }, + "sensor1_active_size":{ + "sensor1_active_width":1600, + "sensor1_active_height":1200 + }, + "/dev/video6":{ + "video6_used":0, + "video6_width":1600, + "video6_height":1200, + "video6_out_format":1 + }, + "/dev/video7":{ + "video7_used":1, + "video7_width":1080, + "video7_height":720, + "video7_out_format":1 + }, + "/dev/video8":{ + "video8_used":0, + "video8_width":640, + "video8_height":480, + "video8_out_format":1 + }, + "/dev/video9":{ + "video9_used":0, + "video9_width":320, + "video9_height":240, + "video9_height_r":240, + "video9_out_format":1, + "video9_pitch":320 + } + }, + "mipi_csi2":{ + "csi0_used":1, + "csi0_sony_wdr":0, + "csi0_lane_nb":2, + "csi0_dl0_map":1, + "csi0_dl1_map":2, + "csi0_dl2_map":3, + "csi0_dl3_map":4, + "csi00_datatype_select0":43, + "csi00_datatype_select1":42, + "csi00_vc_select":1, + "csi01_datatype_select0":43, + "csi01_datatype_select1":42, + "csi01_vc_select":2, + "csi02_datatype_select0":43, + "csi02_datatype_select1":42, + "csi02_vc_select":4, + "csi1_used":1, + "csi1_sony_wdr":0, + "csi1_lane_nb":2, + "csi1_dl0_map":3, + "csi1_dl1_map":4, + "csi1_dl2_map":1, + "csi1_dl3_map":2, + "csi10_datatype_select0":43, + "csi10_datatype_select1":42, + "csi10_vc_select":1 + }, + "isp_vi":{ + "vi_wrap":{ + "dphy_mode":0, + "sony_mode":0, + "sensor0_interface_en":1, + "sensor0_tpg_w_en":0, + "sensor0_tpg_r_en":0, + "sensor0_wdr_sensor_vendor":0, + "sensor0_wdr_mode":0, + "sensor0_mipi_mode":0, + "sensor0_isp_pipeline":1, + "sensor1_interface_en":1, + "sensor1_tpg_w_en":0, + "sensor1_tpg_r_en":0, + "sensor1_wdr_sensor_vendor":0, + "sensor1_wdr_mode":0, + "sensor1_mipi_mode":0, + "sensor1_isp_pipeline":2, + "sensor2_interface_en":0, + "sensor2_tpg_w_en":0, + "sensor2_tpg_r_en":0, + "sensor2_wdr_sensor_vendor":0, + "sensor2_wdr_mode":0, + "sensor2_mipi_mode":0, + "sensor2_isp_pipeline":2 + }, + "vi_pipe00":{ + "p00_win_mode_en":1, + "p00_input_ch_sel":1, + "p00_ch_mode_sel":1, + "p00_pixel_type":0, + "p00_yuv_in_format":0, + "p00_yuv_out_format":0, + "p00_yuv422_order":0, + "p00_pixel_width":1, + "p00_data_out_timming_ctrl":3, + "p00_sync_pulse_mode":0, + "p00_sen_mipi_clk_pol":1, + "p00_sen_mipi_vsync_pol":0, + "p00_sen_mipi_hsync_pol":0, + "p00_sen_mipi_field_pol":1, + "p00_isp_clk_pol":1, + "p00_isp_vsync_pol":1, + "p00_isp_hsync_pol":1, + "p00_isp_field_pol":1, + "p00_tpg_w_en":0, + "p00_tpg_r_en":0, + "p00_w_st_width":0, + "p00_w_st_height":16383, + "p00_r_st_width":279, + "p00_r_st_height":44, + "p00_tof_mode_enable":0, + "p00_vi_pipe_tpg_tof_frm_num":3, + "p00_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe01":{ + "p01_win_mode_en":1, + "p01_input_ch_sel":1, + "p01_ch_mode_sel":1, + "p01_pixel_type":0, + "p01_yuv_in_format":0, + "p01_yuv_out_format":0, + "p01_yuv422_order":0, + "p01_pixel_width":1, + "p01_data_out_timming_ctrl":3, + "p01_sync_pulse_mode":0, + "p01_sen_mipi_clk_pol":1, + "p01_sen_mipi_vsync_pol":0, + "p01_sen_mipi_hsync_pol":0, + "p01_sen_mipi_field_pol":1, + "p01_isp_clk_pol":1, + "p01_isp_vsync_pol":1, + "p01_isp_hsync_pol":1, + "p01_isp_field_pol":1, + "p01_tpg_w_en":0, + "p01_tpg_r_en":0, + "p01_total_width":2640, + "p01_total_height":2500, + "p01_in_width":800, + "p01_in_height":1080, + "p01_w_st_width":0, + "p01_w_st_height":16383, + "p01_r_st_width":279, + "p01_r_st_height":44, + "p01_vi_pipe_w_addr_y0 ":0, + "p01_vi_pipe_w_addr_y1 ":0, + "p01_vi_pipe_w_addr_uv0":0, + "p01_vi_pipe_w_addr_uv1":0, + "p01_vi_pipe_r_addr_y0 ":0, + "p01_vi_pipe_r_addr_y1 ":0, + "p01_vi_pipe_addr_stride":0, + "p01_tof_mode_enable":0, + "p01_vi_pipe_tpg_tof_frm_num":3, + "p01_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe02":{ + "p02_win_mode_en":1, + "p02_input_ch_sel":1, + "p02_ch_mode_sel":1, + "p02_pixel_type":0, + "p02_yuv_in_format":0, + "p02_yuv_out_format":0, + "p02_yuv422_order":0, + "p02_pixel_width":1, + "p02_data_out_timming_ctrl":3, + "p02_sync_pulse_mode":0, + "p02_sen_mipi_clk_pol":1, + "p02_sen_mipi_vsync_pol":0, + "p02_sen_mipi_hsync_pol":0, + "p02_sen_mipi_field_pol":1, + "p02_isp_clk_pol":1, + "p02_isp_vsync_pol":1, + "p02_isp_hsync_pol":1, + "p02_isp_field_pol":1, + "p02_tpg_w_en":0, + "p02_tpg_r_en":0, + "p02_total_width":2640, + "p02_total_height":2500, + "p02_in_width":800, + "p02_in_height":1080, + "p02_w_st_width":0, + "p02_w_st_height":16383, + "p02_r_st_width":279, + "p02_r_st_height":44, + "p02_vi_pipe_w_addr_y0 ":0, + "p02_vi_pipe_w_addr_y1 ":0, + "p02_vi_pipe_w_addr_uv0":0, + "p02_vi_pipe_w_addr_uv1":0, + "p02_vi_pipe_r_addr_y0 ":0, + "p02_vi_pipe_r_addr_y1 ":0, + "p02_vi_pipe_addr_stride":0, + "p02_tof_mode_enable":0, + "p02_vi_pipe_tpg_tof_frm_num":3, + "p02_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_pipe10":{ + "p10_win_mode_en":1, + "p10_input_ch_sel":1, + "p10_ch_mode_sel":1, + "p10_pixel_type":0, + "p10_yuv_in_format":0, + "p10_yuv_out_format":0, + "p10_yuv422_order":0, + "p10_pixel_width":1, + "p10_data_out_timming_ctrl":3, + "p10_sync_pulse_mode":0, + "p10_sen_mipi_clk_pol":1, + "p10_sen_mipi_vsync_pol":0, + "p10_sen_mipi_hsync_pol":0, + "p10_sen_mipi_field_pol":1, + "p10_isp_clk_pol":1, + "p10_isp_vsync_pol":1, + "p10_isp_hsync_pol":1, + "p10_isp_field_pol":1, + "p10_tpg_w_en":0, + "p10_tpg_r_en":0, + "p10_total_width":1920, + "p10_total_height":1250, + "p10_in_width":1600, + "p10_in_height":1200, + "p10_w_st_width":0, + "p10_w_st_height":16383, + "p10_r_st_width":279, + "p10_r_st_height":44, + "p10_vi_pipe_w_addr_y0 ":0, + "p10_vi_pipe_w_addr_y1 ":0, + "p10_vi_pipe_w_addr_uv0":0, + "p10_vi_pipe_w_addr_uv1":0, + "p10_vi_pipe_r_addr_y0 ":0, + "p10_vi_pipe_r_addr_y1 ":0, + "p10_vi_pipe_addr_stride":0, + "p10_tof_mode_enable":0, + "p10_vi_pipe_tpg_tof_frm_num":3, + "p10_vi_pipe_tpg_tof_frm_stride":66432 + }, + "vi_dvp00":{ + "dvp00_win_mode_en":1, + "dvp00_input_ch_sel":1, + "dvp00_ch_mode_sel":1, + "dvp00_pixel_type":0, + "dvp00_yuv_in_format":0, + "dvp00_yuv_out_format":0, + "dvp00_yuv422_order":0, + "dvp00_pixel_width":1, + "dvp00_data_out_timming_ctrl":3, + "dvp00_sync_pulse_mode":0, + "dvp00_sen_mipi_clk_pol":1, + "dvp00_sen_mipi_vsync_pol":0, + "dvp00_sen_mipi_hsync_pol":0, + "dvp00_sen_mipi_field_pol":1, + "dvp00_isp_clk_pol":1, + "dvp00_isp_vsync_pol":1, + "dvp00_isp_hsync_pol":1, + "dvp00_isp_field_pol":1, + "dvp00_tpg_w_en":0, + "dvp00_tpg_r_en":0, + "dvp00_total_width":1920, + "dvp00_total_height":1250, + "dvp00_in_width":1600, + "dvp00_in_height":1200, + "dvp00_w_st_width":0, + "dvp00_w_st_height":16383, + "dvp00_r_st_width":279, + "dvp00_r_st_height":44, + "dvp00_vi_pipe_w_addr_y0 ":0, + "dvp00_vi_pipe_w_addr_y1 ":0, + "dvp00_vi_pipe_w_addr_uv0":0, + "dvp00_vi_pipe_w_addr_uv1":0, + "dvp00_vi_pipe_r_addr_y0 ":0, + "dvp00_vi_pipe_r_addr_y1 ":0, + "dvp00_vi_pipe_addr_stride":0, + "dvp00_tof_mode_enable":0, + "dvp00_vi_pipe_tpg_tof_frm_num":3, + "dvp00_vi_pipe_tpg_tof_frm_stride":66432 + } + } +} diff --git a/package/patches/linux/0025-camera-support-gc2053-gc2093-gc2145-sensor-driver.patch b/package/patches/linux/0025-camera-support-gc2053-gc2093-gc2145-sensor-driver.patch new file mode 100644 index 0000000..9d8e1f7 --- /dev/null +++ b/package/patches/linux/0025-camera-support-gc2053-gc2093-gc2145-sensor-driver.patch @@ -0,0 +1,4671 @@ +From fc97ecbf7224a3127a02fcacc3ffc496ea7fe7b2 Mon Sep 17 00:00:00 2001 +From: "Chenggen.Wang" +Date: Tue, 23 Aug 2022 19:52:27 +0800 +Subject: [PATCH 1/2] camera: support gc2053,gc2093,gc2145 sensor driver. + +Signed-off-by: Chenggen.Wang +--- + .../k510_common/camera-gc2053_gc2093.dtsi | 115 ++ + .../k510_common/camera-gc2093_gc2053.dtsi | 115 ++ + .../k510_common/camera-gc2093_gc2145.dtsi | 115 ++ + .../k510_common/camera-gc2145_gc2093.dtsi | 115 ++ + .../boot/dts/canaan/k510_crb_lp3_v1_2.dts | 10 + + .../media/i2c/soc_camera/canaanchip/Kconfig | 33 +- + .../media/i2c/soc_camera/canaanchip/Makefile | 5 +- + .../media/i2c/soc_camera/canaanchip/gc2053.c | 1258 ++++++++++++++ + .../media/i2c/soc_camera/canaanchip/gc2093.c | 1522 +++++++++++++++++ + .../media/i2c/soc_camera/canaanchip/gc2145.c | 1264 ++++++++++++++ + 10 files changed, 4548 insertions(+), 4 deletions(-) + create mode 100755 arch/riscv/boot/dts/canaan/k510_common/camera-gc2053_gc2093.dtsi + create mode 100755 arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2053.dtsi + create mode 100755 arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2145.dtsi + create mode 100755 arch/riscv/boot/dts/canaan/k510_common/camera-gc2145_gc2093.dtsi + create mode 100755 drivers/media/i2c/soc_camera/canaanchip/gc2053.c + create mode 100755 drivers/media/i2c/soc_camera/canaanchip/gc2093.c + create mode 100755 drivers/media/i2c/soc_camera/canaanchip/gc2145.c + +diff --git a/arch/riscv/boot/dts/canaan/k510_common/camera-gc2053_gc2093.dtsi b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2053_gc2093.dtsi +new file mode 100755 +index 00000000..39bb17ea +--- /dev/null ++++ b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2053_gc2093.dtsi +@@ -0,0 +1,115 @@ ++//RGB ++&i2c4 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2053: gc2053@37 { ++ compatible = "galaxycore,gc2053"; ++ reg = <0x37>; ++ reset-gpios = <&porta 8 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 9 GPIO_ACTIVE_LOW>; ++ canaanchip,camera-module-index = <0>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ // ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out0: endpoint { ++ remote-endpoint = <&mipi_in_ucam0>; ++ data-lanes = <1 2>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2093: gc2093@7e { ++ compatible = "galaxycore,gc2093"; ++ reg = <0x7e>; ++ reset-gpios = <&porta 17 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 18 GPIO_ACTIVE_LOW>; ++ canaanchip,camera-module-index = <1>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ //ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out1: endpoint { ++ remote-endpoint = <&mipi_in_ucam1>; ++ data-lanes = <3 4>; ++ }; ++ }; ++ }; ++}; ++ ++&isp1{ ++ status = "okay"; ++ sensor_num =<2>; ++ dphy_speed =<1>; //0-RXDPHY_SPEED_MODE_2500M,1-RXDPHY_SPEED_MODE_1500M ++ dphy_mode = <0>;//0-TWO_LANES_MODE,1-FOUR_LANES_MODE ++ sony_mode = <0>;//0-SONY_POL_MODE_DIS,1-SONY_POL_MODE_EN ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ //port@0 { ++ // dvp_in_ucam2: endpoint@2 { ++ // //status = "okay"; ++ // //remote-endpoint = <&ucam_out1>; ++ // //data-lanes = <3 4>; ++ // data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ // tpg_r_en = <0>; ++ // tpg_w_en = <0>; ++ // wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ // wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode, 2-3frame wdr mode ++ // mipi_csi_mode = <0>; //0- normal mode, 1 -debug mode ++ // isp_pipeline = <3>;//1 -ISP_F_2K, 2 -ISP_R_2K,3-ISP_TOF ++ // }; ++ //}; ++ port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam0: endpoint@0 { ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out0>; ++ clock-lanes = <0>; ++ data-lanes = <1 2>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode ,1-2frame wdr mode, 2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <1>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ port@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam1: endpoint@1{ ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out1>; ++ clock-lanes = <1>; ++ data-lanes = <3 4>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode ,2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <2>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ ++ }; ++}; +diff --git a/arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2053.dtsi b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2053.dtsi +new file mode 100755 +index 00000000..1a486f3b +--- /dev/null ++++ b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2053.dtsi +@@ -0,0 +1,115 @@ ++//RGB ++&i2c4 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2053: gc2053@37 { ++ compatible = "galaxycore,gc2053"; ++ reg = <0x37>; ++ reset-gpios = <&porta 8 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 9 GPIO_ACTIVE_LOW>; ++ canaanchip,camera-module-index = <1>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ // ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out1: endpoint { ++ remote-endpoint = <&mipi_in_ucam1>; ++ data-lanes = <1 2>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2093: gc2093@7e { ++ compatible = "galaxycore,gc2093"; ++ reg = <0x7e>; ++ reset-gpios = <&porta 17 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 18 GPIO_ACTIVE_LOW>; ++ canaanchip,camera-module-index = <0>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ //ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out0: endpoint { ++ remote-endpoint = <&mipi_in_ucam0>; ++ data-lanes = <3 4>; ++ }; ++ }; ++ }; ++}; ++ ++&isp1{ ++ status = "okay"; ++ sensor_num =<2>; ++ dphy_speed =<1>; //0-RXDPHY_SPEED_MODE_2500M,1-RXDPHY_SPEED_MODE_1500M ++ dphy_mode = <0>;//0-TWO_LANES_MODE,1-FOUR_LANES_MODE ++ sony_mode = <0>;//0-SONY_POL_MODE_DIS,1-SONY_POL_MODE_EN ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ //port@0 { ++ // dvp_in_ucam2: endpoint@2 { ++ // //status = "okay"; ++ // //remote-endpoint = <&ucam_out1>; ++ // //data-lanes = <3 4>; ++ // data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ // tpg_r_en = <0>; ++ // tpg_w_en = <0>; ++ // wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ // wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode, 2-3frame wdr mode ++ // mipi_csi_mode = <0>; //0- normal mode, 1 -debug mode ++ // isp_pipeline = <3>;//1 -ISP_F_2K, 2 -ISP_R_2K,3-ISP_TOF ++ // }; ++ //}; ++ port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam0: endpoint@0 { ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out0>; ++ clock-lanes = <1>; ++ data-lanes = <3 4>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode ,1-2frame wdr mode, 2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <1>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ port@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam1: endpoint@1{ ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out1>; ++ clock-lanes = <0>; ++ data-lanes = <1 2>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode ,2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <2>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ ++ }; ++}; +diff --git a/arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2145.dtsi b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2145.dtsi +new file mode 100755 +index 00000000..59d470d6 +--- /dev/null ++++ b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2093_gc2145.dtsi +@@ -0,0 +1,115 @@ ++//RGB ++&i2c1 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2093: gc2093@37 { ++ compatible = "galaxycore,gc2093"; ++ reg = <0x37>; ++ reset-gpios = <&porta 8 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 9 GPIO_ACTIVE_LOW>; ++ canaanchip,camera-module-index = <0>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ // ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out0: endpoint { ++ remote-endpoint = <&mipi_in_ucam0>; ++ data-lanes = <1 2>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2145: gc2145@3c { ++ compatible = "galaxycore,gc2145"; ++ reg = <0x3c>; ++ reset-gpios = <&porta 23 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 17 GPIO_ACTIVE_HIGH>; ++ canaanchip,camera-module-index = <1>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ //ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out1: endpoint { ++ remote-endpoint = <&mipi_in_ucam1>; ++ data-lanes = <3 4>; ++ }; ++ }; ++ }; ++}; ++ ++&isp1{ ++ status = "okay"; ++ sensor_num =<2>; ++ dphy_speed =<1>; //0-RXDPHY_SPEED_MODE_2500M,1-RXDPHY_SPEED_MODE_1500M ++ dphy_mode = <0>;//0-TWO_LANES_MODE,1-FOUR_LANES_MODE ++ sony_mode = <0>;//0-SONY_POL_MODE_DIS,1-SONY_POL_MODE_EN ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ //port@0 { ++ // dvp_in_ucam2: endpoint@2 { ++ // //status = "okay"; ++ // //remote-endpoint = <&ucam_out1>; ++ // //data-lanes = <3 4>; ++ // data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ // tpg_r_en = <0>; ++ // tpg_w_en = <0>; ++ // wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ // wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode, 2-3frame wdr mode ++ // mipi_csi_mode = <0>; //0- normal mode, 1 -debug mode ++ // isp_pipeline = <3>;//1 -ISP_F_2K, 2 -ISP_R_2K,3-ISP_TOF ++ // }; ++ //}; ++ port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam0: endpoint@0 { ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out0>; ++ clock-lanes = <0>; ++ data-lanes = <1 2>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode ,1-2frame wdr mode, 2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <1>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ port@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam1: endpoint@1{ ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out1>; ++ clock-lanes = <1>; ++ data-lanes = <3 4>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode ,2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <2>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ ++ }; ++}; +diff --git a/arch/riscv/boot/dts/canaan/k510_common/camera-gc2145_gc2093.dtsi b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2145_gc2093.dtsi +new file mode 100755 +index 00000000..81a2ff7c +--- /dev/null ++++ b/arch/riscv/boot/dts/canaan/k510_common/camera-gc2145_gc2093.dtsi +@@ -0,0 +1,115 @@ ++//RGB ++&i2c1 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2093: gc2093@37 { ++ compatible = "galaxycore,gc2093"; ++ reg = <0x37>; ++ reset-gpios = <&porta 8 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 9 GPIO_ACTIVE_LOW>; ++ canaanchip,camera-module-index = <1>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ // ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out1: endpoint { ++ remote-endpoint = <&mipi_in_ucam1>; ++ data-lanes = <1 2>; ++ }; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ gc2145: gc2145@3c { ++ compatible = "galaxycore,gc2145"; ++ reg = <0x3c>; ++ reset-gpios = <&porta 23 GPIO_ACTIVE_LOW>; ++ pwdn-gpios = <&porta 17 GPIO_ACTIVE_HIGH>; ++ canaanchip,camera-module-index = <0>; ++ canaanchip,camera-module-facing = "front"; ++ canaanchip,camera-module-name = "BFC105-DUAL-L"; ++ canaanchip,camera-module-lens-name = "RGB"; ++ //ir-cut = <&cam_ircut0>; ++ hflip = <1>; ++ ++ port { ++ ucam_out0: endpoint { ++ remote-endpoint = <&mipi_in_ucam0>; ++ data-lanes = <3 4>; ++ }; ++ }; ++ }; ++}; ++ ++&isp1{ ++ status = "okay"; ++ sensor_num =<2>; ++ dphy_speed =<1>; //0-RXDPHY_SPEED_MODE_2500M,1-RXDPHY_SPEED_MODE_1500M ++ dphy_mode = <0>;//0-TWO_LANES_MODE,1-FOUR_LANES_MODE ++ sony_mode = <0>;//0-SONY_POL_MODE_DIS,1-SONY_POL_MODE_EN ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ //port@0 { ++ // dvp_in_ucam2: endpoint@2 { ++ // //status = "okay"; ++ // //remote-endpoint = <&ucam_out1>; ++ // //data-lanes = <3 4>; ++ // data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ // tpg_r_en = <0>; ++ // tpg_w_en = <0>; ++ // wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ // wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode, 2-3frame wdr mode ++ // mipi_csi_mode = <0>; //0- normal mode, 1 -debug mode ++ // isp_pipeline = <3>;//1 -ISP_F_2K, 2 -ISP_R_2K,3-ISP_TOF ++ // }; ++ //}; ++ port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam0: endpoint@0 { ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out0>; ++ clock-lanes = <1>; ++ data-lanes = <3 4>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode ,1-2frame wdr mode, 2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <1>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ port@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mipi_in_ucam1: endpoint@1{ ++ status = "okay"; ++ reg = <1>; ++ remote-endpoint = <&ucam_out1>; ++ clock-lanes = <0>; ++ data-lanes = <1 2>; ++ data-type = <0x2b>; //0x1E-MIPI_YUV422,0x2A-MIPI_RAW8,0x2B-MIPI_RAW10,0x2C-MIPI_RAW12 ++ tpg_r_en = <0>; ++ tpg_w_en = <0>; ++ wdr_sensor_vendor =<0>;//0-"SONY_WDR_SENSOR", 1=OTHERS_WDR_SENSOR ++ wdr_mode = <0>;//0-none wdr mode, 1-2frame wdr mode ,2-3frame wdr mode ++ mipi_csi_mode = <0>; //0- normal mode ,1 -debug mode ++ isp_pipeline = <2>;//1 -ISP_F_2K, 2 -ISP_R_2K, 3-ISP_TOF ++ }; ++ }; ++ ++ }; ++}; +diff --git a/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts b/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts +index 39e7b26b..cecd61c1 100755 +--- a/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts ++++ b/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts +@@ -20,6 +20,11 @@ + #include "k510_common/iomux_provider.dtsi" /* k510 soc iomux provider */ + #include "k510_common/iomux_consumer.dtsi" /* k510 soc iomux consumer */ + #include "k510_common/camera-imx219x2.dtsi" /* camera imx219 */ ++//#include "k510_common/camera-gc2053_gc2093.dtsi" /* camera gc2053/gc2093 */ ++//#include "k510_common/camera-gc2093_gc2053.dtsi" /* camera gc2053/gc2093 */ ++//#include "k510_common/camera-gc2093_gc2145.dtsi" /* camera gc2093/gc2145 */ ++//#include "k510_common/camera-gc2145_gc2093.dtsi" /* camera gc2093/gc2145 */ ++ + #include + + /* evalution board device tree, include nandflash/emmc/ethphy/sensor/hdmi/pmic etc. */ +@@ -207,9 +212,13 @@ + pinctrl-k510,pins = < + (32) (FUNC_GPIO22) /*OEB*/ + (34) (FUNC_GPIO21) /*SEL*/ ++ (67) (FUNC_GPIO9) ++ (68) (FUNC_GPIO23) + (69) (FUNC_GPIO2) /*WIFI_WAKE_OUT*/ + (70) (FUNC_GPIO3) /*BT_RST_IN*/ + (71) (FUNC_GPIO4) /*KEY_1*/ ++ (72) (FUNC_GPIO17) ++ (73) (FUNC_GPIO18) + (75) (FUNC_GPIO5) /*HP_INSERT_DET*/ + (76) (FUNC_GPIO6) /*KEY_2*/ + (77) (FUNC_GPIO7) /*SYS_LED*/ +@@ -217,6 +226,7 @@ + (79) (FUNC_GPIO20) /*MIPI_DSI_LCD_EN*/ + (80) (FUNC_GPIO10) /*MIPI_DSI_T_RST*/ + (81) (FUNC_GPIO11) /*BT_WAKE_OUT*/ ++ (82) (FUNC_GPIO8) + (83) (FUNC_GPIO12) /*MIPI_DSI_T_INT*/ + (84) (FUNC_GPIO13) /*BT_WAKE_IN*/ + (85) (FUNC_GPIO14) /*WIFI_EN*/ +diff --git a/drivers/media/i2c/soc_camera/canaanchip/Kconfig b/drivers/media/i2c/soc_camera/canaanchip/Kconfig +index fb072753..7be3e789 100755 +--- a/drivers/media/i2c/soc_camera/canaanchip/Kconfig ++++ b/drivers/media/i2c/soc_camera/canaanchip/Kconfig +@@ -14,9 +14,36 @@ config VIDEO_IMX219_1 + CMOS image sensor. + + config VIDEO_IMX385 +- tristate "Sony IMX385 sensor support" ++ tristate "Sony IMX385 sensor support" ++ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && VIDEO_CANAAN_K510 ++ depends on MEDIA_CAMERA_SUPPORT ++ ---help--- ++ This is a V4L2 sensor-level driver for the Sony IMX385 ++ CMOS image sensor. ++ ++config VIDEO_GC2053 ++ tristate "Galaxycore GC2053 sensor support" + depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && VIDEO_CANAAN_K510 + depends on MEDIA_CAMERA_SUPPORT + ---help--- +- This is a V4L2 sensor-level driver for the Sony IMX385 +- CMOS image sensor. +\ No newline at end of file ++ This is a V4L2 sensor-level driver for the Galaxycore GC2053 ++ CMOS image sensor. ++ ++config VIDEO_GC2093 ++ tristate "Galaxycore GC2093 sensor support" ++ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && VIDEO_CANAAN_K510 ++ depends on MEDIA_CAMERA_SUPPORT ++ ---help--- ++ This is a V4L2 sensor-level driver for the Galaxycore GC2093 ++ CMOS image sensor. ++ ++config VIDEO_GC2145 ++ tristate "Galaxycore GC2145 sensor support" ++ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && VIDEO_CANAAN_K510 ++ depends on MEDIA_CAMERA_SUPPORT ++ ---help--- ++ This is a V4L2 sensor-level driver for the Galaxycore GC2145 ++ CMOS image sensor. ++ ++ ++ +diff --git a/drivers/media/i2c/soc_camera/canaanchip/Makefile b/drivers/media/i2c/soc_camera/canaanchip/Makefile +index feaf60f7..3b53d53e 100755 +--- a/drivers/media/i2c/soc_camera/canaanchip/Makefile ++++ b/drivers/media/i2c/soc_camera/canaanchip/Makefile +@@ -1,3 +1,6 @@ + obj-$(CONFIG_VIDEO_IMX219_0) += imx219_0.o + obj-$(CONFIG_VIDEO_IMX219_1) += imx219_1.o +-obj-$(CONFIG_VIDEO_IMX385) += imx385.o +\ No newline at end of file ++obj-$(CONFIG_VIDEO_IMX385) += imx385.o ++obj-$(CONFIG_VIDEO_GC2053) += gc2053.o ++obj-$(CONFIG_VIDEO_GC2093) += gc2093.o ++obj-$(CONFIG_VIDEO_GC2145) += gc2145.o +diff --git a/drivers/media/i2c/soc_camera/canaanchip/gc2053.c b/drivers/media/i2c/soc_camera/canaanchip/gc2053.c +new file mode 100755 +index 00000000..c939c890 +--- /dev/null ++++ b/drivers/media/i2c/soc_camera/canaanchip/gc2053.c +@@ -0,0 +1,1258 @@ ++/* ++ * Driver for GC2053 CMOS Image Sensor ++ * ++ * Copyright (C) 2022, Canaan Bright Sight Co., Ltd ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01) ++#define GC2053_NAME "gc2053" ++#define GC2053_MEDIA_BUS_FMT MEDIA_BUS_FMT_SRGGB10_1X10 ++ ++#define MIPI_FREQ_297M 297000000 ++#define GC2053_XVCLK_FREQ 24000000 ++ ++#define GC2053_PAGE_SELECT 0xFE ++ ++#define GC2053_REG_CHIP_ID_H 0xF0 ++#define GC2053_REG_CHIP_ID_L 0xF1 ++ ++#define GC2053_REG_EXP_H 0x03 ++#define GC2053_REG_EXP_L 0x04 ++ ++#define GC2053_REG_VTS_H 0x41 ++#define GC2053_REG_VTS_L 0x42 ++ ++#define GC2053_REG_CTRL_MODE 0x3E ++#define GC2053_MODE_SW_STANDBY 0x11 ++#define GC2053_MODE_STREAMING 0x91 ++ ++#define REG_NULL 0xFF ++ ++#define GC2053_CHIP_ID 0x2053 ++ ++#define GC2053_VTS_MAX 0x3FFF ++#define GC2053_HTS_MAX 0xFFF ++ ++#define GC2053_EXPOSURE_MAX 0x3FFF ++#define GC2053_EXPOSURE_MIN 1 ++#define GC2053_EXPOSURE_STEP 1 ++ ++#define GC2053_GAIN_MIN 0x40 ++#define GC2053_GAIN_MAX 0x2000 ++#define GC2053_GAIN_STEP 1 ++#define GC2053_GAIN_DEFAULT 64 ++ ++#define GC2053_LANES 2 ++ ++#define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb)) ++ ++#define GC2053_FLIP_MIRROR_REG 0x17 ++ ++#define GC_MIRROR_BIT_MASK BIT(0) ++#define GC_FLIP_BIT_MASK BIT(1) ++ ++#define GC2053_NUM_SUPPLIES ARRAY_SIZE(gc2053_supply_names) ++ ++#define to_gc2053(sd) container_of(sd, struct gc2053, subdev) ++ ++struct regval { ++ u8 addr; ++ u8 val; ++}; ++ ++struct gc2053_mode { ++ u32 width; ++ u32 height; ++ struct v4l2_fract max_fps; ++ u32 hts_def; ++ u32 vts_def; ++ u32 exp_def; ++ const struct regval *reg_list; ++}; ++ ++struct gc2053 { ++ struct i2c_client *client; ++ struct gpio_desc *reset_gpio; ++ struct gpio_desc *pwdn_gpio; ++ ++ struct v4l2_subdev subdev; ++ struct media_pad pad; ++ struct v4l2_ctrl_handler ctrl_handler; ++ struct v4l2_ctrl *exposure; ++ struct v4l2_ctrl *anal_gain; ++ struct v4l2_ctrl *hblank; ++ struct v4l2_ctrl *vblank; ++ struct v4l2_ctrl *h_flip; ++ struct v4l2_ctrl *v_flip; ++ struct mutex mutex; ++ bool streaming; ++ bool power_on; ++ const struct gc2053_mode *cur_mode; ++ unsigned int lane_num; ++ unsigned int cfg_num; ++ unsigned int pixel_rate; ++ ++ u32 module_index; ++ const char *module_facing; ++ const char *module_name; ++ const char *len_name; ++ u8 flip; ++}; ++ ++static const struct regval gc2053_start[] = { ++ {0xf0, 0x00}, /* mode select streaming on */ ++ {0x3e, 0x91}, ++ {REG_NULL, 0x00}, ++}; ++ ++static const struct regval gc2053_stop[] = { ++ {0xf0, 0x00}, /* mode select streaming off */ ++ {0x3e, 0x00}, ++ {REG_NULL, 0x00}, ++}; ++ ++/* ++ * window_size=1920*1080 mipi@2lane ++ * mclk=24mhz,mipi_clk=594Mbps ++ * pixel_line_total=2200,line_frame_total=1125 ++ * row_time=29.629us,frame_rate=30fps ++ */ ++static const struct regval gc2053_1920x1080_regs_2lane[] = { ++ /****system****/ ++ {0xfe, 0x80}, ++ {0xfe, 0x80}, ++ {0xfe, 0x80}, ++ {0xfe, 0x00}, ++ {0xf2, 0x00}, ++ {0xf3, 0x00}, ++ {0xf4, 0x36}, ++ {0xf5, 0xc0}, ++ {0xf6, 0x44}, ++ {0xf7, 0x01}, ++ {0xf8, 0x63}, ++ {0xf9, 0x40}, ++ {0xfc, 0x8e}, ++ /****CISCTL & ANALOG****/ ++ {0xfe, 0x00}, ++ {0x87, 0x18}, ++ {0xee, 0x30}, ++ {0xd0, 0xb7}, ++ {0x03, 0x04}, ++ {0x04, 0x60}, ++ {0x05, 0x04}, ++ {0x06, 0x4c}, ++ {0x07, 0x00}, ++ {0x08, 0x11}, ++ {0x09, 0x00}, ++ {0x0a, 0x02}, ++ {0x0b, 0x00}, ++ {0x0c, 0x02}, ++ {0x0d, 0x04}, ++ {0x0e, 0x40}, ++ {0x12, 0xe2}, ++ {0x13, 0x16}, ++ {0x19, 0x0a}, ++ {0x21, 0x1c}, ++ {0x28, 0x0a}, ++ {0x29, 0x24}, ++ {0x2b, 0x04}, ++ {0x32, 0xf8}, ++ {0x37, 0x03}, ++ {0x39, 0x15}, ++ {0x43, 0x07}, ++ {0x44, 0x40}, ++ {0x46, 0x0b}, ++ {0x4b, 0x20}, ++ {0x4e, 0x08}, ++ {0x55, 0x20}, ++ {0x66, 0x05}, ++ {0x67, 0x05}, ++ {0x77, 0x01}, ++ {0x78, 0x00}, ++ {0x7c, 0x93}, ++ {0x8c, 0x12}, ++ {0x8d, 0x92}, ++ {0x90, 0x01}, ++ {0x9d, 0x10}, ++ {0xce, 0x7c}, ++ {0xd2, 0x41}, ++ {0xd3, 0xdc}, ++ {0xe6, 0x50}, ++ /*gain*/ ++ {0xb6, 0xc0}, ++ {0xb0, 0x60}, ++ {0xb1, 0x01}, ++ {0xb2, 0x00}, ++ {0xb3, 0x00}, ++ {0xb4, 0x00}, ++ {0xb8, 0x01}, ++ {0xb9, 0x00}, ++ /*blk*/ ++ {0x26, 0x30}, ++ {0xfe, 0x01}, ++ {0x40, 0x23}, ++ {0x55, 0x07}, ++ {0x60, 0x40}, ++ {0xfe, 0x04}, ++ {0x14, 0x78}, ++ {0x15, 0x78}, ++ {0x16, 0x78}, ++ {0x17, 0x78}, ++ /*window*/ ++ {0xfe, 0x01}, ++ {0x92, 0x00}, ++ {0x94, 0x03}, ++ {0x95, 0x04},//[10:0]win_out_height-1080 ++ {0x96, 0x38}, ++ {0x97, 0x07},//[11:0]win_out_width-1920 ++ {0x98, 0x80}, ++ /*ISP*/ ++ {0xfe, 0x01}, ++ {0x01, 0x05}, ++ {0x02, 0x89}, ++ {0x04, 0x01}, ++ {0x07, 0xa6}, ++ {0x08, 0xa9}, ++ {0x09, 0xa8}, ++ {0x0a, 0xa7}, ++ {0x0b, 0xff}, ++ {0x0c, 0xff}, ++ {0x0f, 0x00}, ++ {0x50, 0x1c}, ++ {0x89, 0x03}, ++ {0xfe, 0x04}, ++ {0x28, 0x86}, ++ {0x29, 0x86}, ++ {0x2a, 0x86}, ++ {0x2b, 0x68}, ++ {0x2c, 0x68}, ++ {0x2d, 0x68}, ++ {0x2e, 0x68}, ++ {0x2f, 0x68}, ++ {0x30, 0x4f}, ++ {0x31, 0x68}, ++ {0x32, 0x67}, ++ {0x33, 0x66}, ++ {0x34, 0x66}, ++ {0x35, 0x66}, ++ {0x36, 0x66}, ++ {0x37, 0x66}, ++ {0x38, 0x62}, ++ {0x39, 0x62}, ++ {0x3a, 0x62}, ++ {0x3b, 0x62}, ++ {0x3c, 0x62}, ++ {0x3d, 0x62}, ++ {0x3e, 0x62}, ++ {0x3f, 0x62}, ++ /****DVP & MIPI****/ ++ {0xfe, 0x01}, ++ {0x9a, 0x06}, ++ {0x99, 0x00}, ++ {0xfe, 0x00}, ++ {0x7b, 0x2a}, ++ {0x23, 0x2d}, ++ {0xfe, 0x03}, ++ {0x01, 0x27}, ++ {0x02, 0x56}, ++ {0x03, 0x8e}, ++ {0x12, 0x80}, ++ {0x13, 0x07}, ++ {0xfe, 0x00}, ++ {0x3e, 0x81}, ++ {REG_NULL, 0x00}, ++}; ++ ++static const struct gc2053_mode supported_modes[] = { ++ { ++ .width = 1920, ++ .height = 1080, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 300000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0x898, ++ .vts_def = 0x465, ++ .reg_list = gc2053_1920x1080_regs_2lane, ++ }, ++}; ++ ++static const s64 link_freq_menu_items[] = { ++ MIPI_FREQ_297M ++}; ++ ++/* sensor register write */ ++static int gc2053_write_reg(struct i2c_client *client, u8 reg, u8 val) ++{ ++ struct i2c_msg msg; ++ u8 buf[2]; ++ int ret; ++ ++ buf[0] = reg & 0xFF; ++ buf[1] = val; ++ ++ msg.addr = client->addr; ++ msg.flags = client->flags; ++ msg.buf = buf; ++ msg.len = sizeof(buf); ++ ++ ret = i2c_transfer(client->adapter, &msg, 1); ++ if (ret >= 0) ++ return 0; ++ ++ dev_err(&client->dev, ++ "gc2053 write reg(0x%x val:0x%x) failed !\n", reg, val); ++ ++ return ret; ++} ++ ++static int gc2053_write_array(struct i2c_client *client, ++ const struct regval *regs) ++{ ++ int i, ret = 0; ++ ++ i = 0; ++ while (regs[i].addr != REG_NULL) { ++ ret = gc2053_write_reg(client, regs[i].addr, regs[i].val); ++ if (ret) { ++ dev_err(&client->dev, "%s failed !\n", __func__); ++ break; ++ } ++ i++; ++ } ++ ++ return ret; ++} ++ ++/* sensor register read */ ++static int gc2053_read_reg(struct i2c_client *client, u8 reg, u8 *val) ++{ ++ struct i2c_msg msg[2]; ++ u8 buf[1]; ++ int ret; ++ ++ buf[0] = reg & 0xFF; ++ ++ msg[0].addr = client->addr; ++ msg[0].flags = client->flags; ++ msg[0].buf = buf; ++ msg[0].len = sizeof(buf); ++ ++ msg[1].addr = client->addr; ++ msg[1].flags = client->flags | I2C_M_RD; ++ msg[1].buf = buf; ++ msg[1].len = 1; ++ ++ ret = i2c_transfer(client->adapter, msg, 2); ++ if (ret >= 0) { ++ *val = buf[0]; ++ return 0; ++ } ++ ++ dev_err(&client->dev, ++ "gc2053 read reg(0x%x val:0x%x) failed !\n", reg, *val); ++ ++ return ret; ++} ++ ++static int gc2053_get_reso_dist(const struct gc2053_mode *mode, ++ struct v4l2_mbus_framefmt *framefmt) ++{ ++ return abs(mode->width - framefmt->width) + ++ abs(mode->height - framefmt->height); ++} ++ ++static const struct gc2053_mode * ++gc2053_find_best_fit(struct gc2053 *gc2053, struct v4l2_subdev_format *fmt) ++{ ++ struct v4l2_mbus_framefmt *framefmt = &fmt->format; ++ int dist; ++ int cur_best_fit = 0; ++ int cur_best_fit_dist = -1; ++ unsigned int i; ++ ++ for (i = 0; i < gc2053->cfg_num; i++) { ++ dist = gc2053_get_reso_dist(&supported_modes[i], framefmt); ++ if (cur_best_fit_dist == -1 || dist <= cur_best_fit_dist) { ++ cur_best_fit_dist = dist; ++ cur_best_fit = i; ++ } ++ } ++ ++ return &supported_modes[cur_best_fit]; ++} ++ ++static uint8_t gain_reg_table[29][4] = { ++ {0x00, 0x00, 0x01, 0x00}, ++ {0x00, 0x10, 0x01, 0x0c}, ++ {0x00, 0x20, 0x01, 0x1b}, ++ {0x00, 0x30, 0x01, 0x2c}, ++ {0x00, 0x40, 0x01, 0x3f}, ++ {0x00, 0x50, 0x02, 0x16}, ++ {0x00, 0x60, 0x02, 0x35}, ++ {0x00, 0x70, 0x03, 0x16}, ++ {0x00, 0x80, 0x04, 0x02}, ++ {0x00, 0x90, 0x04, 0x31}, ++ {0x00, 0xa0, 0x05, 0x32}, ++ {0x00, 0xb0, 0x06, 0x35}, ++ {0x00, 0xc0, 0x08, 0x04}, ++ {0x00, 0x5a, 0x09, 0x19}, ++ {0x00, 0x83, 0x0b, 0x0f}, ++ {0x00, 0x93, 0x0d, 0x12}, ++ {0x00, 0x84, 0x10, 0x00}, ++ {0x00, 0x94, 0x12, 0x3a}, ++ {0x01, 0x2c, 0x1a, 0x02}, ++ {0x01, 0x3c, 0x1b, 0x20}, ++ {0x00, 0x8c, 0x20, 0x0f}, ++ {0x00, 0x9c, 0x26, 0x07}, ++ {0x02, 0x64, 0x36, 0x21}, ++ {0x02, 0x74, 0x37, 0x3a}, ++ {0x00, 0xc6, 0x3d, 0x02}, ++ {0x00, 0xdc, 0x3f, 0x3f}, ++ {0x02, 0x85, 0x3f, 0x3f}, ++ {0x02, 0x95, 0x3f, 0x3f}, ++ {0x00, 0xce, 0x3f, 0x3f}, ++}; ++ ++static uint32_t gain_level_table[30] = { ++ 64, ++ 76, ++ 91, ++ 108, ++ 127, ++ 150, ++ 181, ++ 214, ++ 258, ++ 305, ++ 370, ++ 437, ++ 516, ++ 601, ++ 719, ++ 850, ++ 1024, ++ 1210, ++ 1538, ++ 1760, ++ 2063, ++ 2439, ++ 2881, ++ 3393, ++ 3970, ++ 4737, ++ 5572, ++ 6552, ++ 7713, ++ 0xffffffff ++}; ++ ++static int gc2053_set_gain(struct gc2053 *gc2053, u32 gain) ++{ ++ int ret = 0; ++ uint8_t i = 0; ++ uint8_t total = 0; ++ uint8_t temp = 0; ++ ++ total = sizeof(gain_level_table) / sizeof(u32) - 1; ++ for (i = 0; i < total; i++) { ++ if ((gain_level_table[i] <= gain) && (gain < gain_level_table[i+1])) ++ break; ++ } ++ ++ ret = gc2053_write_reg(gc2053->client, 0xb4, gain_reg_table[i][0]); ++ ret |= gc2053_write_reg(gc2053->client, 0xb3, gain_reg_table[i][1]); ++ ret |= gc2053_write_reg(gc2053->client, 0xb8, gain_reg_table[i][2]); ++ ret |= gc2053_write_reg(gc2053->client, 0xb9, gain_reg_table[i][3]); ++ ++ temp = 64 * gain / gain_level_table[i]; ++ ret |= gc2053_write_reg(gc2053->client, 0xb1, (temp >> 6)); ++ ret |= gc2053_write_reg(gc2053->client, 0xb2, (temp << 2) & 0xfc); ++ ++ return ret; ++} ++ ++static int gc2053_set_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct gc2053 *gc2053 = container_of(ctrl->handler, ++ struct gc2053, ctrl_handler); ++ struct i2c_client *client = gc2053->client; ++ s64 max; ++ int ret = 0; ++ u32 vts = 0; ++ ++ /* Propagate change of current control to all related controls */ ++ switch (ctrl->id) { ++ case V4L2_CID_VBLANK: ++ /* Update max exposure while meeting expected vblanking */ ++ max = gc2053->cur_mode->height + ctrl->val - 1; ++ __v4l2_ctrl_modify_range(gc2053->exposure, ++ gc2053->exposure->minimum, max, ++ gc2053->exposure->step, ++ gc2053->exposure->default_value); ++ break; ++ } ++ ++ switch (ctrl->id) { ++ case V4L2_CID_EXPOSURE: ++ ret = gc2053_write_reg(gc2053->client, GC2053_REG_EXP_H, ++ (ctrl->val >> 8) & 0x3f); ++ ret |= gc2053_write_reg(gc2053->client, GC2053_REG_EXP_L, ++ ctrl->val & 0xff); ++ break; ++ case V4L2_CID_ANALOGUE_GAIN: ++ case V4L2_CID_GAIN: ++ gc2053_set_gain(gc2053, ctrl->val); ++ break; ++ case V4L2_CID_VBLANK: ++ vts = ctrl->val + gc2053->cur_mode->height; ++ ret = gc2053_write_reg(gc2053->client, GC2053_REG_VTS_H, (vts >> 8) & 0x3f); ++ ret |= gc2053_write_reg(gc2053->client, GC2053_REG_VTS_L, vts & 0xff); ++ break; ++ case V4L2_CID_HFLIP: ++ if (ctrl->val) ++ gc2053->flip |= GC_MIRROR_BIT_MASK; ++ else ++ gc2053->flip &= ~GC_MIRROR_BIT_MASK; ++ break; ++ case V4L2_CID_VFLIP: ++ if (ctrl->val) ++ gc2053->flip |= GC_FLIP_BIT_MASK; ++ else ++ gc2053->flip &= ~GC_FLIP_BIT_MASK; ++ break; ++ default: ++ dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n", ++ __func__, ctrl->id, ctrl->val); ++ break; ++ } ++ ++ return ret; ++} ++ ++static const struct v4l2_ctrl_ops gc2053_ctrl_ops = { ++ .s_ctrl = gc2053_set_ctrl, ++}; ++ ++static int gc2053_parse_of(struct gc2053 *gc2053) ++{ ++ struct device *dev = &gc2053->client->dev; ++ struct device_node *endpoint; ++ struct fwnode_handle *fwnode; ++ int rval; ++ ++ endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); ++ if (!endpoint) { ++ dev_err(dev, "Failed to get endpoint\n"); ++ return -EINVAL; ++ } ++ fwnode = of_fwnode_handle(endpoint); ++ rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0); ++ if (rval <= 0) { ++ dev_warn(dev, " Get mipi lane num failed!\n"); ++ return -1; ++ } ++ ++ gc2053->lane_num = rval; ++ if (2 == gc2053->lane_num) { ++ gc2053->cur_mode = &supported_modes[0]; ++ gc2053->cfg_num = ARRAY_SIZE(supported_modes); ++ ++ /*pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */ ++ gc2053->pixel_rate = MIPI_FREQ_297M * 2U * (gc2053->lane_num) / 10U; ++ dev_info(dev, "lane_num(%d) pixel_rate(%u)\n", ++ gc2053->lane_num, gc2053->pixel_rate); ++ } else { ++ dev_info(dev, "gc2053 can not support the lane num(%d)\n", gc2053->lane_num); ++ } ++ return 0; ++} ++ ++static int gc2053_initialize_controls(struct gc2053 *gc2053) ++{ ++ const struct gc2053_mode *mode; ++ struct v4l2_ctrl_handler *handler; ++ struct v4l2_ctrl *ctrl; ++ s64 exposure_max, vblank_def; ++ u32 h_blank; ++ int ret; ++ ++ handler = &gc2053->ctrl_handler; ++ mode = gc2053->cur_mode; ++ ret = v4l2_ctrl_handler_init(handler, 10); ++ if (ret) ++ return ret; ++ handler->lock = &gc2053->mutex; ++ ++ ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, ++ 0, 0, link_freq_menu_items); ++ if (ctrl) ++ ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ ++ v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, ++ 0, gc2053->pixel_rate, 1, gc2053->pixel_rate); ++ ++ h_blank = mode->hts_def - mode->width; ++ gc2053->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, ++ h_blank, h_blank, 1, h_blank); ++ if (gc2053->hblank) ++ gc2053->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ ++ vblank_def = mode->vts_def - mode->height; ++ gc2053->vblank = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops, ++ V4L2_CID_VBLANK, vblank_def, ++ GC2053_VTS_MAX - mode->height, ++ 1, vblank_def); ++ ++ exposure_max = mode->vts_def - 1; ++ gc2053->exposure = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops, ++ V4L2_CID_EXPOSURE, GC2053_EXPOSURE_MIN, ++ exposure_max, GC2053_EXPOSURE_STEP, ++ mode->exp_def); ++ ++ gc2053->anal_gain = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops, ++ V4L2_CID_ANALOGUE_GAIN, GC2053_GAIN_MIN, ++ GC2053_GAIN_MAX, GC2053_GAIN_STEP, ++ GC2053_GAIN_DEFAULT); ++ ++ v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops, ++ V4L2_CID_GAIN, GC2053_GAIN_MIN, ++ GC2053_GAIN_MAX, GC2053_GAIN_STEP, ++ GC2053_GAIN_DEFAULT); ++ ++ ++ gc2053->h_flip = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops, ++ V4L2_CID_HFLIP, 0, 1, 1, 0); ++ ++ gc2053->v_flip = v4l2_ctrl_new_std(handler, &gc2053_ctrl_ops, ++ V4L2_CID_VFLIP, 0, 1, 1, 0); ++ gc2053->flip = 0; ++ ++ if (handler->error) { ++ ret = handler->error; ++ dev_err(&gc2053->client->dev, ++ "Failed to init controls(%d)\n", ret); ++ goto err_free_handler; ++ } ++ ++ gc2053->subdev.ctrl_handler = handler; ++ return 0; ++ ++err_free_handler: ++ v4l2_ctrl_handler_free(handler); ++ return ret; ++} ++ ++/* Calculate the delay in us by clock rate and clock cycles */ ++static inline u32 gc2053_cal_delay(u32 cycles) ++{ ++ return DIV_ROUND_UP(cycles, GC2053_XVCLK_FREQ / 1000 / 1000); ++} ++ ++static int __gc2053_power_on(struct gc2053 *gc2053) ++{ ++ u32 delay_us; ++ ++ if (!IS_ERR(gc2053->reset_gpio)) { ++ gpiod_set_value_cansleep(gc2053->reset_gpio, 1); ++ usleep_range(100, 200); ++ } ++ if (!IS_ERR(gc2053->pwdn_gpio)) ++ gpiod_set_value_cansleep(gc2053->pwdn_gpio, 0); ++ ++ if (!IS_ERR(gc2053->reset_gpio)) ++ gpiod_set_value_cansleep(gc2053->reset_gpio, 0); ++ usleep_range(3000, 6000); ++ /* 8192 cycles prior to first SCCB transaction */ ++ delay_us = gc2053_cal_delay(8192); ++ usleep_range(delay_us, delay_us * 2); ++ return 0; ++} ++ ++static void __gc2053_power_off(struct gc2053 *gc2053) ++{ ++ if (!IS_ERR(gc2053->pwdn_gpio)) ++ gpiod_set_value_cansleep(gc2053->pwdn_gpio, 1); ++ ++ if (!IS_ERR(gc2053->reset_gpio)) ++ gpiod_set_value_cansleep(gc2053->reset_gpio, 1); ++} ++ ++static int gc2053_check_sensor_id(struct gc2053 *gc2053, ++ struct i2c_client *client) ++{ ++ struct device *dev = &gc2053->client->dev; ++ u8 pid = 0, ver = 0; ++ u16 id = 0; ++ int ret = 0; ++ ++ /* Check sensor revision */ ++ ret = gc2053_read_reg(client, GC2053_REG_CHIP_ID_H, &pid); ++ ret |= gc2053_read_reg(client, GC2053_REG_CHIP_ID_L, &ver); ++ if (ret) { ++ dev_err(&client->dev, "gc2053_read_reg failed (%d)\n", ret); ++ return ret; ++ } ++ ++ id = SENSOR_ID(pid, ver); ++ if (id != GC2053_CHIP_ID) { ++ dev_err(&client->dev, ++ "Sensor detection failed (%04X,%d)\n", ++ id, ret); ++ return -ENODEV; ++ } ++ ++ dev_info(dev, "Detected GC%04x sensor\n", id); ++ return 0; ++} ++ ++static int gc2053_set_flip(struct gc2053 *gc2053, u8 mode) ++{ ++ u8 match_reg = 0; ++ ++ gc2053_read_reg(gc2053->client, GC2053_FLIP_MIRROR_REG, &match_reg); ++ ++ if (mode == GC_FLIP_BIT_MASK) { ++ match_reg |= GC_FLIP_BIT_MASK; ++ match_reg &= ~GC_MIRROR_BIT_MASK; ++ } else if (mode == GC_MIRROR_BIT_MASK) { ++ match_reg |= GC_MIRROR_BIT_MASK; ++ match_reg &= ~GC_FLIP_BIT_MASK; ++ } else if (mode == (GC_MIRROR_BIT_MASK | ++ GC_FLIP_BIT_MASK)) { ++ match_reg |= GC_FLIP_BIT_MASK; ++ match_reg |= GC_MIRROR_BIT_MASK; ++ } else { ++ match_reg &= ~GC_FLIP_BIT_MASK; ++ match_reg &= ~GC_MIRROR_BIT_MASK; ++ } ++ return gc2053_write_reg(gc2053->client, GC2053_FLIP_MIRROR_REG, match_reg); ++} ++ ++static int __gc2053_start_stream(struct gc2053 *gc2053) ++{ ++ int ret; ++ ++ ret = gc2053_write_array(gc2053->client, gc2053->cur_mode->reg_list); ++ if (ret) ++ return ret; ++ ++ /* In case these controls are set before streaming */ ++ mutex_unlock(&gc2053->mutex); ++ ret = v4l2_ctrl_handler_setup(&gc2053->ctrl_handler); ++ mutex_lock(&gc2053->mutex); ++ ++ ret = gc2053_set_flip(gc2053, gc2053->flip); ++ if (ret) ++ return ret; ++ ++ ret = gc2053_write_array(gc2053->client, gc2053_start); ++ if (ret) ++ return ret; ++ ++ return ret; ++} ++ ++static int __gc2053_stop_stream(struct gc2053 *gc2053) ++{ ++ int ret; ++ ++ ret = gc2053_write_array(gc2053->client, gc2053_stop); ++ if (ret) ++ return ret; ++ ++ return ret; ++} ++ ++static long gc2053_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ long ret = 0; ++ ++ dev_info(&gc2053->client->dev, "gc2053_ioctl\n"); ++ ++ switch (cmd) { ++ //case: ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++ ++#ifdef CONFIG_COMPAT ++static long gc2053_compat_ioctl32(struct v4l2_subdev *sd, ++ unsigned int cmd, unsigned long arg) ++{ ++ void __user *up = compat_ptr(arg); ++ struct module_inf *inf; ++ struct module_awb_cfg *awb_cfg; ++ long ret = 0; ++ ++ switch (cmd) { ++ case CANAANMODULE_GET_MODULE_INFO: ++ inf = kzalloc(sizeof(*inf), GFP_KERNEL); ++ if (!inf) { ++ ret = -ENOMEM; ++ return ret; ++ } ++ ++ ret = gc2053_ioctl(sd, cmd, inf); ++ if (!ret) ++ ret = copy_to_user(up, inf, sizeof(*inf)); ++ kfree(inf); ++ break; ++ case CANAANMODULE_AWB_CFG: ++ awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL); ++ if (!awb_cfg) { ++ ret = -ENOMEM; ++ return ret; ++ } ++ ++ ret = gc2053_ioctl(sd, cmd, awb_cfg); ++ if (!ret) ++ ret = copy_to_user(up, awb_cfg, sizeof(*awb_cfg)); ++ kfree(awb_cfg); ++ break; ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++ ++#endif ++ ++static int gc2053_s_stream(struct v4l2_subdev *sd, int on) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ int ret = 0; ++ ++ mutex_lock(&gc2053->mutex); ++ on = !!on; ++ if (on == gc2053->streaming) ++ goto unlock_and_return; ++ ++ if (on) { ++ ret = __gc2053_start_stream(gc2053); ++ if (ret) { ++ v4l2_err(sd, "start stream failed while write regs\n"); ++ goto unlock_and_return; ++ } ++ } else { ++ __gc2053_stop_stream(gc2053); ++ } ++ ++ gc2053->streaming = on; ++ ++unlock_and_return: ++ mutex_unlock(&gc2053->mutex); ++ return 0; ++} ++ ++static int gc2053_g_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_frame_interval *fi) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ const struct gc2053_mode *mode = gc2053->cur_mode; ++ ++ mutex_lock(&gc2053->mutex); ++ fi->interval = mode->max_fps; ++ mutex_unlock(&gc2053->mutex); ++ ++ return 0; ++} ++ ++static int gc2053_g_mbus_config(struct v4l2_subdev *sd, ++ struct v4l2_mbus_config *config) ++{ ++ u32 val = 1 << (GC2053_LANES - 1) | V4L2_MBUS_CSI2_CHANNEL_0 | ++ V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; ++ ++ config->type = V4L2_MBUS_CSI2; ++ config->flags = (val | V4L2_MBUS_CSI2_CHANNEL_1); ++ ++ return 0; ++} ++static int gc2053_enum_mbus_code(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_mbus_code_enum *code) ++{ ++ if (code->index != 0) ++ return -EINVAL; ++ code->code = GC2053_MEDIA_BUS_FMT; ++ return 0; ++} ++ ++static int gc2053_enum_frame_sizes(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_frame_size_enum *fse) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ ++ if (fse->index >= gc2053->cfg_num) ++ return -EINVAL; ++ ++ if (fse->code != GC2053_MEDIA_BUS_FMT) ++ return -EINVAL; ++ ++ fse->min_width = supported_modes[fse->index].width; ++ fse->max_width = supported_modes[fse->index].width; ++ fse->max_height = supported_modes[fse->index].height; ++ fse->min_height = supported_modes[fse->index].height; ++ return 0; ++} ++ ++static int gc2053_enum_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_frame_interval_enum *fie) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ ++ if (fie->index >= gc2053->cfg_num) ++ return -EINVAL; ++ ++ fie->code = GC2053_MEDIA_BUS_FMT; ++ fie->width = supported_modes[fie->index].width; ++ fie->height = supported_modes[fie->index].height; ++ fie->interval = supported_modes[fie->index].max_fps; ++ return 0; ++} ++ ++static int gc2053_set_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *fmt) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ const struct gc2053_mode *mode; ++ s64 h_blank, vblank_def; ++ ++ mutex_lock(&gc2053->mutex); ++ ++ mode = gc2053_find_best_fit(gc2053, fmt); ++ dev_info(&gc2053->client->dev, "set_fmt, width:%u, height:%u.\n", mode->width, mode->height); ++ ++ fmt->format.code = GC2053_MEDIA_BUS_FMT; ++ fmt->format.width = mode->width; ++ fmt->format.height = mode->height; ++ fmt->format.field = V4L2_FIELD_NONE; ++ ++ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++ *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; ++#else ++ mutex_unlock(&gc2053->mutex); ++ return -ENOTTY; ++#endif ++ } else { ++ gc2053->cur_mode = mode; ++ h_blank = mode->hts_def - mode->width; ++ __v4l2_ctrl_modify_range(gc2053->hblank, h_blank, ++ h_blank, 1, h_blank); ++ vblank_def = mode->vts_def - mode->height; ++ __v4l2_ctrl_modify_range(gc2053->vblank, vblank_def, ++ GC2053_VTS_MAX - mode->height, ++ 1, vblank_def); ++ } ++ ++ mutex_unlock(&gc2053->mutex); ++ return 0; ++} ++ ++static int gc2053_get_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *fmt) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ const struct gc2053_mode *mode = gc2053->cur_mode; ++ ++ mutex_lock(&gc2053->mutex); ++ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++ fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad); ++#else ++ mutex_unlock(&gc2053->mutex); ++ return -ENOTTY; ++#endif ++ } else { ++ fmt->format.width = mode->width; ++ fmt->format.height = mode->height; ++ fmt->format.code = GC2053_MEDIA_BUS_FMT; ++ fmt->format.field = V4L2_FIELD_NONE; ++ } ++ mutex_unlock(&gc2053->mutex); ++ return 0; ++} ++ ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++static int gc2053_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ struct v4l2_mbus_framefmt *try_fmt = ++ v4l2_subdev_get_try_format(sd, fh->pad, 0); ++ const struct gc2053_mode *def_mode = &supported_modes[0]; ++ ++ mutex_lock(&gc2053->mutex); ++ /* Initialize try_fmt */ ++ try_fmt->width = def_mode->width; ++ try_fmt->height = def_mode->height; ++ try_fmt->code = GC2053_MEDIA_BUS_FMT; ++ try_fmt->field = V4L2_FIELD_NONE; ++ ++ mutex_unlock(&gc2053->mutex); ++ /* No crop or compose */ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++static const struct v4l2_subdev_internal_ops gc2053_internal_ops = { ++ .open = gc2053_open, ++}; ++#endif ++ ++static int gc2053_s_power(struct v4l2_subdev *sd, int on) ++{ ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ int ret = 0; ++ ++ mutex_lock(&gc2053->mutex); ++ ++ /* If the power state is not modified - no work to do. */ ++ if (gc2053->power_on == !!on) ++ goto unlock_and_return; ++ ++ if (on) { ++ gc2053->power_on = true; ++ } else { ++ gc2053->power_on = false; ++ } ++ ++unlock_and_return: ++ mutex_unlock(&gc2053->mutex); ++ ++ return ret; ++} ++ ++static const struct v4l2_subdev_core_ops gc2053_core_ops = { ++ .s_power = gc2053_s_power, ++ .ioctl = gc2053_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl32 = gc2053_compat_ioctl32, ++#endif ++}; ++ ++static const struct v4l2_subdev_video_ops gc2053_video_ops = { ++ .s_stream = gc2053_s_stream, ++ .g_frame_interval = gc2053_g_frame_interval, ++ .g_mbus_config = gc2053_g_mbus_config, ++}; ++ ++static const struct v4l2_subdev_pad_ops gc2053_pad_ops = { ++ .enum_mbus_code = gc2053_enum_mbus_code, ++ .enum_frame_size = gc2053_enum_frame_sizes, ++ .enum_frame_interval = gc2053_enum_frame_interval, ++ .get_fmt = gc2053_get_fmt, ++ .set_fmt = gc2053_set_fmt, ++}; ++ ++static const struct v4l2_subdev_ops gc2053_subdev_ops = { ++ .core = &gc2053_core_ops, ++ .video = &gc2053_video_ops, ++ .pad = &gc2053_pad_ops, ++}; ++ ++static int gc2053_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct device *dev = &client->dev; ++ struct device_node *node = dev->of_node; ++ struct gc2053 *gc2053; ++ struct v4l2_subdev *sd; ++ char facing[2]; ++ int ret; ++ ++ dev_info(dev, "driver version: %02x.%02x.%02x", ++ DRIVER_VERSION >> 16, ++ (DRIVER_VERSION & 0xff00) >> 8, ++ DRIVER_VERSION & 0x00ff); ++ ++ gc2053 = devm_kzalloc(dev, sizeof(*gc2053), GFP_KERNEL); ++ if (!gc2053) ++ return -ENOMEM; ++ ++ gc2053->client = client; ++ ret = of_property_read_u32(node, CANAANMODULE_CAMERA_MODULE_INDEX, ++ &gc2053->module_index); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_MODULE_FACING, ++ &gc2053->module_facing); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_MODULE_NAME, ++ &gc2053->module_name); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_LENS_NAME, ++ &gc2053->len_name); ++ if (ret) { ++ dev_err(dev, "could not get module information!\n"); ++ return -EINVAL; ++ } ++ ++ gc2053->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); ++ if (IS_ERR(gc2053->reset_gpio)) ++ dev_warn(dev, "Failed to get reset-gpios\n"); ++ ++ gc2053->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW); ++ if (IS_ERR(gc2053->pwdn_gpio)) ++ dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n"); ++ ++ if (gpiod_export(gc2053->reset_gpio, 0)) { ++ dev_err(dev, "gpiod export gc2053 reset failed."); ++ } ++ ++ if (gpiod_export(gc2053->pwdn_gpio, 0)) { ++ dev_err(dev, "gpiod export gc2053 powerdown failed."); ++ } ++ ++ ret = gc2053_parse_of(gc2053); ++ if (ret != 0) ++ return -EINVAL; ++ ++ /* 1920 * 1080 by default */ ++ gc2053->cur_mode = &supported_modes[0]; ++ gc2053->cfg_num = ARRAY_SIZE(supported_modes); ++ ++ mutex_init(&gc2053->mutex); ++ ++ sd = &gc2053->subdev; ++ v4l2_i2c_subdev_init(sd, client, &gc2053_subdev_ops); ++ ret = gc2053_initialize_controls(gc2053); ++ if (ret) ++ goto err_destroy_mutex; ++ ++ ret = __gc2053_power_on(gc2053); ++ if (ret) ++ goto err_free_handler; ++ ++ ret = gc2053_check_sensor_id(gc2053, client); ++ if (ret) ++ goto err_power_off; ++ ++ sd->internal_ops = &gc2053_internal_ops; ++ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | ++ V4L2_SUBDEV_FL_HAS_EVENTS; ++ ++ gc2053->pad.flags = MEDIA_PAD_FL_SOURCE; ++ sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; ++ ret = media_entity_pads_init(&sd->entity, 1, &gc2053->pad); ++ if (ret < 0) ++ goto err_power_off; ++ ++ memset(facing, 0, sizeof(facing)); ++ if (strcmp(gc2053->module_facing, "back") == 0) ++ facing[0] = 'b'; ++ else ++ facing[0] = 'f'; ++ ++ snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s", ++ gc2053->module_index, facing, ++ GC2053_NAME, dev_name(sd->dev)); ++ ++ ret = v4l2_async_register_subdev_sensor_common(sd); ++ if (ret) { ++ dev_err(dev, "v4l2 async register subdev failed\n"); ++ goto err_clean_entity; ++ } ++ ++ return 0; ++ ++err_clean_entity: ++#if defined(CONFIG_MEDIA_CONTROLLER) ++ media_entity_cleanup(&sd->entity); ++#endif ++ ++err_power_off: ++ __gc2053_power_off(gc2053); ++err_free_handler: ++ v4l2_ctrl_handler_free(&gc2053->ctrl_handler); ++ ++err_destroy_mutex: ++ mutex_destroy(&gc2053->mutex); ++ return ret; ++} ++ ++static int gc2053_remove(struct i2c_client *client) ++{ ++ struct v4l2_subdev *sd = i2c_get_clientdata(client); ++ struct gc2053 *gc2053 = to_gc2053(sd); ++ ++ v4l2_async_unregister_subdev(sd); ++#if defined(CONFIG_MEDIA_CONTROLLER) ++ media_entity_cleanup(&sd->entity); ++#endif ++ v4l2_ctrl_handler_free(&gc2053->ctrl_handler); ++ mutex_destroy(&gc2053->mutex); ++ ++ pm_runtime_disable(&client->dev); ++ if (!pm_runtime_status_suspended(&client->dev)) ++ __gc2053_power_off(gc2053); ++ pm_runtime_set_suspended(&client->dev); ++ return 0; ++} ++ ++static const struct i2c_device_id gc2053_match_id[] = { ++ { "gc2053", 0 }, ++ { }, ++}; ++ ++#if IS_ENABLED(CONFIG_OF) ++static const struct of_device_id gc2053_of_match[] = { ++ { .compatible = "galaxycore,gc2053" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, gc2053_of_match); ++#endif ++ ++static struct i2c_driver gc2053_i2c_driver = { ++ .driver = { ++ .name = GC2053_NAME, ++ .of_match_table = of_match_ptr(gc2053_of_match), ++ }, ++ .probe = &gc2053_probe, ++ .remove = &gc2053_remove, ++ .id_table = gc2053_match_id, ++}; ++ ++module_i2c_driver(gc2053_i2c_driver); ++MODULE_DESCRIPTION("GC2035 CMOS Image Sensor driver"); ++MODULE_LICENSE("GPL v2"); ++ +diff --git a/drivers/media/i2c/soc_camera/canaanchip/gc2093.c b/drivers/media/i2c/soc_camera/canaanchip/gc2093.c +new file mode 100755 +index 00000000..d2832b73 +--- /dev/null ++++ b/drivers/media/i2c/soc_camera/canaanchip/gc2093.c +@@ -0,0 +1,1522 @@ ++/* ++ * Driver for GC2093 CMOS Image Sensor ++ * ++ * Copyright (C) 2022, Canaan Bright Sight Co., Ltd ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01) ++#define GC2093_NAME "gc2093" ++#define GC2093_MEDIA_BUS_FMT MEDIA_BUS_FMT_SRGGB10_1X10 ++ ++#define MIPI_FREQ_297M 297000000 ++#define MIPI_FREQ_396M 396000000 ++ ++#define GC2093_XVCLK_FREQ 24000000 ++ ++#define GC2093_REG_CHIP_ID_H 0x03F0 ++#define GC2093_REG_CHIP_ID_L 0x03F1 ++ ++#define GC2093_REG_EXP_SHORT_H 0x0001 ++#define GC2093_REG_EXP_SHORT_L 0x0002 ++#define GC2093_REG_EXP_LONG_H 0x0003 ++#define GC2093_REG_EXP_LONG_L 0x0004 ++ ++#define GC2093_MIRROR_FLIP_REG 0x0017 ++#define MIRROR_MASK BIT(0) ++#define FLIP_MASK BIT(1) ++ ++#define GC2093_REG_CTRL_MODE 0x003E ++#define GC2093_MODE_SW_STANDBY 0x11 ++#define GC2093_MODE_STREAMING 0x91 ++ ++#define GC2093_CHIP_ID 0x2093 ++ ++#define GC2093_VTS_MAX 0x3FFF ++#define GC2093_HTS_MAX 0xFFF ++ ++#define GC2093_EXPOSURE_MAX 0x3FFF ++#define GC2093_EXPOSURE_MIN 1 ++#define GC2093_EXPOSURE_STEP 1 ++ ++#define GC2093_GAIN_MIN 0x40 ++#define GC2093_GAIN_MAX 0x2000 ++#define GC2093_GAIN_STEP 1 ++#define GC2093_GAIN_DEFAULT 64 ++ ++#define GC2093_LANES 2 ++ ++#define REG_NULL 0xFFFF ++ ++#define to_gc2093(sd) container_of(sd, struct gc2093, subdev) ++ ++enum { ++ LINK_FREQ_297M_INDEX, ++ LINK_FREQ_396M_INDEX, ++}; ++ ++struct gc2093_reg { ++ u16 addr; ++ u8 val; ++}; ++ ++struct gain_reg_config { ++ u32 value; ++ u16 analog_gain; ++ u16 col_gain; ++ u16 analog_sw; ++ u16 ram_width; ++}; ++ ++struct gc2093_mode { ++ u32 width; ++ u32 height; ++ struct v4l2_fract max_fps; ++ u32 hts_def; ++ u32 vts_def; ++ u32 exp_def; ++ u32 link_freq_index; ++ const struct gc2093_reg *reg_list; ++}; ++ ++struct gc2093 { ++ struct i2c_client *client; ++ struct gpio_desc *reset_gpio; ++ struct gpio_desc *pwdn_gpio; ++ ++ struct v4l2_subdev subdev; ++ struct media_pad pad; ++ struct v4l2_ctrl_handler ctrl_handler; ++ struct v4l2_ctrl *exposure; ++ struct v4l2_ctrl *anal_gain; ++ struct v4l2_ctrl *hblank; ++ struct v4l2_ctrl *vblank; ++ struct v4l2_ctrl *h_flip; ++ struct v4l2_ctrl *v_flip; ++ struct v4l2_ctrl *link_freq; ++ struct v4l2_ctrl *pixel_rate; ++ ++ struct mutex lock; ++ bool streaming; ++ bool power_on; ++ unsigned int cfg_num; ++ const struct gc2093_mode *cur_mode; ++ ++ u32 module_index; ++ const char *module_facing; ++ const char *module_name; ++ const char *len_name; ++ ++ bool has_init_exp; ++}; ++ ++static const s64 link_freq_menu_items[] = { ++ MIPI_FREQ_297M, ++ MIPI_FREQ_396M, ++}; ++ ++/* ++ * window size=800*1080 mipi@2lane ++ * mclk=24M mipi_clk=792Mbps ++ * pixel_line_total=2640 line_frame_total=2500 ++ * row_time=13.3333us frame_rate=30fps ++ */ ++static const struct gc2093_reg gc2093_800x1080_linear_30fps_settings[] = { ++ /****system****/ ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0x00}, ++ {0x03f2, 0x00}, ++ {0x03f3, 0x00}, ++ {0x03f4, 0x36}, ++ {0x03f5, 0xc0}, ++ {0x03f6, 0x0b}, ++ {0x03f7, 0x11}, ++ {0x03f8, 0x58}, ++ {0x03f9, 0x42}, ++ {0x03fc, 0x8e}, ++ /****CISCTL & ANALOG****/ ++ {0x0087, 0x18}, ++ {0x00ee, 0x30}, ++ {0x00d0, 0xbf}, ++ {0x01a0, 0x00}, ++ {0x01a4, 0x40}, ++ {0x01a5, 0x40}, ++ {0x01a6, 0x40}, ++ {0x01af, 0x09}, ++ {0x0003, 0x04}, ++ {0x0004, 0x65}, ++ {0x0005, 0x05}, ++ {0x0006, 0x78}, ++ {0x0007, 0x00}, //VB[13:8] ++ {0x0008, 0x11}, //VB[7:0] ++ {0x0009, 0x00}, //Row Start[10:8] ++ {0x000a, 0x02}, //Row Start[7:0] ++ {0x000b, 0x00}, //Col Start[10:8] ++ {0x000c, 0x04}, //Col Start[7:0] ++ {0x000d, 0x04}, //Window height[10:8] 1088 ++ {0x000e, 0x40}, //Window height[7:0] ++ {0x000f, 0x07}, //Window width[11:8] 1932 ++ {0x0010, 0x8c}, //Window width[7:0] ++ {0x0013, 0x15}, ++ {0x0019, 0x0c}, ++ {0x0041, 0x09}, //FrameLength[13:8] 09c4=2500 ++ {0x0042, 0xc4}, //FrameLength[7:0] ++ {0x0053, 0x60}, ++ {0x008d, 0x92}, ++ {0x0090, 0x00}, ++ {0x00c7, 0xe1}, ++ {0x001b, 0x73}, ++ {0x0028, 0x0d}, ++ {0x0029, 0x40}, ++ {0x002b, 0x04}, ++ {0x002e, 0x23}, ++ {0x0037, 0x03}, ++ {0x0043, 0x04}, ++ {0x0044, 0x30}, ++ {0x004a, 0x01}, ++ {0x004b, 0x28}, ++ {0x0055, 0x30}, ++ {0x0066, 0x3f}, ++ {0x0068, 0x3f}, ++ {0x006b, 0x44}, ++ {0x0077, 0x00}, ++ {0x0078, 0x20}, ++ {0x007c, 0xa1}, ++ {0x00ce, 0x7c}, ++ {0x00d3, 0xd4}, ++ {0x00e6, 0x50}, ++ /*gain*/ ++ {0x00b6, 0xc0}, ++ {0x00b0, 0x68},//0x60 ++ /*isp*/ ++ {0x0101, 0x0c}, ++ {0x0102, 0x89}, ++ {0x0104, 0x01}, ++ {0x010f, 0x00}, ++ {0x0158, 0x00}, ++ {/*dark sun*/}, ++ {0x0123, 0x08}, ++ {0x0123, 0x00}, ++ {0x0120, 0x01}, ++ {0x0121, 0x04}, ++ {0x0122, 0xd8}, ++ {0x0124, 0x03}, ++ {0x0125, 0xff}, ++ {0x001a, 0x8c}, ++ {0x00c6, 0xe0}, ++ /*blk*/ ++ {0x0026, 0x30}, ++ {0x0142, 0x00}, ++ {0x0149, 0x1e}, ++ {0x014a, 0x0f}, ++ {0x014b, 0x00}, ++ {0x0155, 0x07}, ++ {0x0414, 0x78}, ++ {0x0415, 0x78}, ++ {0x0416, 0x78}, ++ {0x0417, 0x78}, ++ {0x0454, 0x78}, ++ {0x0455, 0x78}, ++ {0x0456, 0x78}, ++ {0x0457, 0x78}, ++ {0x04e0, 0x18}, ++ /*window*/ ++ {0x0191, 0x00}, //Out Window Y1[10:8] ++ {0x0192, 0x02}, //Out Window Y1[7:0] ++ {0x0193, 0x02}, //Out Window X1[11:8] ++ {0x0194, 0x2f}, //Out Window X1[7:0] ++ {0x0195, 0x04}, //Out Window Height[10:8] 1080=0438 ++ {0x0196, 0x38}, //Out Window Height[7:0] ++ {0x0197, 0x03}, //Out Window Width[11:8] 1920=0780 ++ {0x0198, 0x20}, //Out Window Width[7:0] 800=0320 ++ /****DVP & MIPI****/ ++ {0x019a, 0x06}, ++ {0x007b, 0x2a}, ++ {0x0023, 0x2d}, ++ {0x0201, 0x27}, ++ {0x0202, 0x5f}, ++ {0x0203, 0xce}, ++ {0x0212, 0x20}, ++ {0x0213, 0x03}, ++ {0x0215, 0x10}, ++ {REG_NULL, 0x00}, ++}; ++ ++/* ++ * window size=1920*1080 mipi@2lane ++ * mclk=24M mipi_clk=792Mbps ++ * pixel_line_total= line_frame_total=2500 ++ * row_time=13.3333us frame_rate=30fps ++ */ ++static const struct gc2093_reg gc2093_1080p_linear_30fps_settings[] = { ++ /****system****/ ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0x00}, ++ {0x03f2, 0x00}, ++ {0x03f3, 0x00}, ++ {0x03f4, 0x36}, ++ {0x03f5, 0xc0}, ++ {0x03f6, 0x0B}, ++ {0x03f7, 0x01}, ++ {0x03f8, 0x63}, ++ {0x03f9, 0x40}, ++ {0x03fc, 0x8e}, ++ /****CISCTL & ANALOG****/ ++ {0x0087, 0x18}, ++ {0x00ee, 0x30}, ++ {0x00d0, 0xbf}, ++ {0x01a0, 0x00}, ++ {0x01a4, 0x40}, ++ {0x01a5, 0x40}, ++ {0x01a6, 0x40}, ++ {0x01af, 0x09}, ++ {0x0001, 0x00}, ++ {0x0002, 0x02}, ++ {0x0003, 0x04}, //shutter time[13:8] ++ {0x0004, 0x02}, //shutter time[7:0] ++ {0x0005, 0x02}, //Line length[11:8] ++ {0x0006, 0x94}, //Line length[7:0] ++ {0x0007, 0x00}, //VB[13:8] ++ {0x0008, 0x11}, //VB[7:0] ++ {0x0009, 0x00}, //Row Start[10:8] ++ {0x000a, 0x02}, //Row Start[7:0] ++ {0x000b, 0x00}, //Col Start[10:8] ++ {0x000c, 0x04}, //Col Start[7:0] ++ {0x000d, 0x04}, //Window height[10:8] 1088 ++ {0x000e, 0x40}, //Window height[7:0] ++ {0x000f, 0x07}, //Window width[11:8] 1932 ++ {0x0010, 0x8c}, //Window width[7:0] ++ {0x0013, 0x15}, ++ {0x0013, 0x15}, ++ {0x0019, 0x0c}, ++ {0x0041, 0x09}, //FrameLength[13:8] 09c4=2500 ++ {0x0042, 0xc4}, //FrameLength[7:0] ++ {0x0053, 0x60}, ++ {0x008d, 0x92}, ++ {0x0090, 0x00}, ++ {0x00c7, 0xe1}, ++ {0x001b, 0x73}, ++ {0x0028, 0x0d}, ++ {0x0029, 0x24}, ++ {0x002b, 0x04}, ++ {0x002e, 0x23}, ++ {0x0037, 0x03}, ++ {0x0043, 0x04}, ++ {0x0044, 0x28}, ++ {0x004a, 0x01}, ++ {0x004b, 0x20}, ++ {0x0055, 0x28}, ++ {0x0066, 0x3f}, ++ {0x0068, 0x3f}, ++ {0x006b, 0x44}, ++ {0x0077, 0x00}, ++ {0x0078, 0x20}, ++ {0x007c, 0xa1}, ++ {0x00ce, 0x7c}, ++ {0x00d3, 0xd4}, ++ {0x00e6, 0x50}, ++ /*gain*/ ++ {0x00b6, 0xc0}, ++ {0x00b0, 0x68},//0x60 ++ /*isp*/ ++ {0x0101, 0x0c}, ++ {0x0102, 0x89}, ++ {0x0104, 0x01}, ++ {0x010f, 0x00}, ++ {0x0158, 0x00}, ++ {/*dark sun*/}, ++ {0x0123, 0x08}, ++ {0x0123, 0x00}, ++ {0x0120, 0x01}, ++ {0x0121, 0x04}, ++ {0x0122, 0xd8}, ++ {0x0124, 0x03}, ++ {0x0125, 0xff}, ++ {0x001a, 0x8c}, ++ {0x00c6, 0xe0}, ++ /*blk*/ ++ {0x0026, 0x30}, ++ {0x0142, 0x00}, ++ {0x0149, 0x1e}, ++ {0x014a, 0x0f}, ++ {0x014b, 0x00}, ++ {0x0155, 0x07}, ++ {0x0414, 0x78}, ++ {0x0415, 0x78}, ++ {0x0416, 0x78}, ++ {0x0417, 0x78}, ++ {0x0454, 0x78}, ++ {0x0455, 0x78}, ++ {0x0456, 0x78}, ++ {0x0457, 0x78}, ++ {0x04e0, 0x18}, ++ /*window*/ ++ {0x0192, 0x02}, //Out Window Y1[7:0] ++ {0x0194, 0x03}, //Out Window X1[7:0] ++ {0x0195, 0x04}, //Out Window Height[10:8] ++ {0x0196, 0x38}, //Out Window Height[7:0] ++ {0x0197, 0x07}, //Out Window Width[11:8] ++ {0x0198, 0x80}, //Out Window Width[7:0] ++ /****DVP & MIPI****/ ++ {0x019a, 0x06}, ++ {0x007b, 0x2a}, ++ {0x0023, 0x2d}, ++ {0x0201, 0x27}, ++ {0x0202, 0x56}, ++ {0x0203, 0xce}, ++ {0x0212, 0x80}, ++ {0x0213, 0x07}, ++ {0x0215, 0x10}, ++ {REG_NULL, 0x00}, ++}; ++ ++/* ++ * window size=1920*1080 mipi@2lane ++ * mclk=24M mipi_clk=792Mbps ++ * pixel_line_total=2640 line_frame_total=1250 ++ * row_time=13.3333us frame_rate=60fps ++ */ ++static const struct gc2093_reg gc2093_1080p_linear_60fps_settings[] = { ++ /****system****/ ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0x00}, ++ {0x03f2, 0x00}, ++ {0x03f3, 0x00}, ++ {0x03f4, 0x36}, ++ {0x03f5, 0xc0}, ++ {0x03f6, 0x0B}, ++ {0x03f7, 0x01}, ++ {0x03f8, 0x63}, ++ {0x03f9, 0x40}, ++ {0x03fc, 0x8e}, ++ /****CISCTL & ANALOG****/ ++ {0x0087, 0x18}, ++ {0x00ee, 0x30}, ++ {0x00d0, 0xbf}, ++ {0x01a0, 0x00}, ++ {0x01a4, 0x40}, ++ {0x01a5, 0x40}, ++ {0x01a6, 0x40}, ++ {0x01af, 0x09}, ++ {0x0001, 0x00}, ++ {0x0002, 0x02}, ++ {0x0003, 0x04}, //shutter time[13:8] ++ {0x0004, 0x02}, //shutter time[7:0] ++ {0x0005, 0x02}, //Line length[11:8] ++ {0x0006, 0x94}, //Line length[7:0] ++ {0x0007, 0x00}, //VB[13:8] ++ {0x0008, 0x11}, //VB[7:0] ++ {0x0009, 0x00}, //Row Start[10:8] ++ {0x000a, 0x02}, //Row Start[7:0] ++ {0x000b, 0x00}, //Col Start[10:8] ++ {0x000c, 0x04}, //Col Start[7:0] ++ {0x000d, 0x04}, //Window height[10:8] 1088 ++ {0x000e, 0x40}, //Window height[7:0] ++ {0x000f, 0x07}, //Window width[11:8] 1932 ++ {0x0010, 0x8c}, //Window width[7:0] ++ {0x0013, 0x15}, ++ {0x0013, 0x15}, ++ {0x0019, 0x0c}, ++ {0x0041, 0x04}, //FrameLength[13:8] 09c4=2500 ++ {0x0042, 0xe2}, //FrameLength[7:0] ++ {0x0053, 0x60}, ++ {0x008d, 0x92}, ++ {0x0090, 0x00}, ++ {0x00c7, 0xe1}, ++ {0x001b, 0x73}, ++ {0x0028, 0x0d}, ++ {0x0029, 0x24}, ++ {0x002b, 0x04}, ++ {0x002e, 0x23}, ++ {0x0037, 0x03}, ++ {0x0043, 0x04}, ++ {0x0044, 0x28}, ++ {0x004a, 0x01}, ++ {0x004b, 0x20}, ++ {0x0055, 0x28}, ++ {0x0066, 0x3f}, ++ {0x0068, 0x3f}, ++ {0x006b, 0x44}, ++ {0x0077, 0x00}, ++ {0x0078, 0x20}, ++ {0x007c, 0xa1}, ++ {0x00ce, 0x7c}, ++ {0x00d3, 0xd4}, ++ {0x00e6, 0x50}, ++ /*gain*/ ++ {0x00b6, 0xc0}, ++ {0x00b0, 0x68},//0x60 ++ /*isp*/ ++ {0x0101, 0x0c}, ++ {0x0102, 0x89}, ++ {0x0104, 0x01}, ++ {0x010f, 0x00}, ++ {0x0158, 0x00}, ++ {/*dark sun*/}, ++ {0x0123, 0x08}, ++ {0x0123, 0x00}, ++ {0x0120, 0x01}, ++ {0x0121, 0x04}, ++ {0x0122, 0xd8}, ++ {0x0124, 0x03}, ++ {0x0125, 0xff}, ++ {0x001a, 0x8c}, ++ {0x00c6, 0xe0}, ++ /*blk*/ ++ {0x0026, 0x30}, ++ {0x0142, 0x00}, ++ {0x0149, 0x1e}, ++ {0x014a, 0x0f}, ++ {0x014b, 0x00}, ++ {0x0155, 0x07}, ++ {0x0414, 0x78}, ++ {0x0415, 0x78}, ++ {0x0416, 0x78}, ++ {0x0417, 0x78}, ++ {0x0454, 0x78}, ++ {0x0455, 0x78}, ++ {0x0456, 0x78}, ++ {0x0457, 0x78}, ++ {0x04e0, 0x18}, ++ /*window*/ ++ {0x0192, 0x02}, //Out Window Y1[7:0] ++ {0x0194, 0x03}, //Out Window X1[7:0] ++ {0x0195, 0x04}, //Out Window Height[10:8] ++ {0x0196, 0x38}, //Out Window Height[7:0] ++ {0x0197, 0x07}, //Out Window Width[11:8] ++ {0x0198, 0x80}, //Out Window Width[7:0] ++ /****DVP & MIPI****/ ++ {0x019a, 0x06}, ++ {0x007b, 0x2a}, ++ {0x0023, 0x2d}, ++ {0x0201, 0x27}, ++ {0x0202, 0x56}, ++ {0x0203, 0xce}, ++ {0x0212, 0x80}, ++ {0x0213, 0x07}, ++ {0x0215, 0x10}, ++ {REG_NULL, 0x00}, ++}; ++ ++/* ++ * window size=1920*1080 mipi@2lane ++ * mclk=24M mipi_clk=792Mbps ++ * pixel_line_total=2640 line_frame_total=1250 ++ * row_time=13.3333us frame_rate=30fps ++ */ ++static const struct gc2093_reg gc2093_1080p_hdr_30fps_settings[] = { ++ /****system****/ ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0xf0}, ++ {0x03fe, 0x00}, ++ {0x03f2, 0x00}, ++ {0x03f3, 0x00}, ++ {0x03f4, 0x36}, ++ {0x03f5, 0xc0}, ++ {0x03f6, 0x0B}, ++ {0x03f7, 0x01}, ++ {0x03f8, 0x63}, ++ {0x03f9, 0x40}, ++ {0x03fc, 0x8e}, ++ /****CISCTL & ANALOG****/ ++ {0x0087, 0x18}, ++ {0x00ee, 0x30}, ++ {0x00d0, 0xbf}, ++ {0x01a0, 0x00}, ++ {0x01a4, 0x40}, ++ {0x01a5, 0x40}, ++ {0x01a6, 0x40}, ++ {0x01af, 0x09}, ++ {0x0001, 0x00}, ++ {0x0002, 0x02}, ++ {0x0003, 0x04}, //shutter time[13:8] ++ {0x0004, 0x02}, //shutter time[7:0] ++ {0x0005, 0x02}, //Line length[11:8] ++ {0x0006, 0x94}, //Line length[7:0] ++ {0x0007, 0x00}, //VB[13:8] ++ {0x0008, 0x11}, //VB[7:0] ++ {0x0009, 0x00}, //Row Start[10:8] ++ {0x000a, 0x02}, //Row Start[7:0] ++ {0x000b, 0x00}, //Col Start[10:8] ++ {0x000c, 0x04}, //Col Start[7:0] ++ {0x000d, 0x04}, //Window height[10:8] 1088 ++ {0x000e, 0x40}, //Window height[7:0] ++ {0x000f, 0x07}, //Window width[11:8] 1932 ++ {0x0010, 0x8c}, //Window width[7:0] ++ {0x0013, 0x15}, ++ {0x0013, 0x15}, ++ {0x0019, 0x0c}, ++ {0x0041, 0x04}, //FrameLength[13:8] 09c4=2500 04e2=1250 ++ {0x0042, 0xe2}, //FrameLength[7:0] ++ {0x0053, 0x60}, ++ {0x008d, 0x92}, ++ {0x0090, 0x00}, ++ {0x00c7, 0xe1}, ++ {0x001b, 0x73}, ++ {0x0028, 0x0d}, ++ {0x0029, 0x24}, ++ {0x002b, 0x04}, ++ {0x002e, 0x23}, ++ {0x0037, 0x03}, ++ {0x0043, 0x04}, ++ {0x0044, 0x28}, ++ {0x004a, 0x01}, ++ {0x004b, 0x20}, ++ {0x0055, 0x28}, ++ {0x0066, 0x3f}, ++ {0x0068, 0x3f}, ++ {0x006b, 0x44}, ++ {0x0077, 0x00}, ++ {0x0078, 0x20}, ++ {0x007c, 0xa1}, ++ {0x00ce, 0x7c}, ++ {0x00d3, 0xd4}, ++ {0x00e6, 0x50}, ++ /*gain*/ ++ {0x00b6, 0xc0}, ++ {0x00b0, 0x68},//0x60 ++ /*isp*/ ++ {0x0101, 0x0c}, ++ {0x0102, 0x89}, ++ {0x0104, 0x01}, ++ {0x010e, 0x01}, ++ {0x010f, 0x00}, ++ {0x0158, 0x00}, ++ {/*dark sun*/}, ++ {0x0123, 0x08}, ++ {0x0123, 0x00}, ++ {0x0120, 0x01}, ++ {0x0121, 0x04}, ++ {0x0122, 0xd8}, ++ {0x0124, 0x03}, ++ {0x0125, 0xff}, ++ {0x001a, 0x8c}, ++ {0x00c6, 0xe0}, ++ /*blk*/ ++ {0x0026, 0x30}, ++ {0x0142, 0x00}, ++ {0x0149, 0x1e}, ++ {0x014a, 0x0f}, ++ {0x014b, 0x00}, ++ {0x0155, 0x07}, ++ {0x0414, 0x78}, ++ {0x0415, 0x78}, ++ {0x0416, 0x78}, ++ {0x0417, 0x78}, ++ {0x0454, 0x78}, ++ {0x0455, 0x78}, ++ {0x0456, 0x78}, ++ {0x0457, 0x78}, ++ {0x04e0, 0x18}, ++ /*window*/ ++ {0x0192, 0x02}, //Out Window Y1[7:0] ++ {0x0194, 0x03}, //Out Window X1[7:0] ++ {0x0195, 0x04}, //Out Window Height[10:8] ++ {0x0196, 0x38}, //Out Window Height[7:0] ++ {0x0197, 0x07}, //Out Window Width[11:8] ++ {0x0198, 0x80}, //Out Window Width[7:0] ++ /****DVP & MIPI****/ ++ {0x019a, 0x06}, ++ {0x007b, 0x2a}, ++ {0x0023, 0x2d}, ++ {0x0201, 0x27}, ++ {0x0202, 0x5f}, ++ {0x0203, 0xce}, ++ {0x0212, 0x80}, ++ {0x0213, 0x07}, ++ {0x0215, 0x10}, ++ /****HDR EN****/ ++ {0x0027, 0x71}, ++ {0x0215, 0x92}, ++ {0x024d, 0x01}, ++ //{0x001a, 0x9c}, //exp_exp2_th_mode ++ //{0x005a, 0x00}, //exp_exp2_th ++ //{0x005b, 0x49}, //exp_exp2_th ++ {REG_NULL, 0x00}, ++}; ++ ++static const struct gc2093_mode supported_modes[] = { ++ { ++ .width = 1920, ++ .height = 1080, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 300000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0xa50,//0x898, ++ .vts_def = 0x9c4,//0x465, ++ .link_freq_index = LINK_FREQ_396M_INDEX, ++ .reg_list = gc2093_1080p_linear_30fps_settings, ++ }, ++ { ++ .width = 1920, ++ .height = 1080, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 600000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0xa50, ++ .vts_def = 0x4e2, ++ .link_freq_index = LINK_FREQ_396M_INDEX, ++ .reg_list = gc2093_1080p_linear_60fps_settings, ++ }, ++ { ++ .width = 1920, ++ .height = 1080, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 300000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0xa50, ++ .vts_def = 0x4e2, ++ .link_freq_index = LINK_FREQ_396M_INDEX, ++ .reg_list = gc2093_1080p_hdr_30fps_settings, ++ }, ++ { ++ .width = 800, ++ .height = 1080, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 300000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0xa50,//0x898, ++ .vts_def = 0x9c4,//0x465, ++ .link_freq_index = LINK_FREQ_396M_INDEX, ++ .reg_list = gc2093_800x1080_linear_30fps_settings, ++ }, ++}; ++ ++/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */ ++static u64 to_pixel_rate(u32 index) ++{ ++ u64 pixel_rate = link_freq_menu_items[index] * 2 * GC2093_LANES; ++ ++ do_div(pixel_rate, 10); ++ ++ return pixel_rate; ++} ++ ++/* sensor register write */ ++static int gc2093_write_reg(struct i2c_client *client, u16 reg, u8 val) ++{ ++ struct i2c_msg msg; ++ u8 buf[3]; ++ int ret; ++ ++ buf[0] = reg >> 8; ++ buf[1] = reg & 0xff; ++ buf[2] = val; ++ ++ msg.addr = client->addr; ++ msg.flags = client->flags; ++ msg.buf = buf; ++ msg.len = sizeof(buf); ++ ++ ret = i2c_transfer(client->adapter, &msg, 1); ++ if (ret >= 0) ++ return 0; ++ ++ dev_err(&client->dev, "write reg(0x%x val:0x%x) failed !\n", reg, val); ++ ++ return ret; ++} ++ ++static int gc2093_write_array(struct i2c_client *client, ++ const struct gc2093_reg *regs) ++{ ++ int i, ret = 0; ++ ++ i = 0; ++ while (regs[i].addr != REG_NULL) { ++ ret = gc2093_write_reg(client, regs[i].addr, regs[i].val); ++ if (ret) { ++ dev_err(&client->dev, "%s failed !\n", __func__); ++ break; ++ } ++ i++; ++ } ++ ++ return ret; ++} ++ ++/* sensor register read */ ++static int gc2093_read_reg(struct i2c_client *client, u16 reg, u8 *val) ++{ ++ u8 buf[2] = {reg >> 8, reg & 0xff}; ++ int ret; ++ struct i2c_msg msgs[] = { ++ { ++ .addr = client->addr, ++ .flags = 0, ++ .len = 2, ++ .buf = buf, ++ }, { ++ .addr = client->addr, ++ .flags = I2C_M_RD, ++ .len = 1, ++ .buf = buf, ++ }, ++ }; ++ ++ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); ++ if (ret >= 0) { ++ *val = buf[0]; ++ return 0; ++ } ++ ++ dev_err(&client->dev, "read reg(0x%x val:0x%x) failed !\n", reg, *val); ++ ++ return ret; ++} ++ ++ ++static const struct gain_reg_config gain_reg_configs[] = { ++ { 64, 0x0000, 0x0100, 0x6807, 0x00f8}, ++ { 75, 0x0010, 0x010c, 0x6807, 0x00f8}, ++ { 90, 0x0020, 0x011b, 0x6c08, 0x00f9}, ++ { 105, 0x0030, 0x012c, 0x6c0a, 0x00fa}, ++ { 122, 0x0040, 0x013f, 0x7c0b, 0x00fb}, ++ { 142, 0x0050, 0x0216, 0x7c0d, 0x00fe}, ++ { 167, 0x0060, 0x0235, 0x7c0e, 0x00ff}, ++ { 193, 0x0070, 0x0316, 0x7c10, 0x0801}, ++ { 223, 0x0080, 0x0402, 0x7c12, 0x0802}, ++ { 257, 0x0090, 0x0431, 0x7c13, 0x0803}, ++ { 299, 0x00a0, 0x0532, 0x7c15, 0x0805}, ++ { 346, 0x00b0, 0x0635, 0x7c17, 0x0807}, ++ { 397, 0x00c0, 0x0804, 0x7c18, 0x0808}, ++ { 444, 0x005a, 0x0919, 0x7c17, 0x0807}, ++ { 523, 0x0083, 0x0b0f, 0x7c17, 0x0807}, ++ { 607, 0x0093, 0x0d12, 0x7c19, 0x0809}, ++ { 700, 0x0084, 0x1000, 0x7c1b, 0x080c}, ++ { 817, 0x0094, 0x123a, 0x7c1e, 0x080f}, ++ {1131, 0x005d, 0x1a02, 0x7c23, 0x0814}, ++ {1142, 0x009b, 0x1b20, 0x7c25, 0x0816}, ++ {1334, 0x008c, 0x200f, 0x7c27, 0x0818}, ++ {1568, 0x009c, 0x2607, 0x7c2a, 0x081b}, ++ {2195, 0x00b6, 0x3621, 0x7c32, 0x0823}, ++ {2637, 0x00ad, 0x373a, 0x7c36, 0x0827}, ++ {3121, 0x00bd, 0x3d02, 0x7c3a, 0x082b}, ++}; ++ ++static int gc2093_set_gain(struct gc2093 *gc2093, u32 gain) ++{ ++ int ret, i = 0; ++ u16 pre_gain = 0; ++ ++ for (i = 0; i < ARRAY_SIZE(gain_reg_configs) - 1; i++) ++ if ((gain_reg_configs[i].value <= gain) && (gain < gain_reg_configs[i+1].value)) ++ break; ++ ++ ret = gc2093_write_reg(gc2093->client, 0x00b4, gain_reg_configs[i].analog_gain >> 8); ++ ret |= gc2093_write_reg(gc2093->client, 0x00b3, gain_reg_configs[i].analog_gain & 0xff); ++ ret |= gc2093_write_reg(gc2093->client, 0x00b8, gain_reg_configs[i].col_gain >> 8); ++ ret |= gc2093_write_reg(gc2093->client, 0x00b9, gain_reg_configs[i].col_gain & 0xff); ++ ret |= gc2093_write_reg(gc2093->client, 0x00ce, gain_reg_configs[i].analog_sw >> 8); ++ ret |= gc2093_write_reg(gc2093->client, 0x00c2, gain_reg_configs[i].analog_sw & 0xff); ++ ret |= gc2093_write_reg(gc2093->client, 0x00cf, gain_reg_configs[i].ram_width >> 8); ++ ret |= gc2093_write_reg(gc2093->client, 0x00d9, gain_reg_configs[i].ram_width & 0xff); ++ ++ pre_gain = 64 * gain / gain_reg_configs[i].value; ++ ++ ret |= gc2093_write_reg(gc2093->client, 0x00b1, (pre_gain >> 6)); ++ ret |= gc2093_write_reg(gc2093->client, 0x00b2, ((pre_gain & 0x3f) << 2)); ++ ++ return ret; ++} ++ ++static int gc2093_set_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct gc2093 *gc2093 = container_of(ctrl->handler, ++ struct gc2093, ctrl_handler); ++ s64 max; ++ int ret = 0; ++ dev_dbg(&gc2093->client->dev, "%s enter, id:0x%X val:%d.\n", __func__, ctrl->id, ctrl->val); ++ ++ /* Propagate change of current control to all related controls */ ++ switch (ctrl->id) { ++ case V4L2_CID_VBLANK: ++ /* Update max exposure while meeting expected vblanking */ ++ max = gc2093->cur_mode->height + ctrl->val - 1; ++ __v4l2_ctrl_modify_range(gc2093->exposure, ++ gc2093->exposure->minimum, max, ++ gc2093->exposure->step, ++ gc2093->exposure->default_value); ++ break; ++ } ++ ++ switch (ctrl->id) { ++ case V4L2_CID_EXPOSURE: ++ ret = gc2093_write_reg(gc2093->client, GC2093_REG_EXP_LONG_H, ++ (ctrl->val >> 8) & 0x3f); ++ ret |= gc2093_write_reg(gc2093->client, GC2093_REG_EXP_LONG_L, ++ ctrl->val & 0xff); ++ break; ++ case V4L2_CID_ANALOGUE_GAIN: ++ case V4L2_CID_GAIN: ++ gc2093_set_gain(gc2093, ctrl->val); ++ break; ++ case V4L2_CID_VBLANK: ++ /* The exposure goes up and reduces the frame rate, no need to write vb */ ++ break; ++ case V4L2_CID_HFLIP: ++ break; ++ case V4L2_CID_VFLIP: ++ break; ++ default: ++ dev_warn(&gc2093->client->dev, "%s Unhandled id:0x%x, val:0x%x\n", ++ __func__, ctrl->id, ctrl->val); ++ break; ++ } ++ ++ return ret; ++} ++ ++static const struct v4l2_ctrl_ops gc2093_ctrl_ops = { ++ .s_ctrl = gc2093_set_ctrl, ++}; ++ ++static int gc2093_initialize_controls(struct gc2093 *gc2093) ++{ ++ const struct gc2093_mode *mode; ++ struct v4l2_ctrl_handler *handler; ++ s64 exposure_max, vblank_def; ++ u32 h_blank; ++ int ret; ++ ++ handler = &gc2093->ctrl_handler; ++ mode = gc2093->cur_mode; ++ ret = v4l2_ctrl_handler_init(handler, 10); ++ if (ret) ++ return ret; ++ handler->lock = &gc2093->lock; ++ ++ gc2093->link_freq = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, ++ ARRAY_SIZE(link_freq_menu_items) - 1, 0, ++ link_freq_menu_items); ++ ++ gc2093->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, ++ 0, to_pixel_rate(LINK_FREQ_396M_INDEX), ++ 1, to_pixel_rate(LINK_FREQ_297M_INDEX)); ++ ++ h_blank = mode->hts_def - mode->width; ++ gc2093->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, ++ h_blank, h_blank, 1, h_blank); ++ if (gc2093->hblank) ++ gc2093->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ ++ vblank_def = mode->vts_def - mode->height; ++ gc2093->vblank = v4l2_ctrl_new_std(handler, &gc2093_ctrl_ops, ++ V4L2_CID_VBLANK, vblank_def, ++ GC2093_VTS_MAX - mode->height, ++ 1, vblank_def); ++ ++ exposure_max = mode->vts_def - 1; ++ gc2093->exposure = v4l2_ctrl_new_std(handler, &gc2093_ctrl_ops, ++ V4L2_CID_EXPOSURE, GC2093_EXPOSURE_MIN, ++ exposure_max, GC2093_EXPOSURE_STEP, ++ mode->exp_def); ++ ++ gc2093->anal_gain = v4l2_ctrl_new_std(handler, &gc2093_ctrl_ops, ++ V4L2_CID_ANALOGUE_GAIN, GC2093_GAIN_MIN, ++ GC2093_GAIN_MAX, GC2093_GAIN_STEP, ++ GC2093_GAIN_DEFAULT); ++ ++ v4l2_ctrl_new_std(handler, &gc2093_ctrl_ops, ++ V4L2_CID_GAIN, GC2093_GAIN_MIN, ++ GC2093_GAIN_MAX, GC2093_GAIN_STEP, ++ GC2093_GAIN_DEFAULT); ++ ++ gc2093->h_flip = v4l2_ctrl_new_std(handler, &gc2093_ctrl_ops, ++ V4L2_CID_HFLIP, 0, 1, 1, 0); ++ ++ gc2093->v_flip = v4l2_ctrl_new_std(handler, &gc2093_ctrl_ops, ++ V4L2_CID_VFLIP, 0, 1, 1, 0); ++ ++ if (handler->error) { ++ ret = handler->error; ++ dev_err(&gc2093->client->dev, "Failed to init controls(%d)\n", ret); ++ goto err_free_handler; ++ } ++ ++ gc2093->subdev.ctrl_handler = handler; ++ gc2093->has_init_exp = false; ++ ++ return 0; ++ ++err_free_handler: ++ v4l2_ctrl_handler_free(handler); ++ return ret; ++} ++ ++/* Calculate the delay in us by clock rate and clock cycles */ ++static inline u32 gc2093_cal_delay(u32 cycles) ++{ ++ return DIV_ROUND_UP(cycles, GC2093_XVCLK_FREQ / 1000 / 1000); ++} ++ ++static int __gc2093_power_on(struct gc2093 *gc2093) ++{ ++ u32 delay_us; ++ ++ if (!IS_ERR(gc2093->reset_gpio)) { ++ gpiod_set_value_cansleep(gc2093->reset_gpio, 1); ++ usleep_range(100, 200); ++ } ++ if (!IS_ERR(gc2093->pwdn_gpio)) ++ gpiod_set_value_cansleep(gc2093->pwdn_gpio, 0); ++ ++ if (!IS_ERR(gc2093->reset_gpio)) ++ gpiod_set_value_cansleep(gc2093->reset_gpio, 0); ++ usleep_range(3000, 6000); ++ /* 8192 cycles prior to first SCCB transaction */ ++ delay_us = gc2093_cal_delay(8192); ++ usleep_range(delay_us, delay_us * 2); ++ return 0; ++} ++ ++ ++static void __gc2093_power_off(struct gc2093 *gc2093) ++{ ++ if (!IS_ERR(gc2093->reset_gpio)) ++ gpiod_set_value_cansleep(gc2093->reset_gpio, 1); ++ if (!IS_ERR(gc2093->pwdn_gpio)) ++ gpiod_set_value_cansleep(gc2093->pwdn_gpio, 0); ++} ++ ++static int gc2093_check_sensor_id(struct gc2093 *gc2093) ++{ ++ struct device *dev = &gc2093->client->dev; ++ u8 id_h = 0, id_l = 0; ++ u16 id = 0; ++ int ret = 0; ++ ++ ret = gc2093_read_reg(gc2093->client, GC2093_REG_CHIP_ID_H, &id_h); ++ ret |= gc2093_read_reg(gc2093->client, GC2093_REG_CHIP_ID_L, &id_l); ++ if (ret) { ++ dev_err(dev, "Failed to read sensor id, (%d)\n", ret); ++ return ret; ++ } ++ ++ id = id_h << 8 | id_l; ++ if (id != GC2093_CHIP_ID) { ++ dev_err(dev, "sensor id: %04X mismatched\n", id); ++ return -ENODEV; ++ } ++ ++ dev_info(dev, "Detected GC2093 sensor\n"); ++ return 0; ++} ++ ++static long gc2093_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ long ret = 0; ++ ++ dev_info(&gc2093->client->dev, "gc2093_ioctl\n"); ++ ++ switch (cmd) { ++ //case: ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++ ++static int __gc2093_start_stream(struct gc2093 *gc2093) ++{ ++ int ret; ++ dev_info(&gc2093->client->dev, "%s enter\n",__func__); ++ ++ ret = gc2093_write_array(gc2093->client, gc2093->cur_mode->reg_list); ++ if (ret) ++ return ret; ++ ++ /* Apply customized control from user */ ++ mutex_unlock(&gc2093->lock); ++ v4l2_ctrl_handler_setup(&gc2093->ctrl_handler); ++ mutex_lock(&gc2093->lock); ++ ++ return gc2093_write_reg(gc2093->client, GC2093_REG_CTRL_MODE, ++ GC2093_MODE_STREAMING); ++} ++ ++static int __gc2093_stop_stream(struct gc2093 *gc2093) ++{ ++ gc2093->has_init_exp = false; ++ return gc2093_write_reg(gc2093->client, GC2093_REG_CTRL_MODE, ++ GC2093_MODE_SW_STANDBY); ++} ++ ++#ifdef CONFIG_COMPAT ++static long gc2093_compat_ioctl32(struct v4l2_subdev *sd, ++ unsigned int cmd, unsigned long arg) ++{ ++ void __user *up = compat_ptr(arg); ++ struct module_inf *inf; ++ struct module_awb_cfg *awb_cfg; ++ long ret = 0; ++ ++ switch (cmd) { ++ case CANAANMODULE_GET_MODULE_INFO: ++ inf = kzalloc(sizeof(*inf), GFP_KERNEL); ++ if (!inf) { ++ ret = -ENOMEM; ++ return ret; ++ } ++ ++ ret = gc2093_ioctl(sd, cmd, inf); ++ if (!ret) ++ ret = copy_to_user(up, inf, sizeof(*inf)); ++ kfree(inf); ++ break; ++ case CANAANMODULE_AWB_CFG: ++ awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL); ++ if (!awb_cfg) { ++ ret = -ENOMEM; ++ return ret; ++ } ++ ++ ret = gc2093_ioctl(sd, cmd, awb_cfg); ++ if (!ret) ++ ret = copy_to_user(up, awb_cfg, sizeof(*awb_cfg)); ++ kfree(awb_cfg); ++ break; ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++#endif ++ ++static int gc2093_s_stream(struct v4l2_subdev *sd, int on) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ int ret = 0; ++ ++ mutex_lock(&gc2093->lock); ++ on = !!on; ++ if (on == gc2093->streaming) ++ goto unlock_and_return; ++ ++ if (on) { ++ ret = __gc2093_start_stream(gc2093); ++ if (ret) { ++ dev_err(&gc2093->client->dev, "Failed to start gc2093 stream\n"); ++ goto unlock_and_return; ++ } ++ } else { ++ __gc2093_stop_stream(gc2093); ++ } ++ ++ gc2093->streaming = on; ++ ++unlock_and_return: ++ mutex_unlock(&gc2093->lock); ++ return 0; ++} ++ ++static int gc2093_g_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_frame_interval *fi) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ const struct gc2093_mode *mode = gc2093->cur_mode; ++ ++ mutex_lock(&gc2093->lock); ++ fi->interval = mode->max_fps; ++ mutex_unlock(&gc2093->lock); ++ ++ return 0; ++} ++ ++static int gc2093_g_mbus_config(struct v4l2_subdev *sd, ++ struct v4l2_mbus_config *config) ++{ ++ u32 val = 1 << (GC2093_LANES - 1) | V4L2_MBUS_CSI2_CHANNEL_0 | ++ V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; ++ ++ config->type = V4L2_MBUS_CSI2; ++ config->flags = (val | V4L2_MBUS_CSI2_CHANNEL_1); ++ ++ return 0; ++} ++ ++static int gc2093_enum_mbus_code(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_mbus_code_enum *code) ++{ ++ if (code->index != 0) ++ return -EINVAL; ++ code->code = GC2093_MEDIA_BUS_FMT; ++ return 0; ++} ++ ++static int gc2093_enum_frame_sizes(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_frame_size_enum *fse) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ ++ if (fse->index >= gc2093->cfg_num) ++ return -EINVAL; ++ ++ if (fse->code != GC2093_MEDIA_BUS_FMT) ++ return -EINVAL; ++ ++ fse->min_width = supported_modes[fse->index].width; ++ fse->max_width = supported_modes[fse->index].width; ++ fse->max_height = supported_modes[fse->index].height; ++ fse->min_height = supported_modes[fse->index].height; ++ return 0; ++} ++ ++static int gc2093_enum_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_frame_interval_enum *fie) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ ++ if (fie->index >= gc2093->cfg_num) ++ return -EINVAL; ++ ++ fie->code = GC2093_MEDIA_BUS_FMT; ++ fie->width = supported_modes[fie->index].width; ++ fie->height = supported_modes[fie->index].height; ++ fie->interval = supported_modes[fie->index].max_fps; ++ return 0; ++} ++ ++static int gc2093_set_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *fmt) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ const struct gc2093_mode *mode; ++ s64 h_blank, vblank_def; ++ ++ mutex_lock(&gc2093->lock); ++ ++ mode = v4l2_find_nearest_size(supported_modes, ++ ARRAY_SIZE(supported_modes), ++ width, height, ++ fmt->format.width, fmt->format.height); ++ dev_info(&gc2093->client->dev, "set_fmt, width:%u, height:%u.\n", mode->width, mode->height); ++ ++ fmt->format.code = GC2093_MEDIA_BUS_FMT; ++ fmt->format.width = mode->width; ++ fmt->format.height = mode->height; ++ fmt->format.field = V4L2_FIELD_NONE; ++ ++ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++ *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; ++#else ++ mutex_unlock(&gc2093->lock); ++ return -ENOTTY; ++#endif ++ } else { ++ gc2093->cur_mode = mode; ++ __v4l2_ctrl_s_ctrl(gc2093->link_freq, mode->link_freq_index); ++ __v4l2_ctrl_s_ctrl_int64(gc2093->pixel_rate, ++ to_pixel_rate(mode->link_freq_index)); ++ h_blank = mode->hts_def - mode->width; ++ __v4l2_ctrl_modify_range(gc2093->hblank, h_blank, ++ h_blank, 1, h_blank); ++ vblank_def = mode->vts_def - mode->height; ++ __v4l2_ctrl_modify_range(gc2093->vblank, vblank_def, ++ GC2093_VTS_MAX - mode->height, ++ 1, vblank_def); ++ } ++ ++ mutex_unlock(&gc2093->lock); ++ return 0; ++} ++ ++static int gc2093_get_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *fmt) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ const struct gc2093_mode *mode = gc2093->cur_mode; ++ ++ mutex_lock(&gc2093->lock); ++ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++ fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad); ++#else ++ mutex_unlock(&gc2093->lock); ++ return -ENOTTY; ++#endif ++ } else { ++ fmt->format.width = mode->width; ++ fmt->format.height = mode->height; ++ fmt->format.code = GC2093_MEDIA_BUS_FMT; ++ fmt->format.field = V4L2_FIELD_NONE; ++ } ++ mutex_unlock(&gc2093->lock); ++ return 0; ++} ++ ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++static int gc2093_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ struct v4l2_mbus_framefmt *try_fmt = ++ v4l2_subdev_get_try_format(sd, fh->pad, 0); ++ const struct gc2093_mode *def_mode = &supported_modes[0]; ++ ++ mutex_lock(&gc2093->lock); ++ /* Initialize try_fmt */ ++ try_fmt->width = def_mode->width; ++ try_fmt->height = def_mode->height; ++ try_fmt->code = GC2093_MEDIA_BUS_FMT; ++ try_fmt->field = V4L2_FIELD_NONE; ++ mutex_unlock(&gc2093->lock); ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++static const struct v4l2_subdev_internal_ops gc2093_internal_ops = { ++ .open = gc2093_open, ++}; ++#endif ++ ++static int gc2093_s_power(struct v4l2_subdev *sd, int on) ++{ ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ int ret = 0; ++ ++ mutex_lock(&gc2093->lock); ++ ++ if (gc2093->power_on == !!on) ++ goto unlock_and_return; ++ ++ if (on) { ++ gc2093->power_on = true; ++ } else { ++ gc2093->power_on = false; ++ } ++ ++unlock_and_return: ++ mutex_unlock(&gc2093->lock); ++ ++ return ret; ++} ++ ++static const struct v4l2_subdev_core_ops gc2093_core_ops = { ++ .s_power = gc2093_s_power, ++ .ioctl = gc2093_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl32 = gc2093_compat_ioctl32, ++#endif ++}; ++ ++static const struct v4l2_subdev_video_ops gc2093_video_ops = { ++ .s_stream = gc2093_s_stream, ++ .g_frame_interval = gc2093_g_frame_interval, ++ .g_mbus_config = gc2093_g_mbus_config, ++}; ++ ++static const struct v4l2_subdev_pad_ops gc2093_pad_ops = { ++ .enum_mbus_code = gc2093_enum_mbus_code, ++ .enum_frame_size = gc2093_enum_frame_sizes, ++ .enum_frame_interval = gc2093_enum_frame_interval, ++ .get_fmt = gc2093_get_fmt, ++ .set_fmt = gc2093_set_fmt, ++}; ++ ++static const struct v4l2_subdev_ops gc2093_subdev_ops = { ++ .core = &gc2093_core_ops, ++ .video = &gc2093_video_ops, ++ .pad = &gc2093_pad_ops, ++}; ++ ++static int gc2093_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct device *dev = &client->dev; ++ struct device_node *node = dev->of_node; ++ struct gc2093 *gc2093; ++ struct v4l2_subdev *sd; ++ char facing[2]; ++ int ret; ++ ++ dev_info(dev, "driver version: %02x.%02x.%02x", ++ DRIVER_VERSION >> 16, ++ (DRIVER_VERSION & 0xff00) >> 8, ++ DRIVER_VERSION & 0x00ff); ++ ++ gc2093 = devm_kzalloc(dev, sizeof(*gc2093), GFP_KERNEL); ++ if (!gc2093) ++ return -ENOMEM; ++ ++ gc2093->client = client; ++ ret = of_property_read_u32(node, CANAANMODULE_CAMERA_MODULE_INDEX, ++ &gc2093->module_index); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_MODULE_FACING, ++ &gc2093->module_facing); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_MODULE_NAME, ++ &gc2093->module_name); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_LENS_NAME, ++ &gc2093->len_name); ++ ++ if (ret) { ++ dev_err(dev, "Failed to get module information\n"); ++ return -EINVAL; ++ } ++ ++ gc2093->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); ++ if (IS_ERR(gc2093->reset_gpio)) ++ dev_warn(dev, "Failed to get reset-gpios\n"); ++ ++ gc2093->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_HIGH); ++ if (IS_ERR(gc2093->pwdn_gpio)) ++ dev_warn(dev, "Failed to get pwdn-gpios\n"); ++ ++ ++ if (gpiod_export(gc2093->reset_gpio, 0)) { ++ dev_err(dev, "gpiod export gc2093 reset failed."); ++ } ++ ++ if (gpiod_export(gc2093->pwdn_gpio, 0)) { ++ dev_err(dev, "gpiod export gc2093 powerdown failed."); ++ } ++ ++ mutex_init(&gc2093->lock); ++ ++ /* set default mode */ ++ gc2093->cur_mode = &supported_modes[0]; ++ gc2093->cfg_num = ARRAY_SIZE(supported_modes); ++ ++ sd = &gc2093->subdev; ++ v4l2_i2c_subdev_init(sd, client, &gc2093_subdev_ops); ++ ret = gc2093_initialize_controls(gc2093); ++ if (ret) ++ goto err_destroy_mutex; ++ ++ ret = __gc2093_power_on(gc2093); ++ if (ret) ++ goto err_free_handler; ++ ++ ret = gc2093_check_sensor_id(gc2093); ++ if (ret) ++ goto err_power_off; ++ ++ sd->internal_ops = &gc2093_internal_ops; ++ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | ++ V4L2_SUBDEV_FL_HAS_EVENTS; ++ ++ gc2093->pad.flags = MEDIA_PAD_FL_SOURCE; ++ sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; ++ ret = media_entity_pads_init(&sd->entity, 1, &gc2093->pad); ++ if (ret < 0) ++ goto err_power_off; ++ ++ memset(facing, 0, sizeof(facing)); ++ if (strcmp(gc2093->module_facing, "back") == 0) ++ facing[0] = 'b'; ++ else ++ facing[0] = 'f'; ++ ++ snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s", ++ gc2093->module_index, facing, ++ GC2093_NAME, dev_name(sd->dev)); ++ ++ ret = v4l2_async_register_subdev_sensor_common(sd); ++ if (ret) { ++ dev_err(dev, "Failed to register v4l2 async subdev\n"); ++ goto err_clean_entity; ++ } ++ ++ return 0; ++ ++err_clean_entity: ++#ifdef CONFIG_MEDIA_CONTROLLER ++ media_entity_cleanup(&sd->entity); ++#endif ++err_power_off: ++ __gc2093_power_off(gc2093); ++err_free_handler: ++ v4l2_ctrl_handler_free(&gc2093->ctrl_handler); ++err_destroy_mutex: ++ mutex_destroy(&gc2093->lock); ++ ++ return ret; ++} ++ ++static int gc2093_remove(struct i2c_client *client) ++{ ++ struct v4l2_subdev *sd = i2c_get_clientdata(client); ++ struct gc2093 *gc2093 = to_gc2093(sd); ++ ++ v4l2_async_unregister_subdev(sd); ++#ifdef CONFIG_MEDIA_CONTROLLER ++ media_entity_cleanup(&sd->entity); ++#endif ++ v4l2_ctrl_handler_free(&gc2093->ctrl_handler); ++ mutex_destroy(&gc2093->lock); ++ ++ __gc2093_power_off(gc2093); ++ return 0; ++} ++ ++static const struct i2c_device_id gc2093_match_id[] = { ++ { "gc2093", 0 }, ++ { }, ++}; ++ ++static const struct of_device_id gc2093_of_match[] = { ++ { .compatible = "galaxycore,gc2093" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, gc2093_of_match); ++ ++static struct i2c_driver gc2093_i2c_driver = { ++ .driver = { ++ .name = GC2093_NAME, ++ .of_match_table = of_match_ptr(gc2093_of_match), ++ }, ++ .probe = &gc2093_probe, ++ .remove = &gc2093_remove, ++ .id_table = gc2093_match_id, ++}; ++ ++module_i2c_driver(gc2093_i2c_driver); ++MODULE_DESCRIPTION("Galaxycore GC2093 Image Sensor driver"); ++MODULE_LICENSE("GPL v2"); ++ +diff --git a/drivers/media/i2c/soc_camera/canaanchip/gc2145.c b/drivers/media/i2c/soc_camera/canaanchip/gc2145.c +new file mode 100755 +index 00000000..a1b23d35 +--- /dev/null ++++ b/drivers/media/i2c/soc_camera/canaanchip/gc2145.c +@@ -0,0 +1,1264 @@ ++/* ++ * Driver for GC2145 CMOS Image Sensor ++ * ++ * Copyright (C) 2022, Canaan Bright Sight Co., Ltd ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01) ++#define GC2145_NAME "gc2145" ++#define GC2145_MEDIA_BUS_FMT MEDIA_BUS_FMT_SRGGB10_1X10 ++ ++#define MIPI_FREQ_120M 120000000 ++#define MIPI_FREQ_240M 240000000 ++ ++#define GC2145_XVCLK_FREQ 24000000 ++ ++#define GC2145_REG_CHIP_ID_H 0xF0 ++#define GC2145_REG_CHIP_ID_L 0xF1 ++ ++#define GC2145_REG_EXP_SHORT_H 0x01 ++#define GC2145_REG_EXP_SHORT_L 0x02 ++#define GC2145_REG_EXP_LONG_H 0x03 ++#define GC2145_REG_EXP_LONG_L 0x04 ++ ++#define GC2145_MIRROR_FLIP_REG 0x17 ++#define MIRROR_MASK BIT(0) ++#define FLIP_MASK BIT(1) ++ ++#define GC2145_CHIP_ID 0x2145 ++ ++#define GC2145_VTS_MAX 0x3FFF ++#define GC2145_HTS_MAX 0xFFF ++ ++#define GC2145_EXPOSURE_MAX 0x3FFF ++#define GC2145_EXPOSURE_MIN 1 ++#define GC2145_EXPOSURE_STEP 1 ++ ++#define GC2145_GAIN_MIN 0x40 ++#define GC2145_GAIN_MAX 0x2000 ++#define GC2145_GAIN_STEP 1 ++#define GC2145_GAIN_DEFAULT 64 ++ ++#define GC2145_LANES 2 ++ ++#define REG_NULL 0xFF ++ ++#define to_gc2145(sd) container_of(sd, struct gc2145, subdev) ++ ++enum { ++ LINK_FREQ_120M_INDEX, ++ LINK_FREQ_240M_INDEX, ++}; ++ ++struct gc2145_reg { ++ u8 addr; ++ u8 val; ++}; ++ ++struct gain_reg_config { ++ u32 value; ++ u16 analog_gain; ++ u16 col_gain; ++ u16 analog_sw; ++ u16 ram_width; ++}; ++ ++struct gc2145_mode { ++ u32 width; ++ u32 height; ++ struct v4l2_fract max_fps; ++ u32 hts_def; ++ u32 vts_def; ++ u32 exp_def; ++ u32 link_freq_index; ++ const struct gc2145_reg *reg_list; ++}; ++ ++struct gc2145 { ++ struct i2c_client *client; ++ struct gpio_desc *reset_gpio; ++ struct gpio_desc *pwdn_gpio; ++ ++ struct v4l2_subdev subdev; ++ struct media_pad pad; ++ struct v4l2_ctrl_handler ctrl_handler; ++ struct v4l2_ctrl *exposure; ++ struct v4l2_ctrl *anal_gain; ++ struct v4l2_ctrl *hblank; ++ struct v4l2_ctrl *vblank; ++ struct v4l2_ctrl *h_flip; ++ struct v4l2_ctrl *v_flip; ++ struct v4l2_ctrl *link_freq; ++ struct v4l2_ctrl *pixel_rate; ++ ++ struct mutex lock; ++ bool streaming; ++ bool power_on; ++ unsigned int cfg_num; ++ const struct gc2145_mode *cur_mode; ++ ++ u32 module_index; ++ const char *module_facing; ++ const char *module_name; ++ const char *len_name; ++ ++ bool has_init_exp; ++}; ++ ++static const s64 link_freq_menu_items[] = { ++ MIPI_FREQ_120M, ++ MIPI_FREQ_240M, ++}; ++ ++static const struct gc2145_reg gc2145_start[] = { ++ {0xfe, 0x03}, ++ {0x10, 0x91},/* mode select streaming on */ ++ {0xfe, 0x00}, ++ {REG_NULL, 0x00}, ++}; ++ ++static const struct gc2145_reg gc2145_stop[] = { ++ {0xfe, 0x03}, ++ {0x10, 0x81},/* mode select streaming off */ ++ {0xfe, 0x00}, ++ {REG_NULL, 0x00}, ++}; ++ ++/* ++ * window size=1600*1200 mipi@2lane ++ * mclk=24M mipi_clk=480Mbps ++ * pixel_line_total=1920 line_frame_total=1250 ++ * row_time=40us frame_rate=20fps ++ */ ++static const struct gc2145_reg gc2145_1600x1200_mipi_raw10_settings[] = { ++ {0xfe,0xf0}, ++ {0xfe,0xf0}, ++ {0xfe,0xf0}, ++ {0xfc,0x06}, ++ {0xf6,0x00}, ++ {0xf7,0x1d}, ++ {0xf8,0x84}, ++ {0xfa,0x00}, ++ {0xf9,0x8e}, ++ {0xf2,0x00}, ++ ++ /*** Analog & Cisctl ***/ ++ {0xfe,0x00}, ++ {0x03,0x04},//Exposure[12:8] ++ {0x04,0xe2},//Exposure[7:0] ++ {0x05,0x01},//hb[11:8] ++ {0x06,0x56},//hb[7:0] ++ {0x07,0x00},//vb[12:8] ++ {0x08,0x14},//vb[7:0] ++ ++ {0x09,0x00},//row_start[10:8] ++ {0x0a,0x00},//row_start[7:0] ++ {0x0b,0x00},//col_start[10:8] ++ {0x0c,0x00},//col_start[7:1] ++ {0x0d,0x04},//win_height[10:8] 04c0=1216 ++ {0x0e,0xc0},//win_height[7:0] ++ {0x0f,0x06},//win_width[10:8] 0652=1618 ++ {0x10,0x52},//win_width[7:0] ++ {0x12,0x2e}, ++ {0x17,0x13}, ++ {0x18,0x22}, ++ {0x19,0x0e}, ++ {0x1a,0x01}, ++ {0x1b,0x4b}, ++ {0x1c,0x07}, ++ {0x1d,0x10}, ++ {0x1e,0x88}, ++ {0x1f,0x78}, ++ {0x20,0x03}, ++ {0x21,0x40}, ++ {0x22,0xa0}, ++ {0x24,0x16}, ++ {0x25,0x01}, ++ {0x26,0x10}, ++ {0x2d,0x60}, ++ {0x30,0x01}, ++ {0x31,0x90}, ++ {0x33,0x06}, ++ {0x34,0x01}, ++ ++ /*** ISP reg ***/ ++ {0x80,0x06}, ++ {0x81,0x00}, ++ {0x82,0x30}, ++ {0x83,0x00}, ++ {0x84,0x19}, ++ {0x86,0x02}, ++ {0x88,0x03}, ++ {0x89,0x03}, ++ {0x85,0x30}, ++ {0x8a,0x00}, ++ {0x8b,0x00}, ++ {0xb0,0x55}, ++ {0xc3,0x00}, ++ {0xc4,0x80}, ++ {0xc5,0x90}, ++ {0xc6,0x38}, ++ {0xc7,0x40}, ++ {0xec,0x06}, ++ {0xed,0x04}, ++ {0xee,0x60}, ++ {0xef,0x90}, ++ {0xb6,0x00}, //close aec ++ {0x90,0x01}, ++ {0x91,0x00},//out_win_y1[10:8] ++ {0x92,0x01},//out_win_y1[7:0] ++ {0x93,0x00},//out_win_x1[10:8] ++ {0x94,0x01},//out_win_x1[7:0] ++ {0x95,0x04},//out_win_height[10:8] 1200=04b0 ++ {0x96,0xb0},//out_win_height[7:0] ++ {0x97,0x06},//out_win_width[10:8] 1600=0640 ++ {0x98,0x40},//out_win_width[7:0] ++ ++ /*** BLK ***/ ++ {0x40,0x42}, ++ {0x41,0x00}, ++ {0x43,0x54}, ++ {0x5e,0x00}, ++ {0x5f,0x00}, ++ {0x60,0x00}, ++ {0x61,0x00}, ++ {0x62,0x00}, ++ {0x63,0x00}, ++ {0x64,0x00}, ++ {0x65,0x00}, ++ {0x66,0x20}, ++ {0x67,0x20}, ++ {0x68,0x20}, ++ {0x69,0x20}, ++ {0x76,0x00}, ++ {0x6a,0x08}, ++ {0x6b,0x08}, ++ {0x6c,0x08}, ++ {0x6d,0x08}, ++ {0x6e,0x08}, ++ {0x6f,0x08}, ++ {0x70,0x08}, ++ {0x71,0x08}, ++ {0x76,0x00}, ++ {0x72,0xf0}, ++ {0x7e,0x3c}, ++ {0x7f,0x00}, ++ {0xfe,0x02}, ++ {0x48,0x15}, ++ {0x49,0x00}, ++ {0x4b,0x0b}, ++ {0xfe,0x00}, ++ ++ /*** dark sun ***/ ++ {0xfe,0x00}, ++ {0x18,0x22}, ++ {0xfe,0x02}, ++ {0x40,0xbf}, ++ {0x46,0xcf}, ++ {0xfe,0x00}, ++ ++ /***MIPI*****/ ++ {0xfe,0x03}, ++ {0x01,0x87},//[7]:clk lane_p2s_sel ++ {0x02,0x22}, ++ {0x03,0x10},//[4]: ++ {0x04,0x90}, ++ {0x05,0x01}, ++ {0x06,0x88}, ++ {0x11,0x2b}, ++ {0x12,0xd0}, ++ {0x13,0x07}, ++ {0x15,0x10}, ++ {0x17,0xf1}, ++ {0xfe,0x00}, ++ {REG_NULL, 0x00}, ++}; ++ ++static const struct gc2145_reg gc2145_1280x960_mipi_raw10_settings[] = { ++ {0xfe, 0xf0}, ++ {0xfe, 0xf0}, ++ {0xfe, 0xf0}, ++ {0xfc, 0x06}, ++ {0xf6, 0x00}, ++ {0xf7, 0x1d}, ++ {0xf8, 0x84}, ++ {0xfa, 0x00}, ++ {0xf9, 0x8e}, ++ {0xf2, 0x00}, ++ ++ /*** Analog & Cisctl ***/ ++ {0xfe, 0x00}, ++ {0x03, 0x04}, ++ {0x04, 0xe2}, ++ {0x05, 0x01}, ++ {0x06, 0x56}, ++ {0x07, 0x00}, ++ {0x08, 0x14}, ++ {0x09, 0x00},//row_start[10:8] ++ {0x0a, 0x00},//row_start[7:0] ++ {0x0b, 0x00},//col_start[10:8] ++ {0x0c, 0x00},//col_start[7:1] ++ {0x0d, 0x04},//win_height[10:8] 04c0=1216 ++ {0x0e, 0xc0},//win_height[7:0] ++ {0x0f, 0x06},//win_width[10:8] 0652=1618 ++ {0x10, 0x52},//win_width[7:0] ++ ++ {0x12, 0x2e}, ++ {0x17, 0x13}, //mirror ++ {0x18, 0x22}, ++ {0x19, 0x0e}, ++ {0x1a, 0x01}, ++ {0x1b, 0x4b}, ++ {0x1c, 0x07}, ++ {0x1d, 0x10}, ++ {0x1e, 0x88}, ++ {0x1f, 0x78}, ++ {0x20, 0x03}, ++ {0x21, 0x40}, ++ {0x22, 0xa0}, ++ {0x24, 0x16}, ++ {0x25, 0x01}, ++ {0x26, 0x10}, ++ {0x2d, 0x60}, ++ {0x30, 0x01}, ++ {0x31, 0x90}, ++ {0x33, 0x06}, ++ {0x34, 0x01}, ++ ++ /*** ISP reg ***/ ++ {0xfe, 0x00}, ++ {0x80, 0x06}, ++ {0x81, 0x00}, ++ {0x82, 0x30}, ++ {0x83, 0x00}, ++ {0x84, 0x19}, ++ {0x86, 0x02}, ++ {0x88, 0x03}, ++ {0x89, 0x03}, ++ {0x85, 0x30}, ++ {0x8a, 0x00}, ++ {0x8b, 0x00}, ++ {0xb0, 0x55}, ++ {0xc3, 0x00}, ++ {0xc4, 0x80}, ++ {0xc5, 0x90}, ++ {0xc6, 0x38}, ++ {0xc7, 0x40}, ++ {0xec, 0x06}, ++ {0xed, 0x04}, ++ {0xee, 0x60}, ++ {0xef, 0x90}, ++ {0xb6, 0x00}, //close aec ++ {0x90, 0x01},//Crop enable ++ {0x91, 0x00},//out_win_y1[10:8] ++ {0x92, 0x01},//out_win_y1[7:0] ++ {0x93, 0x00},//out_win_x1[10:8] ++ {0x94, 0x01},//out_win_x1[7:0] ++ {0x95, 0x03},//out_win_height[10:8] ++ {0x96, 0xc0},//out_win_height[7:0] //960 ++ {0x97, 0x05},//out_win_width[10:8] ++ {0x98, 0x00},//out_win_width[7:0] //1280 ++ ++ /*** BLK ***/ ++ {0x40, 0x42}, ++ {0x41, 0x00}, ++ {0x43, 0x54}, ++ {0x5e, 0x00}, ++ {0x5f, 0x00}, ++ {0x60, 0x00}, ++ {0x61, 0x00}, ++ {0x62, 0x00}, ++ {0x63, 0x00}, ++ {0x64, 0x00}, ++ {0x65, 0x00}, ++ {0x66, 0x20}, ++ {0x67, 0x20}, ++ {0x68, 0x20}, ++ {0x69, 0x20}, ++ {0x76, 0x00}, ++ {0x6a, 0x08}, ++ {0x6b, 0x08}, ++ {0x6c, 0x08}, ++ {0x6d, 0x08}, ++ {0x6e, 0x08}, ++ {0x6f, 0x08}, ++ {0x70, 0x08}, ++ {0x71, 0x08}, ++ {0x76, 0x00}, ++ {0x72, 0xf0}, ++ {0x7e, 0x3c}, ++ {0x7f, 0x00}, ++ {0xfe, 0x02}, ++ {0x48, 0x15}, ++ {0x49, 0x00}, ++ {0x4b, 0x0b}, ++ {0xfe, 0x00}, ++ ++ /*** dark sun ***/ ++ {0xfe, 0x00}, ++ {0x18, 0x22}, ++ {0xfe, 0x02}, ++ {0x40, 0xbf}, ++ {0x46, 0xcf}, ++ {0xfe, 0x00}, ++ ++ /***MIPI*****/ ++ {0xfe, 0x03}, ++ {0x01, 0x87}, ++ {0x02, 0x22}, ++ {0x03, 0x10}, ++ {0x04, 0x90}, ++ {0x05, 0x01}, ++ {0x06, 0x88}, ++ {0x11, 0x2b}, ++ {0x12, 0x40}, ++ {0x13, 0x06}, ++ {0x15, 0x10}, ++ {0x17, 0xf1}, ++ {0xfe, 0x00}, ++ {REG_NULL, 0x00}, ++}; ++ ++static const struct gc2145_mode supported_modes[] = { ++ { ++ .width = 1280, ++ .height = 960, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 200000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0x780, ++ .vts_def = 0x4e2, ++ .link_freq_index = LINK_FREQ_240M_INDEX, ++ .reg_list = gc2145_1280x960_mipi_raw10_settings, ++ }, ++ { ++ .width = 1600, ++ .height = 1200, ++ .max_fps = { ++ .numerator = 10000, ++ .denominator = 200000, ++ }, ++ .exp_def = 0x460, ++ .hts_def = 0x780, ++ .vts_def = 0x4e2, ++ .link_freq_index = LINK_FREQ_240M_INDEX, ++ .reg_list = gc2145_1600x1200_mipi_raw10_settings, ++ }, ++}; ++ ++/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */ ++static u64 to_pixel_rate(u32 index) ++{ ++ u64 pixel_rate = link_freq_menu_items[index] * 2 * GC2145_LANES; ++ ++ do_div(pixel_rate, 10); ++ ++ return pixel_rate; ++} ++ ++/* sensor register write */ ++static int gc2145_write_reg(struct i2c_client *client, u8 reg, u8 val) ++{ ++ struct i2c_msg msg; ++ u8 buf[2]; ++ int ret; ++ ++ buf[0] = reg & 0xFF; ++ buf[1] = val; ++ ++ msg.addr = client->addr; ++ msg.flags = client->flags; ++ msg.buf = buf; ++ msg.len = sizeof(buf); ++ ++ ret = i2c_transfer(client->adapter, &msg, 1); ++ if (ret >= 0) ++ return 0; ++ ++ dev_err(&client->dev, ++ "gc2053 write reg(0x%x val:0x%x) failed !\n", reg, val); ++ ++ return ret; ++} ++ ++static int gc2145_write_array(struct i2c_client *client, ++ const struct gc2145_reg *regs) ++{ ++ int i, ret = 0; ++ ++ i = 0; ++ while (regs[i].addr != REG_NULL) { ++ ret = gc2145_write_reg(client, regs[i].addr, regs[i].val); ++ if (ret) { ++ dev_err(&client->dev, "%s failed !\n", __func__); ++ break; ++ } ++ i++; ++ } ++ ++ return ret; ++} ++ ++/* sensor register read */ ++static int gc2145_read_reg(struct i2c_client *client, u8 reg, u8 *val) ++{ ++ struct i2c_msg msg[2]; ++ u8 buf[1]; ++ int ret; ++ ++ buf[0] = reg & 0xFF; ++ ++ msg[0].addr = client->addr; ++ msg[0].flags = client->flags; ++ msg[0].buf = buf; ++ msg[0].len = sizeof(buf); ++ ++ msg[1].addr = client->addr; ++ msg[1].flags = client->flags | I2C_M_RD; ++ msg[1].buf = buf; ++ msg[1].len = 1; ++ ++ ret = i2c_transfer(client->adapter, msg, 2); ++ if (ret >= 0) { ++ *val = buf[0]; ++ return 0; ++ } ++ ++ dev_err(&client->dev, ++ "gc2145 read reg(0x%x val:0x%x) failed !\n", reg, *val); ++ ++ return ret; ++} ++ ++static const struct gain_reg_config gain_reg_configs[] = { ++ { 64, 0x0000, 0x0100, 0x6807, 0x00f8}, ++ { 75, 0x0010, 0x010c, 0x6807, 0x00f8}, ++ { 90, 0x0020, 0x011b, 0x6c08, 0x00f9}, ++ { 105, 0x0030, 0x012c, 0x6c0a, 0x00fa}, ++ { 122, 0x0040, 0x013f, 0x7c0b, 0x00fb}, ++ { 142, 0x0050, 0x0216, 0x7c0d, 0x00fe}, ++ { 167, 0x0060, 0x0235, 0x7c0e, 0x00ff}, ++ { 193, 0x0070, 0x0316, 0x7c10, 0x0801}, ++ { 223, 0x0080, 0x0402, 0x7c12, 0x0802}, ++ { 257, 0x0090, 0x0431, 0x7c13, 0x0803}, ++ { 299, 0x00a0, 0x0532, 0x7c15, 0x0805}, ++ { 346, 0x00b0, 0x0635, 0x7c17, 0x0807}, ++ { 397, 0x00c0, 0x0804, 0x7c18, 0x0808}, ++ { 444, 0x005a, 0x0919, 0x7c17, 0x0807}, ++ { 523, 0x0083, 0x0b0f, 0x7c17, 0x0807}, ++ { 607, 0x0093, 0x0d12, 0x7c19, 0x0809}, ++ { 700, 0x0084, 0x1000, 0x7c1b, 0x080c}, ++ { 817, 0x0094, 0x123a, 0x7c1e, 0x080f}, ++ {1131, 0x005d, 0x1a02, 0x7c23, 0x0814}, ++ {1142, 0x009b, 0x1b20, 0x7c25, 0x0816}, ++ {1334, 0x008c, 0x200f, 0x7c27, 0x0818}, ++ {1568, 0x009c, 0x2607, 0x7c2a, 0x081b}, ++ {2195, 0x00b6, 0x3621, 0x7c32, 0x0823}, ++ {2637, 0x00ad, 0x373a, 0x7c36, 0x0827}, ++ {3121, 0x00bd, 0x3d02, 0x7c3a, 0x082b}, ++}; ++ ++static int gc2145_set_gain(struct gc2145 *gc2145, u32 gain) ++{ ++ return 0; ++} ++ ++static int gc2145_set_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct gc2145 *gc2145 = container_of(ctrl->handler, ++ struct gc2145, ctrl_handler); ++ s64 max; ++ int ret = 0; ++ dev_dbg(&gc2145->client->dev, "%s enter, id:0x%X val:%d.\n", __func__, ctrl->id, ctrl->val); ++ ++ /* Propagate change of current control to all related controls */ ++ switch (ctrl->id) { ++ case V4L2_CID_VBLANK: ++ /* Update max exposure while meeting expected vblanking */ ++ max = gc2145->cur_mode->height + ctrl->val - 1; ++ __v4l2_ctrl_modify_range(gc2145->exposure, ++ gc2145->exposure->minimum, max, ++ gc2145->exposure->step, ++ gc2145->exposure->default_value); ++ break; ++ } ++ ++ switch (ctrl->id) { ++ case V4L2_CID_EXPOSURE: ++ break; ++ case V4L2_CID_ANALOGUE_GAIN: ++ case V4L2_CID_GAIN: ++ gc2145_set_gain(gc2145, ctrl->val); ++ break; ++ case V4L2_CID_VBLANK: ++ /* The exposure goes up and reduces the frame rate, no need to write vb */ ++ break; ++ case V4L2_CID_HFLIP: ++ break; ++ case V4L2_CID_VFLIP: ++ break; ++ default: ++ dev_warn(&gc2145->client->dev, "%s Unhandled id:0x%x, val:0x%x\n", ++ __func__, ctrl->id, ctrl->val); ++ break; ++ } ++ ++ return ret; ++} ++ ++static const struct v4l2_ctrl_ops gc2145_ctrl_ops = { ++ .s_ctrl = gc2145_set_ctrl, ++}; ++ ++static int gc2145_initialize_controls(struct gc2145 *gc2145) ++{ ++ const struct gc2145_mode *mode; ++ struct v4l2_ctrl_handler *handler; ++ s64 exposure_max, vblank_def; ++ u32 h_blank; ++ int ret; ++ ++ handler = &gc2145->ctrl_handler; ++ mode = gc2145->cur_mode; ++ ret = v4l2_ctrl_handler_init(handler, 10); ++ if (ret) ++ return ret; ++ handler->lock = &gc2145->lock; ++ ++ gc2145->link_freq = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, ++ ARRAY_SIZE(link_freq_menu_items) - 1, 0, ++ link_freq_menu_items); ++ ++ gc2145->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, ++ 0, to_pixel_rate(LINK_FREQ_240M_INDEX), ++ 1, to_pixel_rate(LINK_FREQ_120M_INDEX)); ++ ++ h_blank = mode->hts_def - mode->width; ++ gc2145->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, ++ h_blank, h_blank, 1, h_blank); ++ if (gc2145->hblank) ++ gc2145->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; ++ ++ vblank_def = mode->vts_def - mode->height; ++ gc2145->vblank = v4l2_ctrl_new_std(handler, &gc2145_ctrl_ops, ++ V4L2_CID_VBLANK, vblank_def, ++ GC2145_VTS_MAX - mode->height, ++ 1, vblank_def); ++ ++ exposure_max = mode->vts_def - 1; ++ gc2145->exposure = v4l2_ctrl_new_std(handler, &gc2145_ctrl_ops, ++ V4L2_CID_EXPOSURE, GC2145_EXPOSURE_MIN, ++ exposure_max, GC2145_EXPOSURE_STEP, ++ mode->exp_def); ++ ++ gc2145->anal_gain = v4l2_ctrl_new_std(handler, &gc2145_ctrl_ops, ++ V4L2_CID_ANALOGUE_GAIN, GC2145_GAIN_MIN, ++ GC2145_GAIN_MAX, GC2145_GAIN_STEP, ++ GC2145_GAIN_DEFAULT); ++ ++ ++ v4l2_ctrl_new_std(handler, &gc2145_ctrl_ops, ++ V4L2_CID_GAIN, GC2145_GAIN_MIN, ++ GC2145_GAIN_MAX, GC2145_GAIN_STEP, ++ GC2145_GAIN_DEFAULT); ++ ++ gc2145->h_flip = v4l2_ctrl_new_std(handler, &gc2145_ctrl_ops, ++ V4L2_CID_HFLIP, 0, 1, 1, 0); ++ ++ gc2145->v_flip = v4l2_ctrl_new_std(handler, &gc2145_ctrl_ops, ++ V4L2_CID_VFLIP, 0, 1, 1, 0); ++ ++ if (handler->error) { ++ ret = handler->error; ++ dev_err(&gc2145->client->dev, "Failed to init controls(%d)\n", ret); ++ goto err_free_handler; ++ } ++ ++ gc2145->subdev.ctrl_handler = handler; ++ gc2145->has_init_exp = false; ++ ++ return 0; ++ ++err_free_handler: ++ v4l2_ctrl_handler_free(handler); ++ return ret; ++} ++ ++/* Calculate the delay in us by clock rate and clock cycles */ ++static inline u32 gc2145_cal_delay(u32 cycles) ++{ ++ return DIV_ROUND_UP(cycles, GC2145_XVCLK_FREQ / 1000 / 1000); ++} ++ ++static int __gc2145_power_on(struct gc2145 *gc2145) ++{ ++ u32 delay_us; ++ ++ if (!IS_ERR(gc2145->pwdn_gpio)) { ++ gpiod_set_value_cansleep(gc2145->pwdn_gpio, 0);//exit powerdown mode ++ usleep_range(500, 800); ++ } ++ ++ if (!IS_ERR(gc2145->reset_gpio)) { ++ gpiod_set_value_cansleep(gc2145->reset_gpio, 0);//exit reset mode ++ usleep_range(3000, 6000); ++ } ++ if (!IS_ERR(gc2145->reset_gpio)) { ++ gpiod_set_value_cansleep(gc2145->reset_gpio, 1);//enter reset mode ++ usleep_range(3000, 6000); ++ } ++ ++ if (!IS_ERR(gc2145->reset_gpio)) ++ gpiod_set_value_cansleep(gc2145->reset_gpio, 0);//exit reset mode ++ ++ /* 8192 cycles prior to first SCCB transaction */ ++ delay_us = gc2145_cal_delay(8192); ++ usleep_range(delay_us, delay_us * 2); ++ return 0; ++} ++ ++ ++static void __gc2145_power_off(struct gc2145 *gc2145) ++{ ++ if (!IS_ERR(gc2145->reset_gpio)) ++ gpiod_set_value_cansleep(gc2145->reset_gpio, 1); ++ if (!IS_ERR(gc2145->pwdn_gpio)) ++ gpiod_set_value_cansleep(gc2145->pwdn_gpio, 0); ++} ++ ++static int gc2145_check_sensor_id(struct gc2145 *gc2145) ++{ ++ struct device *dev = &gc2145->client->dev; ++ u8 id_h = 0, id_l = 0; ++ u16 id = 0; ++ int ret = 0; ++ ++ ret = gc2145_read_reg(gc2145->client, GC2145_REG_CHIP_ID_H, &id_h); ++ ret |= gc2145_read_reg(gc2145->client, GC2145_REG_CHIP_ID_L, &id_l); ++ if (ret) { ++ dev_err(dev, "Failed to read sensor id, (%d)\n", ret); ++ return ret; ++ } ++ ++ id = id_h << 8 | id_l; ++ if (id != GC2145_CHIP_ID) { ++ dev_err(dev, "sensor id: %04X mismatched\n", id); ++ return -ENODEV; ++ } ++ ++ dev_info(dev, "Detected GC2145 sensor\n"); ++ return 0; ++} ++ ++static long gc2145_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ long ret = 0; ++ ++ dev_info(&gc2145->client->dev, "gc2145_ioctl\n"); ++ ++ switch (cmd) { ++ //case: ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++ ++static int __gc2145_start_stream(struct gc2145 *gc2145) ++{ ++ int ret; ++ ++ ret = gc2145_write_array(gc2145->client, gc2145->cur_mode->reg_list); ++ if (ret) ++ return ret; ++ usleep_range(2000, 5000); ++ ++ /* Apply customized control from user */ ++ mutex_unlock(&gc2145->lock); ++ ret = v4l2_ctrl_handler_setup(&gc2145->ctrl_handler); ++ mutex_lock(&gc2145->lock); ++ ++ ret = gc2145_write_array(gc2145->client, gc2145_start); ++ if (ret) ++ return ret; ++ ++ return ret; ++} ++ ++static int __gc2145_stop_stream(struct gc2145 *gc2145) ++{ ++ int ret; ++ ++ ret = gc2145_write_array(gc2145->client, gc2145_stop); ++ if (ret) ++ return ret; ++ ++ return ret; ++} ++ ++#ifdef CONFIG_COMPAT ++static long gc2145_compat_ioctl32(struct v4l2_subdev *sd, ++ unsigned int cmd, unsigned long arg) ++{ ++ void __user *up = compat_ptr(arg); ++ struct module_inf *inf; ++ struct module_awb_cfg *awb_cfg; ++ long ret = 0; ++ ++ switch (cmd) { ++ case CANAANMODULE_GET_MODULE_INFO: ++ inf = kzalloc(sizeof(*inf), GFP_KERNEL); ++ if (!inf) { ++ ret = -ENOMEM; ++ return ret; ++ } ++ ++ ret = gc2145_ioctl(sd, cmd, inf); ++ if (!ret) ++ ret = copy_to_user(up, inf, sizeof(*inf)); ++ kfree(inf); ++ break; ++ case CANAANMODULE_AWB_CFG: ++ awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL); ++ if (!awb_cfg) { ++ ret = -ENOMEM; ++ return ret; ++ } ++ ++ ret = gc2145_ioctl(sd, cmd, awb_cfg); ++ if (!ret) ++ ret = copy_to_user(up, awb_cfg, sizeof(*awb_cfg)); ++ kfree(awb_cfg); ++ break; ++ default: ++ ret = -ENOIOCTLCMD; ++ break; ++ } ++ return ret; ++} ++#endif ++ ++static int gc2145_s_stream(struct v4l2_subdev *sd, int on) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ int ret = 0; ++ dev_info(&gc2145->client->dev, "%s enter\n",__func__); ++ ++ mutex_lock(&gc2145->lock); ++ on = !!on; ++ if (on == gc2145->streaming) ++ goto unlock_and_return; ++ ++ if (on) { ++ ret = __gc2145_start_stream(gc2145); ++ if (ret) { ++ dev_err(&gc2145->client->dev, "Failed to start gc2145 stream\n"); ++ goto unlock_and_return; ++ } ++ } else { ++ __gc2145_stop_stream(gc2145); ++ } ++ ++ gc2145->streaming = on; ++ ++unlock_and_return: ++ mutex_unlock(&gc2145->lock); ++ dev_info(&gc2145->client->dev, "%s exit\n",__func__); ++ ++ return 0; ++} ++ ++static int gc2145_g_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_frame_interval *fi) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ const struct gc2145_mode *mode = gc2145->cur_mode; ++ ++ mutex_lock(&gc2145->lock); ++ fi->interval = mode->max_fps; ++ mutex_unlock(&gc2145->lock); ++ ++ return 0; ++} ++ ++static int gc2145_g_mbus_config(struct v4l2_subdev *sd, ++ struct v4l2_mbus_config *config) ++{ ++ config->type = V4L2_MBUS_CSI2; ++ config->flags = 1 << (GC2145_LANES - 1) | V4L2_MBUS_CSI2_CHANNEL_0 | ++ V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; ++ ++ return 0; ++} ++ ++static int gc2145_enum_mbus_code(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_mbus_code_enum *code) ++{ ++ if (code->index != 0) ++ return -EINVAL; ++ code->code = GC2145_MEDIA_BUS_FMT; ++ return 0; ++} ++ ++static int gc2145_enum_frame_sizes(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_frame_size_enum *fse) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ ++ if (fse->index >= gc2145->cfg_num) ++ return -EINVAL; ++ ++ if (fse->code != GC2145_MEDIA_BUS_FMT) ++ return -EINVAL; ++ ++ fse->min_width = supported_modes[fse->index].width; ++ fse->max_width = supported_modes[fse->index].width; ++ fse->max_height = supported_modes[fse->index].height; ++ fse->min_height = supported_modes[fse->index].height; ++ return 0; ++} ++ ++static int gc2145_enum_frame_interval(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_frame_interval_enum *fie) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ ++ if (fie->index >= gc2145->cfg_num) ++ return -EINVAL; ++ ++ fie->code = GC2145_MEDIA_BUS_FMT; ++ fie->width = supported_modes[fie->index].width; ++ fie->height = supported_modes[fie->index].height; ++ fie->interval = supported_modes[fie->index].max_fps; ++ return 0; ++} ++ ++static int gc2145_set_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *fmt) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ const struct gc2145_mode *mode; ++ s64 h_blank, vblank_def; ++ ++ mutex_lock(&gc2145->lock); ++ ++ mode = v4l2_find_nearest_size(supported_modes, ++ ARRAY_SIZE(supported_modes), ++ width, height, ++ fmt->format.width, fmt->format.height); ++ dev_info(&gc2145->client->dev, "set_fmt, width:%u, height:%u.\n", mode->width, mode->height); ++ ++ fmt->format.code = GC2145_MEDIA_BUS_FMT; ++ fmt->format.width = mode->width; ++ fmt->format.height = mode->height; ++ fmt->format.field = V4L2_FIELD_NONE; ++ ++ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++ *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format; ++#else ++ mutex_unlock(&gc2145->lock); ++ return -ENOTTY; ++#endif ++ } else { ++ gc2145->cur_mode = mode; ++ __v4l2_ctrl_s_ctrl(gc2145->link_freq, mode->link_freq_index); ++ __v4l2_ctrl_s_ctrl_int64(gc2145->pixel_rate, ++ to_pixel_rate(mode->link_freq_index)); ++ h_blank = mode->hts_def - mode->width; ++ __v4l2_ctrl_modify_range(gc2145->hblank, h_blank, ++ h_blank, 1, h_blank); ++ vblank_def = mode->vts_def - mode->height; ++ __v4l2_ctrl_modify_range(gc2145->vblank, vblank_def, ++ GC2145_VTS_MAX - mode->height, ++ 1, vblank_def); ++ } ++ ++ mutex_unlock(&gc2145->lock); ++ return 0; ++} ++ ++static int gc2145_get_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *fmt) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ const struct gc2145_mode *mode = gc2145->cur_mode; ++ ++ mutex_lock(&gc2145->lock); ++ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++ fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad); ++#else ++ mutex_unlock(&gc2145->lock); ++ return -ENOTTY; ++#endif ++ } else { ++ fmt->format.width = mode->width; ++ fmt->format.height = mode->height; ++ fmt->format.code = GC2145_MEDIA_BUS_FMT; ++ fmt->format.field = V4L2_FIELD_NONE; ++ } ++ mutex_unlock(&gc2145->lock); ++ return 0; ++} ++ ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++static int gc2145_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ struct v4l2_mbus_framefmt *try_fmt = ++ v4l2_subdev_get_try_format(sd, fh->pad, 0); ++ const struct gc2145_mode *def_mode = &supported_modes[0]; ++ ++ mutex_lock(&gc2145->lock); ++ /* Initialize try_fmt */ ++ try_fmt->width = def_mode->width; ++ try_fmt->height = def_mode->height; ++ try_fmt->code = GC2145_MEDIA_BUS_FMT; ++ try_fmt->field = V4L2_FIELD_NONE; ++ mutex_unlock(&gc2145->lock); ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API ++static const struct v4l2_subdev_internal_ops gc2145_internal_ops = { ++ .open = gc2145_open, ++}; ++#endif ++ ++static int gc2145_s_power(struct v4l2_subdev *sd, int on) ++{ ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ int ret = 0; ++ ++ mutex_lock(&gc2145->lock); ++ ++ if (gc2145->power_on == !!on) ++ goto unlock_and_return; ++ ++ if (on) { ++ gc2145->power_on = true; ++ } else { ++ gc2145->power_on = false; ++ } ++ ++unlock_and_return: ++ mutex_unlock(&gc2145->lock); ++ ++ return ret; ++} ++ ++static const struct v4l2_subdev_core_ops gc2145_core_ops = { ++ .s_power = gc2145_s_power, ++ .ioctl = gc2145_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl32 = gc2145_compat_ioctl32, ++#endif ++}; ++ ++static const struct v4l2_subdev_video_ops gc2145_video_ops = { ++ .s_stream = gc2145_s_stream, ++ .g_frame_interval = gc2145_g_frame_interval, ++ .g_mbus_config = gc2145_g_mbus_config, ++}; ++ ++static const struct v4l2_subdev_pad_ops gc2145_pad_ops = { ++ .enum_mbus_code = gc2145_enum_mbus_code, ++ .enum_frame_size = gc2145_enum_frame_sizes, ++ .enum_frame_interval = gc2145_enum_frame_interval, ++ .get_fmt = gc2145_get_fmt, ++ .set_fmt = gc2145_set_fmt, ++}; ++ ++static const struct v4l2_subdev_ops gc2145_subdev_ops = { ++ .core = &gc2145_core_ops, ++ .video = &gc2145_video_ops, ++ .pad = &gc2145_pad_ops, ++}; ++ ++static int gc2145_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct device *dev = &client->dev; ++ struct device_node *node = dev->of_node; ++ struct gc2145 *gc2145; ++ struct v4l2_subdev *sd; ++ char facing[2]; ++ int ret; ++ ++ dev_info(dev, "driver version: %02x.%02x.%02x", ++ DRIVER_VERSION >> 16, ++ (DRIVER_VERSION & 0xff00) >> 8, ++ DRIVER_VERSION & 0x00ff); ++ ++ gc2145 = devm_kzalloc(dev, sizeof(*gc2145), GFP_KERNEL); ++ if (!gc2145) ++ return -ENOMEM; ++ ++ gc2145->client = client; ++ ret = of_property_read_u32(node, CANAANMODULE_CAMERA_MODULE_INDEX, ++ &gc2145->module_index); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_MODULE_FACING, ++ &gc2145->module_facing); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_MODULE_NAME, ++ &gc2145->module_name); ++ ret |= of_property_read_string(node, CANAANMODULE_CAMERA_LENS_NAME, ++ &gc2145->len_name); ++ ++ if (ret) { ++ dev_err(dev, "Failed to get module information\n"); ++ return -EINVAL; ++ } ++ ++ gc2145->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);//reset pin low actvie, set logical value. ++ if (IS_ERR(gc2145->reset_gpio)) ++ dev_warn(dev, "Failed to get reset-gpios\n"); ++ ++ gc2145->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_HIGH);//pwdn pin high active, set logical value. ++ if (IS_ERR(gc2145->pwdn_gpio)) ++ dev_warn(dev, "Failed to get pwdn-gpios\n"); ++ ++ if (gpiod_export(gc2145->reset_gpio, 0)) { ++ dev_err(dev, "gpiod export gc2145 reset failed."); ++ } ++ ++ if (gpiod_export(gc2145->pwdn_gpio, 0)) { ++ dev_err(dev, "gpiod export gc2145 powerdown failed."); ++ } ++ ++ mutex_init(&gc2145->lock); ++ ++ /* set default mode */ ++ gc2145->cur_mode = &supported_modes[0]; ++ gc2145->cfg_num = ARRAY_SIZE(supported_modes); ++ ++ sd = &gc2145->subdev; ++ v4l2_i2c_subdev_init(sd, client, &gc2145_subdev_ops); ++ ret = gc2145_initialize_controls(gc2145); ++ if (ret) ++ goto err_destroy_mutex; ++ ++ ret = __gc2145_power_on(gc2145); ++ if (ret) ++ goto err_free_handler; ++ ++ ret = gc2145_check_sensor_id(gc2145); ++ if (ret) ++ goto err_power_off; ++ ++ sd->internal_ops = &gc2145_internal_ops; ++ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | ++ V4L2_SUBDEV_FL_HAS_EVENTS; ++ ++ gc2145->pad.flags = MEDIA_PAD_FL_SOURCE; ++ sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; ++ ret = media_entity_pads_init(&sd->entity, 1, &gc2145->pad); ++ if (ret < 0) ++ goto err_power_off; ++ ++ memset(facing, 0, sizeof(facing)); ++ if (strcmp(gc2145->module_facing, "back") == 0) ++ facing[0] = 'b'; ++ else ++ facing[0] = 'f'; ++ ++ snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s", ++ gc2145->module_index, facing, ++ GC2145_NAME, dev_name(sd->dev)); ++ ++ ret = v4l2_async_register_subdev_sensor_common(sd); ++ if (ret) { ++ dev_err(dev, "Failed to register v4l2 async subdev\n"); ++ goto err_clean_entity; ++ } ++ ++ return 0; ++ ++err_clean_entity: ++#ifdef CONFIG_MEDIA_CONTROLLER ++ media_entity_cleanup(&sd->entity); ++#endif ++err_power_off: ++ __gc2145_power_off(gc2145); ++err_free_handler: ++ v4l2_ctrl_handler_free(&gc2145->ctrl_handler); ++err_destroy_mutex: ++ mutex_destroy(&gc2145->lock); ++ ++ return ret; ++} ++ ++static int gc2145_remove(struct i2c_client *client) ++{ ++ struct v4l2_subdev *sd = i2c_get_clientdata(client); ++ struct gc2145 *gc2145 = to_gc2145(sd); ++ ++ v4l2_async_unregister_subdev(sd); ++#ifdef CONFIG_MEDIA_CONTROLLER ++ media_entity_cleanup(&sd->entity); ++#endif ++ v4l2_ctrl_handler_free(&gc2145->ctrl_handler); ++ mutex_destroy(&gc2145->lock); ++ ++ __gc2145_power_off(gc2145); ++ return 0; ++} ++ ++static const struct i2c_device_id gc2145_match_id[] = { ++ { "gc2145", 0 }, ++ { }, ++}; ++ ++static const struct of_device_id gc2145_of_match[] = { ++ { .compatible = "galaxycore,gc2145" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, gc2145_of_match); ++ ++static struct i2c_driver gc2145_i2c_driver = { ++ .driver = { ++ .name = GC2145_NAME, ++ .of_match_table = of_match_ptr(gc2145_of_match), ++ }, ++ .probe = &gc2145_probe, ++ .remove = &gc2145_remove, ++ .id_table = gc2145_match_id, ++}; ++ ++module_i2c_driver(gc2145_i2c_driver); ++MODULE_DESCRIPTION("Galaxycore GC2145 Image Sensor driver"); ++MODULE_LICENSE("GPL v2"); ++ +-- +2.17.1 + diff --git a/package/patches/linux/0026-drm-panel-mutli-panel-support.patch b/package/patches/linux/0026-drm-panel-mutli-panel-support.patch new file mode 100644 index 0000000..1b121a1 --- /dev/null +++ b/package/patches/linux/0026-drm-panel-mutli-panel-support.patch @@ -0,0 +1,2506 @@ +From 6a415ca06b0b2ab6606af99af1b0dd70b196955c Mon Sep 17 00:00:00 2001 +From: "Chenggen.Wang" +Date: Wed, 24 Aug 2022 09:22:36 +0800 +Subject: [PATCH 2/2] drm/panel: mutli panel support. + +Signed-off-by: Chenggen.Wang +--- + .../boot/dts/canaan/k510_crb_lp3_v1_2.dts | 98 +- + drivers/gpu/drm/canaan/kendryte_dsi.c | 2307 +++++++++-------- + drivers/gpu/drm/panel/panel-simple.c | 23 +- + 3 files changed, 1237 insertions(+), 1191 deletions(-) + mode change 100644 => 100755 drivers/gpu/drm/panel/panel-simple.c + +diff --git a/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts b/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts +index cecd61c1..1620998c 100755 +--- a/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts ++++ b/arch/riscv/boot/dts/canaan/k510_crb_lp3_v1_2.dts +@@ -542,50 +542,50 @@ + dsi,lanes = <4>; + + panel-init-sequence-v1 = [ +-39 00 04 B9 Ff 83 99 +-39 00 10 B1 02 04 70 90 01 32 33 11 11 4D 57 56 73 02 02 +-39 00 0c B2 00 80 80 AE 05 07 5A 11 10 10 00 +-39 00 2e B4 00 FF 04 08 0C 00 00 00 10 00 00 02 00 24 02 04 09 21 03 00 00 0A 90 88 04 08 0C 00 00 00 04 00 00 02 00 24 02 04 08 00 00 02 88 00 08 +-39 00 28 D3 00 00 00 00 00 00 04 04 32 10 04 00 04 00 00 00 00 00 00 00 00 00 00 21 00 05 05 13 00 00 00 05 40 00 00 00 05 20 80 +-39 00 21 D5 00 00 21 20 19 19 18 18 00 00 01 00 18 18 03 02 19 19 00 00 00 00 00 00 00 00 31 31 30 30 2F 2F +-39 00 21 D6 40 40 20 21 18 18 19 19 40 40 02 03 18 18 00 01 19 19 40 40 40 40 40 40 40 40 31 31 30 30 2F 2F +-39 00 11 D8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +-39 00 02 BD 01 +-39 00 11 D8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +-39 00 02 BD 02 +-39 00 09 D8 AA AE EA AA AA AE EA AA +-39 00 02 BD 00 +-39 00 37 E0 01 15 22 1E 46 51 5E 5A 63 6A 71 76 7B 82 88 8D 92 9C A0 AB A2 B5 BD 63 61 6E 7A 01 15 22 1E 46 51 5E 5A 63 6A 71 76 7B 82 89 8E 92 9C A0 AB A2 B5 BD 63 61 6E 7A +-39 00 03 C0 25 5A +-39 00 03 B6 91 91 +-39 00 02 D2 66 +-39 00 02 CC 00 +-39 00 02 36 01 +-05 00 01 11 +-05 00 01 29 ++ 39 00 04 B9 Ff 83 99 ++ 39 00 10 B1 02 04 70 90 01 32 33 11 11 4D 57 56 73 02 02 ++ 39 00 0c B2 00 80 80 AE 05 07 5A 11 10 10 00 ++ 39 00 2e B4 00 FF 04 08 0C 00 00 00 10 00 00 02 00 24 02 04 09 21 03 00 00 0A 90 88 04 08 0C 00 00 00 04 00 00 02 00 24 02 04 08 00 00 02 88 00 08 ++ 39 00 28 D3 00 00 00 00 00 00 04 04 32 10 04 00 04 00 00 00 00 00 00 00 00 00 00 21 00 05 05 13 00 00 00 05 40 00 00 00 05 20 80 ++ 39 00 21 D5 00 00 21 20 19 19 18 18 00 00 01 00 18 18 03 02 19 19 00 00 00 00 00 00 00 00 31 31 30 30 2F 2F ++ 39 00 21 D6 40 40 20 21 18 18 19 19 40 40 02 03 18 18 00 01 19 19 40 40 40 40 40 40 40 40 31 31 30 30 2F 2F ++ 39 00 11 D8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ++ 39 00 02 BD 01 ++ 39 00 11 D8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ++ 39 00 02 BD 02 ++ 39 00 09 D8 AA AE EA AA AA AE EA AA ++ 39 00 02 BD 00 ++ 39 00 37 E0 01 15 22 1E 46 51 5E 5A 63 6A 71 76 7B 82 88 8D 92 9C A0 AB A2 B5 BD 63 61 6E 7A 01 15 22 1E 46 51 5E 5A 63 6A 71 76 7B 82 89 8E 92 9C A0 AB A2 B5 BD 63 61 6E 7A ++ 39 00 03 C0 25 5A ++ 39 00 03 B6 91 91 ++ 39 00 02 D2 66 ++ 39 00 02 CC 00 ++ 39 00 02 36 01 ++ 05 00 01 11 ++ 05 00 01 29 + ]; + + panel-init-sequence-v2 = [ +-39 00 04 B9 FF 83 99 +-39 00 02 D2 AA +-39 00 10 B1 02 04 71 91 01 32 33 11 11 ab 4d 56 73 02 02 +-39 00 10 B2 00 80 80 ae 05 07 5a 11 00 00 10 1e 70 03 d4 +-39 00 2D B4 00 FF 02 C0 02 c0 00 00 08 00 04 06 00 32 04 0a 08 21 03 01 00 0f b8 8b 02 c0 02 c0 00 00 08 00 04 06 00 32 04 0a 08 01 00 0f b8 01 +-39 00 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40 +-39 00 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2f 2f 30 30 31 31 18 18 18 18 +-39 00 21 D6 18 18 19 19 40 40 20 21 02 03 04 05 06 07 00 01 40 40 40 40 40 40 2f 2f 30 30 31 31 40 40 40 40 +-39 00 11 D8 a2 aa 02 a0 a2 a8 02 a0 b0 00 00 00 b0 00 00 00 +-39 00 02 BD 01 +-39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0 +-39 00 02 BD 02 +-39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0 +-39 00 02 BD 00 +-39 00 03 B6 8D 8D +-39 00 37 E0 00 12 1f 1a 40 4a 59 55 5e 67 6f 75 7a 82 8b 90 95 9f a3 ad a2 b2 B6 5e 5a 65 77 00 12 1f 1a 40 4a 59 55 5e 67 6f 75 7a 82 8b 90 95 9f a3 ad a2 b2 B6 5e 5a 65 77 +-39 00 03 C6 FF F9 +-39 00 02 CC 04 +-05 00 01 11 +-05 00 01 29 ++ 39 00 04 B9 FF 83 99 ++ 39 00 02 D2 AA ++ 39 00 10 B1 02 04 71 91 01 32 33 11 11 ab 4d 56 73 02 02 ++ 39 00 10 B2 00 80 80 ae 05 07 5a 11 00 00 10 1e 70 03 d4 ++ 39 00 2D B4 00 FF 02 C0 02 c0 00 00 08 00 04 06 00 32 04 0a 08 21 03 01 00 0f b8 8b 02 c0 02 c0 00 00 08 00 04 06 00 32 04 0a 08 01 00 0f b8 01 ++ 39 00 22 D3 00 00 00 00 00 00 06 00 00 10 04 00 04 00 00 00 00 00 00 00 00 00 00 01 00 05 05 07 00 00 00 05 40 ++ 39 00 21 D5 18 18 19 19 18 18 21 20 01 00 07 06 05 04 03 02 18 18 18 18 18 18 2f 2f 30 30 31 31 18 18 18 18 ++ 39 00 21 D6 18 18 19 19 40 40 20 21 02 03 04 05 06 07 00 01 40 40 40 40 40 40 2f 2f 30 30 31 31 40 40 40 40 ++ 39 00 11 D8 a2 aa 02 a0 a2 a8 02 a0 b0 00 00 00 b0 00 00 00 ++ 39 00 02 BD 01 ++ 39 00 11 D8 B0 00 00 00 B0 00 00 00 E2 AA 03 F0 E2 AA 03 F0 ++ 39 00 02 BD 02 ++ 39 00 09 D8 E2 AA 03 F0 E2 AA 03 F0 ++ 39 00 02 BD 00 ++ 39 00 03 B6 8D 8D ++ 39 00 37 E0 00 12 1f 1a 40 4a 59 55 5e 67 6f 75 7a 82 8b 90 95 9f a3 ad a2 b2 B6 5e 5a 65 77 00 12 1f 1a 40 4a 59 55 5e 67 6f 75 7a 82 8b 90 95 9f a3 ad a2 b2 B6 5e 5a 65 77 ++ 39 00 03 C6 FF F9 ++ 39 00 02 CC 04 ++ 05 00 01 11 ++ 05 00 01 29 + ]; + + display-timings { +@@ -606,6 +606,22 @@ + de-active = <1>; + pixelclk-active = <0>; + }; ++ ++ timing1: timing1 { ++ clock-frequency = <37125000>; ++ hactive = <800>; ++ vactive = <1280>; ++ hsync-len = <24>; ++ hfront-porch = <30>; ++ hback-porch = <24>; ++ vsync-len = <4>; ++ vfront-porch = <8>; ++ vback-porch = <12>; ++ hsync-active = <0>; ++ vsync-active = <0>; ++ de-active = <1>; ++ pixelclk-active = <0>; ++ }; + }; + + ports { +diff --git a/drivers/gpu/drm/canaan/kendryte_dsi.c b/drivers/gpu/drm/canaan/kendryte_dsi.c +index 68b12188..0650589c 100755 +--- a/drivers/gpu/drm/canaan/kendryte_dsi.c ++++ b/drivers/gpu/drm/canaan/kendryte_dsi.c +@@ -1,712 +1,717 @@ +-/* Copyright (c) 2022, Canaan Bright Sight Co., Ltd +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +-#include +-#include