diff --git a/python/icicle/__init__.py b/python/icicle/__init__.py
index 9ea7cb0..5e751a5 100644
--- a/python/icicle/__init__.py
+++ b/python/icicle/__init__.py
@@ -87,6 +87,9 @@ def __init__(self, architecture: str, *,
                  tracing = False,
                  ) -> None: ...
 
+    @property
+    def architecture(self) -> str: ...
+
     @property
     def exception_code(self) -> ExceptionCode: ...
 
diff --git a/src/lib.rs b/src/lib.rs
index a181847..b0a69f0 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -220,6 +220,7 @@ fn convert_protection(protection: MemoryProtection) -> u8 {
 
 #[pyclass(unsendable, module = "icicle")]
 struct Icicle {
+    architecture: String,
     vm: icicle_vm::Vm,
     regs: HashMap<String, NamedRegister>,
 }
@@ -269,6 +270,11 @@ impl Icicle {
         self.vm.cpu.exception.value
     }
 
+    #[getter]
+    fn get_architecture(&self) -> String {
+        self.architecture.to_string()
+    }
+
     #[new]
     #[pyo3(signature = (
         architecture,
@@ -341,6 +347,7 @@ impl Icicle {
         }
 
         Ok(Icicle {
+            architecture,
             vm,
             regs,
         })
@@ -353,7 +360,7 @@ impl Icicle {
         } else {
             "little endian"
         };
-        format!("Icicle VM for {0:?} ({endianness})", arch.triple.architecture)
+        format!("Icicle VM for {0:?} ({endianness})", self.architecture)
     }
 
     fn mem_map(&mut self, address: u64, size: u64, protection: MemoryProtection) -> PyResult<()> {