From a22830453065f563fd4cb6f6a5030cac82bad81b Mon Sep 17 00:00:00 2001
From: Duncan Ogilvie <mr.exodia.tpodt@gmail.com>
Date: Wed, 25 Dec 2024 00:37:31 +0100
Subject: [PATCH] Add getter/setter for PC and SP registers

---
 python/icicle/__init__.py |  4 ++++
 src/lib.rs                | 20 ++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/python/icicle/__init__.py b/python/icicle/__init__.py
index 754e753..a95007f 100644
--- a/python/icicle/__init__.py
+++ b/python/icicle/__init__.py
@@ -100,6 +100,10 @@ def exception_value(self) -> int: ...
 
     icount_limit: int
 
+    pc: int
+
+    sp: int
+
     # TODO: API to get memory information?
 
     def mem_map(self, address: int, size: int, protection: MemoryProtection): ...
diff --git a/src/lib.rs b/src/lib.rs
index 72d281a..bb782c6 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -276,6 +276,26 @@ impl Icicle {
         self.architecture.to_string()
     }
 
+    #[getter]
+    pub fn get_pc(&self) -> u64 {
+        self.vm.cpu.read_pc()
+    }
+
+    #[setter]
+    pub fn set_pc(&mut self, address: u64) {
+        self.vm.cpu.write_pc(address)
+    }
+
+    #[getter]
+    pub fn get_sp(&mut self) -> u64 {
+        self.vm.cpu.read_reg(self.vm.cpu.arch.reg_sp)
+    }
+
+    #[setter]
+    pub fn set_sp(&mut self, address: u64) {
+        self.vm.cpu.write_reg(self.vm.cpu.arch.reg_sp, address)
+    }
+
     #[new]
     #[pyo3(signature = (
         architecture,