From bd842b15ef2df15733146e57436799e31cbca028 Mon Sep 17 00:00:00 2001 From: Jiaxin Wu Date: Sat, 22 Jun 2024 14:58:04 +0800 Subject: [PATCH] Platform/Intel: Force PE/COFF sections 4KB aligned Force PE/COFF sections to be aligned at 4KB boundaries to support MemoryAttribute table. Signed-off-by: Jiaxin Wu --- .../BoardX58Ich10/OpenBoardPkgBuildOption.dsc | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgBuildOption.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgBuildOption.dsc index 25998b83e7f..f729ff29b05 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgBuildOption.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgBuildOption.dsc @@ -76,3 +76,7 @@ #[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] # MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 # GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 + +[BuildOptions.common.EDKII.MM_CORE_STANDALONE, BuildOptions.common.EDKII.MM_STANDALONE] + MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096 /FILEALIGN:4096 + GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000 /FILEALIGN:4096