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This is fixed for hardware revisions r0.3 through r0.5 in #16. There is still a problem on r0.1 and r0.2, but we aren't motivated to fix it. For now, Sideband PHY usage is unsupported on r0.1/r0.2.
This affects Cynthion r0.1-r0.5.
It should be possible to have Saturn-V hold the Sideband PHY in reset and/or prevent FPGA configuration.
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