From a4f3e67ade55ec663419d771f0c86e56d52e8d99 Mon Sep 17 00:00:00 2001 From: Christoph Klee Date: Wed, 5 Jun 2024 23:45:24 +0000 Subject: [PATCH] pw_clock_tree_mcuxpresso: Configure ClkIn as source for osc_clk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change automatically configures the ClkIn clock source as input for the SYSOSCBYPASS clock selector to generate the osc_clk signal when enabled. If disabled the SYSOSCBYPASS clock selector will be clock gated. Bug: 331672574 Change-Id: I2c616daa5e6247e1fac80fc7b7914b35254e8b95 Reviewed-on: https://pigweed-review.googlesource.com/c/pigweed/pigweed/+/214234 Presubmit-Verified: CQ Bot Account Lint: Lint 🤖 Commit-Queue: Christoph Klee Reviewed-by: Austin Foxley --- pw_clock_tree_mcuxpresso/docs.rst | 2 +- .../public/pw_clock_tree_mcuxpresso/clock_tree.h | 11 ++++++++++- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/pw_clock_tree_mcuxpresso/docs.rst b/pw_clock_tree_mcuxpresso/docs.rst index 82c4e570eb..6e48b35027 100644 --- a/pw_clock_tree_mcuxpresso/docs.rst +++ b/pw_clock_tree_mcuxpresso/docs.rst @@ -16,7 +16,7 @@ that can be directly instantiated: * 32 kHz RTC Oscillator * Low-power Oscillator * Master Clock -* External Clock Input +* External Clock Input as clock source for SYSOSCBYPASS clock selector to generate OSC_CLK * Fractional Rate Generator (FRG) for Flexcomm Interfaces * Clock Source Selector * Clock Divider diff --git a/pw_clock_tree_mcuxpresso/public/pw_clock_tree_mcuxpresso/clock_tree.h b/pw_clock_tree_mcuxpresso/public/pw_clock_tree_mcuxpresso/clock_tree.h index ad1af019c5..13655c0400 100644 --- a/pw_clock_tree_mcuxpresso/public/pw_clock_tree_mcuxpresso/clock_tree.h +++ b/pw_clock_tree_mcuxpresso/public/pw_clock_tree_mcuxpresso/clock_tree.h @@ -101,7 +101,8 @@ using ClockMcuxpressoMclkBlocking = ClockMcuxpressoMclk; using ClockMcuxpressoMclkNonBlocking = ClockMcuxpressoMclk; -/// Class template implementing the CLK IN pin clock source. +/// Class template implementing the CLK IN pin clock source and selecting +/// it as an input source for OSC Clock source. /// /// Template argument `ElementType` can be of class `ElementBlocking` or /// `ElementNonBlockingCannotFail`. @@ -118,12 +119,20 @@ class ClockMcuxpressoClkIn final : public DependentElement { pw::Status DoEnable() final { CLOCK_SetClkinFreq( frequency_); /*!< Sets CLK_IN pin clock frequency in Hz */ + + // OSC clock source selector ClkIn. + const uint8_t kCLOCK_OscClkIn = CLKCTL0_SYSOSCBYPASS_SEL(1); + CLKCTL0->SYSOSCBYPASS = kCLOCK_OscClkIn; return pw::OkStatus(); } /// Set CLK IN clock frequency to 0 Hz. pw::Status DoDisable() final { CLOCK_SetClkinFreq(0); /*!< Sets CLK_IN pin clock frequency in Hz */ + + // OSC clock source selector None, which gates output to reduce power. + const uint8_t kCLOCK_OscNone = CLKCTL0_SYSOSCBYPASS_SEL(7); + CLKCTL0->SYSOSCBYPASS = kCLOCK_OscNone; return pw::OkStatus(); }