diff --git a/Gemfile.lock b/Gemfile.lock
index 97631e9d..70871496 100644
--- a/Gemfile.lock
+++ b/Gemfile.lock
@@ -1,7 +1,7 @@
 GEM
   remote: https://rubygems.org/
   specs:
-    activesupport (7.1.1)
+    activesupport (7.1.2)
       base64
       bigdecimal
       concurrent-ruby (~> 1.0, >= 1.0.2)
@@ -13,7 +13,7 @@ GEM
       tzinfo (~> 2.0)
     addressable (2.8.5)
       public_suffix (>= 2.0.2, < 6.0)
-    base64 (0.1.1)
+    base64 (0.2.0)
     bigdecimal (3.1.4)
     coffee-script (2.4.1)
       coffee-script-source
@@ -25,7 +25,7 @@ GEM
     connection_pool (2.4.1)
     dnsruby (1.70.0)
       simpleidn (~> 0.2.1)
-    drb (2.1.1)
+    drb (2.2.0)
       ruby2_keywords
     em-websocket (0.5.3)
       eventmachine (>= 0.12.9)
@@ -223,7 +223,7 @@ GEM
       jekyll-feed (~> 0.9)
       jekyll-seo-tag (~> 2.1)
     minitest (5.20.0)
-    mutex_m (0.1.2)
+    mutex_m (0.2.0)
     nokogiri (1.15.4)
       mini_portile2 (~> 2.8.2)
       racc (~> 1.4)
@@ -233,7 +233,7 @@ GEM
     pathutil (0.16.2)
       forwardable-extended (~> 2.6)
     public_suffix (4.0.7)
-    racc (1.7.1)
+    racc (1.7.3)
     rb-fsevent (0.11.2)
     rb-inotify (0.10.1)
       ffi (~> 1.0)
@@ -262,7 +262,7 @@ GEM
       tzinfo (>= 1.0.0)
     unf (0.1.4)
       unf_ext
-    unf_ext (0.0.8.2)
+    unf_ext (0.0.9)
     unicode-display_width (1.8.0)
     webrick (1.8.1)
 
diff --git a/_posts/2023-11-13-ip-cores-available.md b/_posts/2023-11-13-ip-cores-available.md
new file mode 100644
index 00000000..88f46412
--- /dev/null
+++ b/_posts/2023-11-13-ip-cores-available.md
@@ -0,0 +1,51 @@
+---
+title: "IP cores for the embedded GNSS-SDR"
+excerpt: "IP cores to run GNSS-SDR in an ARM/FPGA System on Chip."
+header:
+  teaser: /assets/images/fpga-ip-core.png
+tags:
+  - news
+  - embedded
+author_profile: false
+sidebar:
+  nav: "news"
+last_modified_at: 2023-11-13T10:54:02+01:00  
+---
+
+![IP cores]({{ "/assets/images/fpga-ip-core.png" | relative_url }}){: .align-center}
+
+
+## Exciting News: Commercial Availability of FPGA IP Cores for GNSS-SDR!
+
+We are thrilled to announce that our FPGA IP cores for GNSS-SDR are now
+commercially available, unlocking unprecedented possibilities for
+high-performance, flexible, and efficient GNSS signal processing.
+
+### Key Features:
+
+  * **Customization**: Tailor your GNSS receiver according to your specific
+    project needs. Maintain the ability to inspect internal signals and customize
+    acquisition or tracking loops parameters, showcasing the adaptability inherent
+    in GNSS-SDR.
+  * **Cost-Effectiveness**: Optimize costs while achieving top-notch performance.
+  * **Accelerated Development**: Speed up your development cycle with our
+    pre-designed IP Cores.
+  * **Scalability**: Easily scale your GNSS solution as your project grows.
+    Multi-band, multi-constellation receiver configurations available.
+
+
+### Use Cases:
+  * **Research and Experimentation**: Ideal for academic research and
+    experimentation, providing the tools needed to push the boundaries of GNSS
+    technology.
+  * **Commercial Applications**: Empower commercial ventures with the capacity to
+    innovate and tailor GNSS solutions for specific market needs.
+  * **Educational Platforms**: Facilitate learning and understanding for
+    undergraduate and graduate students in the field of satellite navigation.
+
+
+### How to Get Started:
+
+Visit our commercial website at
+[https://navposproducts.cttc.es](https://navposproducts.cttc.es)
+
diff --git a/serviceworker.js b/serviceworker.js
index de7c51cb..8d75f55c 100644
--- a/serviceworker.js
+++ b/serviceworker.js
@@ -1,5 +1,5 @@
 const releaseVersion = "0.0.18";
-const serviceWorkerVersion = "9";
+const serviceWorkerVersion = "10";
 const CACHE = `geniuss-place-${releaseVersion}-${serviceWorkerVersion}`;
 
 const offlineFallbackPage = "offline.html";
@@ -33,6 +33,7 @@ self.addEventListener("install", function (event) {
           '/assets/images/logo-gnss-sdr-new-release.png',
           '/assets/images/logo-gsoc.png',
           '/assets/images/gnss-sdr_monitoring_teaser.png',
+          '/assets/images/fpga-ip-core.png',
           '/assets/images/PDCA.png',
           '/assets/images/Cmake-logo.png',
           '/assets/images/oe-logo.png',