From 5b98164932a4e7a5d98753cb74334888cf1a05a8 Mon Sep 17 00:00:00 2001
From: Elliott Mitchell <ehem+freebsd@m5p.com>
Date: Thu, 8 Jun 2023 22:34:09 -0700
Subject: [PATCH] intrng: add calling pic_init_secondary on all registered PICs

There is potential for non-root PICs to need per-processor
initialization.  Few root PICs try to propogate the call.  As such add
a pass of calling pic_init_secondary() on all children with a non-root
value.

Differential Revision: https://reviews.freebsd.org/D40474
---
 sys/arm/arm/gic.c                  | 7 +++++++
 sys/arm/broadcom/bcm2835/bcm2836.c | 7 +++++++
 sys/arm64/arm64/gic_v3.c           | 7 +++++++
 sys/arm64/arm64/gicv3_its.c        | 7 +++++++
 sys/kern/subr_intr.c               | 7 ++++---
 5 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c
index b1b7aacd63abb2..887d99b79f98bc 100644
--- a/sys/arm/arm/gic.c
+++ b/sys/arm/arm/gic.c
@@ -205,6 +205,13 @@ arm_gic_init_secondary(device_t dev, uint32_t rootnum)
 	struct arm_gic_softc *sc = device_get_softc(dev);
 	u_int irq, cpu;
 
+	if (root_type >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	/* Set the mask so we can find this CPU to send it IPIs */
 	cpu = PCPU_GET(cpuid);
 	MPASS(cpu < GIC_MAXCPU);
diff --git a/sys/arm/broadcom/bcm2835/bcm2836.c b/sys/arm/broadcom/bcm2835/bcm2836.c
index 7ed9dedaa77ebb..57d79921d459d2 100644
--- a/sys/arm/broadcom/bcm2835/bcm2836.c
+++ b/sys/arm/broadcom/bcm2835/bcm2836.c
@@ -543,6 +543,13 @@ bcm_lintc_init_secondary(device_t dev, uint32_t rootnum)
 	u_int cpu;
 	struct bcm_lintc_softc *sc;
 
+	if (root_type >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	cpu = PCPU_GET(cpuid);
 	sc = device_get_softc(dev);
 
diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c
index 964a129111e274..bb63d8aef8186d 100644
--- a/sys/arm64/arm64/gic_v3.c
+++ b/sys/arm64/arm64/gic_v3.c
@@ -1103,6 +1103,13 @@ gic_v3_init_secondary(device_t dev, uint32_t rootnum)
 	u_int cpu, irq;
 	int err, i;
 
+	if (root_type >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	sc = device_get_softc(dev);
 	cpu = PCPU_GET(cpuid);
 
diff --git a/sys/arm64/arm64/gicv3_its.c b/sys/arm64/arm64/gicv3_its.c
index 5ecd9b8c0e9496..e121d4cec56df1 100644
--- a/sys/arm64/arm64/gicv3_its.c
+++ b/sys/arm64/arm64/gicv3_its.c
@@ -1297,6 +1297,13 @@ gicv3_its_init_secondary(device_t dev, uint32_t rootnum)
 {
 	struct gicv3_its_softc *sc;
 
+	if (root_type >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	sc = device_get_softc(dev);
 
 	/*
diff --git a/sys/kern/subr_intr.c b/sys/kern/subr_intr.c
index b7cb088f58c717..7a98a80133ce78 100644
--- a/sys/kern/subr_intr.c
+++ b/sys/kern/subr_intr.c
@@ -1570,12 +1570,10 @@ dosoftints(void)
 void
 intr_pic_init_secondary(void)
 {
+	struct intr_pic *pic;
 	device_t dev;
 	uint32_t rootnum;
 
-	/*
-	 * QQQ: Only root PICs are aware of other CPUs ???
-	 */
 	//mtx_lock(&isrc_table_lock);
 	for (rootnum = 0; rootnum < INTR_ROOT_COUNT; rootnum++) {
 		dev = intr_irq_roots[rootnum].dev;
@@ -1583,6 +1581,9 @@ intr_pic_init_secondary(void)
 			PIC_INIT_SECONDARY(dev, rootnum);
 		}
 	}
+
+	STAILQ_FOREACH(pic, &pic_list, pic_next)
+		PIC_INIT_SECONDARY(pic->pic_dev, INTR_ROOT_COUNT);
 	//mtx_unlock(&isrc_table_lock);
 }
 #endif