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I've done built this project on u280 platform. however when opening the vivado project generated from vitis/v++, I can not find the top module name "pfm_top_wrapper". Also, I see that GT ref clock of cmac_krnl is not assigned to physical clock pin, but the project still can be built.
Could you please help me understand this?
Thank you.
The text was updated successfully, but these errors were encountered:
I've done built this project on u280 platform. however when opening the vivado project generated from vitis/v++, I can not find the top module name "pfm_top_wrapper". Also, I see that GT ref clock of cmac_krnl is not assigned to physical clock pin, but the project still can be built.
Could you please help me understand this?
Thank you.
The text was updated successfully, but these errors were encountered: