diff --git a/esp-wifi/src/timer_esp32.rs b/esp-wifi/src/timer_esp32.rs index 0403251c..52f11fd2 100644 --- a/esp-wifi/src/timer_esp32.rs +++ b/esp-wifi/src/timer_esp32.rs @@ -2,14 +2,13 @@ use core::cell::RefCell; use atomic_polyfill::{AtomicU32, Ordering}; use critical_section::Mutex; -use esp32_hal::xtensa_lx; -use esp32_hal::xtensa_lx_rt; -use esp32_hal::xtensa_lx_rt::exception::Context; +use esp32_hal::trapframe::TrapFrame; use esp32_hal::{ interrupt, peripherals::{self, TIMG1}, prelude::*, timer::{Timer, Timer0}, + xtensa_lx, }; use crate::preempt::preempt::task_switch; @@ -174,7 +173,7 @@ fn BT_BB() { } #[interrupt] -fn TG1_T0_LEVEL(context: &mut Context) { +fn TG1_T0_LEVEL(context: &mut TrapFrame) { task_switch(context); critical_section::with(|cs| { @@ -189,7 +188,7 @@ fn TG1_T0_LEVEL(context: &mut Context) { #[allow(non_snake_case)] #[no_mangle] -fn Software1(_level: u32, context: &mut Context) { +fn Software1(_level: u32, context: &mut TrapFrame) { let intr = 1 << 29; unsafe { core::arch::asm!("wsr.intclear {0}", in(reg) intr, options(nostack)); diff --git a/esp-wifi/src/timer_esp32s2.rs b/esp-wifi/src/timer_esp32s2.rs index 5a6621de..b69d0ba3 100644 --- a/esp-wifi/src/timer_esp32s2.rs +++ b/esp-wifi/src/timer_esp32s2.rs @@ -2,14 +2,13 @@ use core::cell::RefCell; use atomic_polyfill::{AtomicU32, Ordering}; use critical_section::Mutex; -use esp32s2_hal::xtensa_lx; -use esp32s2_hal::xtensa_lx_rt; -use esp32s2_hal::xtensa_lx_rt::exception::Context; +use esp32s2_hal::trapframe::TrapFrame; use esp32s2_hal::{ interrupt, peripherals::{self, TIMG1}, prelude::*, timer::{Timer, Timer0}, + xtensa_lx, }; use crate::preempt::preempt::task_switch; @@ -123,7 +122,7 @@ fn WIFI_PWR() { } #[interrupt] -fn TG1_T0_LEVEL(context: &mut Context) { +fn TG1_T0_LEVEL(context: &mut TrapFrame) { task_switch(context); critical_section::with(|cs| { @@ -138,7 +137,7 @@ fn TG1_T0_LEVEL(context: &mut Context) { #[allow(non_snake_case)] #[no_mangle] -fn Software1(_level: u32, context: &mut Context) { +fn Software1(_level: u32, context: &mut TrapFrame) { let intr = 1 << 29; unsafe { core::arch::asm!("wsr.intclear {0}", in(reg) intr, options(nostack));