diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml
index e1b3770fc2..68ab0ade89 100644
--- a/esp-hal/Cargo.toml
+++ b/esp-hal/Cargo.toml
@@ -37,6 +37,7 @@ embedded-hal-nb          = "1.0.0"
 embedded-io              = "0.6.1"
 embedded-io-async        = "0.6.1"
 enumset                  = "1.1.5"
+esp-build                = { version = "0.1.0", path = "../esp-build" }
 esp-synopsys-usb-otg     = { version = "0.4.2", optional = true, features = ["fs", "esp32sx"] }
 fugit                    = "0.3.7"
 log                      = { version = "0.4.22", optional = true }
diff --git a/esp-hal/build.rs b/esp-hal/build.rs
index 9e0f49684c..68a16186b3 100644
--- a/esp-hal/build.rs
+++ b/esp-hal/build.rs
@@ -11,16 +11,14 @@ use esp_build::assert_unique_used_features;
 use esp_config::{generate_config, Value};
 use esp_metadata::{Chip, Config};
 
-#[cfg(debug_assertions)]
-esp_build::warning! {"
-WARNING: use --release
-  We *strongly* recommend using release profile when building esp-hal.
-  The dev profile can potentially be one or more orders of magnitude
-  slower than release, and may cause issues with timing-senstive
-  peripherals and/or devices.
-"}
-
 fn main() -> Result<(), Box<dyn Error>> {
+    println!("cargo:rustc-check-cfg=cfg(is_debug_build)");
+    if let Ok(level) = std::env::var("OPT_LEVEL") {
+        if level != "2" && level != "3" {
+            println!("cargo:rustc-cfg=is_debug_build");
+        }
+    }
+
     // NOTE: update when adding new device support!
     // Ensure that exactly one chip has been specified:
     assert_unique_used_features!(
diff --git a/esp-hal/src/lib.rs b/esp-hal/src/lib.rs
index 553d2d6b54..913990b983 100644
--- a/esp-hal/src/lib.rs
+++ b/esp-hal/src/lib.rs
@@ -261,6 +261,15 @@ pub mod trapframe {
 // be directly exposed.
 mod soc;
 
+#[cfg(is_debug_build)]
+esp_build::warning! {"
+WARNING: use --release
+  We *strongly* recommend using release profile when building esp-hal.
+  The dev profile can potentially be one or more orders of magnitude
+  slower than release, and may cause issues with timing-senstive
+  peripherals and/or devices.
+"}
+
 #[cfg(xtensa)]
 #[no_mangle]
 extern "C" fn EspDefaultHandler(_level: u32, _interrupt: peripherals::Interrupt) {