Rename, documentation

esp-rs · Nov 26, 2024 · 71c7b5d · 71c7b5d
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Showing 3 changed files with 14 additions and 5 deletions.
diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md
@@ -20,6 +20,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - ESP32-C6, H2, S3: Added `split` function to the `DmaChannel` trait. (#2526)
 - Added PSRAM configuration to `esp_hal::Config` if `quad-psram` or `octal-psram` is enabled (#2546)
 - Added `esp_hal::psram::psram_raw_parts` (#2546)
+- `BurstConfig`, a device-specific configuration for configuring DMA transfers in burst mode (#2543)
+- `{DmaRxBuf, DmaTxBuf, DmaRxTxBuf}::set_burst_config` (#2543)
 
 ### Changed
 
@@ -51,6 +53,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - `esp_hal::psram::psram_range` (#2546)
 - The `Dma` structure has been removed. (#2545)
 - Remove `embedded-hal 0.2.x` impls and deps from `esp-hal` (#2593)
+- `DmaTxBuf::{compute_chunk_size, compute_descriptor_count, new_with_block_size}` (#2543)
 
 ## [0.22.0] - 2024-11-20
 

diff --git a/esp-hal/MIGRATING-0.22.md b/esp-hal/MIGRATING-0.22.md
@@ -16,10 +16,10 @@ by `esp_hal::init()`. The channels themselves have been renamed to match other p
 +let channel = peripherals.DMA_CH2;
 ```
 
-### Configuration changes
+### Channel configuration changes
 
 - `configure_for_async` and `configure` have been removed
-- PDMA devices (ESP32, ESP32-S2) provide no configurability
+- PDMA devices (ESP32, ESP32-S2) provide no channel configurability
 - GDMA devices provide `set_priority` to change DMA in/out channel priority
 
 ```diff
@@ -43,6 +43,12 @@ by `esp_hal::init()`. The channels themselves have been renamed to match other p
 +.with_dma(dma_channel);
 ```
 
+### Burst mode configuration
+
+Burst mode is now a property of buffers, instead of DMA channels. Configuration can be done by
+calling `set_burst_config` on buffers that support it. The configuration options and the
+corresponding `BurstConfig` type are device specfic.
+
 ### Usability changes affecting applications
 
 Individual channels are no longer wrapped in `Channel`, but they implement the `DmaChannel` trait.

diff --git a/esp-hal/src/dma/buffers.rs b/esp-hal/src/dma/buffers.rs
@@ -472,7 +472,7 @@ impl DmaTxBuf {
     /// Note that the hardware is allowed to ignore this setting. If you attempt
     /// to use burst transfers with improperly aligned buffers, starting the
     /// transfer will result in [`DmaError::InvalidAlignment`].
-    pub fn set_burst_transfer(&mut self, burst: BurstConfig) -> Result<(), DmaBufError> {
+    pub fn set_burst_config(&mut self, burst: BurstConfig) -> Result<(), DmaBufError> {
         let len = self.len();
         self.configure(burst, len)
     }
@@ -635,7 +635,7 @@ impl DmaRxBuf {
     /// Note that the hardware is allowed to ignore this setting. If you attempt
     /// to use burst transfers with improperly aligned buffers, starting the
     /// transfer will result in [`DmaError::InvalidAlignment`].
-    pub fn set_burst_transfer(&mut self, burst: BurstConfig) -> Result<(), DmaBufError> {
+    pub fn set_burst_config(&mut self, burst: BurstConfig) -> Result<(), DmaBufError> {
         let len = self.len();
         self.configure(burst, len)
     }
@@ -837,7 +837,7 @@ impl DmaRxTxBuf {
     /// Note that the hardware is allowed to ignore this setting. If you attempt
     /// to use burst transfers with improperly aligned buffers, starting the
     /// transfer will result in [`DmaError::InvalidAlignment`].
-    pub fn set_burst_transfer(&mut self, burst: BurstConfig) -> Result<(), DmaBufError> {
+    pub fn set_burst_config(&mut self, burst: BurstConfig) -> Result<(), DmaBufError> {
         let len = self.len();
         self.configure(burst, len)
     }