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The new runtime already supports arbitrary memories. Each memory can have one allocator and a number of DMA engines that can be used to access the memory from the host.
Later on there might be need for DMA engines between memories on the device, but this is currently not considered.
Each PE also has a list of memories it "sees" in its address space and the corresponding offsets to access that region of memory.
Currently, only two types of memory are know to TaPaSCo:
Most devices however have multiple different memories.
This issue tracks the progress of adding support for different memory views of different PEs.
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