diff --git a/CHANGELOG.md b/CHANGELOG.md
index 2b8ada38..9fbda742 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -7,6 +7,12 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+### Added
+
+- Add `zeroize` as an optional dependency [#818]
+- Add `zeroize` feature [#818]
+- Add `Zeroize` trait implementation for `Witness` behind `zeroize` feature [#818]
+
 ## [0.19.1] - 2024-02-28
 
 ### Changed
@@ -573,6 +579,7 @@ is necessary since `rkyv/validation` was required as a bound.
 - Proof system module.
 
 <!-- ISSUES -->
+[#818]: https://github.com/dusk-network/plonk/issues/818
 [#815]: https://github.com/dusk-network/plonk/issues/815
 [#813]: https://github.com/dusk-network/plonk/issues/813
 [#805]: https://github.com/dusk-network/plonk/issues/805
diff --git a/Cargo.toml b/Cargo.toml
index b499908a..cfac8ed1 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -33,6 +33,7 @@ rkyv = {version = "0.7", optional = true, default-features = false}
 bytecheck = {version = "0.6", optional = true, default-features = false}
 backtrace = {version = "0.3", optional = true}
 dusk-cdf = {version = "0.5", optional = true}
+zeroize = { version = "1", optional = true }
 
 [dev-dependencies]
 criterion = "0.5"
@@ -56,6 +57,7 @@ std = [
 alloc = ["dusk-bls12_381/alloc", "msgpacker", "miniz_oxide", "sha2"]
 debug = ["dusk-cdf", "backtrace"]
 rkyv-impl = ["dusk-bls12_381/rkyv-impl", "dusk-jubjub/rkyv-impl", "rkyv", "bytecheck"]
+zeroize = ["dep:zeroize"]
 
 [profile.release]
 panic = "abort"
diff --git a/src/composer/constraint_system/witness.rs b/src/composer/constraint_system/witness.rs
index 2be31127..ee5b7ab8 100644
--- a/src/composer/constraint_system/witness.rs
+++ b/src/composer/constraint_system/witness.rs
@@ -7,6 +7,9 @@
 //! This module holds the components needed in the Constraint System.
 //! The components used are Variables, Witness and Wires.
 
+#[cfg(feature = "zeroize")]
+use zeroize::DefaultIsZeroes;
+
 /// Stores the data for a specific wire in an arithmetic circuit
 /// This data is the gate index and the type of wire
 /// Left(1) signifies that this wire belongs to the first gate and is the left
@@ -52,3 +55,6 @@ impl Witness {
         self.index
     }
 }
+
+#[cfg(feature = "zeroize")]
+impl DefaultIsZeroes for Witness {}