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I have a Xilinx Alveo U280 FPGA board. I am trying to synthesize the Pigasus code for the U280 board. Where all will the changes have to be made in order to do so? From what I could figure out, the code in the hardware/rtl_sim/src folder is hardware agnostic. But, in run_ipgen.sh, we specify the exact FPGA board (as Intel Stratix) to be used. How can I port the tcl script (ip_gen.tcl) from Intel Stratix FPGA to a Xilinx U280 FPGA ?
Thanks
The text was updated successfully, but these errors were encountered:
Hi,
I have a Xilinx Alveo U280 FPGA board. I am trying to synthesize the Pigasus code for the U280 board. Where all will the changes have to be made in order to do so? From what I could figure out, the code in the hardware/rtl_sim/src folder is hardware agnostic. But, in run_ipgen.sh, we specify the exact FPGA board (as Intel Stratix) to be used. How can I port the tcl script (ip_gen.tcl) from Intel Stratix FPGA to a Xilinx U280 FPGA ?
Thanks
The text was updated successfully, but these errors were encountered: